commit 470d0567f56537191ddb8181fa79af3e110ade15
Author: Thomas Schöpping <tschoepp@cit-ec.uni-bielefeld.de>
Date:   Thu Apr 20 16:21:27 2017 +0200

    Renamed the interface header file (in ./Target/Source/AMiRo/) from 'interfaces.h' to 'amiroblt.h'.
    The interface was additionally modified:
    - The magic number for identification has been changed from 0xFF669900 to 0x0x412D424C ("A-BL"), making the interface incompatible to older versions.
    - Several macros have been replaced by enums.
    - Some structs and enums have been renamed, making the interface incompatible to version 0.3.
    The memory layout, however, is unchanged so that required operating system tweaks are minimal.

diff --git a/Target/Demo/ARMCM3_STM32F103_DiWheelDrive_GCC/Boot/main.c b/Target/Demo/ARMCM3_STM32F103_DiWheelDrive_GCC/Boot/main.c
index 9952e71..91ed292 100644
--- a/Target/Demo/ARMCM3_STM32F103_DiWheelDrive_GCC/Boot/main.c
+++ b/Target/Demo/ARMCM3_STM32F103_DiWheelDrive_GCC/Boot/main.c
@@ -23,11 +23,11 @@
 * You should have received a copy of the GNU General Public License along with OpenBLT.
 * If not, see <http://www.gnu.org/licenses/>.
 *
-* A special exception to the GPL is included to allow you to distribute a combined work 
-* that includes OpenBLT without being obliged to provide the source code for any 
+* A special exception to the GPL is included to allow you to distribute a combined work
+* that includes OpenBLT without being obliged to provide the source code for any
 * proprietary components. The exception text is included at the bottom of the license
 * file <license.html>.
-* 
+*
 * \endinternal
 ****************************************************************************************/
 
@@ -39,7 +39,7 @@
 #include "stm32f10x_conf.h"                      /* STM32 peripheral drivers           */
 #include "timer.h"
 #include "ARMCM3_STM32/types.h"
-#include "AMiRo/interfaces.h"
+#include "AMiRo/amiroblt.h"
 #include "AMiRo/helper.h"
 
 
@@ -157,7 +157,7 @@ void shutdownToDeepsleep(const blt_bool exec_disambiguation);
 void shutdownToHibernate(const blt_bool exec_disambiguation);
 void shutdownAndRestart(const blt_bool exec_disambiguation);
 
-volatile BlBackupRegister backup_reg;
+volatile blBackupRegister_t backup_reg;
 
 /****************************************************************************************
 * Callback configuration
@@ -168,11 +168,11 @@ void blCallbackShutdownHibernate(void);
 void blCallbackShutdownRestart(void);
 void blCallbackHandleShutdownRequest(void);
 
-const BlCallbackTable cbtable __attribute ((section ("_callback_table"))) = {
+const blCallbackTable_t cbtable __attribute__ ((section ("_callback_table"))) = {
   .magicNumber = BL_MAGIC_NUMBER,
-  .versionMajor = BL_VERSION_MAJOR,
-  .versionMinor = BL_VERSION_MINOR,
-  .versionHotfix = 0,
+  .vBootloader = {BL_VERSION_ID_AMiRoBLT_Release, BL_VERSION_MAJOR, BL_VERSION_MINOR, 0},
+  .vSSSP = {BL_VERSION_ID_SSSP, SSSP_VERSION_MAJOR, SSSP_VERSION_MINOR, 0},
+  .vCompiler = {BL_VERSION_ID_GCC, __GNUC__, __GNUC_MINOR__, __GNUC_PATCHLEVEL__},  // currently only GCC is supported
   .cbShutdownHibernate = blCallbackShutdownHibernate,
   .cbShutdownDeepsleep = blCallbackShutdownDeepsleep,
   .cbShutdownTransportation = blCallbackShutdownTransportation,
@@ -189,7 +189,7 @@ const BlCallbackTable cbtable __attribute ((section ("_callback_table"))) = {
 
 
 /************************************************************************************//**
-** \brief     This is the entry point for the bootloader application and is called 
+** \brief     This is the entry point for the bootloader application and is called
 **            by the reset interrupt vector after the C-startup routines executed.
 ** \return    Program return code.
 **
@@ -276,7 +276,7 @@ int main(void)
 
 
 /************************************************************************************//**
-** \brief     Initializes the microcontroller. 
+** \brief     Initializes the microcontroller.
 ** \return    none.
 **
 ****************************************************************************************/
@@ -286,8 +286,8 @@ static void Init(void)
   blt_int32u pll_multiplier;
 #if (BOOT_FILE_LOGGING_ENABLE > 0) && (BOOT_COM_UART_ENABLE == 0)
   GPIO_InitTypeDef  GPIO_InitStruct;
-  USART_InitTypeDef USART_InitStruct;  
-#endif  
+  USART_InitTypeDef USART_InitStruct;
+#endif
 
   /* reset the RCC clock configuration to the default reset state (for debug purpose) */
   /* set HSION bit */
@@ -302,14 +302,14 @@ static void Init(void)
   RCC->CFGR &= (blt_int32u)0xFF80FFFF;
   /* disable all interrupts and clear pending bits  */
   RCC->CIR = 0x009F0000;
-  /* enable HSE */    
+  /* enable HSE */
   RCC->CR |= ((blt_int32u)RCC_CR_HSEON);
   /* wait till HSE is ready and if Time out is reached exit */
   do
   {
     HSEStatus = RCC->CR & RCC_CR_HSERDY;
-    StartUpCounter++;  
-  } 
+    StartUpCounter++;
+  }
   while((HSEStatus == 0) && (StartUpCounter != 1500));
   /* check if time out was reached */
   if ((RCC->CR & RCC_CR_HSERDY) == RESET)
@@ -323,10 +323,10 @@ static void Init(void)
   FLASH->ACR &= (blt_int32u)((blt_int32u)~FLASH_ACR_LATENCY);
 #if (BOOT_CPU_SYSTEM_SPEED_KHZ > 48000)
   /* configure 2 flash wait states */
-  FLASH->ACR |= (blt_int32u)FLASH_ACR_LATENCY_2;    
-#elif (BOOT_CPU_SYSTEM_SPEED_KHZ > 24000)  
+  FLASH->ACR |= (blt_int32u)FLASH_ACR_LATENCY_2;
+#elif (BOOT_CPU_SYSTEM_SPEED_KHZ > 24000)
   /* configure 1 flash wait states */
-  FLASH->ACR |= (blt_int32u)FLASH_ACR_LATENCY_1;    
+  FLASH->ACR |= (blt_int32u)FLASH_ACR_LATENCY_1;
 #endif
   /* HCLK = SYSCLK */
   RCC->CFGR |= (blt_int32u)RCC_CFGR_HPRE_DIV1;
@@ -354,7 +354,7 @@ static void Init(void)
   }
   /* select PLL as system clock source */
   RCC->CFGR &= (blt_int32u)((blt_int32u)~(RCC_CFGR_SW));
-  RCC->CFGR |= (blt_int32u)RCC_CFGR_SW_PLL;    
+  RCC->CFGR |= (blt_int32u)RCC_CFGR_SW_PLL;
   /* wait till PLL is used as system clock source */
   while ((RCC->CFGR & (blt_int32u)RCC_CFGR_SWS) != (blt_int32u)0x08)
   {
