amiro-blt / Target / Demo / ARMCM3_STM32F103_DiWheelDrive_GCC / Boot / lib / STM32F10x_StdPeriph_Driver / src / stm32f10x_iwdg.c @ 69661903
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1 | 69661903 | Thomas Schöpping | /**
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2 | ******************************************************************************
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3 | * @file stm32f10x_iwdg.c
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4 | * @author MCD Application Team
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5 | * @version V3.5.0
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6 | * @date 11-March-2011
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7 | * @brief This file provides all the IWDG firmware functions.
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8 | ******************************************************************************
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9 | * @attention
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10 | *
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11 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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12 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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13 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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14 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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15 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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16 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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17 | *
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18 | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
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19 | ******************************************************************************
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20 | */
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21 | |||
22 | /* Includes ------------------------------------------------------------------*/
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23 | #include "stm32f10x_iwdg.h" |
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24 | |||
25 | /** @addtogroup STM32F10x_StdPeriph_Driver
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26 | * @{
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27 | */
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28 | |||
29 | /** @defgroup IWDG
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30 | * @brief IWDG driver modules
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31 | * @{
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32 | */
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33 | |||
34 | /** @defgroup IWDG_Private_TypesDefinitions
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35 | * @{
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36 | */
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37 | |||
38 | /**
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39 | * @}
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40 | */
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41 | |||
42 | /** @defgroup IWDG_Private_Defines
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43 | * @{
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44 | */
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45 | |||
46 | /* ---------------------- IWDG registers bit mask ----------------------------*/
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47 | |||
48 | /* KR register bit mask */
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49 | #define KR_KEY_Reload ((uint16_t)0xAAAA) |
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50 | #define KR_KEY_Enable ((uint16_t)0xCCCC) |
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51 | |||
52 | /**
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53 | * @}
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54 | */
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55 | |||
56 | /** @defgroup IWDG_Private_Macros
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57 | * @{
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58 | */
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59 | |||
60 | /**
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61 | * @}
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62 | */
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63 | |||
64 | /** @defgroup IWDG_Private_Variables
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65 | * @{
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66 | */
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67 | |||
68 | /**
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69 | * @}
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70 | */
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71 | |||
72 | /** @defgroup IWDG_Private_FunctionPrototypes
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73 | * @{
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74 | */
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75 | |||
76 | /**
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77 | * @}
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78 | */
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79 | |||
80 | /** @defgroup IWDG_Private_Functions
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81 | * @{
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82 | */
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83 | |||
84 | /**
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85 | * @brief Enables or disables write access to IWDG_PR and IWDG_RLR registers.
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86 | * @param IWDG_WriteAccess: new state of write access to IWDG_PR and IWDG_RLR registers.
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87 | * This parameter can be one of the following values:
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88 | * @arg IWDG_WriteAccess_Enable: Enable write access to IWDG_PR and IWDG_RLR registers
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89 | * @arg IWDG_WriteAccess_Disable: Disable write access to IWDG_PR and IWDG_RLR registers
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90 | * @retval None
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91 | */
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92 | void IWDG_WriteAccessCmd(uint16_t IWDG_WriteAccess)
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93 | { |
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94 | /* Check the parameters */
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95 | assert_param(IS_IWDG_WRITE_ACCESS(IWDG_WriteAccess)); |
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96 | IWDG->KR = IWDG_WriteAccess; |
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97 | } |
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98 | |||
99 | /**
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100 | * @brief Sets IWDG Prescaler value.
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101 | * @param IWDG_Prescaler: specifies the IWDG Prescaler value.
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102 | * This parameter can be one of the following values:
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103 | * @arg IWDG_Prescaler_4: IWDG prescaler set to 4
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104 | * @arg IWDG_Prescaler_8: IWDG prescaler set to 8
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105 | * @arg IWDG_Prescaler_16: IWDG prescaler set to 16
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106 | * @arg IWDG_Prescaler_32: IWDG prescaler set to 32
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107 | * @arg IWDG_Prescaler_64: IWDG prescaler set to 64
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108 | * @arg IWDG_Prescaler_128: IWDG prescaler set to 128
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109 | * @arg IWDG_Prescaler_256: IWDG prescaler set to 256
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110 | * @retval None
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111 | */
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112 | void IWDG_SetPrescaler(uint8_t IWDG_Prescaler)
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113 | { |
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114 | /* Check the parameters */
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115 | assert_param(IS_IWDG_PRESCALER(IWDG_Prescaler)); |
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116 | IWDG->PR = IWDG_Prescaler; |
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117 | } |
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118 | |||
119 | /**
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120 | * @brief Sets IWDG Reload value.
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121 | * @param Reload: specifies the IWDG Reload value.
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122 | * This parameter must be a number between 0 and 0x0FFF.
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123 | * @retval None
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124 | */
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125 | void IWDG_SetReload(uint16_t Reload)
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126 | { |
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127 | /* Check the parameters */
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128 | assert_param(IS_IWDG_RELOAD(Reload)); |
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129 | IWDG->RLR = Reload; |
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130 | } |
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131 | |||
132 | /**
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133 | * @brief Reloads IWDG counter with value defined in the reload register
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134 | * (write access to IWDG_PR and IWDG_RLR registers disabled).
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135 | * @param None
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136 | * @retval None
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137 | */
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138 | void IWDG_ReloadCounter(void) |
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139 | { |
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140 | IWDG->KR = KR_KEY_Reload; |
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141 | } |
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142 | |||
143 | /**
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144 | * @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers disabled).
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145 | * @param None
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146 | * @retval None
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147 | */
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148 | void IWDG_Enable(void) |
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149 | { |
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150 | IWDG->KR = KR_KEY_Enable; |
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151 | } |
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152 | |||
153 | /**
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154 | * @brief Checks whether the specified IWDG flag is set or not.
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155 | * @param IWDG_FLAG: specifies the flag to check.
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156 | * This parameter can be one of the following values:
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157 | * @arg IWDG_FLAG_PVU: Prescaler Value Update on going
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158 | * @arg IWDG_FLAG_RVU: Reload Value Update on going
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159 | * @retval The new state of IWDG_FLAG (SET or RESET).
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160 | */
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161 | FlagStatus IWDG_GetFlagStatus(uint16_t IWDG_FLAG) |
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162 | { |
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163 | FlagStatus bitstatus = RESET; |
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164 | /* Check the parameters */
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165 | assert_param(IS_IWDG_FLAG(IWDG_FLAG)); |
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166 | if ((IWDG->SR & IWDG_FLAG) != (uint32_t)RESET)
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167 | { |
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168 | bitstatus = SET; |
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169 | } |
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170 | else
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171 | { |
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172 | bitstatus = RESET; |
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173 | } |
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174 | /* Return the flag status */
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175 | return bitstatus;
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176 | } |
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177 | |||
178 | /**
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179 | * @}
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180 | */
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181 | |||
182 | /**
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183 | * @}
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184 | */
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185 | |||
186 | /**
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187 | * @}
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188 | */
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189 | |||
190 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
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