amiro-blt / Target / Demo / ARMCM3_STM32F103_LightRing_GCC / Boot / lib / STM32F10x_StdPeriph_Driver / inc / stm32f10x_spi.h @ 69661903
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1 | 69661903 | Thomas Schöpping | /**
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2 | ******************************************************************************
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3 | * @file stm32f10x_spi.h
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4 | * @author MCD Application Team
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5 | * @version V3.5.0
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6 | * @date 11-March-2011
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7 | * @brief This file contains all the functions prototypes for the SPI firmware
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8 | * library.
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9 | ******************************************************************************
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10 | * @attention
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11 | *
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12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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18 | *
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19 | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
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20 | ******************************************************************************
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21 | */
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22 | |||
23 | /* Define to prevent recursive inclusion -------------------------------------*/
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24 | #ifndef __STM32F10x_SPI_H
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25 | #define __STM32F10x_SPI_H
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26 | |||
27 | #ifdef __cplusplus
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28 | extern "C" { |
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29 | #endif
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30 | |||
31 | /* Includes ------------------------------------------------------------------*/
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32 | #include "stm32f10x.h" |
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33 | |||
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
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35 | * @{
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36 | */
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37 | |||
38 | /** @addtogroup SPI
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39 | * @{
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40 | */
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41 | |||
42 | /** @defgroup SPI_Exported_Types
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43 | * @{
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44 | */
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45 | |||
46 | /**
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47 | * @brief SPI Init structure definition
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48 | */
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49 | |||
50 | typedef struct |
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51 | { |
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52 | uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
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53 | This parameter can be a value of @ref SPI_data_direction */
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54 | |||
55 | uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
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56 | This parameter can be a value of @ref SPI_mode */
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57 | |||
58 | uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
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59 | This parameter can be a value of @ref SPI_data_size */
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60 | |||
61 | uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
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62 | This parameter can be a value of @ref SPI_Clock_Polarity */
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63 | |||
64 | uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
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65 | This parameter can be a value of @ref SPI_Clock_Phase */
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66 | |||
67 | uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
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68 | hardware (NSS pin) or by software using the SSI bit.
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69 | This parameter can be a value of @ref SPI_Slave_Select_management */
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70 | |||
71 | uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
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72 | used to configure the transmit and receive SCK clock.
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73 | This parameter can be a value of @ref SPI_BaudRate_Prescaler.
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74 | @note The communication clock is derived from the master
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75 | clock. The slave clock does not need to be set. */
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76 | |||
77 | uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
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78 | This parameter can be a value of @ref SPI_MSB_LSB_transmission */
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79 | |||
80 | uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
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81 | }SPI_InitTypeDef; |
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82 | |||
83 | /**
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84 | * @brief I2S Init structure definition
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85 | */
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86 | |||
87 | typedef struct |
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88 | { |
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89 | |||
90 | uint16_t I2S_Mode; /*!< Specifies the I2S operating mode.
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91 | This parameter can be a value of @ref I2S_Mode */
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92 | |||
93 | uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication.
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94 | This parameter can be a value of @ref I2S_Standard */
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95 | |||
96 | uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication.
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97 | This parameter can be a value of @ref I2S_Data_Format */
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98 | |||
99 | uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
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100 | This parameter can be a value of @ref I2S_MCLK_Output */
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101 | |||
102 | uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
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103 | This parameter can be a value of @ref I2S_Audio_Frequency */
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104 | |||
105 | uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock.
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106 | This parameter can be a value of @ref I2S_Clock_Polarity */
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107 | }I2S_InitTypeDef; |
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108 | |||
109 | /**
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110 | * @}
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111 | */
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112 | |||
113 | /** @defgroup SPI_Exported_Constants
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114 | * @{
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115 | */
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116 | |||
117 | #define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
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118 | ((PERIPH) == SPI2) || \ |
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119 | ((PERIPH) == SPI3)) |
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120 | |||
121 | #define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
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122 | ((PERIPH) == SPI3)) |
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123 | |||
124 | /** @defgroup SPI_data_direction
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125 | * @{
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126 | */
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127 | |||
128 | #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000) |
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129 | #define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400) |
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130 | #define SPI_Direction_1Line_Rx ((uint16_t)0x8000) |
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131 | #define SPI_Direction_1Line_Tx ((uint16_t)0xC000) |
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132 | #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
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133 | ((MODE) == SPI_Direction_2Lines_RxOnly) || \ |
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134 | ((MODE) == SPI_Direction_1Line_Rx) || \ |
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135 | ((MODE) == SPI_Direction_1Line_Tx)) |
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136 | /**
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137 | * @}
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138 | */
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139 | |||
140 | /** @defgroup SPI_mode
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141 | * @{
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142 | */
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143 | |||
144 | #define SPI_Mode_Master ((uint16_t)0x0104) |
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145 | #define SPI_Mode_Slave ((uint16_t)0x0000) |
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146 | #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
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147 | ((MODE) == SPI_Mode_Slave)) |
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148 | /**
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149 | * @}
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150 | */
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151 | |||
152 | /** @defgroup SPI_data_size
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153 | * @{
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154 | */
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155 | |||
156 | #define SPI_DataSize_16b ((uint16_t)0x0800) |
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157 | #define SPI_DataSize_8b ((uint16_t)0x0000) |
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158 | #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
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159 | ((DATASIZE) == SPI_DataSize_8b)) |
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160 | /**
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161 | * @}
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162 | */
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163 | |||
164 | /** @defgroup SPI_Clock_Polarity
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165 | * @{
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166 | */
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167 | |||
168 | #define SPI_CPOL_Low ((uint16_t)0x0000) |
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169 | #define SPI_CPOL_High ((uint16_t)0x0002) |
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170 | #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
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171 | ((CPOL) == SPI_CPOL_High)) |
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172 | /**
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173 | * @}
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174 | */
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175 | |||
176 | /** @defgroup SPI_Clock_Phase
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177 | * @{
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178 | */
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179 | |||
180 | #define SPI_CPHA_1Edge ((uint16_t)0x0000) |
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181 | #define SPI_CPHA_2Edge ((uint16_t)0x0001) |
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182 | #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
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183 | ((CPHA) == SPI_CPHA_2Edge)) |
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184 | /**
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185 | * @}
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186 | */
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187 | |||
188 | /** @defgroup SPI_Slave_Select_management
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189 | * @{
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190 | */
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191 | |||
192 | #define SPI_NSS_Soft ((uint16_t)0x0200) |
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193 | #define SPI_NSS_Hard ((uint16_t)0x0000) |
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194 | #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
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195 | ((NSS) == SPI_NSS_Hard)) |
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196 | /**
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197 | * @}
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198 | */
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199 | |||
200 | /** @defgroup SPI_BaudRate_Prescaler
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201 | * @{
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202 | */
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203 | |||
204 | #define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000) |
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205 | #define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008) |
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206 | #define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010) |
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207 | #define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018) |
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208 | #define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020) |
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209 | #define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028) |
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210 | #define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030) |
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211 | #define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038) |
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212 | #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
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213 | ((PRESCALER) == SPI_BaudRatePrescaler_4) || \ |
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214 | ((PRESCALER) == SPI_BaudRatePrescaler_8) || \ |
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215 | ((PRESCALER) == SPI_BaudRatePrescaler_16) || \ |
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216 | ((PRESCALER) == SPI_BaudRatePrescaler_32) || \ |
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217 | ((PRESCALER) == SPI_BaudRatePrescaler_64) || \ |
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218 | ((PRESCALER) == SPI_BaudRatePrescaler_128) || \ |
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219 | ((PRESCALER) == SPI_BaudRatePrescaler_256)) |
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220 | /**
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221 | * @}
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222 | */
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223 | |||
224 | /** @defgroup SPI_MSB_LSB_transmission
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225 | * @{
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226 | */
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227 | |||
228 | #define SPI_FirstBit_MSB ((uint16_t)0x0000) |
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229 | #define SPI_FirstBit_LSB ((uint16_t)0x0080) |
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230 | #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
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231 | ((BIT) == SPI_FirstBit_LSB)) |
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232 | /**
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233 | * @}
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234 | */
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235 | |||
236 | /** @defgroup I2S_Mode
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237 | * @{
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238 | */
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239 | |||
240 | #define I2S_Mode_SlaveTx ((uint16_t)0x0000) |
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241 | #define I2S_Mode_SlaveRx ((uint16_t)0x0100) |
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242 | #define I2S_Mode_MasterTx ((uint16_t)0x0200) |
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243 | #define I2S_Mode_MasterRx ((uint16_t)0x0300) |
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244 | #define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
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245 | ((MODE) == I2S_Mode_SlaveRx) || \ |
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246 | ((MODE) == I2S_Mode_MasterTx) || \ |
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247 | ((MODE) == I2S_Mode_MasterRx) ) |
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248 | /**
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249 | * @}
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250 | */
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251 | |||
252 | /** @defgroup I2S_Standard
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253 | * @{
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254 | */
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255 | |||
256 | #define I2S_Standard_Phillips ((uint16_t)0x0000) |
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257 | #define I2S_Standard_MSB ((uint16_t)0x0010) |
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258 | #define I2S_Standard_LSB ((uint16_t)0x0020) |
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259 | #define I2S_Standard_PCMShort ((uint16_t)0x0030) |
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260 | #define I2S_Standard_PCMLong ((uint16_t)0x00B0) |
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261 | #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
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262 | ((STANDARD) == I2S_Standard_MSB) || \ |
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263 | ((STANDARD) == I2S_Standard_LSB) || \ |
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264 | ((STANDARD) == I2S_Standard_PCMShort) || \ |
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265 | ((STANDARD) == I2S_Standard_PCMLong)) |
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266 | /**
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267 | * @}
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268 | */
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269 | |||
270 | /** @defgroup I2S_Data_Format
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271 | * @{
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272 | */
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273 | |||
274 | #define I2S_DataFormat_16b ((uint16_t)0x0000) |
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275 | #define I2S_DataFormat_16bextended ((uint16_t)0x0001) |
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276 | #define I2S_DataFormat_24b ((uint16_t)0x0003) |
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277 | #define I2S_DataFormat_32b ((uint16_t)0x0005) |
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278 | #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
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279 | ((FORMAT) == I2S_DataFormat_16bextended) || \ |
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280 | ((FORMAT) == I2S_DataFormat_24b) || \ |
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281 | ((FORMAT) == I2S_DataFormat_32b)) |
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282 | /**
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283 | * @}
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284 | */
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285 | |||
286 | /** @defgroup I2S_MCLK_Output
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287 | * @{
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288 | */
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289 | |||
290 | #define I2S_MCLKOutput_Enable ((uint16_t)0x0200) |
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291 | #define I2S_MCLKOutput_Disable ((uint16_t)0x0000) |
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292 | #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
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293 | ((OUTPUT) == I2S_MCLKOutput_Disable)) |
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294 | /**
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295 | * @}
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296 | */
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297 | |||
298 | /** @defgroup I2S_Audio_Frequency
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299 | * @{
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300 | */
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301 | |||
302 | #define I2S_AudioFreq_192k ((uint32_t)192000) |
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303 | #define I2S_AudioFreq_96k ((uint32_t)96000) |
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304 | #define I2S_AudioFreq_48k ((uint32_t)48000) |
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305 | #define I2S_AudioFreq_44k ((uint32_t)44100) |
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306 | #define I2S_AudioFreq_32k ((uint32_t)32000) |
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307 | #define I2S_AudioFreq_22k ((uint32_t)22050) |
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308 | #define I2S_AudioFreq_16k ((uint32_t)16000) |
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309 | #define I2S_AudioFreq_11k ((uint32_t)11025) |
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310 | #define I2S_AudioFreq_8k ((uint32_t)8000) |
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311 | #define I2S_AudioFreq_Default ((uint32_t)2) |
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312 | |||
313 | #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
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314 | ((FREQ) <= I2S_AudioFreq_192k)) || \ |
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315 | ((FREQ) == I2S_AudioFreq_Default)) |
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316 | /**
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317 | * @}
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318 | */
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319 | |||
320 | /** @defgroup I2S_Clock_Polarity
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321 | * @{
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322 | */
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323 | |||
324 | #define I2S_CPOL_Low ((uint16_t)0x0000) |
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325 | #define I2S_CPOL_High ((uint16_t)0x0008) |
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326 | #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
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327 | ((CPOL) == I2S_CPOL_High)) |
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328 | /**
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329 | * @}
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330 | */
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331 | |||
332 | /** @defgroup SPI_I2S_DMA_transfer_requests
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333 | * @{
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334 | */
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335 | |||
336 | #define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002) |
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337 | #define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001) |
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338 | #define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00)) |
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339 | /**
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340 | * @}
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341 | */
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342 | |||
343 | /** @defgroup SPI_NSS_internal_software_management
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344 | * @{
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345 | */
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346 | |||
347 | #define SPI_NSSInternalSoft_Set ((uint16_t)0x0100) |
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348 | #define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF) |
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349 | #define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
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350 | ((INTERNAL) == SPI_NSSInternalSoft_Reset)) |
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351 | /**
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352 | * @}
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353 | */
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354 | |||
355 | /** @defgroup SPI_CRC_Transmit_Receive
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356 | * @{
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357 | */
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358 | |||
359 | #define SPI_CRC_Tx ((uint8_t)0x00) |
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360 | #define SPI_CRC_Rx ((uint8_t)0x01) |
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361 | #define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
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362 | /**
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363 | * @}
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364 | */
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365 | |||
366 | /** @defgroup SPI_direction_transmit_receive
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367 | * @{
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368 | */
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369 | |||
370 | #define SPI_Direction_Rx ((uint16_t)0xBFFF) |
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371 | #define SPI_Direction_Tx ((uint16_t)0x4000) |
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372 | #define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
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373 | ((DIRECTION) == SPI_Direction_Tx)) |
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374 | /**
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375 | * @}
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376 | */
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377 | |||
378 | /** @defgroup SPI_I2S_interrupts_definition
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379 | * @{
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380 | */
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381 | |||
382 | #define SPI_I2S_IT_TXE ((uint8_t)0x71) |
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383 | #define SPI_I2S_IT_RXNE ((uint8_t)0x60) |
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384 | #define SPI_I2S_IT_ERR ((uint8_t)0x50) |
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385 | #define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
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386 | ((IT) == SPI_I2S_IT_RXNE) || \ |
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387 | ((IT) == SPI_I2S_IT_ERR)) |
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388 | #define SPI_I2S_IT_OVR ((uint8_t)0x56) |
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389 | #define SPI_IT_MODF ((uint8_t)0x55) |
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390 | #define SPI_IT_CRCERR ((uint8_t)0x54) |
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391 | #define I2S_IT_UDR ((uint8_t)0x53) |
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392 | #define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
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393 | #define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE) || ((IT) == SPI_I2S_IT_TXE) || \
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394 | ((IT) == I2S_IT_UDR) || ((IT) == SPI_IT_CRCERR) || \ |
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395 | ((IT) == SPI_IT_MODF) || ((IT) == SPI_I2S_IT_OVR)) |
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396 | /**
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397 | * @}
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398 | */
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399 | |||
400 | /** @defgroup SPI_I2S_flags_definition
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401 | * @{
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402 | */
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403 | |||
404 | #define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001) |
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405 | #define SPI_I2S_FLAG_TXE ((uint16_t)0x0002) |
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406 | #define I2S_FLAG_CHSIDE ((uint16_t)0x0004) |
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407 | #define I2S_FLAG_UDR ((uint16_t)0x0008) |
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408 | #define SPI_FLAG_CRCERR ((uint16_t)0x0010) |
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409 | #define SPI_FLAG_MODF ((uint16_t)0x0020) |
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410 | #define SPI_I2S_FLAG_OVR ((uint16_t)0x0040) |
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411 | #define SPI_I2S_FLAG_BSY ((uint16_t)0x0080) |
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412 | #define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
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413 | #define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
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414 | ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \ |
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415 | ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \ |
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416 | ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE)) |
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417 | /**
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418 | * @}
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419 | */
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420 | |||
421 | /** @defgroup SPI_CRC_polynomial
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422 | * @{
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423 | */
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424 | |||
425 | #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1) |
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426 | /**
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427 | * @}
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428 | */
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429 | |||
430 | /**
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431 | * @}
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432 | */
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433 | |||
434 | /** @defgroup SPI_Exported_Macros
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435 | * @{
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436 | */
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437 | |||
438 | /**
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439 | * @}
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440 | */
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441 | |||
442 | /** @defgroup SPI_Exported_Functions
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443 | * @{
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444 | */
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445 | |||
446 | void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
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447 | void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
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448 | void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
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449 | void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
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450 | void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
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451 | void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
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452 | void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
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453 | void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
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454 | void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
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455 | void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
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456 | uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx); |
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457 | void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
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458 | void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
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459 | void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
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460 | void SPI_TransmitCRC(SPI_TypeDef* SPIx);
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461 | void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
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462 | uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC); |
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463 | uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx); |
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464 | void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
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465 | FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG); |
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466 | void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
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467 | ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT); |
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468 | void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
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469 | |||
470 | #ifdef __cplusplus
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471 | } |
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472 | #endif
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473 | |||
474 | #endif /*__STM32F10x_SPI_H */ |
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475 | /**
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476 | * @}
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477 | */
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478 | |||
479 | /**
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480 | * @}
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481 | */
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482 | |||
483 | /**
|
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484 | * @}
|
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485 | */
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486 | |||
487 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
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