AMiRo-OS

/**************************************************************************//**

 * @file     core_cmFunc.h

 * @brief    CMSIS Cortex-M Core Function Access Header File

 * @version  V3.01

 * @date     06. March 2012

 *

 * @note

 * Copyright (C) 2009-2012 ARM Limited. All rights reserved.

 *

 * @par

 * ARM Limited (ARM) is supplying this software for use with Cortex-M

 * processor based microcontrollers.  This file can be freely distributed

 * within development tools that are supporting such ARM based processors.

 *

 * @par

 * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED

 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF

 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.

 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR

 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

 *

 ******************************************************************************/

#ifndef __CORE_CMFUNC_H

#define __CORE_CMFUNC_H

/* ###########################  Core Function Access  ########################### */

/** \ingroup  CMSIS_Core_FunctionInterface

    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions

  @{

 */

#if   defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/

/* ARM armcc specific functions */

#if (__ARMCC_VERSION < 400677)

  #error "Please use ARM Compiler Toolchain V4.0.677 or later!"

#endif

/* intrinsic void __enable_irq();     */

/* intrinsic void __disable_irq();    */

/** \brief  Get Control Register

    This function returns the content of the Control Register.

    \return               Control Register value

 */

__STATIC_INLINE uint32_t __get_CONTROL(void)

{

  register uint32_t __regControl         __ASM("control");

  return(__regControl);

}

/** \brief  Set Control Register

    This function writes the given value to the Control Register.

    \param [in]    control  Control Register value to set

 */

__STATIC_INLINE void __set_CONTROL(uint32_t control)

{

  register uint32_t __regControl         __ASM("control");

  __regControl = control;

}

/** \brief  Get IPSR Register

    This function returns the content of the IPSR Register.

    \return               IPSR Register value

 */

__STATIC_INLINE uint32_t __get_IPSR(void)

{

  register uint32_t __regIPSR          __ASM("ipsr");

  return(__regIPSR);

}

/** \brief  Get APSR Register

    This function returns the content of the APSR Register.

    \return               APSR Register value

 */

__STATIC_INLINE uint32_t __get_APSR(void)

{

  register uint32_t __regAPSR          __ASM("apsr");

  return(__regAPSR);

}

/** \brief  Get xPSR Register

    This function returns the content of the xPSR Register.

    \return               xPSR Register value

 */

__STATIC_INLINE uint32_t __get_xPSR(void)

{

  register uint32_t __regXPSR          __ASM("xpsr");

  return(__regXPSR);

}

/** \brief  Get Process Stack Pointer

    This function returns the current value of the Process Stack Pointer (PSP).

    \return               PSP Register value

 */

__STATIC_INLINE uint32_t __get_PSP(void)

{

  register uint32_t __regProcessStackPointer  __ASM("psp");

  return(__regProcessStackPointer);

}

/** \brief  Set Process Stack Pointer

    This function assigns the given value to the Process Stack Pointer (PSP).

    \param [in]    topOfProcStack  Process Stack Pointer value to set

 */

__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)

{

  register uint32_t __regProcessStackPointer  __ASM("psp");

  __regProcessStackPointer = topOfProcStack;

}

/** \brief  Get Main Stack Pointer

    This function returns the current value of the Main Stack Pointer (MSP).

    \return               MSP Register value

 */

__STATIC_INLINE uint32_t __get_MSP(void)

{

  register uint32_t __regMainStackPointer     __ASM("msp");

  return(__regMainStackPointer);

}

/** \brief  Set Main Stack Pointer

    This function assigns the given value to the Main Stack Pointer (MSP).

    \param [in]    topOfMainStack  Main Stack Pointer value to set

 */

__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)

{

  register uint32_t __regMainStackPointer     __ASM("msp");

  __regMainStackPointer = topOfMainStack;

}

/** \brief  Get Priority Mask

    This function returns the current state of the priority mask bit from the Priority Mask Register.

    \return               Priority Mask value

 */

__STATIC_INLINE uint32_t __get_PRIMASK(void)

{

  register uint32_t __regPriMask         __ASM("primask");

  return(__regPriMask);

}

/** \brief  Set Priority Mask

    This function assigns the given value to the Priority Mask Register.

    \param [in]    priMask  Priority Mask

 */

__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)

{

  register uint32_t __regPriMask         __ASM("primask");

  __regPriMask = (priMask);

}

#if       (__CORTEX_M >= 0x03)

/** \brief  Enable FIQ

    This function enables FIQ interrupts by clearing the F-bit in the CPSR.

    Can only be executed in Privileged modes.

 */

#define __enable_fault_irq                __enable_fiq

/** \brief  Disable FIQ

    This function disables FIQ interrupts by setting the F-bit in the CPSR.

    Can only be executed in Privileged modes.

 */

#define __disable_fault_irq               __disable_fiq

/** \brief  Get Base Priority

    This function returns the current value of the Base Priority register.

    \return               Base Priority register value

 */

__STATIC_INLINE uint32_t  __get_BASEPRI(void)

{

  register uint32_t __regBasePri         __ASM("basepri");

  return(__regBasePri);

}

/** \brief  Set Base Priority

    This function assigns the given value to the Base Priority register.

    \param [in]    basePri  Base Priority value to set

 */

__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)

{

  register uint32_t __regBasePri         __ASM("basepri");

  __regBasePri = (basePri & 0xff);

}

/** \brief  Get Fault Mask

    This function returns the current value of the Fault Mask register.

    \return               Fault Mask register value

 */

__STATIC_INLINE uint32_t __get_FAULTMASK(void)

{

  register uint32_t __regFaultMask       __ASM("faultmask");

  return(__regFaultMask);

}

/** \brief  Set Fault Mask

    This function assigns the given value to the Fault Mask register.

    \param [in]    faultMask  Fault Mask value to set

 */

__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)

{

  register uint32_t __regFaultMask       __ASM("faultmask");

  __regFaultMask = (faultMask & (uint32_t)1);

}

#endif /* (__CORTEX_M >= 0x03) */

#if       (__CORTEX_M == 0x04)

/** \brief  Get FPSCR

    This function returns the current value of the Floating Point Status/Control register.

    \return               Floating Point Status/Control register value

 */

__STATIC_INLINE uint32_t __get_FPSCR(void)

{

#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)

  register uint32_t __regfpscr         __ASM("fpscr");

  return(__regfpscr);

#else

   return(0);

#endif

}

/** \brief  Set FPSCR

    This function assigns the given value to the Floating Point Status/Control register.

    \param [in]    fpscr  Floating Point Status/Control value to set

 */

__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)

{

#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)

  register uint32_t __regfpscr         __ASM("fpscr");

  __regfpscr = (fpscr);

#endif

}

#endif /* (__CORTEX_M == 0x04) */

#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/

/* IAR iccarm specific functions */

#include <cmsis_iar.h>

#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/

/* TI CCS specific functions */

#include <cmsis_ccs.h>

#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/

/* GNU gcc specific functions */

/** \brief  Enable IRQ Interrupts

  This function enables IRQ interrupts by clearing the I-bit in the CPSR.

  Can only be executed in Privileged modes.

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)

{

  __ASM volatile ("cpsie i");

}

/** \brief  Disable IRQ Interrupts

  This function disables IRQ interrupts by setting the I-bit in the CPSR.

  Can only be executed in Privileged modes.

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)

{

  __ASM volatile ("cpsid i");

}

/** \brief  Get Control Register

    This function returns the content of the Control Register.

    \return               Control Register value

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)

{

  uint32_t result;

  __ASM volatile ("MRS %0, control" : "=r" (result) );

  return(result);

}

/** \brief  Set Control Register

    This function writes the given value to the Control Register.

    \param [in]    control  Control Register value to set

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)

{

  __ASM volatile ("MSR control, %0" : : "r" (control) );

}

/** \brief  Get IPSR Register

    This function returns the content of the IPSR Register.

    \return               IPSR Register value

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)

{

  uint32_t result;

  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );

  return(result);

}

/** \brief  Get APSR Register

    This function returns the content of the APSR Register.

    \return               APSR Register value

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)

{

  uint32_t result;

  __ASM volatile ("MRS %0, apsr" : "=r" (result) );

  return(result);

}

/** \brief  Get xPSR Register

    This function returns the content of the xPSR Register.

    \return               xPSR Register value

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)

{

  uint32_t result;

  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );

  return(result);

}

/** \brief  Get Process Stack Pointer

    This function returns the current value of the Process Stack Pointer (PSP).

    \return               PSP Register value

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)

{

  register uint32_t result;

  __ASM volatile ("MRS %0, psp\n"  : "=r" (result) );

  return(result);

}

/** \brief  Set Process Stack Pointer

    This function assigns the given value to the Process Stack Pointer (PSP).

    \param [in]    topOfProcStack  Process Stack Pointer value to set

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)

{

  __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) );

}

/** \brief  Get Main Stack Pointer

    This function returns the current value of the Main Stack Pointer (MSP).

    \return               MSP Register value

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)

{

  register uint32_t result;

  __ASM volatile ("MRS %0, msp\n" : "=r" (result) );

  return(result);

}

/** \brief  Set Main Stack Pointer

    This function assigns the given value to the Main Stack Pointer (MSP).

    \param [in]    topOfMainStack  Main Stack Pointer value to set

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)

{

  __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) );

}

/** \brief  Get Priority Mask

    This function returns the current state of the priority mask bit from the Priority Mask Register.

    \return               Priority Mask value

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)

{

  uint32_t result;

  __ASM volatile ("MRS %0, primask" : "=r" (result) );

  return(result);

}

/** \brief  Set Priority Mask

    This function assigns the given value to the Priority Mask Register.

    \param [in]    priMask  Priority Mask

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)

{

  __ASM volatile ("MSR primask, %0" : : "r" (priMask) );

}

#if       (__CORTEX_M >= 0x03)

/** \brief  Enable FIQ

    This function enables FIQ interrupts by clearing the F-bit in the CPSR.

    Can only be executed in Privileged modes.

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)

{

  __ASM volatile ("cpsie f");

}

/** \brief  Disable FIQ

    This function disables FIQ interrupts by setting the F-bit in the CPSR.

    Can only be executed in Privileged modes.

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)

{

  __ASM volatile ("cpsid f");

}

/** \brief  Get Base Priority

    This function returns the current value of the Base Priority register.

    \return               Base Priority register value

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)

{

  uint32_t result;

  __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );

  return(result);

}

/** \brief  Set Base Priority

    This function assigns the given value to the Base Priority register.

    \param [in]    basePri  Base Priority value to set

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)

{

  __ASM volatile ("MSR basepri, %0" : : "r" (value) );

}

/** \brief  Get Fault Mask

    This function returns the current value of the Fault Mask register.

    \return               Fault Mask register value

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)

{

  uint32_t result;

  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );

  return(result);

}

/** \brief  Set Fault Mask

    This function assigns the given value to the Fault Mask register.

    \param [in]    faultMask  Fault Mask value to set

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)

{

  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );

}

#endif /* (__CORTEX_M >= 0x03) */

#if       (__CORTEX_M == 0x04)

/** \brief  Get FPSCR

    This function returns the current value of the Floating Point Status/Control register.

    \return               Floating Point Status/Control register value

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)

{

#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)

  uint32_t result;

  __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );

  return(result);

#else

   return(0);

#endif

}

/** \brief  Set FPSCR

    This function assigns the given value to the Floating Point Status/Control register.

    \param [in]    fpscr  Floating Point Status/Control value to set

 */

__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)

{

#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)

  __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) );

#endif

}

#endif /* (__CORTEX_M == 0x04) */

#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/

/* TASKING carm specific functions */

/*

 * The CMSIS functions have been implemented as intrinsics in the compiler.

 * Please use "carm -?i" to get an up to date list of all instrinsics,

 * Including the CMSIS ones.

 */

#endif

/*@} end of CMSIS_Core_RegAccFunctions */

#endif /* __CORE_CMFUNC_H */