amiro-blt / Target / Demo / ARMCM3_STM32F103_LightRing_GCC / Boot / lib / STM32F10x_StdPeriph_Driver / src / stm32f10x_can.c @ 69661903
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/**
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******************************************************************************
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* @file stm32f10x_can.c
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* @author MCD Application Team
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* @version V3.5.0
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* @date 11-March-2011
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* @brief This file provides all the CAN firmware functions.
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******************************************************************************
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* @attention
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f10x_can.h" |
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#include "stm32f10x_rcc.h" |
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/** @addtogroup STM32F10x_StdPeriph_Driver
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* @{
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*/
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/** @defgroup CAN
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* @brief CAN driver modules
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* @{
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*/
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/** @defgroup CAN_Private_TypesDefinitions
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup CAN_Private_Defines
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* @{
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*/
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/* CAN Master Control Register bits */
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#define MCR_DBF ((uint32_t)0x00010000) /* software master reset */ |
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/* CAN Mailbox Transmit Request */
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#define TMIDxR_TXRQ ((uint32_t)0x00000001) /* Transmit mailbox request */ |
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/* CAN Filter Master Register bits */
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#define FMR_FINIT ((uint32_t)0x00000001) /* Filter init mode */ |
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/* Time out for INAK bit */
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#define INAK_TIMEOUT ((uint32_t)0x0000FFFF) |
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/* Time out for SLAK bit */
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#define SLAK_TIMEOUT ((uint32_t)0x0000FFFF) |
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/* Flags in TSR register */
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#define CAN_FLAGS_TSR ((uint32_t)0x08000000) |
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/* Flags in RF1R register */
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#define CAN_FLAGS_RF1R ((uint32_t)0x04000000) |
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/* Flags in RF0R register */
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#define CAN_FLAGS_RF0R ((uint32_t)0x02000000) |
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/* Flags in MSR register */
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#define CAN_FLAGS_MSR ((uint32_t)0x01000000) |
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/* Flags in ESR register */
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#define CAN_FLAGS_ESR ((uint32_t)0x00F00000) |
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/* Mailboxes definition */
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#define CAN_TXMAILBOX_0 ((uint8_t)0x00) |
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#define CAN_TXMAILBOX_1 ((uint8_t)0x01) |
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#define CAN_TXMAILBOX_2 ((uint8_t)0x02) |
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#define CAN_MODE_MASK ((uint32_t) 0x00000003) |
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/**
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* @}
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*/
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/** @defgroup CAN_Private_Macros
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup CAN_Private_Variables
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup CAN_Private_FunctionPrototypes
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* @{
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*/
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static ITStatus CheckITStatus(uint32_t CAN_Reg, uint32_t It_Bit);
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/**
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* @}
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*/
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/** @defgroup CAN_Private_Functions
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* @{
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*/
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/**
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* @brief Deinitializes the CAN peripheral registers to their default reset values.
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* @param CANx: where x can be 1 or 2 to select the CAN peripheral.
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* @retval None.
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*/
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void CAN_DeInit(CAN_TypeDef* CANx)
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{ |
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/* Check the parameters */
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assert_param(IS_CAN_ALL_PERIPH(CANx)); |
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if (CANx == CAN1)
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{ |
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/* Enable CAN1 reset state */
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, ENABLE); |
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/* Release CAN1 from reset state */
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN1, DISABLE); |
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} |
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else
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{ |
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/* Enable CAN2 reset state */
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, ENABLE); |
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/* Release CAN2 from reset state */
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN2, DISABLE); |
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} |
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} |
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/**
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* @brief Initializes the CAN peripheral according to the specified
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* parameters in the CAN_InitStruct.
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* @param CANx: where x can be 1 or 2 to to select the CAN
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* peripheral.
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* @param CAN_InitStruct: pointer to a CAN_InitTypeDef structure that
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* contains the configuration information for the
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* CAN peripheral.
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* @retval Constant indicates initialization succeed which will be
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* CAN_InitStatus_Failed or CAN_InitStatus_Success.
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*/
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uint8_t CAN_Init(CAN_TypeDef* CANx, CAN_InitTypeDef* CAN_InitStruct) |
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{ |
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uint8_t InitStatus = CAN_InitStatus_Failed; |
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uint32_t wait_ack = 0x00000000;
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/* Check the parameters */
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assert_param(IS_CAN_ALL_PERIPH(CANx)); |
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assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TTCM)); |
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assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_ABOM)); |
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assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_AWUM)); |
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assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_NART)); |
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assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_RFLM)); |
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assert_param(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TXFP)); |
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assert_param(IS_CAN_MODE(CAN_InitStruct->CAN_Mode)); |
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assert_param(IS_CAN_SJW(CAN_InitStruct->CAN_SJW)); |
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assert_param(IS_CAN_BS1(CAN_InitStruct->CAN_BS1)); |
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assert_param(IS_CAN_BS2(CAN_InitStruct->CAN_BS2)); |
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assert_param(IS_CAN_PRESCALER(CAN_InitStruct->CAN_Prescaler)); |
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/* Exit from sleep mode */
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CANx->MCR &= (~(uint32_t)CAN_MCR_SLEEP); |
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/* Request initialisation */
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CANx->MCR |= CAN_MCR_INRQ ; |
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/* Wait the acknowledge */
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while (((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT))
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{ |
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wait_ack++; |
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} |
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/* Check acknowledge */
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if ((CANx->MSR & CAN_MSR_INAK) != CAN_MSR_INAK)
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{ |
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InitStatus = CAN_InitStatus_Failed; |
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} |
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else
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{ |
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/* Set the time triggered communication mode */
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if (CAN_InitStruct->CAN_TTCM == ENABLE)
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{ |
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CANx->MCR |= CAN_MCR_TTCM; |
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} |
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else
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{ |
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CANx->MCR &= ~(uint32_t)CAN_MCR_TTCM; |
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} |
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/* Set the automatic bus-off management */
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if (CAN_InitStruct->CAN_ABOM == ENABLE)
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{ |
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CANx->MCR |= CAN_MCR_ABOM; |
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} |
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else
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{ |
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CANx->MCR &= ~(uint32_t)CAN_MCR_ABOM; |
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} |
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/* Set the automatic wake-up mode */
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if (CAN_InitStruct->CAN_AWUM == ENABLE)
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{ |
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CANx->MCR |= CAN_MCR_AWUM; |
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} |
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else
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{ |
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CANx->MCR &= ~(uint32_t)CAN_MCR_AWUM; |
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} |
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/* Set the no automatic retransmission */
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if (CAN_InitStruct->CAN_NART == ENABLE)
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{ |
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CANx->MCR |= CAN_MCR_NART; |
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} |
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else
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{ |
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CANx->MCR &= ~(uint32_t)CAN_MCR_NART; |
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} |
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/* Set the receive FIFO locked mode */
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if (CAN_InitStruct->CAN_RFLM == ENABLE)
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{ |
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CANx->MCR |= CAN_MCR_RFLM; |
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} |
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else
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{ |
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CANx->MCR &= ~(uint32_t)CAN_MCR_RFLM; |
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} |
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/* Set the transmit FIFO priority */
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if (CAN_InitStruct->CAN_TXFP == ENABLE)
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{ |
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CANx->MCR |= CAN_MCR_TXFP; |
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} |
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else
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{ |
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CANx->MCR &= ~(uint32_t)CAN_MCR_TXFP; |
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} |
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/* Set the bit timing register */
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CANx->BTR = (uint32_t)((uint32_t)CAN_InitStruct->CAN_Mode << 30) | \
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((uint32_t)CAN_InitStruct->CAN_SJW << 24) | \
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((uint32_t)CAN_InitStruct->CAN_BS1 << 16) | \
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((uint32_t)CAN_InitStruct->CAN_BS2 << 20) | \
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((uint32_t)CAN_InitStruct->CAN_Prescaler - 1);
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/* Request leave initialisation */
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CANx->MCR &= ~(uint32_t)CAN_MCR_INRQ; |
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/* Wait the acknowledge */
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wait_ack = 0;
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while (((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) && (wait_ack != INAK_TIMEOUT))
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{ |
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wait_ack++; |
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} |
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/* ...and check acknowledged */
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if ((CANx->MSR & CAN_MSR_INAK) == CAN_MSR_INAK)
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{ |
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InitStatus = CAN_InitStatus_Failed; |
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} |
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else
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{ |
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InitStatus = CAN_InitStatus_Success ; |
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} |
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} |
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/* At this step, return the status of initialization */
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return InitStatus;
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} |
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/**
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* @brief Initializes the CAN peripheral according to the specified
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* parameters in the CAN_FilterInitStruct.
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* @param CAN_FilterInitStruct: pointer to a CAN_FilterInitTypeDef
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* structure that contains the configuration
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* information.
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* @retval None.
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*/
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void CAN_FilterInit(CAN_FilterInitTypeDef* CAN_FilterInitStruct)
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{ |
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uint32_t filter_number_bit_pos = 0;
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/* Check the parameters */
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assert_param(IS_CAN_FILTER_NUMBER(CAN_FilterInitStruct->CAN_FilterNumber)); |
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assert_param(IS_CAN_FILTER_MODE(CAN_FilterInitStruct->CAN_FilterMode)); |
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assert_param(IS_CAN_FILTER_SCALE(CAN_FilterInitStruct->CAN_FilterScale)); |
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assert_param(IS_CAN_FILTER_FIFO(CAN_FilterInitStruct->CAN_FilterFIFOAssignment)); |
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assert_param(IS_FUNCTIONAL_STATE(CAN_FilterInitStruct->CAN_FilterActivation)); |
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filter_number_bit_pos = ((uint32_t)1) << CAN_FilterInitStruct->CAN_FilterNumber;
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/* Initialisation mode for the filter */
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CAN1->FMR |= FMR_FINIT; |
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/* Filter Deactivation */
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CAN1->FA1R &= ~(uint32_t)filter_number_bit_pos; |
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/* Filter Scale */
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if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_16bit)
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{ |
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/* 16-bit scale for the filter */
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CAN1->FS1R &= ~(uint32_t)filter_number_bit_pos; |
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/* First 16-bit identifier and First 16-bit mask */
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/* Or First 16-bit identifier and Second 16-bit identifier */
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CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 = |
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((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow) << 16) | |
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(0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow);
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/* Second 16-bit identifier and Second 16-bit mask */
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/* Or Third 16-bit identifier and Fourth 16-bit identifier */
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CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 = |
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((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) | |
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(0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh);
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} |
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if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_32bit)
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{ |
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/* 32-bit scale for the filter */
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CAN1->FS1R |= filter_number_bit_pos; |
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/* 32-bit identifier or First 32-bit identifier */
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CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 = |
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((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdHigh) << 16) | |
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(0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterIdLow);
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/* 32-bit mask or Second 32-bit identifier */
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CAN1->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR2 = |
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((0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) | |
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(0x0000FFFF & (uint32_t)CAN_FilterInitStruct->CAN_FilterMaskIdLow);
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} |
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/* Filter Mode */
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if (CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdMask)
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{ |
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/*Id/Mask mode for the filter*/
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CAN1->FM1R &= ~(uint32_t)filter_number_bit_pos; |
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} |
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else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ |
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{ |
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/*Identifier list mode for the filter*/
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CAN1->FM1R |= (uint32_t)filter_number_bit_pos; |
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} |
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/* Filter FIFO assignment */
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if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO0)
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{ |
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/* FIFO 0 assignation for the filter */
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CAN1->FFA1R &= ~(uint32_t)filter_number_bit_pos; |
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} |
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if (CAN_FilterInitStruct->CAN_FilterFIFOAssignment == CAN_Filter_FIFO1)
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{ |
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/* FIFO 1 assignation for the filter */
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CAN1->FFA1R |= (uint32_t)filter_number_bit_pos; |
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} |
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/* Filter activation */
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if (CAN_FilterInitStruct->CAN_FilterActivation == ENABLE)
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{ |
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CAN1->FA1R |= filter_number_bit_pos; |
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} |
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/* Leave the initialisation mode for the filter */
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CAN1->FMR &= ~FMR_FINIT; |
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} |
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/**
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* @brief Fills each CAN_InitStruct member with its default value.
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* @param CAN_InitStruct: pointer to a CAN_InitTypeDef |