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Target/Modules/DiWheelDrive_1-2/Boot/blt_conf.h
1
/************************************************************************************//**
2
* \file         Demo\ARMCM3_STM32_Olimex_STM32P103_GCC\Boot\blt_conf.h
3
* \brief        Bootloader configuration header file.
4
* \ingroup      Boot_ARMCM3_STM32_Olimex_STM32P103_GCC
5
* \internal
6
*----------------------------------------------------------------------------------------
7
*                          C O P Y R I G H T
8
*----------------------------------------------------------------------------------------
9
*   Copyright (c) 2012  by Feaser    http://www.feaser.com    All rights reserved
10
*
11
*----------------------------------------------------------------------------------------
12
*                            L I C E N S E
13
*----------------------------------------------------------------------------------------
14
* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
15
* modify it under the terms of the GNU General Public License as published by the Free
16
* Software Foundation, either version 3 of the License, or (at your option) any later
17
* version.
18
*
19
* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
20
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
21
* PURPOSE. See the GNU General Public License for more details.
22
*
23
* You should have received a copy of the GNU General Public License along with OpenBLT.
24
* If not, see <http://www.gnu.org/licenses/>.
25
*
26
* A special exception to the GPL is included to allow you to distribute a combined work
27
* that includes OpenBLT without being obliged to provide the source code for any
28
* proprietary components. The exception text is included at the bottom of the license
29
* file <license.html>.
30
*
31
* \endinternal
32
****************************************************************************************/
33
#ifndef BLT_CONF_H
34
#define BLT_CONF_H
35

  
36
/****************************************************************************************
37
*   C P U   D R I V E R   C O N F I G U R A T I O N
38
****************************************************************************************/
39
/* To properly initialize the baudrate clocks of the communication interface, typically
40
 * the speed of the crystal oscillator and/or the speed at which the system runs is
41
 * needed. Set these through configurables BOOT_CPU_XTAL_SPEED_KHZ and
42
 * BOOT_CPU_SYSTEM_SPEED_KHZ, respectively. To enable data exchange with the host that is
43
 * not dependent on the targets architecture, the byte ordering needs to be known.
44
 * Setting BOOT_CPU_BYTE_ORDER_MOTOROLA to 1 selects little endian mode and 0 selects
45
 * big endian mode.
46
 *
47
 * Set BOOT_CPU_USER_PROGRAM_START_HOOK to 1 if you would like a hook function to be
48
 * called the moment the user program is about to be started. This could be used to
49
 * de-initialize application specific parts, for example to stop blinking an LED, etc.
50
 */
51
/** \brief Frequency of the external crystal oscillator. */
52
#define BOOT_CPU_XTAL_SPEED_KHZ         (8000)
53
/** \brief Desired system speed. */
54
#define BOOT_CPU_SYSTEM_SPEED_KHZ       (72000)
55
/** \brief Motorola or Intel style byte ordering. */
56
#define BOOT_CPU_BYTE_ORDER_MOTOROLA    (0)
57
/** \brief Enable/disable hook function call right before user program start. */
58
#define BOOT_CPU_USER_PROGRAM_START_HOOK (1)
59

  
60

  
61
/****************************************************************************************
62
*   B O O T L O A D E R   O F   M A I N   D E V I C E
63
****************************************************************************************/
64
/* It is important to initialize if the bootloader is part of the main device. In this
65
 * case some backdoor loops have to stay opened and backdoor loops of other bootloaders
66
 * have to be controlled by this bootloader. Additionally the bootloader should be able
67
 * to send program code of user programs for other devices.
68
 * Make sure that one of the communication interfaces is the gateway!
69
 */
70
/** \brief Bootloader of main device. */
71
#define BOOTLOADER_OF_MAIN_DEVICE       (1)
72

  
73

  
74
/****************************************************************************************
75
*   C O M M U N I C A T I O N   I N T E R F A C E   C O N F I G U R A T I O N
76
****************************************************************************************/
77
/* The CAN communication interface is selected by setting the BOOT_COM_CAN_ENABLE
78
 * configurable to 1. Configurable BOOT_COM_CAN_BAUDRATE selects the communication speed
79
 * in bits/second. Two CAN messages are reserved for communication with the host. The
80
 * message identifier for sending data from the target to the host is configured with
81
 * BOOT_COM_CAN_TXMSG_ID. The one for receiving data from the host is configured with
82
 * BOOT_COM_CAN_RXMSG_ID. The maximum amount of data bytes in a message for data
83
 * transmission and reception is set through BOOT_COM_CAN_TX_MAX_DATA and
84
 * BOOT_COM_CAN_RX_MAX_DATA, respectively. It is common for a microcontroller to have more
85
 * than 1 CAN controller on board. The zero-based BOOT_COM_CAN_CHANNEL_INDEX selects the
86
 * CAN controller channel.
87
 *
88
 */
89
/** \brief Enable/disable CAN transport layer. */
90
#define BOOT_GATE_CAN_ENABLE            (1)
91
/** \brief Configure the desired CAN baudrate. */
92
#define BOOT_COM_CAN_BAUDRATE           (1000000)
93
/** \brief Configure CAN message ID target->host. */
94
#define BOOT_COM_CAN_TX_MSG_ID          (0x700)
95
/** \brief Configure number of bytes in the target->host CAN message. */
96
#define BOOT_COM_CAN_TX_MAX_DATA        (255)
97
/** \brief Configure CAN message ID host->target. */
98
#define BOOT_COM_CAN_RX_MSG_ID          (0x600)
99
/** \brief Configure number of bytes in the host->target CAN message. */
100
#define BOOT_COM_CAN_RX_MAX_DATA        (255)
101
/** \brief Select the desired CAN peripheral as a zero based index. */
102
#define BOOT_COM_CAN_CHANNEL_INDEX      (0)
103
/** \brief Configure CAN message acknowledgement ID addition (ORed with original ID). */
104
#define BOOT_COM_CAN_MSG_ACK            (0x001)
105
/** \brief Configure CAN message ID addition for continuous messages (ORed with original ID). */
106
#define BOOT_COM_CAN_MSG_SUBSEQUENT     (0x002)
107

  
108
/**
109
 * \brief Configure device ID for communication (start with 1).
110
 * \details The device ID is a 32 bit integer, which can be interpreted bytewise:
111
 *            <AMiRo_revision>:<moduleID>:<moduleVersion_major>:<moduleVersion_minor>
112
 *          For this module the according values are
113
 *            1:0:1:2 = 0x01000102
114
 */
115
#define BOOT_COM_DEVICE_ID              (0x01000102)
116

  
117
/* The UART communication interface is selected by setting the BOOT_COM_UART_ENABLE
118
 * configurable to 1. Configurable BOOT_COM_UART_BAUDRATE selects the communication speed
119
 * in bits/second. The maximum amount of data bytes in a message for data transmission
120
 * and reception is set through BOOT_COM_UART_TX_MAX_DATA and BOOT_COM_UART_RX_MAX_DATA,
121
 * respectively. It is common for a microcontroller to have more than 1 UART interface
122
 * on board. The zero-based BOOT_COM_UART_CHANNEL_INDEX selects the UART interface.
123
 *
124
 */
125
/** \brief Enable/disable UART transport layer. */
126
#define BOOT_COM_UART_ENABLE            (1)
127
/** \brief Configure the desired communication speed. */
128
#define BOOT_COM_UART_BAUDRATE          (115200)
129
/** \brief Configure number of bytes in the target->host data packet. */
130
#define BOOT_COM_UART_TX_MAX_DATA       (255)
131
/** \brief Configure number of bytes in the host->target data packet. */
132
#define BOOT_COM_UART_RX_MAX_DATA       (255)
133
/** \brief Select the desired UART peripheral as a zero based index. */
134
#define BOOT_COM_UART_CHANNEL_INDEX     (0)
135
/* Activate debugging with UART2 */
136
#define BOOT_DEBUGGING_UART2_ENABLE     (0)
137

  
138

  
139
/****************************************************************************************
140
*   F I L E   S Y S T E M   I N T E R F A C E   C O N F I G U R A T I O N
141
****************************************************************************************/
142
/* The file system interface is selected by setting the BOOT_FILE_SYS_ENABLE configurable
143
 * to 1. This enables support for firmware updates from a file stored on a locally
144
 * attached file system such as an SD-card. Note that this interface can be enabled
145
 * together with one of the remote communication interfaces such as UART, CAN or USB.
146
 *
147
 * Set BOOT_FILE_LOGGING_ENABLE to 1 if you would like log messages to be created during
148
 * a firmware update. The hook function FileFirmwareUpdateLogHook() will be called each
149
 * time a new string formatted log entry is available. This could be used during testing
150
 * by outputting the string on UART or to create a log file on the file system itself.
151
 *
152
 * Set BOOT_FILE_ERROR_HOOK_ENABLE to 1 if you would like to be informed in case an error
153
 * occurs during the firmware update. This could for example be used to turn on an error
154
 * LED to inform the user that something went wrong. Inspecting the log messages provides
155
 * additional information on the error cause.
156
 *
157
 * Set BOOT_FILE_STARTED_HOOK_ENABLE to 1 if you would like to be informed when a new
158
 * firmware update is started by the bootloader.
159
 *
160
 * Set BOOT_FILE_COMPLETED_HOOK_ENABLE to 1 if you would like to be informed when a
161
 * firmware update is completed by the bootloader.
162
 */
163
/** \brief Enable/disable support for firmware updates from a locally attached storage.*/
164
#define BOOT_FILE_SYS_ENABLE            (0)
165
/** \brief Enable/disable logging messages during firmware updates. */
166
#define BOOT_FILE_LOGGING_ENABLE        (1)
167
/** \brief Enable/disable a hook function that is called upon detection of an error. */
168
#define BOOT_FILE_ERROR_HOOK_ENABLE     (1)
169
/** \brief Enable/disable a hook function that is called at the start of the update. */
170
#define BOOT_FILE_STARTED_HOOK_ENABLE   (1)
171
/** \brief Enable/disable a hook function that is called at the end of the update. */
172
#define BOOT_FILE_COMPLETED_HOOK_ENABLE (1)
173

  
174

  
175
/****************************************************************************************
176
*   B A C K D O O R   E N T R Y   C O N F I G U R A T I O N
177
****************************************************************************************/
178
/* It is possible to implement an application specific method to force the bootloader to
179
 * stay active after a reset. Such a backdoor entry into the bootloader is desired in
180
 * situations where the user program does not run properly and therefore cannot
181
 * reactivate the bootloader. By enabling these hook functions, the application can
182
 * implement the backdoor, which overrides the default backdoor entry that is programmed
183
 * into the bootloader. When desired for security purposes, these hook functions can
184
 * also be implemented in a way that disables the backdoor entry altogether.
185
 */
186
/** \brief Enable/disable the backdoor override hook functions. */
187
#define BOOT_BACKDOOR_HOOKS_ENABLE       (1)
188

  
189

  
190
/****************************************************************************************
191
*   N O N - V O L A T I L E   M E M O R Y   D R I V E R   C O N F I G U R A T I O N
192
****************************************************************************************/
193
/* The NVM driver typically supports erase and program operations of the internal memory
194
 * present on the microcontroller. Through these hook functions the NVM driver can be
195
 * extended to support additional memory types such as external flash memory and serial
196
 * eeproms. The size of the internal memory in kilobytes is specified with configurable
197
 * BOOT_NVM_SIZE_KB. If desired the internal checksum writing and verification method can
198
 * be overridden with a application specific method by enabling configuration switch
199
 * BOOT_NVM_CHECKSUM_HOOKS_ENABLE.
200
 */
201
/** \brief Enable/disable the NVM hook function for supporting additional memory devices. */
202
#define BOOT_NVM_HOOKS_ENABLE           (0)
203
/** \brief Configure the size of the default memory device (typically flash EEPROM). */
204
#define BOOT_NVM_SIZE_KB                (512)
205
/** \brief Enable/disable hooks functions to override the user program checksum handling. */
206
#define BOOT_NVM_CHECKSUM_HOOKS_ENABLE  (0)
207

  
208

  
209
/****************************************************************************************
210
*   W A T C H D O G   D R I V E R   C O N F I G U R A T I O N
211
****************************************************************************************/
212
/* The COP driver cannot be configured internally in the bootloader, because its use
213
 * and configuration is application specific. The bootloader does need to service the
214
 * watchdog in case it is used. When the application requires the use of a watchdog,
215
 * set BOOT_COP_HOOKS_ENABLE to be able to initialize and service the watchdog through
216
 * hook functions.
217
 */
218
/** \brief Enable/disable the hook functions for controlling the watchdog. */
219
#define BOOT_COP_HOOKS_ENABLE           (0)
220

  
221

  
222
/****************************************************************************************
223
*   S E E D / K E Y   S E C U R I T Y   C O N F I G U R A T I O N
224
****************************************************************************************/
225
/* A security mechanism can be enabled in the bootloader's XCP module by setting configu-
226
 * rable BOOT_XCP_SEED_KEY_ENABLE to 1. Before any memory erase or programming
227
 * operations can be performed, access to this resource need to be unlocked.
228
 * In the Microboot settings on tab "XCP Protection" you need to specify a DLL that
229
 * implements the unlocking algorithm. The demo programs are configured for the (simple)
230
 * algorithm in "FeaserKey.dll". The source code for this DLL is available so it can be
231
 * customized to your needs.
232
 * During the unlock sequence, Microboot requests a seed from the bootloader, which is in
233
 * the format of a byte array. Using this seed the unlock algorithm in the DLL computes
234
 * a key, which is also a byte array, and sends this back to the bootloader. The
235
 * bootloader then verifies this key to determine if programming and erase operations are
236
 * permitted.
237
 * After enabling this feature the hook functions XcpGetSeedHook() and XcpVerifyKeyHook()
238
 * are called by the bootloader to obtain the seed and to verify the key, respectively.
239
 */
240
#define BOOT_XCP_SEED_KEY_ENABLE        (0)
241

  
242

  
243

  
244
/****************************************************************************************
245
*   F L A S H I N G   M O D E   T I M E O U T
246
****************************************************************************************/
247
/* Sets the timeout for being in flashing mode. The bootloader stays in flashing mode
248
 * after a connection has been closed. The timer will be reset with every new connection.
249
 */
250
#define FLASHING_WITHOUT_CONNECTION_TIMEOUT_MS 30000 // 30 seconds
251

  
252

  
253
#endif /* BLT_CONF_H */
254
/*********************************** end of blt_conf.h *********************************/
Target/Modules/DiWheelDrive_1-2/Boot/boot.dox
1
/**
2
\defgroup   Boot_ARMCM3_STM32_Olimex_STM32P103_GCC Bootloader
3
\brief      Bootloader. 
4
\ingroup    ARMCM3_STM32_Olimex_STM32P103_GCC
5
*/
6

  
7

  
Target/Modules/DiWheelDrive_1-2/Boot/cmd/build.bat
1
@echo off
2
cs-make --directory=../ all
Target/Modules/DiWheelDrive_1-2/Boot/cmd/clean.bat
1
@echo off
2
cs-make --directory=../ clean
Target/Modules/DiWheelDrive_1-2/Boot/cmd/debug.bat
1
"C:\Program Files (x86)\OpenOCD\0.4.0\bin\openocd.exe" -f debug.cfg
Target/Modules/DiWheelDrive_1-2/Boot/cmd/debug.cfg
1
###
2
# Description: starts the OpenOCD GDB server (localhost:3333)
3
#              once started use arm-elf-insight <program>.elf to start the debug session
4
# Usage: openocd.exe" -f debug.cfg
5
###
6
source [find interface/olimex-arm-usb-tiny-h.cfg]
7
source [find board/olimex_stm32_h103.cfg]
8

  
9
jtag_khz 1000
10
init
11
reset
12
halt
13

  
14

  
15

  
Target/Modules/DiWheelDrive_1-2/Boot/cmd/flash.bat
1
"C:\Program Files (x86)\OpenOCD\0.4.0\bin\openocd.exe" -f flash.cfg
Target/Modules/DiWheelDrive_1-2/Boot/cmd/flash.cfg
1
###
2
# Description: mass erases and flashes the binary with OpenOCD
3
# Usage: openocd.exe" -f flash.cfg
4
###
5

  
6
source [find interface/olimex-arm-usb-tiny-h.cfg]
7
source [find board/olimex_stm32_h103.cfg]
8

  
9
jtag_khz 1000
10

  
11
init
12
reset
13
sleep 500
14
halt
15
stm32x mass_erase 0
16
flash write_image ..\\bin\\openbtl_olimex_stm32p103.elf
17
#flash write_image erase ..\\bin\\openbtl_olimex_stm32p103.elf
18
reset run
19
shutdown
20

  
21

  
Target/Modules/DiWheelDrive_1-2/Boot/hooks.c
1
/************************************************************************************//**
2
* \file         Demo\ARMCM3_STM32_Olimex_STM32P103_GCC\Boot\hooks.c
3
* \brief        Bootloader callback source file.
4
* \ingroup      Boot_ARMCM3_STM32_Olimex_STM32P103_GCC
5
* \internal
6
*----------------------------------------------------------------------------------------
7
*                          C O P Y R I G H T
8
*----------------------------------------------------------------------------------------
9
*   Copyright (c) 2012  by Feaser    http://www.feaser.com    All rights reserved
10
*
11
*----------------------------------------------------------------------------------------
12
*                            L I C E N S E
13
*----------------------------------------------------------------------------------------
14
* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
15
* modify it under the terms of the GNU General Public License as published by the Free
16
* Software Foundation, either version 3 of the License, or (at your option) any later
17
* version.
18
*
19
* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
20
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
21
* PURPOSE. See the GNU General Public License for more details.
22
*
23
* You should have received a copy of the GNU General Public License along with OpenBLT.
24
* If not, see <http://www.gnu.org/licenses/>.
25
*
26
* A special exception to the GPL is included to allow you to distribute a combined work 
27
* that includes OpenBLT without being obliged to provide the source code for any 
28
* proprietary components. The exception text is included at the bottom of the license
29
* file <license.html>.
30
* 
31
* \endinternal
32
****************************************************************************************/
33

  
34
/****************************************************************************************
35
* Include files
36
****************************************************************************************/
37
#include "boot.h"                                /* bootloader generic header          */
38
#if (BOOT_FILE_LOGGING_ENABLE > 0)
39
#include "stm32f10x.h"                           /* STM32 registers                    */
40
#include "stm32f10x_conf.h"                      /* STM32 peripheral drivers           */
41
#endif
42

  
43
/****************************************************************************************
44
*   B A C K D O O R   E N T R Y   H O O K   F U N C T I O N S
45
****************************************************************************************/
46

  
47
#if (BOOT_BACKDOOR_HOOKS_ENABLE > 0)
48

  
49
static blt_int32u backdoorOpenTime;
50
#define BACKDOOR_ENTRY_TIMEOUT_MS 500
51
static blt_bool timeRanOut = BLT_FALSE;
52
enum BOOT_STATE {BOOT_FLASH_CHECK,
53
                 BOOT_FLASH_WAIT,
54
                 BOOT_OS_SYNC,
55
                 BOOT_OS_START
56
                } boot_state;
57

  
58
#define SYS_PD_N_PIN      GPIO_Pin_8
59
#define SYS_PD_N_GPIO     GPIOC
60
#define SYS_SYNC_N_PIN    GPIO_Pin_1
61
#define SYS_SYNC_N_GPIO   GPIOC
62

  
63
/************************************************************************************//**
64
** \brief     Initializes the backdoor entry option.
65
** \return    none.
66
**
67
****************************************************************************************/
68
void BackDoorInitHook(void)
69
{
70
  backdoorOpenTime = TimerGet();
71
  boot_state = BOOT_FLASH_CHECK;
72
} /*** end of BackDoorInitHook ***/
73

  
74

  
75
/************************************************************************************//**
76
** \brief     Checks if it has to stay in backdoor.
77
** \return    BLT_TRUE if the backdoor entry is requested, BLT_FALSE otherwise.
78
**
79
****************************************************************************************/
80
blt_bool BackDoorEntryCheck(void)
81
{
82
  /* evaluate the fsm state */
83
  switch (boot_state) {
84
    case BOOT_FLASH_CHECK:
85
    {
86
      /* wait for a timeout */
87
      if (timeRanOut == BLT_FALSE) {
88
        if (TimerGet() > backdoorOpenTime+BACKDOOR_ENTRY_TIMEOUT_MS) {
89
          timeRanOut = BLT_TRUE;
90
          boot_state = BOOT_FLASH_WAIT;
91
          GPIO_SetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
92
        }
93
      }
94
      return BLT_TRUE;
95
      break;
96
    }
97
    case BOOT_FLASH_WAIT:
98
    {
99
      /* wait for the SYS_SYNC_N signal to go up */
100
      if (GPIO_ReadInputDataBit(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN) == Bit_RESET) {
101
        return BLT_TRUE;
102
      } else {
103
        boot_state = BOOT_OS_SYNC;
104
        return BLT_FALSE;
105
      }
106
    }
107
    default:
108
      return BLT_FALSE;
109
      break;
110
  }
111
  return BLT_FALSE;
112
} /*** end of BackDoorEntryHook ***/
113

  
114

  
115
/************************************************************************************//**
116
** \brief     Checks if a backdoor entry is requested.
117
** \return    BLT_TRUE if the backdoor entry is requested, BLT_FALSE otherwise.
118
**
119
****************************************************************************************/
120
blt_bool BackDoorEntryHook(void)
121
{
122
  /* default implementation always activates the bootloader after a reset */
123
  return BLT_TRUE;
124
} /*** end of BackDoorEntryHook ***/
125
#endif /* BOOT_BACKDOOR_HOOKS_ENABLE > 0 */
126

  
127

  
128
/************************************************************************************//**
129
** \brief     Notice that there is still an open connection over COM 
130
** \return    -
131
**
132
****************************************************************************************/
133
void BackDoorComIsConnected(void)
134
{
135
  backdoorOpenTime = TimerGet();
136
}
137

  
138

  
139
/****************************************************************************************
140
*   C P U   D R I V E R   H O O K   F U N C T I O N S
141
****************************************************************************************/
142

  
143
#if (BOOT_CPU_USER_PROGRAM_START_HOOK > 0)
144
/************************************************************************************//**
145
** \brief     Callback that gets called when the bootloader is about to exit and
146
**            hand over control to the user program. This is the last moment that
147
**            some final checking can be performed and if necessary prevent the
148
**            bootloader from activiting the user program.
149
** \return    BLT_TRUE if it is okay to start the user program, BLT_FALSE to keep
150
**            keep the bootloader active.
151
**
152
****************************************************************************************/
153
blt_bool CpuUserProgramStartHook(void)
154
{
155
  /* evaluate the fsm state */
156
  switch (boot_state) {
157
    case BOOT_OS_SYNC:
158
    {
159
      /* wait for the SYS_SYNC_N signal to go down */
160

  
161
      if (GPIO_ReadInputDataBit(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN) == Bit_RESET) {
162
        boot_state = BOOT_OS_START;
163
      }
164
      return BLT_FALSE;
165
      break;
166
    }
167
    case BOOT_OS_START:
168
    {
169
      /* pull down SYS_SYNC_N to indicate that the module is busy
170
       * note: This is optional at this point. The OS however MUST pull down SYS_SYNC_N until it is ready */
171
      GPIO_ResetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
172
      return BLT_TRUE;
173
    }
174
    default:
175
      return BLT_FALSE;
176
      break;
177
  }
178
  return BLT_FALSE;
179

  
180
} /*** end of CpuUserProgramStartHook ***/
181
#endif /* BOOT_CPU_USER_PROGRAM_START_HOOK > 0 */
182

  
183

  
184
/****************************************************************************************
185
*   N O N - V O L A T I L E   M E M O R Y   D R I V E R   H O O K   F U N C T I O N S
186
****************************************************************************************/
187

  
188
#if (BOOT_NVM_HOOKS_ENABLE > 0)
189
/************************************************************************************//**
190
** \brief     Callback that gets called at the start of the internal NVM driver
191
**            initialization routine. 
192
** \return    none.
193
**
194
****************************************************************************************/
195
void NvmInitHook(void)
196
{
197
} /*** end of NvmInitHook ***/
198

  
199

  
200
/************************************************************************************//**
201
** \brief     Callback that gets called at the start of the NVM driver write 
202
**            routine. It allows additional memory to be operated on. If the address
203
**            is not within the range of the additional memory, then 
204
**            BLT_NVM_NOT_IN_RANGE must be returned to indicate that the data hasn't
205
**            been written yet.
206
** \param     addr Start address.
207
** \param     len  Length in bytes.
208
** \param     data Pointer to the data buffer.
209
** \return    BLT_NVM_OKAY if successful, BLT_NVM_NOT_IN_RANGE if the address is
210
**            not within the supported memory range, or BLT_NVM_ERROR is the write
211
**            operation failed.
212
**
213
****************************************************************************************/
214
blt_int8u NvmWriteHook(blt_addr addr, blt_int32u len, blt_int8u *data)
215
{
216
  return BLT_NVM_NOT_IN_RANGE;
217
} /*** end of NvmWriteHook ***/
218

  
219

  
220
/************************************************************************************//**
221
** \brief     Callback that gets called at the start of the NVM driver erase 
222
**            routine. It allows additional memory to be operated on. If the address
223
**            is not within the range of the additional memory, then
224
**            BLT_NVM_NOT_IN_RANGE must be returned to indicate that the memory
225
**            hasn't been erased yet.
226
** \param     addr Start address.
227
** \param     len  Length in bytes.
228
** \return    BLT_NVM_OKAY if successful, BLT_NVM_NOT_IN_RANGE if the address is
229
**            not within the supported memory range, or BLT_NVM_ERROR is the erase
230
**            operation failed.
231
**
232
****************************************************************************************/
233
blt_int8u NvmEraseHook(blt_addr addr, blt_int32u len)
234
{
235
  return BLT_NVM_NOT_IN_RANGE;
236
} /*** end of NvmEraseHook ***/
237

  
238

  
239
/************************************************************************************//**
240
** \brief     Callback that gets called at the end of the NVM programming session.
241
** \return    BLT_TRUE is successful, BLT_FALSE otherwise.
242
**
243
****************************************************************************************/
244
blt_bool NvmDoneHook(void)
245
{
246
  return BLT_TRUE;
247
} /*** end of NvmDoneHook ***/
248
#endif /* BOOT_NVM_HOOKS_ENABLE > 0 */
249

  
250

  
251
#if (BOOT_NVM_CHECKSUM_HOOKS_ENABLE > 0)
252
/************************************************************************************//**
253
** \brief     Verifies the checksum, which indicates that a valid user program is
254
**            present and can be started.
255
** \return    BLT_TRUE if successful, BLT_FALSE otherwise.
256
**
257
****************************************************************************************/
258
blt_bool NvmVerifyChecksumHook(void)
259
{
260
  return BLT_TRUE;
261
} /*** end of NvmVerifyChecksum ***/
262

  
263

  
264
/************************************************************************************//**
265
** \brief     Writes a checksum of the user program to non-volatile memory. This is
266
**            performed once the entire user program has been programmed. Through
267
**            the checksum, the bootloader can check if a valid user programming is
268
**            present and can be started.
269
** \return    BLT_TRUE if successful, BLT_FALSE otherwise. 
270
**
271
****************************************************************************************/
272
blt_bool NvmWriteChecksumHook(void)
273
{
274
  return BLT_TRUE;
275
}
276
#endif /* BOOT_NVM_CHECKSUM_HOOKS_ENABLE > 0 */
277

  
278

  
279
/****************************************************************************************
280
*   W A T C H D O G   D R I V E R   H O O K   F U N C T I O N S
281
****************************************************************************************/
282

  
283
#if (BOOT_COP_HOOKS_ENABLE > 0)
284
/************************************************************************************//**
285
** \brief     Callback that gets called at the end of the internal COP driver
286
**            initialization routine. It can be used to configure and enable the
287
**            watchdog.
288
** \return    none.
289
**
290
****************************************************************************************/
291
void CopInitHook(void)
292
{
293
} /*** end of CopInitHook ***/
294

  
295

  
296
/************************************************************************************//**
297
** \brief     Callback that gets called at the end of the internal COP driver
298
**            service routine. This gets called upon initialization and during
299
**            potential long lasting loops and routine. It can be used to service
300
**            the watchdog to prevent a watchdog reset.
301
** \return    none.
302
**
303
****************************************************************************************/
304
void CopServiceHook(void)
305
{
306
} /*** end of CopServiceHook ***/
307
#endif /* BOOT_COP_HOOKS_ENABLE > 0 */
308

  
309

  
310
/****************************************************************************************
311
*   F I L E   S Y S T E M   I N T E R F A C E   H O O K   F U N C T I O N S
312
****************************************************************************************/
313

  
314
#if (BOOT_FILE_SYS_ENABLE > 0)
315

  
316
/****************************************************************************************
317
* Constant data declarations
318
****************************************************************************************/
319
/** \brief Firmware filename. */
320
static const blt_char firmwareFilename[] = "/demoprog_olimex_stm32p103.srec";
321

  
322

  
323
/****************************************************************************************
324
* Local data declarations
325
****************************************************************************************/
326
#if (BOOT_FILE_LOGGING_ENABLE > 0)
327
/** \brief Data structure for grouping log-file related information. */
328
static struct 
329
{
330
  FIL      handle;                  /**< FatFS handle to the log-file.                 */
331
  blt_bool canUse;                  /**< Flag to indicate if the log-file can be used. */
332
} logfile;
333
#endif
334

  
335

  
336
/************************************************************************************//**
337
** \brief     Callback that gets called to check whether a firmware update from 
338
**            local file storage should be started. This could for example be when
339
**            a switch is pressed, when a certain file is found on the local file 
340
**            storage, etc.
341
** \return    BLT_TRUE if a firmware update is requested, BLT_FALSE otherwise.
342
**
343
****************************************************************************************/
344
blt_bool FileIsFirmwareUpdateRequestedHook(void)
345
{
346
  FILINFO fileInfoObject = { 0 }; /* needs to be zeroed according to f_stat docs */;
347

  
348
  /* Current example implementation looks for a predetermined firmware file on the 
349
   * SD-card. If the SD-card is accessible and the firmware file was found the firmware
350
   * update is started. When successfully completed, the firmware file is deleted.
351
   * During the firmware update, progress information is written to a file called
352
   * bootlog.txt and additionally outputted on UART @57600 bps for debugging purposes.
353
   */
354
  /* check if firmware file is present and SD-card is accessible */
355
  if (f_stat(firmwareFilename, &fileInfoObject) == FR_OK) 
356
  {
357
    /* check if the filesize is valid and that it is not a directory */
358
    if ( (fileInfoObject.fsize > 0) && (!(fileInfoObject.fattrib & AM_DIR)) )
359
    {
360
      /* all conditions are met to start a firmware update from local file storage */
361
      return BLT_TRUE;
362
    }
363
  }
364
  /* still here so no firmware update request is pending */  
365
  return BLT_FALSE;
366
} /*** end of FileIsFirmwareUpdateRequestedHook ***/
367

  
368

  
369
/************************************************************************************//**
370
** \brief     Callback to obtain the filename of the firmware file that should be
371
**            used during the firmware update from the local file storage. This 
372
**            hook function is called at the beginning of the firmware update from
373
**            local storage sequence. 
374
** \return    valid firmware filename with full path or BLT_NULL.
375
**
376
****************************************************************************************/
377
const blt_char *FileGetFirmwareFilenameHook(void)
378
{
379
  return firmwareFilename;
380
} /*** end of FileGetFirmwareFilenameHook ***/
381

  
382

  
383
#if (BOOT_FILE_STARTED_HOOK_ENABLE > 0)
384
/************************************************************************************//**
385
** \brief     Callback that gets called to inform the application that a firmware
386
**            update from local storage just started. 
387
** \return    none.
388
**
389
****************************************************************************************/
390
void FileFirmwareUpdateStartedHook(void)
391
{
392
  #if (BOOT_FILE_LOGGING_ENABLE > 0)
393
  /* create/overwrite the logfile */
394
  logfile.canUse = BLT_FALSE;
395
  if (f_open(&logfile.handle, "/bootlog.txt", FA_CREATE_ALWAYS | FA_WRITE) == FR_OK)
396
  {
397
    logfile.canUse = BLT_TRUE;
398
  }
399
  #endif
400
} /*** end of FileFirmwareUpdateStartedHook ***/
401
#endif /* BOOT_FILE_STARTED_HOOK_ENABLE > 0 */
402

  
403

  
404
#if (BOOT_FILE_COMPLETED_HOOK_ENABLE > 0)
405
/************************************************************************************//**
406
** \brief     Callback that gets called to inform the application that a firmware
407
**            update was successfully completed.
408
** \return    none.
409
**
410
****************************************************************************************/
411
void FileFirmwareUpdateCompletedHook(void)
412
{
413
  #if (BOOT_FILE_LOGGING_ENABLE > 0)
414
  /* close the log file */
415
  if (logfile.canUse == BLT_TRUE)
416
  {
417
    f_close(&logfile.handle);
418
  }
419
  /* wait for all logging related transmission to complete */
420
  while(USART_GetFlagStatus(USART2, USART_FLAG_TC) == RESET);
421
  #endif
422
  /* now delete the firmware file from the disk since the update was successful */
423
  f_unlink(firmwareFilename);
424
} /*** end of FileFirmwareUpdateCompletedHook ***/
425
#endif /* BOOT_FILE_COMPLETED_HOOK_ENABLE > 0 */
426

  
427

  
428
#if (BOOT_FILE_ERROR_HOOK_ENABLE > 0)
429
/************************************************************************************//**
430
** \brief     Callback that gets called in case an error occurred during a firmware
431
**            update. Refer to <file.h> for a list of available error codes.
432
** \return    none.
433
**
434
****************************************************************************************/
435
void FileFirmwareUpdateErrorHook(blt_int8u error_code)
436
{
437
  #if (BOOT_FILE_LOGGING_ENABLE > 0)
438
  /* error detected which stops the firmware update, so close the log file */
439
  if (logfile.canUse == BLT_TRUE)
440
  {
441
    f_close(&logfile.handle);
442
  }
443
  #endif
444
} /*** end of FileFirmwareUpdateErrorHook ***/
445
#endif /* BOOT_FILE_ERROR_HOOK_ENABLE > 0 */
446

  
447

  
448
#if (BOOT_FILE_LOGGING_ENABLE > 0)
449
/************************************************************************************//**
450
** \brief     Callback that gets called each time new log information becomes 
451
**            available during a firmware update.
452
** \param     info_string Pointer to a character array with the log entry info.
453
** \return    none.
454
**
455
****************************************************************************************/
456
void FileFirmwareUpdateLogHook(blt_char *info_string)
457
{
458
  /* write the string to the log file */
459
  if (logfile.canUse == BLT_TRUE)
460
  {
461
    if (f_puts(info_string, &logfile.handle) < 0)
462
    {
463
      logfile.canUse = BLT_FALSE;
464
      f_close(&logfile.handle);
465
    }
466
  }
467
  /* echo all characters in the string on UART */
468
  while(*info_string != '\0')
469
  {
470
    /* write character to transmit holding register */
471
    USART_SendData(USART2, *info_string);
472
    /* wait for tx holding register to be empty */
473
    while(USART_GetFlagStatus(USART2, USART_FLAG_TXE) == RESET);
474
    /* point to the next character in the string */
475
    info_string++;
476
  }
477
} /*** end of FileFirmwareUpdateLogHook ***/
478
#endif /* BOOT_FILE_LOGGING_ENABLE > 0 */
479

  
480

  
481
#endif /* BOOT_FILE_SYS_ENABLE > 0 */
482

  
483

  
484
/****************************************************************************************
485
*   S E E D / K E Y   S E C U R I T Y   H O O K   F U N C T I O N S
486
****************************************************************************************/
487

  
488
#if (BOOT_XCP_SEED_KEY_ENABLE > 0)
489
/************************************************************************************//**
490
** \brief     Provides a seed to the XCP master that will be used for the key 
491
**            generation when the master attempts to unlock the specified resource. 
492
**            Called by the GET_SEED command.
493
** \param     resource  Resource that the seed if requested for (XCP_RES_XXX).
494
** \param     seed      Pointer to byte buffer wher the seed will be stored.
495
** \return    Length of the seed in bytes.
496
**
497
****************************************************************************************/
498
blt_int8u XcpGetSeedHook(blt_int8u resource, blt_int8u *seed)
499
{
500
  /* request seed for unlocking ProGraMming resource */
501
  if ((resource & XCP_RES_PGM) != 0)
502
  {
503
    seed[0] = 0x55;
504
  }
505

  
506
  /* return seed length */
507
  return 1;
508
} /*** end of XcpGetSeedHook ***/
509

  
510

  
511
/************************************************************************************//**
512
** \brief     Called by the UNLOCK command and checks if the key to unlock the 
513
**            specified resource was correct. If so, then the resource protection 
514
**            will be removed.
515
** \param     resource  resource to unlock (XCP_RES_XXX).
516
** \param     key       pointer to the byte buffer holding the key.
517
** \param     len       length of the key in bytes.
518
** \return    1 if the key was correct, 0 otherwise.
519
**
520
****************************************************************************************/
521
blt_int8u XcpVerifyKeyHook(blt_int8u resource, blt_int8u *key, blt_int8u len)
522
{
523
  /* suppress compiler warning for unused parameter */
524
  len = len;
525

  
526
  /* the example key algorithm in "FeaserKey.dll" works as follows:
527
   *  - PGM will be unlocked if key = seed - 1
528
   */
529

  
530
  /* check key for unlocking ProGraMming resource */
531
  if ((resource == XCP_RES_PGM) && (key[0] == (0x55-1)))
532
  {
533
    /* correct key received for unlocking PGM resource */
534
    return 1;
535
  }
536

  
537
  /* still here so key incorrect */
538
  return 0;
539
} /*** end of XcpVerifyKeyHook ***/
540
#endif /* BOOT_XCP_SEED_KEY_ENABLE > 0 */
541

  
542

  
543
/*********************************** end of hooks.c ************************************/
Target/Modules/DiWheelDrive_1-2/Boot/iodef.h
1
#ifndef IODEF_H
2
#define IODEF_H
3

  
4
#include "stm32f10x.h"
5
#include "stm32f10x_conf.h"
6

  
7
#define WKUP_GPIO             GPIOA
8
#define WKUP_PIN              GPIO_Pin_0
9
#define LED_GPIO              GPIOA
10
#define LED_PIN               GPIO_Pin_1
11
#define DRIVE_PWM1A_GPIO      GPIOA
12
#define DRIVE_PWM1A_PIN       GPIO_Pin_2
13
#define DRIVE_PWM1B_GPIO      GPIOA
14
#define DRIVE_PWM1B_PIN       GPIO_Pin_3
15
#define PROG_RX_GPIO          GPIOA
16
#define PROG_RX_PIN           GPIO_Pin_9
17
#define PROG_TX_GPIO          GPIOA
18
#define PROG_TX_PIN           GPIO_Pin_10
19
#define CAN_RX_GPIO           GPIOA
20
#define CAN_RX_PIN            GPIO_Pin_11
21
#define CAN_TX_GPIO           GPIOA
22
#define CAN_TX_PIN            GPIO_Pin_12
23
#define SWDIO_GPIO            GPIOA
24
#define SWDIO_PIN             GPIO_Pin_13
25
#define SWCLK_GPIO            GPIOA
26
#define SWCLK_PIN             GPIO_Pin_14
27
#define DRIVE_PWM2B_GPIO      GPIOA
28
#define DRIVE_PWM2B_PIN       GPIO_Pin_15
29

  
30
#define DRIVE_SENSE2_GPIO     GPIOB
31
#define DRIVE_SENSE2_PIN      GPIO_Pin_1
32
#define POWER_EN_GPIO         GPIOB
33
#define POWER_EN_PIN          GPIO_Pin_2
34
#define DRIVE_PWM2A_GPIO      GPIOB
35
#define DRIVE_PWM2A_PIN       GPIO_Pin_3
36
#define DRIVE_ENC1A_GPIO      GPIOB
37
#define DRIVE_ENC1A_PIN       GPIO_Pin_6
38
#define DRIVE_ENC1B_GPIO      GPIOB
39
#define DRIVE_ENC1B_PIN       GPIO_Pin_7
40
#define IMU_SCL_GPIO          GPIOB
41
#define IMU_SCL_PIN           GPIO_Pin_8
42
#define IMU_SDA_GPIO          GPIOB
43
#define IMU_SDA_PIN           GPIO_Pin_9
44
#define IR_SCL_GPIO           GPIOB
45
#define IR_SCL_PIN            GPIO_Pin_10
46
#define IR_SDA_GPIO           GPIOB
47
#define IR_SDA_PIN            GPIO_Pin_11
48
#define IR_INT_GPIO           GPIOB
49
#define IR_INT_PIN            GPIO_Pin_12
50
#define SYS_UART_UP_GPIO      GPIOB
51
#define SYS_UART_UP_PIN       GPIO_Pin_14
52
#define IMU_INT_GPIO          GPIOB
53
#define IMU_INT_PIN           GPIO_Pin_15
54

  
55
#define DRIVE_SENSE1_GPIO     GPIOC
56
#define DRIVE_SENSE1_PIN      GPIO_Pin_0
57
#define SYS_SYNC_N_GPIO       GPIOC
58
#define SYS_SYNC_N_PIN        GPIO_Pin_1
59
#define IMU_RESET_N_GPIO      GPIOC
60
#define IMU_RESET_N_PIN       GPIO_Pin_2
61
#define PATH_DCSTAT_GPIO      GPIOC
62
#define PATH_DCSTAT_PIN       GPIO_Pin_3
63
#define PATH_DCEN_GPIO        GPIOC
64
#define PATH_DCEN_PIN         GPIO_Pin_5
65
#define DRIVE_ENC2B_GPIO      GPIOC
66
#define DRIVE_ENC2B_PIN       GPIO_Pin_6
67
#define DRIVE_ENC2A_GPIO      GPIOC
68
#define DRIVE_ENC2A_PIN       GPIO_Pin_7
69
#define SYS_PD_N_GPIO         GPIOC
70
#define SYS_PD_N_PIN          GPIO_Pin_8
71
#define SYS_REG_EN_GPIO       GPIOC
72
#define SYS_REG_EN_PIN        GPIO_Pin_9
73
#define SYS_UART_RX_GPIO      GPIOC
74
#define SYS_UART_RX_PIN       GPIO_Pin_10
75
#define SYS_UART_TX_GPIO      GPIOC
76
#define SYS_UART_TX_PIN       GPIO_Pin_11
77
#define IMU_BOOT_LOAD_N_GPIO  GPIOC
78
#define IMU_BOOT_LOAD_N_PIN   GPIO_Pin_12
79
#define IMU_BL_IND_GPIO       GPIOC
80
#define IMU_BL_IND_PIN        GPIO_Pin_14
81

  
82
#define OSC_IN_GPIO           GPIOD
83
#define OSC_IN_PIN            GPIO_Pin_0
84
#define OSC_OUT_GPIO          GPIOD
85
#define OSC_OUT_PIN           GPIO_Pin_1
86
#define SYS_WARMRST_N_GPIO    GPIOD
87
#define SYS_WARMRST_N_PIN     GPIO_Pin_2
88

  
89
#endif /* IODEF_H */
Target/Modules/DiWheelDrive_1-2/Boot/lib/CMSIS/CM3/CoreSupport/core_cm3.c
1
/**************************************************************************//**
2
 * @file     core_cm3.c
3
 * @brief    CMSIS Cortex-M3 Core Peripheral Access Layer Source File
4
 * @version  V1.30
5
 * @date     30. October 2009
6
 *
7
 * @note
8
 * Copyright (C) 2009 ARM Limited. All rights reserved.
9
 *
10
 * @par
11
 * ARM Limited (ARM) is supplying this software for use with Cortex-M 
12
 * processor based microcontrollers.  This file can be freely distributed 
13
 * within development tools that are supporting such ARM based processors. 
14
 *
15
 * @par
16
 * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
17
 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
18
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
19
 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
20
 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
21
 *
22
 ******************************************************************************/
23

  
24
#include <stdint.h>
25

  
26
/* define compiler specific symbols */
27
#if defined ( __CC_ARM   )
28
  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
29
  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */
30

  
31
#elif defined ( __ICCARM__ )
32
  #define __ASM           __asm                                       /*!< asm keyword for IAR Compiler          */
33
  #define __INLINE        inline                                      /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */
34

  
35
#elif defined   (  __GNUC__  )
36
  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */
37
  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */
38

  
39
#elif defined   (  __TASKING__  )
40
  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */
41
  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */
42

  
43
#endif
44

  
45

  
46
/* ###################  Compiler specific Intrinsics  ########################### */
47

  
48
#if defined ( __CC_ARM   ) /*------------------RealView Compiler -----------------*/
49
/* ARM armcc specific functions */
50

  
51
/**
52
 * @brief  Return the Process Stack Pointer
53
 *
54
 * @return ProcessStackPointer
55
 *
56
 * Return the actual process stack pointer
57
 */
58
__ASM uint32_t __get_PSP(void)
59
{
60
  mrs r0, psp
61
  bx lr
62
}
63

  
64
/**
65
 * @brief  Set the Process Stack Pointer
66
 *
67
 * @param  topOfProcStack  Process Stack Pointer
68
 *
69
 * Assign the value ProcessStackPointer to the MSP 
70
 * (process stack pointer) Cortex processor register
71
 */
72
__ASM void __set_PSP(uint32_t topOfProcStack)
73
{
74
  msr psp, r0
75
  bx lr
76
}
77

  
78
/**
79
 * @brief  Return the Main Stack Pointer
80
 *
81
 * @return Main Stack Pointer
82
 *
83
 * Return the current value of the MSP (main stack pointer)
84
 * Cortex processor register
85
 */
86
__ASM uint32_t __get_MSP(void)
87
{
88
  mrs r0, msp
89
  bx lr
90
}
91

  
92
/**
93
 * @brief  Set the Main Stack Pointer
94
 *
95
 * @param  topOfMainStack  Main Stack Pointer
96
 *
97
 * Assign the value mainStackPointer to the MSP 
98
 * (main stack pointer) Cortex processor register
99
 */
100
__ASM void __set_MSP(uint32_t mainStackPointer)
101
{
102
  msr msp, r0
103
  bx lr
104
}
105

  
106
/**
107
 * @brief  Reverse byte order in unsigned short value
108
 *
109
 * @param   value  value to reverse
110
 * @return         reversed value
111
 *
112
 * Reverse byte order in unsigned short value
113
 */
114
__ASM uint32_t __REV16(uint16_t value)
115
{
116
  rev16 r0, r0
117
  bx lr
118
}
119

  
120
/**
121
 * @brief  Reverse byte order in signed short value with sign extension to integer
122
 *
123
 * @param   value  value to reverse
124
 * @return         reversed value
125
 *
126
 * Reverse byte order in signed short value with sign extension to integer
127
 */
128
__ASM int32_t __REVSH(int16_t value)
129
{
130
  revsh r0, r0
131
  bx lr
132
}
133

  
134

  
135
#if (__ARMCC_VERSION < 400000)
136

  
137
/**
138
 * @brief  Remove the exclusive lock created by ldrex
139
 *
140
 * Removes the exclusive lock which is created by ldrex.
141
 */
142
__ASM void __CLREX(void)
143
{
144
  clrex
145
}
146

  
147
/**
148
 * @brief  Return the Base Priority value
149
 *
150
 * @return BasePriority
151
 *
152
 * Return the content of the base priority register
153
 */
154
__ASM uint32_t  __get_BASEPRI(void)
155
{
156
  mrs r0, basepri
157
  bx lr
158
}
159

  
160
/**
161
 * @brief  Set the Base Priority value
162
 *
163
 * @param  basePri  BasePriority
164
 *
165
 * Set the base priority register
166
 */
167
__ASM void __set_BASEPRI(uint32_t basePri)
168
{
169
  msr basepri, r0
170
  bx lr
171
}
172

  
173
/**
174
 * @brief  Return the Priority Mask value
175
 *
176
 * @return PriMask
177
 *
178
 * Return state of the priority mask bit from the priority mask register
179
 */
180
__ASM uint32_t __get_PRIMASK(void)
181
{
182
  mrs r0, primask
183
  bx lr
184
}
185

  
186
/**
187
 * @brief  Set the Priority Mask value
188
 *
189
 * @param  priMask  PriMask
190
 *
191
 * Set the priority mask bit in the priority mask register
192
 */
193
__ASM void __set_PRIMASK(uint32_t priMask)
194
{
195
  msr primask, r0
196
  bx lr
197
}
198

  
199
/**
200
 * @brief  Return the Fault Mask value
201
 *
202
 * @return FaultMask
203
 *
204
 * Return the content of the fault mask register
205
 */
206
__ASM uint32_t  __get_FAULTMASK(void)
207
{
208
  mrs r0, faultmask
209
  bx lr
210
}
211

  
212
/**
213
 * @brief  Set the Fault Mask value
214
 *
215
 * @param  faultMask  faultMask value
216
 *
217
 * Set the fault mask register
218
 */
219
__ASM void __set_FAULTMASK(uint32_t faultMask)
220
{
221
  msr faultmask, r0
222
  bx lr
223
}
224

  
225
/**
226
 * @brief  Return the Control Register value
227
 * 
228
 * @return Control value
229
 *
230
 * Return the content of the control register
231
 */
232
__ASM uint32_t __get_CONTROL(void)
233
{
234
  mrs r0, control
235
  bx lr
236
}
237

  
238
/**
239
 * @brief  Set the Control Register value
240
 *
241
 * @param  control  Control value
242
 *
243
 * Set the control register
244
 */
245
__ASM void __set_CONTROL(uint32_t control)
246
{
247
  msr control, r0
248
  bx lr
249
}
250

  
251
#endif /* __ARMCC_VERSION  */ 
252

  
253

  
254

  
255
#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/
256
/* IAR iccarm specific functions */
257
#pragma diag_suppress=Pe940
258

  
259
/**
260
 * @brief  Return the Process Stack Pointer
261
 *
262
 * @return ProcessStackPointer
263
 *
264
 * Return the actual process stack pointer
265
 */
266
uint32_t __get_PSP(void)
267
{
268
  __ASM("mrs r0, psp");
269
  __ASM("bx lr");
270
}
271

  
272
/**
273
 * @brief  Set the Process Stack Pointer
274
 *
275
 * @param  topOfProcStack  Process Stack Pointer
276
 *
277
 * Assign the value ProcessStackPointer to the MSP 
278
 * (process stack pointer) Cortex processor register
279
 */
280
void __set_PSP(uint32_t topOfProcStack)
281
{
282
  __ASM("msr psp, r0");
283
  __ASM("bx lr");
284
}
285

  
286
/**
287
 * @brief  Return the Main Stack Pointer
288
 *
289
 * @return Main Stack Pointer
290
 *
291
 * Return the current value of the MSP (main stack pointer)
292
 * Cortex processor register
293
 */
294
uint32_t __get_MSP(void)
295
{
296
  __ASM("mrs r0, msp");
297
  __ASM("bx lr");
298
}
299

  
300
/**
301
 * @brief  Set the Main Stack Pointer
302
 *
303
 * @param  topOfMainStack  Main Stack Pointer
304
 *
305
 * Assign the value mainStackPointer to the MSP 
306
 * (main stack pointer) Cortex processor register
307
 */
308
void __set_MSP(uint32_t topOfMainStack)
309
{
310
  __ASM("msr msp, r0");
311
  __ASM("bx lr");
312
}
313

  
314
/**
315
 * @brief  Reverse byte order in unsigned short value
316
 *
317
 * @param  value  value to reverse
318
 * @return        reversed value
319
 *
320
 * Reverse byte order in unsigned short value
321
 */
322
uint32_t __REV16(uint16_t value)
323
{
324
  __ASM("rev16 r0, r0");
325
  __ASM("bx lr");
326
}
327

  
328
/**
329
 * @brief  Reverse bit order of value
330
 *
331
 * @param  value  value to reverse
332
 * @return        reversed value
333
 *
334
 * Reverse bit order of value
335
 */
336
uint32_t __RBIT(uint32_t value)
337
{
338
  __ASM("rbit r0, r0");
339
  __ASM("bx lr");
340
}
341

  
342
/**
343
 * @brief  LDR Exclusive (8 bit)
344
 *
345
 * @param  *addr  address pointer
346
 * @return        value of (*address)
347
 *
348
 * Exclusive LDR command for 8 bit values)
349
 */
350
uint8_t __LDREXB(uint8_t *addr)
351
{
352
  __ASM("ldrexb r0, [r0]");
353
  __ASM("bx lr"); 
354
}
355

  
356
/**
357
 * @brief  LDR Exclusive (16 bit)
358
 *
359
 * @param  *addr  address pointer
360
 * @return        value of (*address)
361
 *
362
 * Exclusive LDR command for 16 bit values
363
 */
364
uint16_t __LDREXH(uint16_t *addr)
365
{
366
  __ASM("ldrexh r0, [r0]");
367
  __ASM("bx lr");
368
}
369

  
370
/**
371
 * @brief  LDR Exclusive (32 bit)
372
 *
373
 * @param  *addr  address pointer
374
 * @return        value of (*address)
375
 *
376
 * Exclusive LDR command for 32 bit values
377
 */
378
uint32_t __LDREXW(uint32_t *addr)
379
{
380
  __ASM("ldrex r0, [r0]");
381
  __ASM("bx lr");
382
}
383

  
384
/**
385
 * @brief  STR Exclusive (8 bit)
386
 *
387
 * @param  value  value to store
388
 * @param  *addr  address pointer
389
 * @return        successful / failed
390
 *
391
 * Exclusive STR command for 8 bit values
392
 */
393
uint32_t __STREXB(uint8_t value, uint8_t *addr)
394
{
395
  __ASM("strexb r0, r0, [r1]");
396
  __ASM("bx lr");
397
}
398

  
399
/**
400
 * @brief  STR Exclusive (16 bit)
401
 *
402
 * @param  value  value to store
403
 * @param  *addr  address pointer
404
 * @return        successful / failed
405
 *
406
 * Exclusive STR command for 16 bit values
407
 */
408
uint32_t __STREXH(uint16_t value, uint16_t *addr)
409
{
410
  __ASM("strexh r0, r0, [r1]");
411
  __ASM("bx lr");
412
}
413

  
414
/**
415
 * @brief  STR Exclusive (32 bit)
416
 *
417
 * @param  value  value to store
418
 * @param  *addr  address pointer
419
 * @return        successful / failed
420
 *
421
 * Exclusive STR command for 32 bit values
422
 */
423
uint32_t __STREXW(uint32_t value, uint32_t *addr)
424
{
425
  __ASM("strex r0, r0, [r1]");
426
  __ASM("bx lr");
427
}
428

  
429
#pragma diag_default=Pe940
430

  
431

  
432
#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/
433
/* GNU gcc specific functions */
434

  
435
/**
436
 * @brief  Return the Process Stack Pointer
437
 *
438
 * @return ProcessStackPointer
439
 *
440
 * Return the actual process stack pointer
441
 */
442
uint32_t __get_PSP(void) __attribute__( ( naked ) );
443
uint32_t __get_PSP(void)
444
{
445
  uint32_t result=0;
446

  
447
  __ASM volatile ("MRS %0, psp\n\t" 
448
                  "MOV r0, %0 \n\t"
449
                  "BX  lr     \n\t"  : "=r" (result) );
450
  return(result);
451
}
452

  
453
/**
454
 * @brief  Set the Process Stack Pointer
455
 *
456
 * @param  topOfProcStack  Process Stack Pointer
457
 *
458
 * Assign the value ProcessStackPointer to the MSP 
459
 * (process stack pointer) Cortex processor register
460
 */
461
void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) );
462
void __set_PSP(uint32_t topOfProcStack)
463
{
464
  __ASM volatile ("MSR psp, %0\n\t"
465
                  "BX  lr     \n\t" : : "r" (topOfProcStack) );
466
}
467

  
468
/**
469
 * @brief  Return the Main Stack Pointer
470
 *
471
 * @return Main Stack Pointer
472
 *
473
 * Return the current value of the MSP (main stack pointer)
474
 * Cortex processor register
475
 */
476
uint32_t __get_MSP(void) __attribute__( ( naked ) );
477
uint32_t __get_MSP(void)
478
{
479
  uint32_t result=0;
480

  
481
  __ASM volatile ("MRS %0, msp\n\t" 
482
                  "MOV r0, %0 \n\t"
483
                  "BX  lr     \n\t"  : "=r" (result) );
484
  return(result);
485
}
486

  
487
/**
488
 * @brief  Set the Main Stack Pointer
489
 *
490
 * @param  topOfMainStack  Main Stack Pointer
491
 *
492
 * Assign the value mainStackPointer to the MSP 
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