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amiro-blt / Target / Modules / DiWheelDrive_1-2 / Boot / main.c @ ea906b44

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1 c1f21a71 Thomas Schöpping
/************************************************************************************//**
2
* \file         Demo\ARMCM3_STM32_Olimex_STM32P103_GCC\Boot\main.c
3
* \brief        Bootloader application source file.
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* \ingroup      Boot_ARMCM3_STM32_Olimex_STM32P103_GCC
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* \internal
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*----------------------------------------------------------------------------------------
7
*                          C O P Y R I G H T
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*----------------------------------------------------------------------------------------
9
*   Copyright (c) 2012  by Feaser    http://www.feaser.com    All rights reserved
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*
11
*----------------------------------------------------------------------------------------
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*                            L I C E N S E
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*----------------------------------------------------------------------------------------
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* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
15
* modify it under the terms of the GNU General Public License as published by the Free
16
* Software Foundation, either version 3 of the License, or (at your option) any later
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* version.
18
*
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* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
21
* PURPOSE. See the GNU General Public License for more details.
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*
23
* You should have received a copy of the GNU General Public License along with OpenBLT.
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* If not, see <http://www.gnu.org/licenses/>.
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*
26
* A special exception to the GPL is included to allow you to distribute a combined work
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* that includes OpenBLT without being obliged to provide the source code for any
28
* proprietary components. The exception text is included at the bottom of the license
29
* file <license.html>.
30
*
31
* \endinternal
32
****************************************************************************************/
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34
/****************************************************************************************
35
* Include files
36
****************************************************************************************/
37
#include "boot.h"                                /* bootloader generic header          */
38
#include "timer.h"
39
#include "ARMCM3_STM32/types.h"
40
#include "AMiRo/amiroblt.h"
41
#include "helper.h"
42
#include "iodef.h"
43
44
/****************************************************************************************
45
* Defines
46
****************************************************************************************/
47
#define RESET_TIMEOUT_MS    100
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49
/****************************************************************************************
50 fc7151bb Thomas Schöpping
* Function prototypes and static variables
51 c1f21a71 Thomas Schöpping
****************************************************************************************/
52
static void Init(void);
53
54
static void initGpio();
55
static void initExti();
56
void configGpioForShutdown();
57
58
ErrorStatus handleColdReset();
59
ErrorStatus handleUartWakeup();
60
ErrorStatus handleImuWakeup();
61
62
ErrorStatus shutdownDisambiguationProcedure(const uint8_t type);
63
void shutdownToTransportation(const blt_bool exec_disambiguation);
64
void shutdownToDeepsleep(const blt_bool exec_disambiguation);
65
void shutdownToHibernate(const blt_bool exec_disambiguation);
66
void shutdownAndRestart(const blt_bool exec_disambiguation);
67
68
volatile blBackupRegister_t backup_reg;
69
70
/****************************************************************************************
71
* Callback configuration
72
****************************************************************************************/
73
void blCallbackShutdownTransportation(void);
74
void blCallbackShutdownDeepsleep(void);
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void blCallbackShutdownHibernate(void);
76
void blCallbackShutdownRestart(void);
77
void blCallbackHandleShutdownRequest(void);
78
79
const blCallbackTable_t cbtable __attribute__ ((section ("_callback_table"))) = {
80
  .magicNumber = BL_MAGIC_NUMBER,
81 fc7151bb Thomas Schöpping
  .vBootloader = {BL_VERSION_ID_AMiRoBLT_Beta, BL_VERSION_MAJOR, BL_VERSION_MINOR, 3},
82 c1f21a71 Thomas Schöpping
  .vSSSP = {BL_VERSION_ID_SSSP, BL_SSSP_VERSION_MAJOR, BL_SSSP_VERSION_MINOR, 0},
83
  .vCompiler = {BL_VERSION_ID_GCC, __GNUC__, __GNUC_MINOR__, __GNUC_PATCHLEVEL__},  // currently only GCC is supported
84
  .cbShutdownHibernate = blCallbackShutdownHibernate,
85
  .cbShutdownDeepsleep = blCallbackShutdownDeepsleep,
86
  .cbShutdownTransportation = blCallbackShutdownTransportation,
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  .cbShutdownRestart = blCallbackShutdownRestart,
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  .cbHandleShutdownRequest = blCallbackHandleShutdownRequest,
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  .cb5 = (void*)0,
90
  .cb6 = (void*)0,
91
  .cb7 = (void*)0,
92
  .cb8 = (void*)0,
93
  .cb9 = (void*)0,
94
  .cb10 = (void*)0,
95
  .cb11 = (void*)0
96
};
97
98
/************************************************************************************//**
99
** \brief     This is the entry point for the bootloader application and is called
100
**            by the reset interrupt vector after the C-startup routines executed.
101
** \return    Program return code.
102
**
103
****************************************************************************************/
104
int main(void)
105
{
106
  /* initialize the microcontroller */
107
  Init();
108
109
  /* activate some required clocks */
110
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
111
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD, ENABLE);
112
113
  /* initialize GPIOs and EXTI lines */
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  initGpio();
115
  setLed(BLT_TRUE);
116
  initExti();
117
118
  /* initialize the timer */
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  TimerInit();
120
121
  /* detect the primary reason for this wakeup/restart */
122
  backup_reg.wakeup_pri_reason =
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      ((RCC_GetFlagStatus(RCC_FLAG_LPWRRST) == SET) ? BL_WAKEUP_PRI_RSN_LPWRRST : 0) |
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      ((RCC_GetFlagStatus(RCC_FLAG_WWDGRST) == SET) ? BL_WAKEUP_PRI_RSN_WWDGRST : 0) |
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      ((RCC_GetFlagStatus(RCC_FLAG_IWDGRST) == SET) ? BL_WAKEUP_PRI_RSN_IWDGRST : 0) |
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      ((RCC_GetFlagStatus(RCC_FLAG_SFTRST) == SET) ? BL_WAKEUP_PRI_RSN_SFTRST : 0)   |
127
      ((RCC_GetFlagStatus(RCC_FLAG_PORRST) == SET) ? BL_WAKEUP_PRI_RSN_PORRST : 0)   |
128
      ((RCC_GetFlagStatus(RCC_FLAG_PINRST) == SET) ? BL_WAKEUP_PRI_RSN_PINRST : 0)   |
129
      ((PWR_GetFlagStatus(PWR_FLAG_WU) == SET) ? BL_WAKEUP_PRI_RSN_WKUP : 0);
130
131
  /* when woken from standby mode, detect the secondary reason for thiswakeup/reset */
132
  if ( (backup_reg.wakeup_pri_reason & BL_WAKEUP_PRI_RSN_WKUP) && (PWR_GetFlagStatus(PWR_FLAG_SB) == SET) ) {
133
    if (GPIO_ReadInputDataBit(SYS_UART_UP_GPIO, SYS_UART_UP_PIN) == Bit_SET) {
134
      backup_reg.wakeup_sec_reason = BL_WAKEUP_SEC_RSN_UART;
135
    } else {
136
      backup_reg.wakeup_sec_reason = BL_WAKEUP_SEC_RSN_IMU;
137
    }
138
  } else {
139
    backup_reg.wakeup_sec_reason = BL_WAKEUP_SEC_RSN_UNKNOWN;
140
  }
141
142
  /* clear the flags */
143
  RCC_ClearFlag();
144
  PWR_ClearFlag(PWR_FLAG_WU);
145
146
  setLed(BLT_FALSE);
147
148
  /* wait 1ms for all signals to become stable */
149
  msleep(1);
150
151
  /* handle different wakeup/reset reasons */
152
  ErrorStatus status = ERROR;
153
  if (backup_reg.wakeup_pri_reason & BL_WAKEUP_PRI_RSN_WKUP) {
154
    /* the system was woken via WKUP pin */
155
    /* differenciate between two wakeup types */
156
    switch (backup_reg.wakeup_sec_reason) {
157
      case BL_WAKEUP_SEC_RSN_UART:
158
        status = handleUartWakeup();
159
        break;
160
      case BL_WAKEUP_SEC_RSN_IMU:
161
        status = handleImuWakeup();
162
        break;
163
      default:
164
        status = ERROR;
165
        break;
166
    }
167
  } else if (backup_reg.wakeup_pri_reason & BL_WAKEUP_PRI_RSN_PINRST) {
168
    /* system was woken via NRST pin */
169
    status = handleColdReset();
170
  } else {
171
    /* system was woken/reset for an unexpected reason */
172
    blinkSOS(1);
173
    status = handleColdReset();
174
  }
175
176
  /* if something went wrong, signal this failure */
177
  if (status != SUCCESS) {
178
    blinkSOSinf();
179
  }
180
181
  return 0;
182
} /*** end of main ***/
183
184
185
/************************************************************************************//**
186
** \brief     Initializes the microcontroller.
187
** \return    none.
188
**
189
****************************************************************************************/
190
static void Init(void)
191
{
192
  volatile blt_int32u StartUpCounter = 0, HSEStatus = 0;
193
  blt_int32u pll_multiplier;
194
#if (BOOT_FILE_LOGGING_ENABLE > 0) && (BOOT_COM_UART_ENABLE == 0)
195
  GPIO_InitTypeDef  GPIO_InitStruct;
196
  USART_InitTypeDef USART_InitStruct;
197
#endif
198
199
  /* reset the RCC clock configuration to the default reset state (for debug purpose) */
200
  /* set HSION bit */
201
  RCC->CR |= (blt_int32u)0x00000001;
202
  /* reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
203
  RCC->CFGR &= (blt_int32u)0xF8FF0000;
204
  /* reset HSEON, CSSON and PLLON bits */
205
  RCC->CR &= (blt_int32u)0xFEF6FFFF;
206
  /* reset HSEBYP bit */
207
  RCC->CR &= (blt_int32u)0xFFFBFFFF;
208
  /* reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
209
  RCC->CFGR &= (blt_int32u)0xFF80FFFF;
210
  /* disable all interrupts and clear pending bits  */
211
  RCC->CIR = 0x009F0000;
212
  /* enable HSE */
213
  RCC->CR |= ((blt_int32u)RCC_CR_HSEON);
214
  /* wait till HSE is ready and if Time out is reached exit */
215
  do
216
  {
217
    HSEStatus = RCC->CR & RCC_CR_HSERDY;
218
    StartUpCounter++;
219
  }
220
  while((HSEStatus == 0) && (StartUpCounter != 1500));
221
  /* check if time out was reached */
222
  if ((RCC->CR & RCC_CR_HSERDY) == RESET)
223
  {
224
    /* cannot continue when HSE is not ready */
225
    ASSERT_RT(BLT_FALSE);
226
  }
227
  /* enable flash prefetch buffer */
228
  FLASH->ACR |= FLASH_ACR_PRFTBE;
229
  /* reset flash wait state configuration to default 0 wait states */
230
  FLASH->ACR &= (blt_int32u)((blt_int32u)~FLASH_ACR_LATENCY);
231
#if (BOOT_CPU_SYSTEM_SPEED_KHZ > 48000)
232
  /* configure 2 flash wait states */
233
  FLASH->ACR |= (blt_int32u)FLASH_ACR_LATENCY_2;
234
#elif (BOOT_CPU_SYSTEM_SPEED_KHZ > 24000)
235
  /* configure 1 flash wait states */
236
  FLASH->ACR |= (blt_int32u)FLASH_ACR_LATENCY_1;
237
#endif
238
  /* HCLK = SYSCLK */
239
  RCC->CFGR |= (blt_int32u)RCC_CFGR_HPRE_DIV1;
240
  /* PCLK2 = HCLK/2 */
241
  RCC->CFGR |= (blt_int32u)RCC_CFGR_PPRE2_DIV2;
242
  /* PCLK1 = HCLK/2 */
243
  RCC->CFGR |= (blt_int32u)RCC_CFGR_PPRE1_DIV2;
244
  /* reset PLL configuration */
245
  RCC->CFGR &= (blt_int32u)((blt_int32u)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | \
246
                                          RCC_CFGR_PLLMULL));
247
  /* assert that the pll_multiplier is between 2 and 16 */
248
  ASSERT_CT((BOOT_CPU_SYSTEM_SPEED_KHZ/BOOT_CPU_XTAL_SPEED_KHZ) >= 2);
249
  ASSERT_CT((BOOT_CPU_SYSTEM_SPEED_KHZ/BOOT_CPU_XTAL_SPEED_KHZ) <= 16);
250
  /* calculate multiplier value */
251
  pll_multiplier = BOOT_CPU_SYSTEM_SPEED_KHZ/BOOT_CPU_XTAL_SPEED_KHZ;
252
  /* convert to register value */
253
  pll_multiplier = (blt_int32u)((pll_multiplier - 2) << 18);
254
  /* set the PLL multiplier and clock source */
255
  RCC->CFGR |= (blt_int32u)(RCC_CFGR_PLLSRC_HSE | pll_multiplier);
256
  /* enable PLL */
257
  RCC->CR |= RCC_CR_PLLON;
258
  /* wait till PLL is ready */
259
  while((RCC->CR & RCC_CR_PLLRDY) == 0)
260
  {
261
  }
262
  /* select PLL as system clock source */
263
  RCC->CFGR &= (blt_int32u)((blt_int32u)~(RCC_CFGR_SW));
264
  RCC->CFGR |= (blt_int32u)RCC_CFGR_SW_PLL;
265
  /* wait till PLL is used as system clock source */
266
  while ((RCC->CFGR & (blt_int32u)RCC_CFGR_SWS) != (blt_int32u)0x08)
267
  {
268
  }
269
270
  /* remap JTAG pins */
271
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
272
  AFIO->MAPR &= ~(blt_int32u)((blt_int32u)0x7 << 24);
273
  AFIO->MAPR |=  (blt_int32u)((blt_int32u)0x2 << 24);
274
  /* all input */
275
276
#if (BOOT_COM_CAN_ENABLE > 0 || BOOT_GATE_CAN_ENABLE > 0)
277
  /* enable clocks for CAN transmitter and receiver pins (GPIOB and AFIO) */
278
  RCC->APB2ENR |= (blt_int32u)(0x00000004 | 0x00000001);
279
  /* configure CAN Rx (GPIOA11) as alternate function input */
280
  /* first reset the configuration */
281
  GPIOA->CRH &= ~(blt_int32u)((blt_int32u)0xf << 12);
282
  /* CNF8[1:0] = %01 and MODE8[1:0] = %00 */
283
  GPIOA->CRH |= (blt_int32u)((blt_int32u)0x4 << 12);
284
  /* configure CAN Tx (GPIOA12) as alternate function push-pull */
285
  /* first reset the configuration */
286
  GPIOA->CRH &= ~(blt_int32u)((blt_int32u)0xf << 16);
287
  /* CNF9[1:0] = %11 and MODE9[1:0] = %11 */
288
  GPIOA->CRH |= (blt_int32u)((blt_int32u)0xb << 16);
289
290
  /* remap CAN1 pins to PortA */
291
  AFIO->MAPR &= ~(blt_int32u)((blt_int32u)0x3 << 13);
292
  AFIO->MAPR |=  (blt_int32u)((blt_int32u)0x0 << 13);
293
#endif
294
295
#if (BOOT_COM_UART_ENABLE > 0 || BOOT_GATE_UART_ENABLE > 0)
296
  /* enable clocks for USART1 peripheral, transmitter and receiver pins (GPIOA and AFIO) */
297
  RCC->APB2ENR |= (blt_int32u)(0x00004000 | 0x00000004 | 0x00000001);
298
  /* configure USART1 Tx (GPIOA9) as alternate function push-pull */
299
  /* first reset the configuration */
300
  GPIOA->CRH &= ~(blt_int32u)((blt_int32u)0xf << 4);
301
  /* CNF2[1:0] = %10 and MODE2[1:0] = %11 */
302
  GPIOA->CRH |= (blt_int32u)((blt_int32u)0xb << 4);
303
  /* configure USART1 Rx (GPIOA10) as alternate function input floating */
304
  /* first reset the configuration */
305
  GPIOA->CRH &= ~(blt_int32u)((blt_int32u)0xf << 8);
306
  /* CNF2[1:0] = %01 and MODE2[1:0] = %00 */
307
  GPIOA->CRH |= (blt_int32u)((blt_int32u)0x4 << 8);
308
#endif
309
} /*** end of Init ***/
310
311
/*
312
 * Initializes all GPIO used by the bootloader
313
 */
314
static void initGpio() {
315
  GPIO_InitTypeDef gpio_init;
316
317
  /*
318
   * OUTPUTS
319
   */
320
321
  /* initialize LED and push it up (inactive) */
322
  GPIO_SetBits(LED_GPIO, LED_PIN);
323
  gpio_init.GPIO_Pin    = LED_PIN;
324
  gpio_init.GPIO_Mode   = GPIO_Mode_Out_PP;
325
  gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
326
  GPIO_Init(LED_GPIO, &gpio_init);
327
328
  /* initialize SYS_PD_N and let it go (inactive) */
329
  GPIO_SetBits(SYS_PD_N_GPIO, SYS_PD_N_PIN);
330
  gpio_init.GPIO_Pin    = SYS_PD_N_PIN;
331
  gpio_init.GPIO_Mode   = GPIO_Mode_Out_OD;
332
  gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
333
  GPIO_Init(SYS_PD_N_GPIO, &gpio_init);
334
335
  /* initialize SYS_SYNC_N and pull it down (active) */
336
  GPIO_ResetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
337
  gpio_init.GPIO_Pin    = SYS_SYNC_N_PIN;
338
  gpio_init.GPIO_Mode   = GPIO_Mode_Out_OD;
339
  gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
340
  GPIO_Init(SYS_SYNC_N_GPIO, &gpio_init);
341
342
  /* initialize SYS_WARMST_N and let it go (active) */
343
  GPIO_SetBits(SYS_WARMRST_N_GPIO, SYS_WARMRST_N_PIN);
344
  gpio_init.GPIO_Pin    = SYS_WARMRST_N_PIN;
345
  gpio_init.GPIO_Mode   = GPIO_Mode_Out_OD;
346
  gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
347
  GPIO_Init(SYS_WARMRST_N_GPIO, &gpio_init);
348
349
  /* initialize SYS_UART_UP and let it go (inactive) */
350
  GPIO_SetBits(SYS_UART_UP_GPIO, SYS_UART_UP_PIN);
351
  gpio_init.GPIO_Pin    = SYS_UART_UP_PIN;
352
  gpio_init.GPIO_Mode   = GPIO_Mode_Out_OD;
353
  gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
354
  GPIO_Init(SYS_UART_UP_GPIO, &gpio_init);
355
356
  /* initialize PATH_DCEN and pull it down (inactive) */
357
  GPIO_ResetBits(PATH_DCEN_GPIO, PATH_DCEN_PIN);
358
  gpio_init.GPIO_Pin    = PATH_DCEN_PIN;
359
  gpio_init.GPIO_Mode   = GPIO_Mode_Out_PP;
360
  gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
361
  GPIO_Init(PATH_DCEN_GPIO, &gpio_init);
362
363
  /*
364
   * INPUTS
365
   */
366
367
  /* initialize the input IMU_INT */
368
  gpio_init.GPIO_Pin    = IMU_INT_PIN;
369
  gpio_init.GPIO_Mode   = GPIO_Mode_IN_FLOATING;
370
  gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
371
  GPIO_Init(IMU_INT_GPIO, &gpio_init);
372
373
  return;
374
} /*** end of initGpio ***/
375
376
/*
377
 * Initialize all EXTI lines
378
 */
379
static void initExti() {
380
  /* configure EXTI lines */
381
  GPIO_EXTILineConfig(GPIO_PortSourceGPIOC, GPIO_PinSource1); // SYS_SYNC_N
382
  GPIO_EXTILineConfig(GPIO_PortSourceGPIOD, GPIO_PinSource2); // SYS_WARMRST_N
383
  GPIO_EXTILineConfig(GPIO_PortSourceGPIOC, GPIO_PinSource3); // PATH_DCSTAT
384
  GPIO_EXTILineConfig(GPIO_PortSourceGPIOC, GPIO_PinSource8); // SYS_PD_N
385
  GPIO_EXTILineConfig(GPIO_PortSourceGPIOC, GPIO_PinSource9); // SYS_REG_EN
386
  GPIO_EXTILineConfig(GPIO_PortSourceGPIOB, GPIO_PinSource12); // IR_INT
387
  GPIO_EXTILineConfig(GPIO_PortSourceGPIOB, GPIO_PinSource14); // SYS_UART_UP
388
  GPIO_EXTILineConfig(GPIO_PortSourceGPIOB, GPIO_PinSource15); // IMU_INT
389
390
  return;
391
} /*** end of initExti ***/
392
393
/*
394
 * Signals, which type of low-power mode the system shall enter after the shutdown sequence.
395
 */
396
ErrorStatus shutdownDisambiguationProcedure(const uint8_t type) {
397
  GPIO_SetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
398
  ErrorStatus ret_val = ERROR;
399
400
  switch (type) {
401
    case BL_SHUTDOWN_PRI_RSN_UNKNOWN:
402
    case BL_SHUTDOWN_PRI_RSN_HIBERNATE:
403
    case BL_SHUTDOWN_PRI_RSN_DEEPSLEEP:
404
    case BL_SHUTDOWN_PRI_RSN_TRANSPORT:
405
    {
406
      // broadcast a number of pulses, depending on the argument
407
      uint8_t pulse_counter = 0;
408
      for (pulse_counter = 0; pulse_counter < type; ++pulse_counter) {
409
        msleep(1);
410
        GPIO_ResetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
411
        msleep(1);
412
        GPIO_SetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
413
      }
414
      // wait for timeout
415
      msleep(10);
416
      ret_val = SUCCESS;
417
      break;
418
    }
419
    case BL_SHUTDOWN_PRI_RSN_RESTART:
420
    {
421
      // since there is no ambiguity for restart requests, no pulses are generated
422
      msleep(10);
423
      ret_val = SUCCESS;
424
      break;
425
    }
426
    default:
427
      ret_val = ERROR;
428
      break;
429
  }
430
431
  return ret_val;
432
} /*** end of shutdownDisambiguationProcedure ***/
433
434
/*
435
 * Final shutdown of the system to enter transportation mode.
436
 */
437
void shutdownToTransportation(const blt_bool exec_disambiguation) {
438
  /* configure some criticpal GPIOs as input
439
   * This is required, because otherwise some hardware might be powered through these signals */
440
  configGpioForShutdown();
441
442
  /* turn off the motors */
443
  GPIO_ResetBits(POWER_EN_GPIO, POWER_EN_PIN);
444
445
  /* deactivate the WKUP pin */
446
  PWR_WakeUpPinCmd(DISABLE);
447
448
  /* deactivate any RTC related events */
449
  RTC_ITConfig(RTC_IT_ALR | RTC_IT_OW | RTC_IT_SEC, DISABLE);
450
  RTC_ClearFlag(~0);
451
452
  /* disable the IWDG */
453
  IWDG_ReloadCounter();
454
455
  /* wait for all boards to be ready for shutdown */
456
  GPIO_SetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
457
  if (GPIO_ReadInputDataBit(SYS_REG_EN_GPIO, SYS_REG_EN_PIN) == Bit_SET) {
458 fc7151bb Thomas Schöpping
    // this must be skipped if the pullup voltage (VIO3.3) is not active
459 c1f21a71 Thomas Schöpping
    setLed(BLT_TRUE);
460
    waitForSignal(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN, Bit_SET);
461
    setLed(BLT_FALSE);
462
  }
463
464
  if (exec_disambiguation == BLT_TRUE) {
465
    /* execute disambiguation procedure and signal all modules to enter transportation mode */
466
    if (shutdownDisambiguationProcedure(BL_SHUTDOWN_PRI_RSN_TRANSPORT) != SUCCESS) {
467
      blinkSOS(1);
468
      msleep(10);
469
    }
470
  }
471
472
  /* morse 'OK' via the LED to signal that shutdown was successful */
473
  blinkOK(1);
474
475
  /* enter standby mode */
476
  PWR_EnterSTANDBYMode();
477
478
  return;
479
} /*** end of shutdownToTransportation ***/
480
481
/*
482
 * Final shutdown of the system to enter deepsleep mode.
483
 */
484
void shutdownToDeepsleep(const blt_bool exec_disambiguation) {
485
  /* configure some criticpal GPIOs as input
486
   * This is required, because otherwise some hardware might be powered through these signals */
487
  configGpioForShutdown();
488
489
  /* turn off the motors */
490
  GPIO_ResetBits(POWER_EN_GPIO, POWER_EN_PIN);
491
492
  /* deactivate the WKUP pin */
493
  PWR_WakeUpPinCmd(ENABLE);
494
495
  /*
496
   * Configuration of RTC and IWDG belongs to the OS.
497
   */
498
499
  /* wait for all boards to be ready for shutdown */
500
  GPIO_SetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
501
  if (GPIO_ReadInputDataBit(SYS_REG_EN_GPIO, SYS_REG_EN_PIN) == Bit_SET) {
502 fc7151bb Thomas Schöpping
    // this must be skipped if the pullup voltage (VIO3.3) is not active
503 c1f21a71 Thomas Schöpping
    setLed(BLT_TRUE);
504
    waitForSignal(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN, Bit_SET);
505
    setLed(BLT_FALSE);
506
  }
507
508
  if (exec_disambiguation == BLT_TRUE) {
509
    /* execute disambiguation procedure and signal all modules to enter deepsleep mode */
510
    if (shutdownDisambiguationProcedure(BL_SHUTDOWN_PRI_RSN_DEEPSLEEP) != SUCCESS) {
511
      blinkSOS(1);
512
      msleep(10);
513
    }
514
  }
515
516
  /* morse 'OK' via the LED to signal that shutdown was successful */
517
  blinkOK(1);
518
519
  /* enter standby mode */
520
  PWR_EnterSTANDBYMode();
521
522
  return;
523
} /*** end of shutdownToDeepsleep ***/
524
525
/*
526
 * Final shutdown of the system to enter hibernate mode.
527
 */
528
void shutdownToHibernate(const blt_bool exec_disambiguation) {
529
  /* configure some criticpal GPIOs as input
530
   * This is required, because otherwise some hardware might be powered through these signals */
531
  configGpioForShutdown();
532
533
  /* turn off the motors */
534
  GPIO_ResetBits(POWER_EN_GPIO, POWER_EN_PIN);
535
536
  /* deactivate the WKUP pin */
537
  PWR_WakeUpPinCmd(ENABLE);
538
539
  /*
540
   * Configuration of RTC and IWDG belongs to the OS.
541
   */
542
543
  /* wait for all boards to be ready for shutdown */
544
  GPIO_SetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
545
  if (GPIO_ReadInputDataBit(SYS_REG_EN_GPIO, SYS_REG_EN_PIN) == Bit_SET) {
546 fc7151bb Thomas Schöpping
    // this must be skipped if the pullup voltage (VIO3.3) is not active
547 c1f21a71 Thomas Schöpping
    setLed(BLT_TRUE);
548
    waitForSignal(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN, Bit_SET);
549
    setLed(BLT_FALSE);
550
  }
551
552
  if (exec_disambiguation == BLT_TRUE) {
553
    /* execute disambiguation procedure and signal all modules to enter deepsleep mode */
554
    if (shutdownDisambiguationProcedure(BL_SHUTDOWN_PRI_RSN_HIBERNATE) != SUCCESS) {
555
      blinkSOS(1);
556
      msleep(10);
557
    }
558
  }
559
560
  /* morse 'OK' via the LED to signal that shutdown was successful */
561
  blinkOK(1);
562
563
  /* enter standby mode */
564
  PWR_EnterSTANDBYMode();
565
566
  return;
567 fc7151bb Thomas Schöpping
} /*** end of shutdownToHibernate ***/
568 c1f21a71 Thomas Schöpping
569
/*
570
 * Final shutdown of the system and restart.
571
 */
572
void shutdownAndRestart(const blt_bool exec_disambiguation) {
573
  /* configure some criticpal GPIOs as input
574
   * This is required, because otherwise some hardware might be powered through these signals */
575
  configGpioForShutdown();
576
577
  /* turn off the motors */
578
  GPIO_ResetBits(POWER_EN_GPIO, POWER_EN_PIN);
579
580
  /* prepare for low-power mode */
581
  PWR_WakeUpPinCmd(DISABLE); // disable WKUP pin
582
  RTC_ITConfig(RTC_IT_ALR | RTC_IT_OW | RTC_IT_SEC, DISABLE); // unset RTC events
583
  RTC_ClearFlag(~0); // clear pending RTC events
584
  IWDG_ReloadCounter(); // disable IWDG
585
586
  /* wait for all boards to be ready for shutdown */
587
  GPIO_SetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
588
  if (GPIO_ReadInputDataBit(SYS_REG_EN_GPIO, SYS_REG_EN_PIN) == Bit_SET) {
589 fc7151bb Thomas Schöpping
    // this must be skipped if the pullup voltage (VIO3.3) is not active
590 c1f21a71 Thomas Schöpping
    setLed(BLT_TRUE);
591
    waitForSignal(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN, Bit_SET);
592
    setLed(BLT_FALSE);
593
  }
594
595
  if (exec_disambiguation == BLT_TRUE) {
596
    /* execute disambiguation procedure and signal all modules to restart in default mode */
597
    if (shutdownDisambiguationProcedure(BL_SHUTDOWN_PRI_RSN_RESTART) != SUCCESS) {
598
      blinkSOS(1);
599
      msleep(10);
600
    }
601
  }
602
603
  /* morse 'OK' via the LED to signal that shutdown was successful */
604
  blinkOK(1);
605
606
  /* enter standby mode */
607
  PWR_EnterSTANDBYMode();
608
609
  /*
610
   * Even though this module will not restart the system by its own, the PowerManagement will reset the system.
611
   */
612
613
  return;
614 fc7151bb Thomas Schöpping
} /*** end of shutdownAndRestart ***/
615 c1f21a71 Thomas Schöpping
616
/*
617
 * Configures some GPIO pins as inputs for safety reasons.
618
 * Under certain circumstances, these pins might power hardware that is supposed to be shut down.
619
 */
620
void configGpioForShutdown() {
621
  /* setup the configuration */
622
  GPIO_InitTypeDef gpio_init;
623
  gpio_init.GPIO_Mode   = GPIO_Mode_IN_FLOATING;
624
  gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
625
626
  /* configure SYS_UART_TX */
627
  gpio_init.GPIO_Pin = SYS_UART_TX_PIN;
628
  GPIO_Init(SYS_UART_TX_GPIO, &gpio_init);
629
630
  /* configure CAN_TX */
631
  gpio_init.GPIO_Pin = CAN_TX_PIN;
632
  GPIO_Init(CAN_TX_GPIO, &gpio_init);
633
634
  return;
635
} /*** end of configGpioForShutdown ***/
636
637
/*
638
 * System was reset via the NRST pin or the reason could not be detected.
639
 * In this case, there are three possibilities how to act:
640
 * 1) When the SYS_WARMRST_N signal becomes inactive, flashing mode is entered and the system will try to load the OS.
641
 * 2) When the SYS_UART_UP signal becomes active (low), the system will enter hibernate mode to enable charging via the pins.
642
 * 3) If none of both happens and a timeout occurs, the system enters deepsleep mode.
643
 */
644
ErrorStatus handleColdReset() {
645
  /* wait until either the SYS_WARMRST_N signal goes up, or SYS_UART_UP goes down */
646
  enum CRST_SIG {CRST_SIG_SYS_WARMRST_N,
647
                 CRST_SIG_SYS_UART_UP,
648
                 CRST_SIG_TIMEOUT
649
                } sig;
650
  uint32_t loopStartTime = 0;
651
  saTimerUpdate(&loopStartTime);
652
  uint32_t currentTime = loopStartTime;
653
  setLed(BLT_TRUE);
654
  while (1) {
655
    /* read the input signals */
656
    if (GPIO_ReadInputDataBit(SYS_REG_EN_GPIO, SYS_REG_EN_PIN) == Bit_SET &&
657
        GPIO_ReadInputDataBit(SYS_WARMRST_N_GPIO, SYS_WARMRST_N_PIN) == Bit_SET) {
658
      sig = CRST_SIG_SYS_WARMRST_N;
659
      break;
660
    }
661
    if (GPIO_ReadInputDataBit(SYS_UART_UP_GPIO, SYS_UART_UP_PIN) == Bit_RESET) {
662
      sig = CRST_SIG_SYS_UART_UP;
663
      break;
664
    }
665
666
    /* check for a timeout */
667
    saTimerUpdate(&currentTime);
668
    if (currentTime > loopStartTime + RESET_TIMEOUT_MS) {
669
      sig = CRST_SIG_TIMEOUT;
670
      break;
671
    }
672
  }
673
  setLed(BLT_FALSE);
674
675
  /* depending on the signal, react accordingly */
676
  switch (sig) {
677
    /* activation of the slave modules signales to boot the OS */
678
    case CRST_SIG_SYS_WARMRST_N:
679
    {
680
      /* enable CAN clock */
681
      RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN1, ENABLE);
682
683
      /* initialize the bootloader */
684
      BootInit();
685
686
      /* start the infinite program loop */
687
      uint32_t loopStartTime = 0;
688
      saTimerUpdate(&loopStartTime);
689
      uint32_t currentTime = loopStartTime;
690
      while (1)
691
      {
692
//        /* make the LED "double-blink" */
693
//        saTimerUpdate(&currentTime);
694
//        if (currentTime < loopStartTime + 50) {
695
//          setLed(BLT_TRUE);
696
//        } else if (currentTime < loopStartTime + 50+100) {
697
//          setLed(BLT_FALSE);
698
//        } else if (currentTime < loopStartTime + 50+100+50) {
699
//          setLed(BLT_TRUE);
700
//        } else if ( currentTime < loopStartTime + 50+100+50+300) {
701
//          setLed(BLT_FALSE);
702
//        } else {
703
//          loopStartTime = currentTime;
704
//        }
705
706
        /* run the bootloader task */
707
        BootTask();
708
709
        /* check the SYS_PD_N signal */
710
        if (GPIO_ReadInputDataBit(SYS_PD_N_GPIO, SYS_PD_N_PIN) == Bit_RESET) {
711
          blCallbackHandleShutdownRequest();
712
          return SUCCESS;
713
        }
714
      }
715
716
      break;
717
    }
718
    /* activation of the UART_UP signal indicates that this module shall enter hibernate mode */
719
    case CRST_SIG_SYS_UART_UP:
720
    {
721
      /* indicate that the MCU is busy */
722
      GPIO_ResetBits(SYS_UART_UP_GPIO, SYS_UART_UP_PIN);
723
724
      /* enable the charging pins */
725
      GPIO_SetBits(PATH_DCEN_GPIO, PATH_DCEN_PIN);
726
727
      /* wait some time so the systen voltage (VSYS) is stable if it is supplied via the pins */
728
      msleep(10);
729
730
      /* indicate that the MCU is not busy anymore */
731
      GPIO_SetBits(SYS_UART_UP_GPIO, SYS_UART_UP_PIN);
732
733
      /* configure the IMU external interrupt as event */
734
      EXTI_InitTypeDef exti;
735
      exti.EXTI_Line = EXTI_Line15;
736
      exti.EXTI_Mode = EXTI_Mode_Event;
737
      exti.EXTI_Trigger = EXTI_Trigger_Falling;
738
      exti.EXTI_LineCmd = ENABLE;
739
      EXTI_Init(&exti);
740
741
      /* sleep until something happens */
742
      __WFE();
743
744
      /* clear all pending EXTI events */
745
      EXTI_DeInit();
746
      EXTI_ClearFlag(EXTI_Line15);
747
748
      /* handle IMU wakeup
749
       * note: In fact, the only events that will occur at this point are an interrupt event from the IMU, or a
750
       * system reset from the PowerManagement via the NRST pin. Thus, if the following code is reached, it must have
751
       * been the IMU.
752
       */
753
754
      /* as as after a normal wakeup from the IMU */
755
      return handleImuWakeup();
756
757
      break;
758
    }
759
    /* if a timeout occurred, the system enters deepsleep mode */
760
    case CRST_SIG_TIMEOUT:
761
    {
762
      /* reconfigure the LED_GPIO as input so it will not light up (and thus save energy) */
763
      GPIO_InitTypeDef gpio_init;
764
      gpio_init.GPIO_Pin    = LED_PIN;
765
      gpio_init.GPIO_Mode   = GPIO_Mode_IN_FLOATING;
766
      gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
767
      GPIO_Init(LED_GPIO, &gpio_init);
768
769
      /* reconfigure SYS_PD_N as input so the callback will not indicate a shutdown */
770
      gpio_init.GPIO_Pin    = SYS_PD_N_PIN;
771
      gpio_init.GPIO_Mode   = GPIO_Mode_IN_FLOATING;
772
      gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
773
      GPIO_Init(SYS_PD_N_GPIO, &gpio_init);
774
775
      blCallbackShutdownDeepsleep();
776
      break;
777
    }
778
    default:
779
      break;
780
  }
781
782
  return ERROR;
783
} /*** end of handleColdReset ***/
784
785
/*
786
 * System was woken up via the WKUP pin and the SYS_UART_UP signal was found to be responsible.
787
 * In this case, the system starts as after a cold reset.
788
 */
789
ErrorStatus handleUartWakeup() {
790
  return handleColdReset();
791
} /*** end of handleUartWakeup ***/
792
793
/*
794
 * System was woken up via the WKUP pin and the IMU_INT signal was found to be responsible.
795
 * The SYS_UART_UP signal is used to wake the PowerManagement before a normal cold reset is performed.
796
 */
797
ErrorStatus handleImuWakeup() {
798
  /* wakeup the PowerManegement (ensure that the pulse is detected) */
799
  GPIO_ResetBits(SYS_UART_UP_GPIO, SYS_UART_UP_PIN);
800
  msleep(1);
801
  GPIO_SetBits(SYS_UART_UP_GPIO, SYS_UART_UP_PIN);
802
803
  return handleColdReset();
804 fc7151bb Thomas Schöpping
} /*** end of handleImuWakeup ***/
805 c1f21a71 Thomas Schöpping
806
/*
807
 * Callback function that handles the system shutdown and enters transportation mode.
808
 * When called from a multithreaded environment, it must be ensured that no other thread will preempt this function.
809
 * In transportation low-power mode the system can only be woken up by pulling down the NRST signal.
810
 * Furthermore, the system can not be charged when in transportation mode.
811
 */
812 fc7151bb Thomas Schöpping
void blCallbackShutdownTransportation() {
813 c1f21a71 Thomas Schöpping
  /* make sure that the required clocks are activated */
814
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
815
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD, ENABLE);
816
817
  /* set/keep the SYS_SYNC and SYS_PD signals active */
818
  GPIO_ResetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
819
  GPIO_ResetBits(SYS_PD_N_GPIO, SYS_PD_N_PIN);
820
821 fc7151bb Thomas Schöpping
  /* initialized the standalone timer */
822 c1f21a71 Thomas Schöpping
  saTimerInit();
823
824 fc7151bb Thomas Schöpping
  setLed(BLT_TRUE);
825
826 c1f21a71 Thomas Schöpping
  shutdownToTransportation(BLT_TRUE);
827
828
  return;
829
} /*** end of blCallbackShutdownTransportation ***/
830
831
/*
832
 * Callback function that handles the system shutdown and enters deepsleep mode.
833
 * When called from a multithreaded environment, it must be ensured that no other thread will preempt this function.
834
 * In deepsleep low-power mode the system can only be woken up via the NRST or the WKUP signal, or the RTC or IWDG, if configured.
835
 */
836
void blCallbackShutdownDeepsleep(void) {
837
  /* make sure that the required clocks are activated */
838
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
839
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD, ENABLE);
840
841
  /* set/keep the SYS_SYNC and SYS_PD signals active */
842
  GPIO_ResetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
843
  GPIO_ResetBits(SYS_PD_N_GPIO, SYS_PD_N_PIN);
844
845 fc7151bb Thomas Schöpping
  /* initialized the standalone timer */
846 c1f21a71 Thomas Schöpping
  saTimerInit();
847
848 fc7151bb Thomas Schöpping
  setLed(BLT_TRUE);
849
850 c1f21a71 Thomas Schöpping
  shutdownToDeepsleep(BLT_TRUE);
851
852
  return;
853
} /*** end of blCallbackShutdownDeepsleep ***/
854
855
/*
856
 * Callback function that handles the system shutdown and enters hibernate mode.
857
 * When called from a multithreaded environment, it must be ensured that no other thread will preempt this function.
858
 */
859
void blCallbackShutdownHibernate(void) {
860
  /* make sure that the required clocks are activated */
861
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
862
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD, ENABLE);
863
864
  /* set/keep the SYS_SYNC and SYS_PD signals active */
865
  GPIO_ResetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
866
  GPIO_ResetBits(SYS_PD_N_GPIO, SYS_PD_N_PIN);
867
868 fc7151bb Thomas Schöpping
  /* initialized the standalone timer */
869 c1f21a71 Thomas Schöpping
  saTimerInit();
870
871 fc7151bb Thomas Schöpping
  setLed(BLT_TRUE);
872
873 c1f21a71 Thomas Schöpping
  shutdownToHibernate(BLT_TRUE);
874
875
  return;
876
} /*** end of blCallbackShutdownHibernate ***/
877
878
/*
879
 * Callback function that handles the system shutdown and initializes a restart.
880
 * When called from a multithreaded environment, it must be ensured that no other thread will preempt this function.
881
 */
882
void blCallbackShutdownRestart(void) {
883
  /* make sure that the required clocks are activated */
884
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
885
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD, ENABLE);
886
887 fc7151bb Thomas Schöpping
  /* set/keep the SYS_SYNC and SYS_PD signals active */
888 c1f21a71 Thomas Schöpping
  GPIO_ResetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
889
  GPIO_ResetBits(SYS_PD_N_GPIO, SYS_PD_N_PIN);
890
891 fc7151bb Thomas Schöpping
  /* initialized the standalone timer */
892 c1f21a71 Thomas Schöpping
  saTimerInit();
893 fc7151bb Thomas Schöpping
894
  setLed(BLT_TRUE);
895
896
  /* deactivate SYS_PD_N and ensure that all modules had a chance to detect the falling edge */
897 c1f21a71 Thomas Schöpping
  msleep(1);
898
  GPIO_SetBits(SYS_PD_N_GPIO, SYS_PD_N_PIN);
899
  msleep(1);
900
901
  shutdownAndRestart(BLT_TRUE);
902
903
  return;
904
} /*** end of blCallbackRestart ***/
905
906
/*
907
 * Callback function that handles a system shutdown/restart request from another module.
908
 * Depending on the result of the disambiguation procedure, the module will enter the according low-power mode or restart.
909
 * When called from a multithreaded environment, it must be ensured that no other thread will preempt this function.
910
 */
911
void blCallbackHandleShutdownRequest(void) {
912
  /* make sure that the required clocks are activated */
913
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
914
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD, ENABLE);
915
916 fc7151bb Thomas Schöpping
  /* set/keep the SYS_SYNC and SYS_PD signals active */
917 c1f21a71 Thomas Schöpping
  GPIO_ResetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
918
  GPIO_ResetBits(SYS_PD_N_GPIO, SYS_PD_N_PIN);
919
920
  /* initialized the standalone timer */
921
  saTimerInit();
922
923
  setLed(BLT_TRUE);
924
925
  /* deactivate SYS_PD_N and ensure that all modules had a chance to detect the falling edge */
926
  msleep(1);
927
  GPIO_SetBits(SYS_PD_N_GPIO, SYS_PD_N_PIN);
928
  msleep(1);
929
930
  /* wait for all boards to be ready for shutdown */
931
  GPIO_SetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
932
  if (GPIO_ReadOutputDataBit(SYS_REG_EN_GPIO, SYS_REG_EN_PIN) == Bit_SET) {
933 fc7151bb Thomas Schöpping
    // this must be skipped if the pullup voltage (VIO3.3) is not active
934 c1f21a71 Thomas Schöpping
    setLed(BLT_TRUE);
935
    waitForSignal(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN, Bit_SET);
936
    setLed(BLT_FALSE);
937
  }
938
939
  /* check ths SYS_PD_N signal, whether the system shall shutdown or restart */
940
  blt_bool shutdown_nrestart = (GPIO_ReadInputDataBit(SYS_PD_N_GPIO, SYS_PD_N_PIN) == Bit_RESET) ? BLT_TRUE : BLT_FALSE;
941
942
  /* disambiguation procedure (passive) */
943
  uint32_t pulse_counter = 0;
944
  while (waitForSignalTimeout(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN, Bit_RESET, 10)) {
945
    waitForSignal(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN, Bit_SET);
946
    ++pulse_counter;
947
  }
948
949
  /* evaluate and hanlde disambiguation result */
950
  if (shutdown_nrestart == BLT_TRUE) {
951
    /* shutdown request */
952
953
    /* handle special cases */
954
    if (pulse_counter == BL_SHUTDOWN_PRI_RSN_UNKNOWN) {
955
      /* no pulse at all was received */
956
      pulse_counter = BL_SHUTDOWN_PRI_RSN_DEFAULT;
957
    } else if (pulse_counter != BL_SHUTDOWN_PRI_RSN_HIBERNATE &&
958
               pulse_counter != BL_SHUTDOWN_PRI_RSN_DEEPSLEEP &&
959
               pulse_counter != BL_SHUTDOWN_PRI_RSN_TRANSPORT) {
960
      /* invalid number of pulses received */
961
      blinkSOS(1);
962
      pulse_counter = BL_SHUTDOWN_PRI_RSN_DEFAULT;
963
    }
964
965
    switch (pulse_counter) {
966
      case BL_SHUTDOWN_PRI_RSN_HIBERNATE:
967
        shutdownToHibernate(BLT_FALSE);
968
        break;
969
      case BL_SHUTDOWN_PRI_RSN_DEEPSLEEP:
970
        shutdownToDeepsleep(BLT_FALSE);
971
        break;
972
      case BL_SHUTDOWN_PRI_RSN_TRANSPORT:
973
        shutdownToTransportation(BLT_FALSE);
974
        break;
975
    }
976
  } else {
977
    /* restart request */
978
979
    /* there is no ambiguity for restart, so it is ignored */
980
    shutdownAndRestart(BLT_FALSE);
981
  }
982
983
  /* if this code is reached, the system did neither shut down, nor restart.
984
   * This must never be the case!
985
   */
986
  blinkSOSinf();
987
  return;
988
} /*** end of blCallbackHandleShutdownRequest ***/
989
990
/*********************************** end of main.c *************************************/