amiro-blt / Target / Modules / LightRing_1-2 / Boot / lib / STM32F10x_StdPeriph_Driver / inc / stm32f10x_sdio.h @ fc7151bb
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/**
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******************************************************************************
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* @file stm32f10x_sdio.h
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* @author MCD Application Team
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* @version V3.5.0
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* @date 11-March-2011
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* @brief This file contains all the functions prototypes for the SDIO firmware
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* library.
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******************************************************************************
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* @attention
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F10x_SDIO_H
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#define __STM32F10x_SDIO_H
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#ifdef __cplusplus
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extern "C" { |
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f10x.h" |
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/** @addtogroup STM32F10x_StdPeriph_Driver
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* @{
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*/
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/** @addtogroup SDIO
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* @{
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*/
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/** @defgroup SDIO_Exported_Types
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* @{
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*/
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typedef struct |
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{
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uint32_t SDIO_ClockEdge; /*!< Specifies the clock transition on which the bit capture is made.
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This parameter can be a value of @ref SDIO_Clock_Edge */
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uint32_t SDIO_ClockBypass; /*!< Specifies whether the SDIO Clock divider bypass is
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enabled or disabled.
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This parameter can be a value of @ref SDIO_Clock_Bypass */
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uint32_t SDIO_ClockPowerSave; /*!< Specifies whether SDIO Clock output is enabled or
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disabled when the bus is idle.
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This parameter can be a value of @ref SDIO_Clock_Power_Save */
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uint32_t SDIO_BusWide; /*!< Specifies the SDIO bus width.
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This parameter can be a value of @ref SDIO_Bus_Wide */
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uint32_t SDIO_HardwareFlowControl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled.
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This parameter can be a value of @ref SDIO_Hardware_Flow_Control */
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uint8_t SDIO_ClockDiv; /*!< Specifies the clock frequency of the SDIO controller.
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This parameter can be a value between 0x00 and 0xFF. */
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} SDIO_InitTypeDef; |
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typedef struct |
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{
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uint32_t SDIO_Argument; /*!< Specifies the SDIO command argument which is sent
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to a card as part of a command message. If a command
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contains an argument, it must be loaded into this register
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before writing the command to the command register */
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uint32_t SDIO_CmdIndex; /*!< Specifies the SDIO command index. It must be lower than 0x40. */
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uint32_t SDIO_Response; /*!< Specifies the SDIO response type.
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This parameter can be a value of @ref SDIO_Response_Type */
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uint32_t SDIO_Wait; /*!< Specifies whether SDIO wait-for-interrupt request is enabled or disabled.
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This parameter can be a value of @ref SDIO_Wait_Interrupt_State */
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uint32_t SDIO_CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM)
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is enabled or disabled.
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This parameter can be a value of @ref SDIO_CPSM_State */
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} SDIO_CmdInitTypeDef; |
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typedef struct |
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{
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uint32_t SDIO_DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */
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uint32_t SDIO_DataLength; /*!< Specifies the number of data bytes to be transferred. */
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uint32_t SDIO_DataBlockSize; /*!< Specifies the data block size for block transfer.
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This parameter can be a value of @ref SDIO_Data_Block_Size */
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uint32_t SDIO_TransferDir; /*!< Specifies the data transfer direction, whether the transfer
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is a read or write.
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This parameter can be a value of @ref SDIO_Transfer_Direction */
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uint32_t SDIO_TransferMode; /*!< Specifies whether data transfer is in stream or block mode.
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This parameter can be a value of @ref SDIO_Transfer_Type */
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uint32_t SDIO_DPSM; /*!< Specifies whether SDIO Data path state machine (DPSM)
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is enabled or disabled.
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This parameter can be a value of @ref SDIO_DPSM_State */
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} SDIO_DataInitTypeDef; |
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/**
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* @}
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*/
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/** @defgroup SDIO_Exported_Constants
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* @{
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*/
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/** @defgroup SDIO_Clock_Edge
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* @{
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*/
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#define SDIO_ClockEdge_Rising ((uint32_t)0x00000000) |
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#define SDIO_ClockEdge_Falling ((uint32_t)0x00002000) |
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#define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_ClockEdge_Rising) || \
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((EDGE) == SDIO_ClockEdge_Falling)) |
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/**
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* @}
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*/
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/** @defgroup SDIO_Clock_Bypass
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* @{
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*/
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#define SDIO_ClockBypass_Disable ((uint32_t)0x00000000) |
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#define SDIO_ClockBypass_Enable ((uint32_t)0x00000400) |
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#define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_ClockBypass_Disable) || \
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((BYPASS) == SDIO_ClockBypass_Enable)) |
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/**
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* @}
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*/
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/** @defgroup SDIO_Clock_Power_Save
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* @{
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*/
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#define SDIO_ClockPowerSave_Disable ((uint32_t)0x00000000) |
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#define SDIO_ClockPowerSave_Enable ((uint32_t)0x00000200) |
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#define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_ClockPowerSave_Disable) || \
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((SAVE) == SDIO_ClockPowerSave_Enable)) |
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/**
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* @}
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*/
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/** @defgroup SDIO_Bus_Wide
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* @{
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*/
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#define SDIO_BusWide_1b ((uint32_t)0x00000000) |
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#define SDIO_BusWide_4b ((uint32_t)0x00000800) |
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#define SDIO_BusWide_8b ((uint32_t)0x00001000) |
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#define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BusWide_1b) || ((WIDE) == SDIO_BusWide_4b) || \
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((WIDE) == SDIO_BusWide_8b)) |
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/**
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* @}
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*/
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/** @defgroup SDIO_Hardware_Flow_Control
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* @{
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*/
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#define SDIO_HardwareFlowControl_Disable ((uint32_t)0x00000000) |
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#define SDIO_HardwareFlowControl_Enable ((uint32_t)0x00004000) |
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#define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HardwareFlowControl_Disable) || \
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((CONTROL) == SDIO_HardwareFlowControl_Enable)) |
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/**
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* @}
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*/
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/** @defgroup SDIO_Power_State
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* @{
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*/
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#define SDIO_PowerState_OFF ((uint32_t)0x00000000) |
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#define SDIO_PowerState_ON ((uint32_t)0x00000003) |
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#define IS_SDIO_POWER_STATE(STATE) (((STATE) == SDIO_PowerState_OFF) || ((STATE) == SDIO_PowerState_ON))
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/**
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* @}
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*/
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/** @defgroup SDIO_Interrupt_sources
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* @{
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*/
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#define SDIO_IT_CCRCFAIL ((uint32_t)0x00000001) |
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#define SDIO_IT_DCRCFAIL ((uint32_t)0x00000002) |
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#define SDIO_IT_CTIMEOUT ((uint32_t)0x00000004) |
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#define SDIO_IT_DTIMEOUT ((uint32_t)0x00000008) |
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#define SDIO_IT_TXUNDERR ((uint32_t)0x00000010) |
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#define SDIO_IT_RXOVERR ((uint32_t)0x00000020) |
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#define SDIO_IT_CMDREND ((uint32_t)0x00000040) |
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#define SDIO_IT_CMDSENT ((uint32_t)0x00000080) |
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#define SDIO_IT_DATAEND ((uint32_t)0x00000100) |
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#define SDIO_IT_STBITERR ((uint32_t)0x00000200) |
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#define SDIO_IT_DBCKEND ((uint32_t)0x00000400) |
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#define SDIO_IT_CMDACT ((uint32_t)0x00000800) |
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#define SDIO_IT_TXACT ((uint32_t)0x00001000) |
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#define SDIO_IT_RXACT ((uint32_t)0x00002000) |
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#define SDIO_IT_TXFIFOHE ((uint32_t)0x00004000) |
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#define SDIO_IT_RXFIFOHF ((uint32_t)0x00008000) |
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#define SDIO_IT_TXFIFOF ((uint32_t)0x00010000) |
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#define SDIO_IT_RXFIFOF ((uint32_t)0x00020000) |
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#define SDIO_IT_TXFIFOE ((uint32_t)0x00040000) |
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#define SDIO_IT_RXFIFOE ((uint32_t)0x00080000) |
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#define SDIO_IT_TXDAVL ((uint32_t)0x00100000) |
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#define SDIO_IT_RXDAVL ((uint32_t)0x00200000) |
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#define SDIO_IT_SDIOIT ((uint32_t)0x00400000) |
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#define SDIO_IT_CEATAEND ((uint32_t)0x00800000) |
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#define IS_SDIO_IT(IT) ((((IT) & (uint32_t)0xFF000000) == 0x00) && ((IT) != (uint32_t)0x00)) |
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/**
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* @}
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*/
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/** @defgroup SDIO_Command_Index
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* @{
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*/
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#define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40) |
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/**
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* @}
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*/
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/** @defgroup SDIO_Response_Type
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* @{
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*/
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#define SDIO_Response_No ((uint32_t)0x00000000) |
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#define SDIO_Response_Short ((uint32_t)0x00000040) |
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#define SDIO_Response_Long ((uint32_t)0x000000C0) |
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#define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_Response_No) || \
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((RESPONSE) == SDIO_Response_Short) || \ |
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((RESPONSE) == SDIO_Response_Long)) |
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/**
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* @}
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*/
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/** @defgroup SDIO_Wait_Interrupt_State
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* @{
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*/
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#define SDIO_Wait_No ((uint32_t)0x00000000) /*!< SDIO No Wait, TimeOut is enabled */ |
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#define SDIO_Wait_IT ((uint32_t)0x00000100) /*!< SDIO Wait Interrupt Request */ |
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#define SDIO_Wait_Pend ((uint32_t)0x00000200) /*!< SDIO Wait End of transfer */ |
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#define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_Wait_No) || ((WAIT) == SDIO_Wait_IT) || \
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((WAIT) == SDIO_Wait_Pend)) |
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/**
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* @}
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*/
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/** @defgroup SDIO_CPSM_State
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* @{
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*/
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#define SDIO_CPSM_Disable ((uint32_t)0x00000000) |
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#define SDIO_CPSM_Enable ((uint32_t)0x00000400) |
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#define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_Enable) || ((CPSM) == SDIO_CPSM_Disable))
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/**
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* @}
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*/
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/** @defgroup SDIO_Response_Registers
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* @{
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*/
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#define SDIO_RESP1 ((uint32_t)0x00000000) |
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#define SDIO_RESP2 ((uint32_t)0x00000004) |
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#define SDIO_RESP3 ((uint32_t)0x00000008) |
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#define SDIO_RESP4 ((uint32_t)0x0000000C) |
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#define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || ((RESP) == SDIO_RESP2) || \
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((RESP) == SDIO_RESP3) || ((RESP) == SDIO_RESP4)) |
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/**
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* @}
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*/
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/** @defgroup SDIO_Data_Length
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* @{
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*/
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#define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF) |
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/**
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* @}
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*/
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/** @defgroup SDIO_Data_Block_Size
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* @{
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*/
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#define SDIO_DataBlockSize_1b ((uint32_t)0x00000000) |
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#define SDIO_DataBlockSize_2b ((uint32_t)0x00000010) |
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#define SDIO_DataBlockSize_4b ((uint32_t)0x00000020) |
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#define SDIO_DataBlockSize_8b ((uint32_t)0x00000030) |
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#define SDIO_DataBlockSize_16b ((uint32_t)0x00000040) |
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#define SDIO_DataBlockSize_32b ((uint32_t)0x00000050) |
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#define SDIO_DataBlockSize_64b ((uint32_t)0x00000060) |
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#define SDIO_DataBlockSize_128b ((uint32_t)0x00000070) |
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#define SDIO_DataBlockSize_256b ((uint32_t)0x00000080) |
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#define SDIO_DataBlockSize_512b ((uint32_t)0x00000090) |
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#define SDIO_DataBlockSize_1024b ((uint32_t)0x000000A0) |
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#define SDIO_DataBlockSize_2048b ((uint32_t)0x000000B0) |
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#define SDIO_DataBlockSize_4096b ((uint32_t)0x000000C0) |
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#define SDIO_DataBlockSize_8192b ((uint32_t)0x000000D0) |
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#define SDIO_DataBlockSize_16384b ((uint32_t)0x000000E0) |
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#define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DataBlockSize_1b) || \
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((SIZE) == SDIO_DataBlockSize_2b) || \ |
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((SIZE) == SDIO_DataBlockSize_4b) || \ |
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((SIZE) == SDIO_DataBlockSize_8b) || \ |
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((SIZE) == SDIO_DataBlockSize_16b) || \ |
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((SIZE) == SDIO_DataBlockSize_32b) || \ |
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((SIZE) == SDIO_DataBlockSize_64b) || \ |
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((SIZE) == SDIO_DataBlockSize_128b) || \ |
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((SIZE) == SDIO_DataBlockSize_256b) || \ |
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((SIZE) == SDIO_DataBlockSize_512b) || \ |
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((SIZE) == SDIO_DataBlockSize_1024b) || \ |
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((SIZE) == SDIO_DataBlockSize_2048b) || \ |
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((SIZE) == SDIO_DataBlockSize_4096b) || \ |
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((SIZE) == SDIO_DataBlockSize_8192b) || \ |
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((SIZE) == SDIO_DataBlockSize_16384b)) |
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/**
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* @}
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*/
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/** @defgroup SDIO_Transfer_Direction
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* @{
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*/
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#define SDIO_TransferDir_ToCard ((uint32_t)0x00000000) |
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#define SDIO_TransferDir_ToSDIO ((uint32_t)0x00000002) |
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#define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TransferDir_ToCard) || \
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((DIR) == SDIO_TransferDir_ToSDIO)) |
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/**
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* @}
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*/
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/** @defgroup SDIO_Transfer_Type
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* @{
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*/
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#define SDIO_TransferMode_Block ((uint32_t)0x00000000) |
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#define SDIO_TransferMode_Stream ((uint32_t)0x00000004) |
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#define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TransferMode_Stream) || \
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((MODE) == SDIO_TransferMode_Block)) |
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/**
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* @}
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*/
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/** @defgroup SDIO_DPSM_State
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* @{
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*/
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#define SDIO_DPSM_Disable ((uint32_t)0x00000000) |
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#define SDIO_DPSM_Enable ((uint32_t)0x00000001) |
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#define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_Enable) || ((DPSM) == SDIO_DPSM_Disable))
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/**
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* @}
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*/
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/** @defgroup SDIO_Flags
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* @{
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*/
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#define SDIO_FLAG_CCRCFAIL ((uint32_t)0x00000001) |
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#define SDIO_FLAG_DCRCFAIL ((uint32_t)0x00000002) |
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#define SDIO_FLAG_CTIMEOUT ((uint32_t)0x00000004) |
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#define SDIO_FLAG_DTIMEOUT ((uint32_t)0x00000008) |
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#define SDIO_FLAG_TXUNDERR ((uint32_t)0x00000010) |
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#define SDIO_FLAG_RXOVERR ((uint32_t)0x00000020) |
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#define SDIO_FLAG_CMDREND ((uint32_t)0x00000040) |
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#define SDIO_FLAG_CMDSENT ((uint32_t)0x00000080) |
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#define SDIO_FLAG_DATAEND ((uint32_t)0x00000100) |
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#define SDIO_FLAG_STBITERR ((uint32_t)0x00000200) |
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#define SDIO_FLAG_DBCKEND ((uint32_t)0x00000400) |
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#define SDIO_FLAG_CMDACT ((uint32_t)0x00000800) |
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#define SDIO_FLAG_TXACT ((uint32_t)0x00001000) |
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#define SDIO_FLAG_RXACT ((uint32_t)0x00002000) |
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#define SDIO_FLAG_TXFIFOHE ((uint32_t)0x00004000) |
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#define SDIO_FLAG_RXFIFOHF ((uint32_t)0x00008000) |
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#define SDIO_FLAG_TXFIFOF ((uint32_t)0x00010000) |
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#define SDIO_FLAG_RXFIFOF ((uint32_t)0x00020000) |
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#define SDIO_FLAG_TXFIFOE ((uint32_t)0x00040000) |
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#define SDIO_FLAG_RXFIFOE ((uint32_t)0x00080000) |
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#define SDIO_FLAG_TXDAVL ((uint32_t)0x00100000) |
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#define SDIO_FLAG_RXDAVL ((uint32_t)0x00200000) |
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#define SDIO_FLAG_SDIOIT ((uint32_t)0x00400000) |
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#define SDIO_FLAG_CEATAEND ((uint32_t)0x00800000) |
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#define IS_SDIO_FLAG(FLAG) (((FLAG) == SDIO_FLAG_CCRCFAIL) || \
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((FLAG) == SDIO_FLAG_DCRCFAIL) || \ |
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((FLAG) == SDIO_FLAG_CTIMEOUT) || \ |
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((FLAG) == SDIO_FLAG_DTIMEOUT) || \ |
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((FLAG) == SDIO_FLAG_TXUNDERR) || \ |
| 402 |
((FLAG) == SDIO_FLAG_RXOVERR) || \ |
| 403 |
((FLAG) == SDIO_FLAG_CMDREND) || \ |
| 404 |
((FLAG) == SDIO_FLAG_CMDSENT) || \ |
| 405 |
((FLAG) == SDIO_FLAG_DATAEND) || \ |
| 406 |
((FLAG) == SDIO_FLAG_STBITERR) || \ |
| 407 |
((FLAG) == SDIO_FLAG_DBCKEND) || \ |
| 408 |
((FLAG) == SDIO_FLAG_CMDACT) || \ |
| 409 |
((FLAG) == SDIO_FLAG_TXACT) || \ |
| 410 |
((FLAG) == SDIO_FLAG_RXACT) || \ |
| 411 |
((FLAG) == SDIO_FLAG_TXFIFOHE) || \ |
| 412 |
((FLAG) == SDIO_FLAG_RXFIFOHF) || \ |
| 413 |
((FLAG) == SDIO_FLAG_TXFIFOF) || \ |
| 414 |
((FLAG) == SDIO_FLAG_RXFIFOF) || \ |
| 415 |
((FLAG) == SDIO_FLAG_TXFIFOE) || \ |
| 416 |
((FLAG) == SDIO_FLAG_RXFIFOE) || \ |
| 417 |
((FLAG) == SDIO_FLAG_TXDAVL) || \ |
| 418 |
((FLAG) == SDIO_FLAG_RXDAVL) || \ |
| 419 |
((FLAG) == SDIO_FLAG_SDIOIT) || \ |
| 420 |
((FLAG) == SDIO_FLAG_CEATAEND)) |
| 421 |
|
| 422 |
#define IS_SDIO_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFF3FF800) == 0x00) && ((FLAG) != (uint32_t)0x00)) |
| 423 |
|
| 424 |
#define IS_SDIO_GET_IT(IT) (((IT) == SDIO_IT_CCRCFAIL) || \
|
| 425 |
((IT) == SDIO_IT_DCRCFAIL) || \ |
| 426 |
((IT) == SDIO_IT_CTIMEOUT) || \ |
| 427 |
((IT) == SDIO_IT_DTIMEOUT) || \ |
| 428 |
((IT) == SDIO_IT_TXUNDERR) || \ |
| 429 |
((IT) == SDIO_IT_RXOVERR) || \ |
| 430 |
((IT) == SDIO_IT_CMDREND) || \ |
| 431 |
((IT) == SDIO_IT_CMDSENT) || \ |
| 432 |
((IT) == SDIO_IT_DATAEND) || \ |
| 433 |
((IT) == SDIO_IT_STBITERR) || \ |
| 434 |
((IT) == SDIO_IT_DBCKEND) || \ |
| 435 |
((IT) == SDIO_IT_CMDACT) || \ |
| 436 |
((IT) == SDIO_IT_TXACT) || \ |
| 437 |
((IT) == SDIO_IT_RXACT) || \ |
| 438 |
((IT) == SDIO_IT_TXFIFOHE) || \ |
| 439 |
((IT) == SDIO_IT_RXFIFOHF) || \ |
| 440 |
((IT) == SDIO_IT_TXFIFOF) || \ |
| 441 |
((IT) == SDIO_IT_RXFIFOF) || \ |
| 442 |
((IT) == SDIO_IT_TXFIFOE) || \ |
| 443 |
((IT) == SDIO_IT_RXFIFOE) || \ |
| 444 |
((IT) == SDIO_IT_TXDAVL) || \ |
| 445 |
((IT) == SDIO_IT_RXDAVL) || \ |
| 446 |
((IT) == SDIO_IT_SDIOIT) || \ |
| 447 |
((IT) == SDIO_IT_CEATAEND)) |
| 448 |
|
| 449 |
#define IS_SDIO_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFF3FF800) == 0x00) && ((IT) != (uint32_t)0x00)) |
| 450 |
|
| 451 |
/**
|
| 452 |
* @}
|
| 453 |
*/
|
| 454 |
|
| 455 |
/** @defgroup SDIO_Read_Wait_Mode
|
| 456 |
* @{
|
| 457 |
*/
|
| 458 |
|
| 459 |
#define SDIO_ReadWaitMode_CLK ((uint32_t)0x00000001) |
| 460 |
#define SDIO_ReadWaitMode_DATA2 ((uint32_t)0x00000000) |
| 461 |
#define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_ReadWaitMode_CLK) || \
|
| 462 |
((MODE) == SDIO_ReadWaitMode_DATA2)) |
| 463 |
/**
|
| 464 |
* @}
|
| 465 |
*/
|
| 466 |
|
| 467 |
/**
|
| 468 |
* @}
|
| 469 |
*/
|
| 470 |
|
| 471 |
/** @defgroup SDIO_Exported_Macros
|
| 472 |
* @{
|
| 473 |
*/
|
| 474 |
|
| 475 |
/**
|
| 476 |
* @}
|
| 477 |
*/
|
| 478 |
|
| 479 |
/** @defgroup SDIO_Exported_Functions
|
| 480 |
* @{
|
| 481 |
*/
|
| 482 |
|
| 483 |
void SDIO_DeInit(void); |
| 484 |
void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct);
|
| 485 |
void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct);
|
| 486 |
void SDIO_ClockCmd(FunctionalState NewState);
|
| 487 |
void SDIO_SetPowerState(uint32_t SDIO_PowerState);
|
| 488 |
uint32_t SDIO_GetPowerState(void);
|
| 489 |
void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState);
|
| 490 |
void SDIO_DMACmd(FunctionalState NewState);
|
| 491 |
void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct);
|
| 492 |
void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct);
|
| 493 |
uint8_t SDIO_GetCommandResponse(void);
|
| 494 |
uint32_t SDIO_GetResponse(uint32_t SDIO_RESP); |
| 495 |
void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct);
|
| 496 |
void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct);
|
| 497 |
uint32_t SDIO_GetDataCounter(void);
|
| 498 |
uint32_t SDIO_ReadData(void);
|
| 499 |
void SDIO_WriteData(uint32_t Data);
|
| 500 |
uint32_t SDIO_GetFIFOCount(void);
|
| 501 |
void SDIO_StartSDIOReadWait(FunctionalState NewState);
|
| 502 |
void SDIO_StopSDIOReadWait(FunctionalState NewState);
|
| 503 |
void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode);
|
| 504 |
void SDIO_SetSDIOOperation(FunctionalState NewState);
|
| 505 |
void SDIO_SendSDIOSuspendCmd(FunctionalState NewState);
|
| 506 |
void SDIO_CommandCompletionCmd(FunctionalState NewState);
|
| 507 |
void SDIO_CEATAITCmd(FunctionalState NewState);
|
| 508 |
void SDIO_SendCEATACmd(FunctionalState NewState);
|
| 509 |
FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG); |
| 510 |
void SDIO_ClearFlag(uint32_t SDIO_FLAG);
|
| 511 |
ITStatus SDIO_GetITStatus(uint32_t SDIO_IT); |
| 512 |
void SDIO_ClearITPendingBit(uint32_t SDIO_IT);
|
| 513 |
|
| 514 |
#ifdef __cplusplus
|
| 515 |
} |
| 516 |
#endif
|
| 517 |
|
| 518 |
#endif /* __STM32F10x_SDIO_H */ |
| 519 |
/**
|
| 520 |
* @}
|
| 521 |
*/
|
| 522 |
|
| 523 |
/**
|
| 524 |
* @}
|
| 525 |
*/
|
| 526 |
|
| 527 |
/**
|
| 528 |
* @}
|
| 529 |
*/
|
| 530 |
|
| 531 |
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|