amiro-lld / drivers / VL53L1X / v1 / api / core / vl53l1_ll_device.h @ 4dba9195
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/*
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* Copyright (c) 2017, STMicroelectronics - All Rights Reserved
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*
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* This file is part of VL53L1 Core and is dual licensed,
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* either 'STMicroelectronics
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* Proprietary license'
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* or 'BSD 3-clause "New" or "Revised" License' , at your option.
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*
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********************************************************************************
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*
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* 'STMicroelectronics Proprietary license'
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*
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********************************************************************************
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*
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* License terms: STMicroelectronics Proprietary in accordance with licensing
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* terms at www.st.com/sla0081
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*
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* STMicroelectronics confidential
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* Reproduction and Communication of this document is strictly prohibited unless
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* specifically authorized in writing by STMicroelectronics.
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*
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*
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********************************************************************************
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*
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* Alternatively, VL53L1 Core may be distributed under the terms of
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* 'BSD 3-clause "New" or "Revised" License', in which case the following
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* provisions apply instead of the ones mentioned above :
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*
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********************************************************************************
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*
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* License terms: BSD 3-clause "New" or "Revised" License.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*
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********************************************************************************
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*
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*/
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/**
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* @file vl53l1_ll_device.h
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*
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* @brief LL Driver Device specific defines. To be adapted by implementer for the
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* targeted device.
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*/
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#ifndef _VL53L1_LL_DEVICE_H_
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#define _VL53L1_LL_DEVICE_H_
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#include "vl53l1_types.h" |
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#include "vl53l1_platform_user_config.h" |
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#define VL53L1_I2C 0x01 |
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#define VL53L1_SPI 0x00 |
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/** @defgroup VL53L1_DevSpecDefines_group VL53L1 Device Specific Defines
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* @brief VL53L1 cut1.0 Device Specific Defines
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* @{
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*/
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/** @defgroup VL53L1_define_WaitMethod_group Defines Wait method used
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* For example blocking versus non blocking
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* @{
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*/
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typedef uint8_t VL53L1_WaitMethod;
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#define VL53L1_WAIT_METHOD_BLOCKING ((VL53L1_WaitMethod) 0) |
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#define VL53L1_WAIT_METHOD_NON_BLOCKING ((VL53L1_WaitMethod) 1) |
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/** @} end of VL53L1_define_WaitMethod_group */
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/** @defgroup VL53L1_define_DeviceState_group Device State
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*
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* @brief Defines all possible device states for the device
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* @{
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*/
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typedef uint8_t VL53L1_DeviceState;
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#define VL53L1_DEVICESTATE_POWERDOWN ((VL53L1_DeviceState) 0) |
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#define VL53L1_DEVICESTATE_HW_STANDBY ((VL53L1_DeviceState) 1) |
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#define VL53L1_DEVICESTATE_FW_COLDBOOT ((VL53L1_DeviceState) 2) |
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#define VL53L1_DEVICESTATE_SW_STANDBY ((VL53L1_DeviceState) 3) |
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#define VL53L1_DEVICESTATE_RANGING_DSS_AUTO ((VL53L1_DeviceState) 4) |
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#define VL53L1_DEVICESTATE_RANGING_DSS_MANUAL ((VL53L1_DeviceState) 5) |
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#define VL53L1_DEVICESTATE_RANGING_WAIT_GPH_SYNC ((VL53L1_DeviceState) 6) |
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#define VL53L1_DEVICESTATE_RANGING_GATHER_DATA ((VL53L1_DeviceState) 7) |
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#define VL53L1_DEVICESTATE_RANGING_OUTPUT_DATA ((VL53L1_DeviceState) 8) |
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#define VL53L1_DEVICESTATE_UNKNOWN ((VL53L1_DeviceState) 98) |
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#define VL53L1_DEVICESTATE_ERROR ((VL53L1_DeviceState) 99) |
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/** @} end of VL53L1_define_DeviceState_group */
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/** @defgroup VL53L1_define_DevicePresetModes_group Device Preset Modes
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*
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* @brief Defines all possible device preset modes. The integer values are
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* kept the same as main EwokPlus driver branch
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* @{
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*/
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typedef uint8_t VL53L1_DevicePresetModes;
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#define VL53L1_DEVICEPRESETMODE_NONE ((VL53L1_DevicePresetModes) 0) |
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#define VL53L1_DEVICEPRESETMODE_STANDARD_RANGING ((VL53L1_DevicePresetModes) 1) |
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#define VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_SHORT_RANGE ((VL53L1_DevicePresetModes) 2) |
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#define VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_LONG_RANGE ((VL53L1_DevicePresetModes) 3) |
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#define VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM1_CAL ((VL53L1_DevicePresetModes) 4) |
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#define VL53L1_DEVICEPRESETMODE_STANDARD_RANGING_MM2_CAL ((VL53L1_DevicePresetModes) 5) |
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#define VL53L1_DEVICEPRESETMODE_TIMED_RANGING ((VL53L1_DevicePresetModes) 6) |
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#define VL53L1_DEVICEPRESETMODE_TIMED_RANGING_SHORT_RANGE ((VL53L1_DevicePresetModes) 7) |
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#define VL53L1_DEVICEPRESETMODE_TIMED_RANGING_LONG_RANGE ((VL53L1_DevicePresetModes) 8) |
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#define VL53L1_DEVICEPRESETMODE_OLT ((VL53L1_DevicePresetModes) 17) |
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#define VL53L1_DEVICEPRESETMODE_SINGLESHOT_RANGING ((VL53L1_DevicePresetModes) 18) |
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#define VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_SHORT_RANGE ((VL53L1_DevicePresetModes) 36) |
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#define VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_MEDIUM_RANGE ((VL53L1_DevicePresetModes) 37) |
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#define VL53L1_DEVICEPRESETMODE_LOWPOWERAUTO_LONG_RANGE ((VL53L1_DevicePresetModes) 38) |
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/** @} end of VL53L1_define_DevicePresetModes_group */
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/** @defgroup VL53L1_define_DeviceMeasurementModes_group Device Measurement Modes
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*
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* @brief Defines all possible measurement modes for the device
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* @{
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*/
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typedef uint8_t VL53L1_DeviceMeasurementModes;
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#define VL53L1_DEVICEMEASUREMENTMODE_STOP ((VL53L1_DeviceMeasurementModes) 0x00) |
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#define VL53L1_DEVICEMEASUREMENTMODE_SINGLESHOT ((VL53L1_DeviceMeasurementModes) 0x10) |
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#define VL53L1_DEVICEMEASUREMENTMODE_BACKTOBACK ((VL53L1_DeviceMeasurementModes) 0x20) |
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#define VL53L1_DEVICEMEASUREMENTMODE_TIMED ((VL53L1_DeviceMeasurementModes) 0x40) |
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#define VL53L1_DEVICEMEASUREMENTMODE_ABORT ((VL53L1_DeviceMeasurementModes) 0x80) |
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/** @} VL53L1_define_DeviceMeasurementModes_group */
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/** @defgroup VL53L1_define_OffsetCalibrationModes_group Device Offset Calibration Mode
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*
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* @brief Defines possible offset calibration modes for the device
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* @{
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*/
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typedef uint8_t VL53L1_OffsetCalibrationMode;
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#define VL53L1_OFFSETCALIBRATIONMODE__NONE ((VL53L1_OffsetCalibrationMode) 0) |
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#define VL53L1_OFFSETCALIBRATIONMODE__MM1_MM2__STANDARD ((VL53L1_OffsetCalibrationMode) 1) |
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#define VL53L1_OFFSETCALIBRATIONMODE__MM1_MM2__HISTOGRAM ((VL53L1_OffsetCalibrationMode) 2) |
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#define VL53L1_OFFSETCALIBRATIONMODE__MM1_MM2__STANDARD_PRE_RANGE_ONLY ((VL53L1_OffsetCalibrationMode) 3) |
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#define VL53L1_OFFSETCALIBRATIONMODE__MM1_MM2__HISTOGRAM_PRE_RANGE_ONLY ((VL53L1_OffsetCalibrationMode) 4) |
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#define VL53L1_OFFSETCALIBRATIONMODE__PER_ZONE ((VL53L1_OffsetCalibrationMode) 5) |
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/** @} VL53L1_define_OffsetCalibrationModes_group */
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/** @defgroup VL53L1_define_OffsetCalibrationModes_group Device Offset Correction Mode
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*
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* @brief Defines all possible offset correction modes for the device
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* @{
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*/
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typedef uint8_t VL53L1_OffsetCorrectionMode;
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#define VL53L1_OFFSETCORRECTIONMODE__NONE ((VL53L1_OffsetCorrectionMode) 0) |
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#define VL53L1_OFFSETCORRECTIONMODE__MM1_MM2_OFFSETS ((VL53L1_OffsetCorrectionMode) 1) |
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#define VL53L1_OFFSETCORRECTIONMODE__PER_ZONE_OFFSETS ((VL53L1_OffsetCorrectionMode) 2) |
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/** @} VL53L1_define_OffsetCalibrationModes_group */
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/** @defgroup VL53L1_DeviceSequenceConfig_group Device Sequence Config
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*
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* @brief Individual bit enables for each stage in the ranging scheduler
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* The values below encode the bit shift for each bit
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* @{
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*/
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typedef uint8_t VL53L1_DeviceSequenceConfig;
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#define VL53L1_DEVICESEQUENCECONFIG_VHV ((VL53L1_DeviceSequenceConfig) 0) |
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#define VL53L1_DEVICESEQUENCECONFIG_PHASECAL ((VL53L1_DeviceSequenceConfig) 1) |
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#define VL53L1_DEVICESEQUENCECONFIG_REFERENCE_PHASE ((VL53L1_DeviceSequenceConfig) 2) |
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#define VL53L1_DEVICESEQUENCECONFIG_DSS1 ((VL53L1_DeviceSequenceConfig) 3) |
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#define VL53L1_DEVICESEQUENCECONFIG_DSS2 ((VL53L1_DeviceSequenceConfig) 4) |
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#define VL53L1_DEVICESEQUENCECONFIG_MM1 ((VL53L1_DeviceSequenceConfig) 5) |
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#define VL53L1_DEVICESEQUENCECONFIG_MM2 ((VL53L1_DeviceSequenceConfig) 6) |
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#define VL53L1_DEVICESEQUENCECONFIG_RANGE ((VL53L1_DeviceSequenceConfig) 7) |
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/** @} VL53L1_DeviceSequenceConfig_group */
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/** @defgroup VL53L1_DeviceInterruptPolarity_group Device Interrupt Polarity
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*
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* @brief Device Interrupt Polarity
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* @{
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*/
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typedef uint8_t VL53L1_DeviceInterruptPolarity;
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#define VL53L1_DEVICEINTERRUPTPOLARITY_ACTIVE_HIGH ((VL53L1_DeviceInterruptPolarity) 0x00) |
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#define VL53L1_DEVICEINTERRUPTPOLARITY_ACTIVE_LOW ((VL53L1_DeviceInterruptPolarity) 0x10) |
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#define VL53L1_DEVICEINTERRUPTPOLARITY_BIT_MASK ((VL53L1_DeviceInterruptPolarity) 0x10) |
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#define VL53L1_DEVICEINTERRUPTPOLARITY_CLEAR_MASK ((VL53L1_DeviceInterruptPolarity) 0xEF) |
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/** @} VL53L1_DeviceInterruptPolarity_group */
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/** @defgroup VL53L1_DeviceGpioMode_group Device GPIO Mode
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*
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* @brief Device Gpio Mode
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* @{
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*/
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typedef uint8_t VL53L1_DeviceGpioMode;
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#define VL53L1_DEVICEGPIOMODE_OUTPUT_CONSTANT_ZERO ((VL53L1_DeviceGpioMode) 0x00) |
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#define VL53L1_DEVICEGPIOMODE_OUTPUT_RANGE_AND_ERROR_INTERRUPTS ((VL53L1_DeviceGpioMode) 0x01) |
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#define VL53L1_DEVICEGPIOMODE_OUTPUT_TIMIER_INTERRUPTS ((VL53L1_DeviceGpioMode) 0x02) |
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#define VL53L1_DEVICEGPIOMODE_OUTPUT_RANGE_MODE_INTERRUPT_STATUS ((VL53L1_DeviceGpioMode) 0x03) |
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#define VL53L1_DEVICEGPIOMODE_OUTPUT_SLOW_OSCILLATOR_CLOCK ((VL53L1_DeviceGpioMode) 0x04) |
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#define VL53L1_DEVICEGPIOMODE_BIT_MASK ((VL53L1_DeviceGpioMode) 0x0F) |
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#define VL53L1_DEVICEGPIOMODE_CLEAR_MASK ((VL53L1_DeviceGpioMode) 0xF0) |
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/** @} VL53L1_DeviceGpioMode_group */
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/** @defgroup VL53L1_DeviceError_group Device Error
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*
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* @brief Device Error code in the range status
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*
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* This enum is Device specific it should be updated in the implementation
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* Use @a VL53L1_GetStatusErrorString() to get the string.
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* It is related to Status Register of the Device.
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* @{
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*/
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typedef uint8_t VL53L1_DeviceError;
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#define VL53L1_DEVICEERROR_NOUPDATE ((VL53L1_DeviceError) 0) |
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/*!< 0 No Update */
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#define VL53L1_DEVICEERROR_VCSELCONTINUITYTESTFAILURE ((VL53L1_DeviceError) 1) |
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#define VL53L1_DEVICEERROR_VCSELWATCHDOGTESTFAILURE ((VL53L1_DeviceError) 2) |
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#define VL53L1_DEVICEERROR_NOVHVVALUEFOUND ((VL53L1_DeviceError) 3) |
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#define VL53L1_DEVICEERROR_MSRCNOTARGET ((VL53L1_DeviceError) 4) |
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#define VL53L1_DEVICEERROR_RANGEPHASECHECK ((VL53L1_DeviceError) 5) |
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#define VL53L1_DEVICEERROR_SIGMATHRESHOLDCHECK ((VL53L1_DeviceError) 6) |
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#define VL53L1_DEVICEERROR_PHASECONSISTENCY ((VL53L1_DeviceError) 7) |
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#define VL53L1_DEVICEERROR_MINCLIP ((VL53L1_DeviceError) 8) |
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#define VL53L1_DEVICEERROR_RANGECOMPLETE ((VL53L1_DeviceError) 9) |
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#define VL53L1_DEVICEERROR_ALGOUNDERFLOW ((VL53L1_DeviceError) 10) |
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#define VL53L1_DEVICEERROR_ALGOOVERFLOW ((VL53L1_DeviceError) 11) |
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#define VL53L1_DEVICEERROR_RANGEIGNORETHRESHOLD ((VL53L1_DeviceError) 12) |
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#define VL53L1_DEVICEERROR_USERROICLIP ((VL53L1_DeviceError) 13) |
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#define VL53L1_DEVICEERROR_REFSPADCHARNOTENOUGHDPADS ((VL53L1_DeviceError) 14) |
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#define VL53L1_DEVICEERROR_REFSPADCHARMORETHANTARGET ((VL53L1_DeviceError) 15) |
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#define VL53L1_DEVICEERROR_REFSPADCHARLESSTHANTARGET ((VL53L1_DeviceError) 16) |
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#define VL53L1_DEVICEERROR_MULTCLIPFAIL ((VL53L1_DeviceError) 17) |
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#define VL53L1_DEVICEERROR_GPHSTREAMCOUNT0READY ((VL53L1_DeviceError) 18) |
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#define VL53L1_DEVICEERROR_RANGECOMPLETE_NO_WRAP_CHECK ((VL53L1_DeviceError) 19) |
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#define VL53L1_DEVICEERROR_EVENTCONSISTENCY ((VL53L1_DeviceError) 20) |
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#define VL53L1_DEVICEERROR_MINSIGNALEVENTCHECK ((VL53L1_DeviceError) 21) |
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#define VL53L1_DEVICEERROR_RANGECOMPLETE_MERGED_PULSE ((VL53L1_DeviceError) 22) |
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/* Patch_NewDeviceErrorCodePrevRangeNoTargets_11786 */
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#define VL53L1_DEVICEERROR_PREV_RANGE_NO_TARGETS ((VL53L1_DeviceError) 23) |
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/** @} end of VL53L1_DeviceError_group */
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/** @defgroup VL53L1_DeviceReportStatus_group Device Report Status
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* @brief Device Report Status code
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*
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* @{
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*/
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typedef uint8_t VL53L1_DeviceReportStatus;
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#define VL53L1_DEVICEREPORTSTATUS_NOUPDATE ((VL53L1_DeviceReportStatus) 0) |
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/*!< 0 No Update */
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#define VL53L1_DEVICEREPORTSTATUS_ROI_SETUP ((VL53L1_DeviceReportStatus) 1) |
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#define VL53L1_DEVICEREPORTSTATUS_VHV ((VL53L1_DeviceReportStatus) 2) |
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#define VL53L1_DEVICEREPORTSTATUS_PHASECAL ((VL53L1_DeviceReportStatus) 3) |
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#define VL53L1_DEVICEREPORTSTATUS_REFERENCE_PHASE ((VL53L1_DeviceReportStatus) 4) |
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#define VL53L1_DEVICEREPORTSTATUS_DSS1 ((VL53L1_DeviceReportStatus) 5) |
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#define VL53L1_DEVICEREPORTSTATUS_DSS2 ((VL53L1_DeviceReportStatus) 6) |
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#define VL53L1_DEVICEREPORTSTATUS_MM1 ((VL53L1_DeviceReportStatus) 7) |
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#define VL53L1_DEVICEREPORTSTATUS_MM2 ((VL53L1_DeviceReportStatus) 8) |
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#define VL53L1_DEVICEREPORTSTATUS_RANGE ((VL53L1_DeviceReportStatus) 9) |
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#define VL53L1_DEVICEREPORTSTATUS_HISTOGRAM ((VL53L1_DeviceReportStatus) 10) |
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/** @} end of VL53L1_DeviceReportStatus_group */
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/** @defgroup VL53L1_DeviceDssMode_group Dynamic SPAD Selection Mode
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* @brief Selects the device Dynamic SPAD Selection Mode
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* @{
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*/
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typedef uint8_t VL53L1_DeviceDssMode;
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#define VL53L1_DEVICEDSSMODE__DISABLED \
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((VL53L1_DeviceDssMode) 0)
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#define VL53L1_DEVICEDSSMODE__TARGET_RATE \
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((VL53L1_DeviceDssMode) 1)
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#define VL53L1_DEVICEDSSMODE__REQUESTED_EFFFECTIVE_SPADS \
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((VL53L1_DeviceDssMode) 2)
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#define VL53L1_DEVICEDSSMODE__BLOCK_SELECT \
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((VL53L1_DeviceDssMode) 3)
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/** @} end of VL53L1_DeviceDssMode_group */
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/** @defgroup VL53L1_DeviceConfigLevel_group Device Config Level
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*
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* @brief Defines the contents of the config & start range I2C multi byte transaction
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* @{
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*/
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typedef uint8_t VL53L1_DeviceConfigLevel;
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#define VL53L1_DEVICECONFIGLEVEL_SYSTEM_CONTROL \
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((VL53L1_DeviceConfigLevel) 0)
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/*!< Configs system control & start range */
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#define VL53L1_DEVICECONFIGLEVEL_DYNAMIC_ONWARDS \
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((VL53L1_DeviceConfigLevel) 1)
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/*!< Dynamic config onwards (dynamic_config, system_control) & start range */
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#define VL53L1_DEVICECONFIGLEVEL_TIMING_ONWARDS \
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((VL53L1_DeviceConfigLevel) 2)
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/*!< Dynamic config onwards (timing config, dynamic_config, system_control) &
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start range */
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#define VL53L1_DEVICECONFIGLEVEL_GENERAL_ONWARDS \
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((VL53L1_DeviceConfigLevel) 3)
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/*!< General config onwards (general_config, timing config, dynamic_config,
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system_control) & start range */
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#define VL53L1_DEVICECONFIGLEVEL_STATIC_ONWARDS \
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((VL53L1_DeviceConfigLevel) 4)
|
| 350 |
/*!< Static config onwards (static_config, general_config, timing_config,
|
| 351 |
dynamic_config, system_control) & start range */
|
| 352 |
#define VL53L1_DEVICECONFIGLEVEL_CUSTOMER_ONWARDS \
|
| 353 |
((VL53L1_DeviceConfigLevel) 5)
|
| 354 |
/*!< Full device config (customer_nvm_managed, static_config, general_config,
|
| 355 |
timing config, dynamic_config, system_control) & start range */
|
| 356 |
#define VL53L1_DEVICECONFIGLEVEL_FULL \
|
| 357 |
((VL53L1_DeviceConfigLevel) 6)
|
| 358 |
/*!< Full device config (static_nvm_managed, customer_nvm_managed, static_config,
|
| 359 |
general_config, timing config, dynamic_config, system_control) & start range */
|
| 360 |
|
| 361 |
/** @} end of VL53L1_DeviceConfigLevel_group */
|
| 362 |
|
| 363 |
|
| 364 |
/** @defgroup VL53L1_DeviceResultsLevel_group Device Results Level
|
| 365 |
*
|
| 366 |
* @brief Defines the contents of the read results I2C multi byte transaction
|
| 367 |
* @{
|
| 368 |
*/
|
| 369 |
typedef uint8_t VL53L1_DeviceResultsLevel;
|
| 370 |
|
| 371 |
#define VL53L1_DEVICERESULTSLEVEL_SYSTEM_RESULTS \
|
| 372 |
((VL53L1_DeviceResultsLevel) 0)
|
| 373 |
/*!< Read just system_results */
|
| 374 |
#define VL53L1_DEVICERESULTSLEVEL_UPTO_CORE \
|
| 375 |
((VL53L1_DeviceResultsLevel) 1)
|
| 376 |
/*!< Read both system and core results */
|
| 377 |
#define VL53L1_DEVICERESULTSLEVEL_FULL \
|
| 378 |
((VL53L1_DeviceResultsLevel) 2)
|
| 379 |
/*!< Read system, core and debug results */
|
| 380 |
|
| 381 |
/** @} end of VL53L1_DeviceResultsLevel_group */
|
| 382 |
|
| 383 |
|
| 384 |
/** @defgroup VL53L1_DeviceTestMode_group Device Test Mode
|
| 385 |
*
|
| 386 |
* @brief Values below match the the TEST_MODE__CTRL register
|
| 387 |
* do not change
|
| 388 |
* @{
|
| 389 |
*/
|
| 390 |
|
| 391 |
typedef uint8_t VL53L1_DeviceTestMode;
|
| 392 |
|
| 393 |
#define VL53L1_DEVICETESTMODE_NONE \
|
| 394 |
((VL53L1_DeviceTestMode) 0x00)
|
| 395 |
/*!< Idle */
|
| 396 |
#define VL53L1_DEVICETESTMODE_NVM_ZERO \
|
| 397 |
((VL53L1_DeviceTestMode) 0x01)
|
| 398 |
/*!< NVM zero */
|
| 399 |
#define VL53L1_DEVICETESTMODE_NVM_COPY \
|
| 400 |
((VL53L1_DeviceTestMode) 0x02)
|
| 401 |
/*!< NVM copy */
|
| 402 |
#define VL53L1_DEVICETESTMODE_PATCH \
|
| 403 |
((VL53L1_DeviceTestMode) 0x03)
|
| 404 |
/*!< Patch */
|
| 405 |
#define VL53L1_DEVICETESTMODE_DCR \
|
| 406 |
((VL53L1_DeviceTestMode) 0x04)
|
| 407 |
/*!< DCR - SPAD Self-Check (Pass if Count Rate is less than Threshold) */
|
| 408 |
#define VL53L1_DEVICETESTMODE_LCR_VCSEL_OFF \
|
| 409 |
((VL53L1_DeviceTestMode) 0x05)
|
| 410 |
/*!< LCR - SPAD Self-Check (Pass if Count Rate is greater than Threshold
|
| 411 |
and VCSEL off) */
|
| 412 |
#define VL53L1_DEVICETESTMODE_LCR_VCSEL_ON \
|
| 413 |
((VL53L1_DeviceTestMode) 0x06)
|
| 414 |
/*!< LCR - SPAD Self-Check (Pass if Count Rate is greater than Threshold
|
| 415 |
and VCSEL on) */
|
| 416 |
#define VL53L1_DEVICETESTMODE_SPOT_CENTRE_LOCATE \
|
| 417 |
((VL53L1_DeviceTestMode) 0x07)
|
| 418 |
/*!< Spot centre locate */
|
| 419 |
#define VL53L1_DEVICETESTMODE_REF_SPAD_CHAR_WITH_PRE_VHV \
|
| 420 |
((VL53L1_DeviceTestMode) 0x08)
|
| 421 |
/*!<Reference SPAD Characterisation with pre-VHV */
|
| 422 |
#define VL53L1_DEVICETESTMODE_REF_SPAD_CHAR_ONLY \
|
| 423 |
((VL53L1_DeviceTestMode) 0x09)
|
| 424 |
/*!< Reference SPAD Characterisation Only */
|
| 425 |
|
| 426 |
/** @} end of VL53L1_DeviceTestMode_group */
|
| 427 |
|
| 428 |
|
| 429 |
/** @defgroup VL53L1_DeviceSscArray_group Device Test Mode
|
| 430 |
*
|
| 431 |
* @{
|
| 432 |
*/
|
| 433 |
|
| 434 |
typedef uint8_t VL53L1_DeviceSscArray;
|
| 435 |
|
| 436 |
#define VL53L1_DEVICESSCARRAY_RTN ((VL53L1_DeviceSscArray) 0x00) |
| 437 |
/*!<Return Array Rates */
|
| 438 |
#define VL53L1_DEVICETESTMODE_REF ((VL53L1_DeviceSscArray) 0x01) |
| 439 |
/*!< Reference Array Rates Only */
|
| 440 |
|
| 441 |
/** @} end of VL53L1_DeviceSscArray_group */
|
| 442 |
|
| 443 |
|
| 444 |
/** @defgroup VL53L1_SpadArraySelection_group SPAD Array Selection Functionality
|
| 445 |
* @brief SPAD array selection definitions
|
| 446 |
* @{
|
| 447 |
*/
|
| 448 |
|
| 449 |
#define VL53L1_RETURN_ARRAY_ONLY 0x01 |
| 450 |
/*!< Return SPAD Array only */
|
| 451 |
#define VL53L1_REFERENCE_ARRAY_ONLY 0x10 |
| 452 |
/*!< Reference SPAD Array only */
|
| 453 |
#define VL53L1_BOTH_RETURN_AND_REFERENCE_ARRAYS 0x11 |
| 454 |
/*!< Both Return and Reference SPAD Arrays */
|
| 455 |
#define VL53L1_NEITHER_RETURN_AND_REFERENCE_ARRAYS 0x00 |
| 456 |
/*!< Neither Return or Reference SPAD Array */
|
| 457 |
|
| 458 |
/** @} end of VL53L1_SpadArraySelection_group */
|
| 459 |
|
| 460 |
/** @defgroup VL53L1_DeviceInterruptLevel_group Interrupt Level Functionality
|
| 461 |
* @brief Interrupt Output Level types
|
| 462 |
* @{
|
| 463 |
*/
|
| 464 |
|
| 465 |
#define VL53L1_DEVICEINTERRUPTLEVEL_ACTIVE_HIGH 0x00 |
| 466 |
/*!< Active High Interrupt */
|
| 467 |
#define VL53L1_DEVICEINTERRUPTLEVEL_ACTIVE_LOW 0x10 |
| 468 |
/*!< Active Low Interrupt */
|
| 469 |
#define VL53L1_DEVICEINTERRUPTLEVEL_ACTIVE_MASK 0x10 |
| 470 |
/*!< Active Bit Mask */
|
| 471 |
|
| 472 |
/** @} end of VL53L1_DeviceInterruptLevel_group */
|
| 473 |
|
| 474 |
/** @defgroup VL53L1_ApiCore_group Misc Functionality
|
| 475 |
* @brief API core specific definitions
|
| 476 |
* @{
|
| 477 |
*/
|
| 478 |
|
| 479 |
#define VL53L1_POLLING_DELAY_US 1000 |
| 480 |
/*!< 1000us delay for register polling */
|
| 481 |
#define VL53L1_SOFTWARE_RESET_DURATION_US 100 |
| 482 |
/*!< 100us software reset duration */
|
| 483 |
#define VL53L1_FIRMWARE_BOOT_TIME_US 1200 |
| 484 |
/*!< Duration of firmware boot time for which I2C
|
| 485 |
access is blocked. Real Device 1ms, FPGA 15ms */
|
| 486 |
#define VL53L1_ENABLE_POWERFORCE_SETTLING_TIME_US 250 |
| 487 |
/*!< After enabling power force a delay is required
|
| 488 |
to bring regulator, bandgap, oscillator time
|
| 489 |
to power up and settle */
|
| 490 |
#define VL53L1_SPAD_ARRAY_WIDTH 16 |
| 491 |
/*!< SPAD array width */
|
| 492 |
#define VL53L1_SPAD_ARRAY_HEIGHT 16 |
| 493 |
/*!< SPAD array height */
|
| 494 |
#define VL53L1_NVM_SIZE_IN_BYTES 512 |
| 495 |
/*!< NVM (OTP) size in bytes */
|
| 496 |
#define VL53L1_NO_OF_SPAD_ENABLES 256 |
| 497 |
/*!< Number of SPADs each SPAD array */
|
| 498 |
#define VL53L1_RTN_SPAD_BUFFER_SIZE 32 |
| 499 |
/*!< Number of Return SPAD enable registers (bytes) */
|
| 500 |
#define VL53L1_REF_SPAD_BUFFER_SIZE 6 |
| 501 |
/*!< Number of Reference SPAD enable registers (bytes) */
|
| 502 |
#define VL53L1_AMBIENT_WINDOW_VCSEL_PERIODS 256 |
| 503 |
/*!< Sigma Delta Ambient window in VCSEL Periods */
|
| 504 |
#define VL53L1_RANGING_WINDOW_VCSEL_PERIODS 2048 |
| 505 |
/*!< Sigma Delta Ranging window in VCSEL periods */
|
| 506 |
#define VL53L1_MACRO_PERIOD_VCSEL_PERIODS \
|
| 507 |
(VL53L1_AMBIENT_WINDOW_VCSEL_PERIODS + VL53L1_RANGING_WINDOW_VCSEL_PERIODS) |
| 508 |
/*!< Macro Period in VCSEL periods */
|
| 509 |
#define VL53L1_MAX_ALLOWED_PHASE 0xFFFF |
| 510 |
/*!< Maximum Allowed phase 0xFFFF means 31.999 PLL Clocks */
|
| 511 |
|
| 512 |
#define VL53L1_RTN_SPAD_UNITY_TRANSMISSION 0x0100 |
| 513 |
/*!< SPAD unity transmission value - 1.0 in 8.8 format */
|
| 514 |
#define VL53L1_RTN_SPAD_APERTURE_TRANSMISSION 0x0038 |
| 515 |
/*!< Apertured SPAD transmission value - 8.8 format
|
| 516 |
Nominal: 5x -> 0.200000 * 256 = 51 = 0x33
|
| 517 |
Measured: 4.6x -> 0.217391 * 256 = 56 = 0x38 */
|
| 518 |
|
| 519 |
#define VL53L1_SPAD_TOTAL_COUNT_MAX ((0x01 << 29) - 1) |
| 520 |
/*!< Maximum SPAD count - 512Mcps * 1sec = 29bits) */
|
| 521 |
#define VL53L1_SPAD_TOTAL_COUNT_RES_THRES (0x01 << 24) |
| 522 |
/*!< SPAD count threshold for reduced 3-bit fractional resolution */
|
| 523 |
#define VL53L1_COUNT_RATE_INTERNAL_MAX ((0x01 << 24) - 1) |
| 524 |
/*!< Maximum internal count rate is a 17.7 (24-b) value */
|
| 525 |
#define VL53L1_SPEED_OF_LIGHT_IN_AIR 299704 |
| 526 |
/*!< Speed of light in air in mm/sec */
|
| 527 |
#define VL53L1_SPEED_OF_LIGHT_IN_AIR_DIV_8 (299704 >> 3) |
| 528 |
/*!< Speed of light in air in divided by 8, 2 for round trip
|
| 529 |
and 4 as an additional scaling factor */
|
| 530 |
|
| 531 |
/** @} end of VL53L1_ApiCore_group */
|
| 532 |
|
| 533 |
/** @} end of VL53L1_DevSpecDefines_group */
|
| 534 |
|
| 535 |
/** @defgroup VL53L1_GPIO_Interrupt_Mode_group Interrupt modes
|
| 536 |
* @brief Selects between four interrupt modes
|
| 537 |
* @{
|
| 538 |
*/
|
| 539 |
|
| 540 |
typedef uint8_t VL53L1_GPIO_Interrupt_Mode;
|
| 541 |
|
| 542 |
#define VL53L1_GPIOINTMODE_LEVEL_LOW \
|
| 543 |
((VL53L1_GPIO_Interrupt_Mode) 0)
|
| 544 |
/*!< Trigger interupt if value < thresh_low */
|
| 545 |
#define VL53L1_GPIOINTMODE_LEVEL_HIGH \
|
| 546 |
((VL53L1_GPIO_Interrupt_Mode) 1)
|
| 547 |
/*!< Trigger interupt if value > thresh_high */
|
| 548 |
#define VL53L1_GPIOINTMODE_OUT_OF_WINDOW \
|
| 549 |
((VL53L1_GPIO_Interrupt_Mode) 2)
|
| 550 |
/*!< Trigger interupt if value < thresh_low OR value > thresh_high */
|
| 551 |
#define VL53L1_GPIOINTMODE_IN_WINDOW \
|
| 552 |
((VL53L1_GPIO_Interrupt_Mode) 3)
|
| 553 |
/*!< Trigger interupt if value > thresh_low AND value < thresh_high */
|
| 554 |
|
| 555 |
/** @} end of VL53L1_GPIO_Interrupt_Mode_group */
|
| 556 |
|
| 557 |
/** @defgroup VL53L1_TuningParms_group Tuning Parameters
|
| 558 |
* @brief Selects specific tuning parameter inputs to get/set \
|
| 559 |
* Added as part of Patch_AddedTuningParms_11761
|
| 560 |
* @{
|
| 561 |
*/
|
| 562 |
|
| 563 |
typedef uint16_t VL53L1_TuningParms;
|
| 564 |
|
| 565 |
#define VL53L1_TUNINGPARMS_LLD_PUBLIC_MIN_ADDRESS \
|
| 566 |
((VL53L1_TuningParms) VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS) |
| 567 |
#define VL53L1_TUNINGPARMS_LLD_PUBLIC_MAX_ADDRESS \
|
| 568 |
((VL53L1_TuningParms) VL53L1_TUNINGPARM_LOWPOWERAUTO_RANGE_CONFIG_TIMEOUT_US) |
| 569 |
|
| 570 |
#define VL53L1_TUNINGPARMS_LLD_PRIVATE_MIN_ADDRESS \
|
| 571 |
((VL53L1_TuningParms) VL53L1_TUNINGPARM_PRIVATE_PAGE_BASE_ADDRESS) |
| 572 |
#define VL53L1_TUNINGPARMS_LLD_PRIVATE_MAX_ADDRESS \
|
| 573 |
((VL53L1_TuningParms) VL53L1_TUNINGPARMS_LLD_PRIVATE_MIN_ADDRESS) |
| 574 |
|
| 575 |
#define VL53L1_TUNINGPARM_VERSION \
|
| 576 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 0))
|
| 577 |
#define VL53L1_TUNINGPARM_KEY_TABLE_VERSION \
|
| 578 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 1))
|
| 579 |
#define VL53L1_TUNINGPARM_LLD_VERSION \
|
| 580 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 2))
|
| 581 |
#define VL53L1_TUNINGPARM_CONSISTENCY_LITE_PHASE_TOLERANCE \
|
| 582 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 3))
|
| 583 |
#define VL53L1_TUNINGPARM_PHASECAL_TARGET \
|
| 584 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 4))
|
| 585 |
#define VL53L1_TUNINGPARM_LITE_CAL_REPEAT_RATE \
|
| 586 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 5))
|
| 587 |
#define VL53L1_TUNINGPARM_LITE_RANGING_GAIN_FACTOR \
|
| 588 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 6))
|
| 589 |
#define VL53L1_TUNINGPARM_LITE_MIN_CLIP_MM \
|
| 590 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 7))
|
| 591 |
#define VL53L1_TUNINGPARM_LITE_LONG_SIGMA_THRESH_MM \
|
| 592 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 8))
|
| 593 |
#define VL53L1_TUNINGPARM_LITE_MED_SIGMA_THRESH_MM \
|
| 594 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 9))
|
| 595 |
#define VL53L1_TUNINGPARM_LITE_SHORT_SIGMA_THRESH_MM \
|
| 596 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 10))
|
| 597 |
#define VL53L1_TUNINGPARM_LITE_LONG_MIN_COUNT_RATE_RTN_MCPS \
|
| 598 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 11))
|
| 599 |
#define VL53L1_TUNINGPARM_LITE_MED_MIN_COUNT_RATE_RTN_MCPS \
|
| 600 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 12))
|
| 601 |
#define VL53L1_TUNINGPARM_LITE_SHORT_MIN_COUNT_RATE_RTN_MCPS \
|
| 602 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 13))
|
| 603 |
#define VL53L1_TUNINGPARM_LITE_SIGMA_EST_PULSE_WIDTH \
|
| 604 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 14))
|
| 605 |
#define VL53L1_TUNINGPARM_LITE_SIGMA_EST_AMB_WIDTH_NS \
|
| 606 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 15))
|
| 607 |
#define VL53L1_TUNINGPARM_LITE_SIGMA_REF_MM \
|
| 608 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 16))
|
| 609 |
#define VL53L1_TUNINGPARM_LITE_RIT_MULT \
|
| 610 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 17))
|
| 611 |
#define VL53L1_TUNINGPARM_LITE_SEED_CONFIG \
|
| 612 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 18))
|
| 613 |
#define VL53L1_TUNINGPARM_LITE_QUANTIFIER \
|
| 614 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 19))
|
| 615 |
#define VL53L1_TUNINGPARM_LITE_FIRST_ORDER_SELECT \
|
| 616 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 20))
|
| 617 |
#define VL53L1_TUNINGPARM_LITE_XTALK_MARGIN_KCPS \
|
| 618 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 21))
|
| 619 |
#define VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_LONG_RANGE \
|
| 620 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 22))
|
| 621 |
#define VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_MED_RANGE \
|
| 622 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 23))
|
| 623 |
#define VL53L1_TUNINGPARM_INITIAL_PHASE_RTN_LITE_SHORT_RANGE \
|
| 624 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 24))
|
| 625 |
#define VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_LONG_RANGE \
|
| 626 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 25))
|
| 627 |
#define VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_MED_RANGE \
|
| 628 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 26))
|
| 629 |
#define VL53L1_TUNINGPARM_INITIAL_PHASE_REF_LITE_SHORT_RANGE \
|
| 630 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 27))
|
| 631 |
#define VL53L1_TUNINGPARM_TIMED_SEED_CONFIG \
|
| 632 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 28))
|
| 633 |
#define VL53L1_TUNINGPARM_VHV_LOOPBOUND \
|
| 634 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 29))
|
| 635 |
#define VL53L1_TUNINGPARM_REFSPADCHAR_DEVICE_TEST_MODE \
|
| 636 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 30))
|
| 637 |
#define VL53L1_TUNINGPARM_REFSPADCHAR_VCSEL_PERIOD \
|
| 638 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 31))
|
| 639 |
#define VL53L1_TUNINGPARM_REFSPADCHAR_PHASECAL_TIMEOUT_US \
|
| 640 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 32))
|
| 641 |
#define VL53L1_TUNINGPARM_REFSPADCHAR_TARGET_COUNT_RATE_MCPS \
|
| 642 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 33))
|
| 643 |
#define VL53L1_TUNINGPARM_REFSPADCHAR_MIN_COUNTRATE_LIMIT_MCPS \
|
| 644 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 34))
|
| 645 |
#define VL53L1_TUNINGPARM_REFSPADCHAR_MAX_COUNTRATE_LIMIT_MCPS \
|
| 646 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 35))
|
| 647 |
#define VL53L1_TUNINGPARM_OFFSET_CAL_DSS_RATE_MCPS \
|
| 648 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 36))
|
| 649 |
#define VL53L1_TUNINGPARM_OFFSET_CAL_PHASECAL_TIMEOUT_US \
|
| 650 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 37))
|
| 651 |
#define VL53L1_TUNINGPARM_OFFSET_CAL_MM_TIMEOUT_US \
|
| 652 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 38))
|
| 653 |
#define VL53L1_TUNINGPARM_OFFSET_CAL_RANGE_TIMEOUT_US \
|
| 654 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 39))
|
| 655 |
#define VL53L1_TUNINGPARM_OFFSET_CAL_PRE_SAMPLES \
|
| 656 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 40))
|
| 657 |
#define VL53L1_TUNINGPARM_OFFSET_CAL_MM1_SAMPLES \
|
| 658 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 41))
|
| 659 |
#define VL53L1_TUNINGPARM_OFFSET_CAL_MM2_SAMPLES \
|
| 660 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 42))
|
| 661 |
#define VL53L1_TUNINGPARM_SPADMAP_VCSEL_PERIOD \
|
| 662 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 43))
|
| 663 |
#define VL53L1_TUNINGPARM_SPADMAP_VCSEL_START \
|
| 664 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 44))
|
| 665 |
#define VL53L1_TUNINGPARM_SPADMAP_RATE_LIMIT_MCPS \
|
| 666 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 45))
|
| 667 |
#define VL53L1_TUNINGPARM_LITE_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS \
|
| 668 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 46))
|
| 669 |
#define VL53L1_TUNINGPARM_TIMED_DSS_CONFIG_TARGET_TOTAL_RATE_MCPS \
|
| 670 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 47))
|
| 671 |
#define VL53L1_TUNINGPARM_LITE_PHASECAL_CONFIG_TIMEOUT_US \
|
| 672 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 48))
|
| 673 |
#define VL53L1_TUNINGPARM_TIMED_PHASECAL_CONFIG_TIMEOUT_US \
|
| 674 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 49))
|
| 675 |
#define VL53L1_TUNINGPARM_LITE_MM_CONFIG_TIMEOUT_US \
|
| 676 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 50))
|
| 677 |
#define VL53L1_TUNINGPARM_TIMED_MM_CONFIG_TIMEOUT_US \
|
| 678 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 51))
|
| 679 |
#define VL53L1_TUNINGPARM_LITE_RANGE_CONFIG_TIMEOUT_US \
|
| 680 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 52))
|
| 681 |
#define VL53L1_TUNINGPARM_TIMED_RANGE_CONFIG_TIMEOUT_US \
|
| 682 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 53))
|
| 683 |
#define VL53L1_TUNINGPARM_LOWPOWERAUTO_VHV_LOOP_BOUND \
|
| 684 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 54))
|
| 685 |
#define VL53L1_TUNINGPARM_LOWPOWERAUTO_MM_CONFIG_TIMEOUT_US \
|
| 686 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 55))
|
| 687 |
#define VL53L1_TUNINGPARM_LOWPOWERAUTO_RANGE_CONFIG_TIMEOUT_US \
|
| 688 |
((VL53L1_TuningParms) (VL53L1_TUNINGPARM_PUBLIC_PAGE_BASE_ADDRESS + 56))
|
| 689 |
|
| 690 |
|
| 691 |
/** @} end of VL53L1_TuningParms_group */
|
| 692 |
|
| 693 |
|
| 694 |
#endif
|
| 695 |
|
| 696 |
/* _VL53L1_DEVICE_H_ */
|
| 697 |
|
| 698 |
|