Revision 340f2bdf modules/PowerManagement_1-1/board.c
modules/PowerManagement_1-1/board.c | ||
---|---|---|
47 | 47 |
* @param[in] odr OD register configuration. |
48 | 48 |
* @param[in] afrl AF register (low) configuration. |
49 | 49 |
* @param[in] afrh AF register (high ) configuration. |
50 |
* @param[in] ignmask Mask to ignore individual pads. |
|
51 | 50 |
*/ |
52 | 51 |
static void _gpio_init(stm32_gpio_t *gpiop, |
53 | 52 |
const uint32_t moder, |
... | ... | |
56 | 55 |
const uint32_t pupdr, |
57 | 56 |
const uint32_t odr, |
58 | 57 |
const uint32_t afrl, |
59 |
const uint32_t afrh, |
|
60 |
const uint16_t ignmask) { |
|
61 |
|
|
62 |
const uint8_t lut[] = {0x00, 0x03, 0x0C, 0x0F, |
|
63 |
0x30, 0x33, 0x3C, 0x3F, |
|
64 |
0xC0, 0xC3, 0xCC, 0xCF, |
|
65 |
0xF0, 0xF3, 0xFC, 0xFF}; |
|
66 |
|
|
67 |
/* some bit-magic to fan out the mask */ |
|
68 |
const uint32_t ignmask2 = (lut[(ignmask >> 12) ] << 24) | |
|
69 |
(lut[(ignmask >> 8) & 0x0F] << 16) | |
|
70 |
(lut[(ignmask >> 4) & 0x0F] << 8) | |
|
71 |
(lut[(ignmask ) & 0x0F]); |
|
72 |
const uint32_t ignmask4_low = (lut[lut[(ignmask >> 6) & 0x03]] << 24) | |
|
73 |
(lut[lut[(ignmask >> 4) & 0x03]] << 16) | |
|
74 |
(lut[lut[(ignmask >> 2) & 0x03]] << 8) | |
|
75 |
(lut[lut[(ignmask ) & 0x03]]); |
|
76 |
const uint32_t ignmask4_high = (lut[lut[(ignmask >> 14) ]] << 24) | |
|
77 |
(lut[lut[(ignmask >> 12) & 0x03]] << 16) | |
|
78 |
(lut[lut[(ignmask >> 10) & 0x03]] << 8) | |
|
79 |
(lut[lut[(ignmask >> 8) & 0x03]]); |
|
80 |
|
|
81 |
gpiop->OTYPER = (gpiop->OTYPER & ignmask ) | (otyper & ~ignmask ); |
|
82 |
gpiop->OSPEEDR = (gpiop->OSPEEDR & ignmask2 ) | (ospeedr & ~ignmask2 ); |
|
83 |
gpiop->PUPDR = (gpiop->PUPDR & ignmask2 ) | (pupdr & ~ignmask2 ); |
|
84 |
gpiop->ODR = (gpiop->ODR & ignmask ) | (odr & ~ignmask ); |
|
85 |
gpiop->AFRL = (gpiop->AFRL & ignmask4_low ) | (afrl & ~ignmask4_low ); |
|
86 |
gpiop->AFRH = (gpiop->AFRH & ignmask4_high) | (afrh & ~ignmask4_high); |
|
87 |
gpiop->MODER = (gpiop->MODER & ignmask2 ) | (moder & ~ignmask2 ); |
|
58 |
const uint32_t afrh) { |
|
59 |
|
|
60 |
gpiop->OTYPER = otyper; |
|
61 |
gpiop->OSPEEDR = ospeedr; |
|
62 |
gpiop->PUPDR = pupdr; |
|
63 |
gpiop->ODR = odr; |
|
64 |
gpiop->AFRL = afrl; |
|
65 |
gpiop->AFRH = afrh; |
|
66 |
gpiop->MODER = moder; |
|
67 |
|
|
68 |
return; |
|
88 | 69 |
} |
89 | 70 |
|
90 | 71 |
/** |
... | ... | |
99 | 80 |
|
100 | 81 |
/* Initializing all the defined GPIO ports.*/ |
101 | 82 |
#if STM32_HAS_GPIOA |
102 |
_gpio_init(GPIOA, VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH, VAL_GPIOA_IGNORE);
|
|
83 |
_gpio_init(GPIOA, VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH); |
|
103 | 84 |
#endif |
104 | 85 |
#if STM32_HAS_GPIOB |
105 |
_gpio_init(GPIOB, VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH, VAL_GPIOB_IGNORE);
|
|
86 |
_gpio_init(GPIOB, VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH); |
|
106 | 87 |
#endif |
107 | 88 |
#if STM32_HAS_GPIOC |
108 |
_gpio_init(GPIOC, VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH, VAL_GPIOC_IGNORE);
|
|
89 |
_gpio_init(GPIOC, VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH); |
|
109 | 90 |
#endif |
110 | 91 |
#if STM32_HAS_GPIOD |
111 |
_gpio_init(GPIOD, VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH, VAL_GPIOD_IGNORE);
|
|
92 |
_gpio_init(GPIOD, VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH); |
|
112 | 93 |
#endif |
113 | 94 |
#if STM32_HAS_GPIOE |
114 |
_gpio_init(GPIOE, VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH, VAL_GPIOE_IGNORE);
|
|
95 |
_gpio_init(GPIOE, VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH); |
|
115 | 96 |
#endif |
116 | 97 |
#if STM32_HAS_GPIOF |
117 |
_gpio_init(GPIOF, VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH, VAL_GPIOF_IGNORE);
|
|
98 |
_gpio_init(GPIOF, VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH); |
|
118 | 99 |
#endif |
119 | 100 |
#if STM32_HAS_GPIOG |
120 |
_gpio_init(GPIOG, VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH, VAL_GPIOG_IGNORE);
|
|
101 |
_gpio_init(GPIOG, VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH); |
|
121 | 102 |
#endif |
122 | 103 |
#if STM32_HAS_GPIOH |
123 |
_gpio_init(GPIOH, VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH, VAL_GPIOH_IGNORE);
|
|
104 |
_gpio_init(GPIOH, VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH); |
|
124 | 105 |
#endif |
125 | 106 |
#if STM32_HAS_GPIOI |
126 |
_gpio_init(GPIOI, VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH, VAL_GPIOI_IGNORE);
|
|
107 |
_gpio_init(GPIOI, VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRL);
|
|
127 | 108 |
#endif |
128 | 109 |
#if STM32_HAS_GPIOJ |
129 |
_gpio_init(GPIOJ, VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH, VAL_GPIOJ_IGNORE);
|
|
110 |
_gpio_init(GPIOJ, VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH); |
|
130 | 111 |
#endif |
131 | 112 |
#if STM32_HAS_GPIOK |
132 |
_gpio_init(GPIOK, VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH, VAL_GPIOK_IGNORE);
|
|
113 |
_gpio_init(GPIOK, VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH); |
|
133 | 114 |
#endif |
134 | 115 |
} |
135 | 116 |
|
Also available in: Unified diff