amiro-os / boards / LightRing / board.h @ 3a3d08d9
History | View | Annotate | Download (6.983 KB)
1 | 58fe0e0b | Thomas Schöpping | #ifndef _BOARD_H_
|
---|---|---|---|
2 | #define _BOARD_H_
|
||
3 | |||
4 | /*
|
||
5 | * Setup for AMiRo LightRing board.
|
||
6 | */
|
||
7 | |||
8 | /*
|
||
9 | * Board identifier.
|
||
10 | */
|
||
11 | #define BOARD_LIGHT_RING
|
||
12 | #define BOARD_NAME "AMiRo LightRing" |
||
13 | #define BOARD_VERSION "1.0" |
||
14 | |||
15 | /*
|
||
16 | * Board frequencies.
|
||
17 | */
|
||
18 | #define STM32_LSECLK 0 |
||
19 | #define STM32_HSECLK 8000000 |
||
20 | |||
21 | /*
|
||
22 | * MCU type as defined in the ST header file stm32f1xx.h.
|
||
23 | */
|
||
24 | #define STM32F10X_HD
|
||
25 | |||
26 | /*
|
||
27 | * IO pins assignments.
|
||
28 | */
|
||
29 | #define GPIOA_LASER_RX 2 |
||
30 | #define GPIOA_LASER_TX 3 |
||
31 | #define GPIOA_LIGHT_BLANK 4 |
||
32 | #define GPIOA_LIGHT_SCLK 5 |
||
33 | #define GPIOA_LIGHT_MOSI 7 |
||
34 | #define GPIOA_PROG_RX 9 |
||
35 | #define GPIOA_PROG_TX 10 |
||
36 | #define GPIOA_CAN_RX 11 |
||
37 | #define GPIOA_CAN_TX 12 |
||
38 | |||
39 | #define GPIOB_LASER_EN 2 |
||
40 | #define GPIOB_LASER_OC_N 5 |
||
41 | #define GPIOB_SYS_UART_DN 6 |
||
42 | #define GPIOB_WL_GDO2 8 |
||
43 | #define GPIOB_WL_GDO0 9 |
||
44 | #define GPIOB_MEM_SCL 10 |
||
45 | #define GPIOB_MEM_SDA 11 |
||
46 | #define GPIOB_WL_SS_N 12 |
||
47 | #define GPIOB_WL_SCLK 13 |
||
48 | #define GPIOB_WL_MISO 14 |
||
49 | #define GPIOB_WL_MOSI 15 |
||
50 | |||
51 | #define GPIOC_LIGHT_XLAT 4 |
||
52 | #define GPIOC_SYS_UART_RX 10 |
||
53 | #define GPIOC_SYS_UART_TX 11 |
||
54 | #define GPIOC_SYS_PD_N 14 |
||
55 | |||
56 | #define GPIOD_OSC_IN 0 |
||
57 | #define GPIOD_OSC_OUT 1 |
||
58 | #define GPIOD_SYS_INT_N 2 |
||
59 | |||
60 | /*
|
||
61 | * I/O ports initial setup, this configuration is established soon after reset
|
||
62 | * in the initialization code.
|
||
63 | */
|
||
64 | #define PIN_MODE_INPUT(n) (0x4U << (((n) % 8) * 4)) |
||
65 | #define PIN_MODE_INPUT_PULLX(n) (0x8U << (((n) % 8) * 4)) |
||
66 | #define PIN_MODE_INPUT_ANALOG(n) (0x0U << (((n) % 8) * 4)) |
||
67 | /* Push Pull output 50MHz */
|
||
68 | #define PIN_MODE_OUTPUT_PUSHPULL(n) (0x3U << (((n) % 8) * 4)) |
||
69 | /* Open Drain output 50MHz */
|
||
70 | #define PIN_MODE_OUTPUT_OPENDRAIN(n) (0x7U << (((n) % 8) * 4)) |
||
71 | /* Alternate Push Pull output 50MHz */
|
||
72 | #define PIN_MODE_ALTERNATE_PUSHPULL(n) (0xbU << (((n) % 8) * 4)) |
||
73 | /* Alternate Open Drain output 50MHz */
|
||
74 | #define PIN_MODE_ALTERNATE_OPENDRAIN(n) (0xfU << (((n) % 8) * 4)) |
||
75 | |||
76 | /*
|
||
77 | * Port A setup.
|
||
78 | */
|
||
79 | #define VAL_GPIOACRL (PIN_MODE_INPUT_PULLX(0) | \ |
||
80 | PIN_MODE_INPUT_PULLX(1) | \
|
||
81 | PIN_MODE_ALTERNATE_PUSHPULL(GPIOA_LASER_RX) | \ |
||
82 | PIN_MODE_INPUT_PULLX(GPIOA_LASER_TX) | \ |
||
83 | PIN_MODE_OUTPUT_PUSHPULL(GPIOA_LIGHT_BLANK) | \ |
||
84 | PIN_MODE_ALTERNATE_PUSHPULL(GPIOA_LIGHT_SCLK) | \ |
||
85 | PIN_MODE_INPUT_PULLX(6) | \
|
||
86 | PIN_MODE_ALTERNATE_PUSHPULL(GPIOA_LIGHT_MOSI)) |
||
87 | #define VAL_GPIOACRH (PIN_MODE_INPUT_PULLX(8) | \ |
||
88 | PIN_MODE_ALTERNATE_PUSHPULL(GPIOA_PROG_RX) | \ |
||
89 | PIN_MODE_INPUT_PULLX(GPIOA_PROG_TX) | \ |
||
90 | PIN_MODE_INPUT(GPIOA_CAN_RX) | \ |
||
91 | PIN_MODE_ALTERNATE_PUSHPULL(GPIOA_CAN_TX) | \ |
||
92 | PIN_MODE_INPUT_PULLX(13) | \
|
||
93 | PIN_MODE_INPUT_PULLX(14) | \
|
||
94 | PIN_MODE_INPUT_PULLX(15))
|
||
95 | #define VAL_GPIOAODR 0xFFFF |
||
96 | |||
97 | /*
|
||
98 | * Port B setup.
|
||
99 | */
|
||
100 | #define VAL_GPIOBCRL (PIN_MODE_INPUT_PULLX(0) | \ |
||
101 | PIN_MODE_INPUT_PULLX(1) | \
|
||
102 | PIN_MODE_OUTPUT_PUSHPULL(GPIOB_LASER_EN) | \ |
||
103 | PIN_MODE_INPUT_PULLX(3) | \
|
||
104 | PIN_MODE_INPUT_PULLX(4) | \
|
||
105 | PIN_MODE_INPUT(GPIOB_LASER_OC_N) | \ |
||
106 | PIN_MODE_OUTPUT_OPENDRAIN(GPIOB_SYS_UART_DN) | \ |
||
107 | PIN_MODE_INPUT_PULLX(7))
|
||
108 | #define VAL_GPIOBCRH (PIN_MODE_INPUT_PULLX(GPIOB_WL_GDO2) | \
|
||
109 | PIN_MODE_INPUT_PULLX(GPIOB_WL_GDO0) | \ |
||
110 | PIN_MODE_ALTERNATE_OPENDRAIN(GPIOB_MEM_SCL) | \ |
||
111 | PIN_MODE_ALTERNATE_OPENDRAIN(GPIOB_MEM_SDA) | \ |
||
112 | PIN_MODE_OUTPUT_PUSHPULL(GPIOB_WL_SS_N) | \ |
||
113 | PIN_MODE_ALTERNATE_PUSHPULL(GPIOB_WL_SCLK) | \ |
||
114 | PIN_MODE_INPUT(GPIOB_WL_MISO) | \ |
||
115 | PIN_MODE_ALTERNATE_PUSHPULL(GPIOB_WL_MOSI)) |
||
116 | #define VAL_GPIOBODR 0xFFFB /* initially LASER_EN is deactivated */ |
||
117 | |||
118 | /*
|
||
119 | * Port C setup.
|
||
120 | */
|
||
121 | #define VAL_GPIOCCRL (PIN_MODE_INPUT_PULLX(0) | \ |
||
122 | PIN_MODE_INPUT_PULLX(1) | \
|
||
123 | PIN_MODE_INPUT_PULLX(2) | \
|
||
124 | PIN_MODE_INPUT_PULLX(3) | \
|
||
125 | PIN_MODE_OUTPUT_PUSHPULL(GPIOC_LIGHT_XLAT) | \ |
||
126 | PIN_MODE_INPUT_PULLX(5) | \
|
||
127 | PIN_MODE_INPUT_PULLX(6) | \
|
||
128 | PIN_MODE_INPUT_PULLX(7))
|
||
129 | #define VAL_GPIOCCRH (PIN_MODE_INPUT_PULLX(8) | \ |
||
130 | PIN_MODE_INPUT_PULLX(9) | \
|
||
131 | PIN_MODE_INPUT(GPIOC_SYS_UART_RX) | \ |
||
132 | PIN_MODE_INPUT(GPIOC_SYS_UART_TX) | \ |
||
133 | PIN_MODE_INPUT_PULLX(12) | \
|
||
134 | PIN_MODE_INPUT_PULLX(13) | \
|
||
135 | PIN_MODE_OUTPUT_OPENDRAIN(GPIOC_SYS_PD_N) | \ |
||
136 | PIN_MODE_INPUT_PULLX(15))
|
||
137 | #define VAL_GPIOCODR 0xFFFF |
||
138 | |||
139 | /*
|
||
140 | * Port D setup.
|
||
141 | */
|
||
142 | #define VAL_GPIODCRL (PIN_MODE_INPUT(GPIOD_OSC_IN) | \
|
||
143 | PIN_MODE_INPUT(GPIOD_OSC_OUT) | \ |
||
144 | PIN_MODE_OUTPUT_OPENDRAIN(GPIOD_SYS_INT_N) | \ |
||
145 | PIN_MODE_INPUT_PULLX(3) | \
|
||
146 | PIN_MODE_INPUT_PULLX(4) | \
|
||
147 | PIN_MODE_INPUT_PULLX(5) | \
|
||
148 | PIN_MODE_INPUT_PULLX(6) | \
|
||
149 | PIN_MODE_INPUT_PULLX(7))
|
||
150 | #define VAL_GPIODCRH 0x88888888 |
||
151 | #define VAL_GPIODODR 0xFFFB /* initially SYS_INT_N indicates that the OS is busy */ |
||
152 | |||
153 | /*
|
||
154 | * Port E setup.
|
||
155 | */
|
||
156 | #define VAL_GPIOECRL 0x88888888 /* PE7...PE0 */ |
||
157 | #define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */ |
||
158 | #define VAL_GPIOEODR 0xFFFF |
||
159 | |||
160 | /*
|
||
161 | * Port F setup.
|
||
162 | */
|
||
163 | #define VAL_GPIOFCRL 0x88888888 /* PF7...PF0 */ |
||
164 | #define VAL_GPIOFCRH 0x88888888 /* PF15...PF8 */ |
||
165 | #define VAL_GPIOFODR 0xFFFF |
||
166 | |||
167 | /*
|
||
168 | * Port G setup.
|
||
169 | */
|
||
170 | #define VAL_GPIOGCRL 0x88888888 /* PG7...PG0 */ |
||
171 | #define VAL_GPIOGCRH 0x88888888 /* PG15...PG8 */ |
||
172 | #define VAL_GPIOGODR 0xFFFF |
||
173 | |||
174 | #if !defined(_FROM_ASM_)
|
||
175 | #ifdef __cplusplus
|
||
176 | extern "C" { |
||
177 | #endif
|
||
178 | void boardInit(void); |
||
179 | void boardRequestShutdown(void); |
||
180 | void boardStandby(void); |
||
181 | b4885314 | Thomas Schöpping | void boardClearI2CBus(const uint8_t scl_pad, const uint8_t sda_pad); |
182 | 58fe0e0b | Thomas Schöpping | #ifdef __cplusplus
|
183 | } |
||
184 | #endif
|
||
185 | #endif /* _FROM_ASM_ */ |
||
186 | |||
187 | #endif /* _BOARD_H_ */ |