commit 5b0a8e7b565a81d0df81d72934a9cc9f0d7b7572
Author: Thomas Schöpping <tschoepp@cit-ec.uni-bielefeld.de>
Date:   Fri Jun 29 10:41:50 2018 +0200

    moved the /os/modles directory to /modules

diff --git a/modules/DiWheelDrive_1-1/Makefile b/modules/DiWheelDrive_1-1/Makefile
new file mode 100644
index 0000000..f178bf0
--- /dev/null
+++ b/modules/DiWheelDrive_1-1/Makefile
@@ -0,0 +1,303 @@
+################################################################################
+# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
+# (AMiRo) platform.                                                            #
+# Copyright (C) 2016..2018  Thomas Schöpping et al.                            #
+#                                                                              #
+# This program is free software: you can redistribute it and/or modify         #
+# it under the terms of the GNU General Public License as published by         #
+# the Free Software Foundation, either version 3 of the License, or            #
+# (at your option) any later version.                                          #
+#                                                                              #
+# This program is distributed in the hope that it will be useful,              #
+# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
+# GNU General Public License for more details.                                 #
+#                                                                              #
+# You should have received a copy of the GNU General Public License            #
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
+#                                                                              #
+# This research/work was supported by the Cluster of Excellence Cognitive      #
+# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
+# funded by the German Research Foundation (DFG).                              #
+################################################################################
+
+
+
+################################################################################
+# Build global options                                                         #
+# NOTE: Can be overridden externally.                                          #
+#                                                                              #
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+  USE_OPT = -O2 -fomit-frame-pointer -falign-functions=16 -fstack-usage
+endif
+
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+  USE_COPT = -std=c11
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+  USE_CPPOPT = -fno-rtti -std=c++17
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+  USE_LINK_GC = yes
+endif
+
+# Linker extra options here.
+ifeq ($(USE_LDOPT),)
+  USE_LDOPT =
+endif
+
+# Enable this if you want link time optimizations (LTO)
+ifeq ($(USE_LTO),)
+  USE_LTO = yes
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+  USE_THUMB = yes
+endif
+
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+  USE_VERBOSE_COMPILE = no
+endif
+
+# If enabled, this option makes the build process faster by not compiling
+# modules not used in the current configuration.
+ifeq ($(USE_SMART_BUILD),)
+  USE_SMART_BUILD = no
+endif
+
+#                                                                              #
+# Build global options                                                         #
+################################################################################
+
+################################################################################
+# Architecture or project specific options                                     #
+#                                                                              #
+
+# Stack size to be allocated to the Cortex-M process stack. This stack is
+# the stack used by the main() thread.
+ifeq ($(USE_PROCESS_STACKSIZE),)
+  USE_PROCESS_STACKSIZE = 0x400
+endif
+
+# Stack size to the allocated to the Cortex-M main/exceptions stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
+  USE_EXCEPTIONS_STACKSIZE = 0x400
+endif
+
+# Enables the use of FPU on Cortex-M4.
+# Possible selections are:
+#   no     - no FPU is used (probably equals 'soft')
+#   soft   - does not use the FPU, thus all floating point operations are emulated
+#   softfp - uses the FPU, but uses the integer registers only
+#   hard   - uses the FPU and passes data via the FPU registers
+ifeq ($(USE_FPU),)
+  USE_FPU = no
+endif
+
+#                                                                              #
+# Architecture or project specific options                                     #
+################################################################################
+
+################################################################################
+# Project, sources and paths                                                   #
+#                                                                              #
+
+# Define project name here
+PROJECT := $(patsubst $(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))..)/%,%,$(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))))
+
+# Imported source files and paths
+include ../../../kernel/kernel.mk
+CHIBIOS := $(AMIROOS_KERNEL)
+AMIROOS = ../..
+# Startup files
+include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk
+# HAL-OSAL files
+include $(CHIBIOS)/os/hal/hal.mk
+include $(AMIROOS)/hal/hal.mk
+include $(CHIBIOS)/os/hal/ports/STM32/STM32F1xx/platform.mk
+include $(AMIROOS)/hal/ports/STM32/platform.mk
+include ./board.mk
+include $(CHIBIOS)/os/hal/osal/rt/osal.mk
+# RTOS files
+include $(CHIBIOS)/os/rt/rt.mk
+include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
+# Other files (optional).
+include $(CHIBIOS)/test/rt/test.mk
+# AMiRo-BLT files
+include ../../../bootloader/bootloader.mk
+# AMiRo-LLD files
+include ../../../periphery-lld/periphery-lld.mk
+# AMiRo-OS files
+include $(AMIROOS)/modules/modules.mk
+include $(AMIROOS)/core/core.mk
+include $(AMIROOS)/unittests/unittests.mk
+
+# Define linker script file here
+LDSCRIPT= $(BOARDLD)/STM32F103xE.ld
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = $(STARTUPSRC) \
+       $(KERNSRC) \
+       $(PORTSRC) \
+       $(OSALSRC) \
+       $(HALSRC) \
+       $(PLATFORMSRC) \
+       $(BOARDSRC) \
+       $(MODULESCSRC) \
+       $(TESTSRC) \
+       $(PERIPHERYLLDCSRC) \
+       $(AMIROOSCORECSRC) \
+       $(UNITTESTSCSRC) \
+       $(CHIBIOS)/os/various/evtimer.c \
+       $(CHIBIOS)/os/various/syscalls.c \
+       $(CHIBIOS)/os/hal/lib/streams/chprintf.c \
+       module.c \
+       $(APPSCSRC)
+
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC = $(AMIROOSCORECPPSRC) \
+         $(APPSCPPSRC)
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+ACSRC = $(APPSACSRC)
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+ACPPSRC = $(APPSACPPSRC)
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+TCSRC = $(APPSTCSRC)
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+TCPPSRC = $(APPSTCPPSRC)
+
+# List ASM source files here
+ASMSRC = $(APPSASMSRC)
+ASMXSRC = $(STARTUPASM) \
+          $(PORTASM) \
+          $(OSALASM) \
+          $(APPSASMXSRC)
+
+INCDIR = $(CHIBIOS)/os/license \
+         $(STARTUPINC) \
+         $(KERNINC) \
+         $(PORTINC) \
+         $(OSALINC) \
+         $(HALINC) \
+         $(PLATFORMINC) \
+         $(BOARDINC) \
+         $(MODULESINC) \
+         $(TESTINC) \
+         $(BOOTLOADERINC) \
+         $(CHIBIOS)/os/hal/lib/streams \
+         $(CHIBIOS)/os/various \
+         $(PERIPHERYLLDINC) \
+         $(AMIROOS) \
+         $(AMIROOSCOREINC) \
+         $(UNITTESTSINC) \
+         $(APPSINC)
+
+#                                                                              #
+# Project, sources and paths                                                   #
+################################################################################
+
+################################################################################
+# Compiler settings                                                            #
+# NOTE: Some can be overridden externally.                                     #
+#                                                                              #
+
+MCU  = cortex-m3
+
+#TRGT = arm-elf-
+TRGT = arm-none-eabi-
+CC   = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+#       runtime support makes code size explode.
+LD   = $(TRGT)gcc
+#LD   = $(TRGT)g++
+CP   = $(TRGT)objcopy
+AS   = $(TRGT)gcc -x assembler-with-cpp
+AR   = $(TRGT)ar
+OD   = $(TRGT)objdump
+SZ   = $(TRGT)size
+HEX  = $(CP) -O ihex
+BIN  = $(CP) -O binary
+SREC = $(CP) -O srec --srec-len=248
+
+# ARM-specific options here
+ifeq ($(AOPT),)
+  AOPT =
+endif
+
+# THUMB-specific options here
+ifeq ($(TOPT),)
+  TOPT = -mthumb -DTHUMB
+endif
+
+# Define C warning options here
+ifeq ($(CWARN),)
+  CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
+endif
+
+# Define C++ warning options here
+ifeq ($(CPPWARN),)
+  CPPWARN = -Wall -Wextra -Wundef
+endif
+
+#                                                                              #
+# Compiler settings                                                            #
+################################################################################
+
+################################################################################
+# Start of user section                                                        #
+#                                                                              #
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS +=
+
+# Define ASM defines here
+UADEFS +=
+
+# List all user directories here
+UINCDIR +=
+
+# List the user directory to look for the libraries here
+ULIBDIR +=
+
+# List all user libraries here
+ULIBS +=
+
+#                                                                              #
+# End of user defines                                                          #
+################################################################################
+
+# allow for custom build directory
+ifneq ($(BUILDDIR),)
+  BUILDDIR := $(BUILDDIR)/$(PROJECT)
+endif
+
+RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
+include $(RULESPATH)/rules.mk
+
+include $(AMIROOS)/modules/flash.mk
diff --git a/modules/DiWheelDrive_1-1/alldconf.h b/modules/DiWheelDrive_1-1/alldconf.h
new file mode 100644
index 0000000..5b810a1
--- /dev/null
+++ b/modules/DiWheelDrive_1-1/alldconf.h
@@ -0,0 +1,84 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _ALLDCONF_H_
+#define _ALLDCONF_H_
+
+/*
+ * compatibility guards
+ */
+#define _AMIRO_LLD_CFG_
+#define AMIRO_LLD_CFG_VERSION_MAJOR         1
+#define AMIRO_LLD_CFG_VERSION_MINOR         0
+
+/**
+ * @brief   Enable flag for the A3906 motor driver.
+ */
+#define AMIROLLD_CFG_USE_A3906
+
+/**
+ * @brief   Enable flag for the AT24C01BN-SH-B EEPROM.
+ */
+#define AMIROLLD_CFG_USE_AT24C01BN
+
+/**
+ * @brief   Enable flag for the MHC5883L compass.
+ */
+#define AMIROLLD_CFG_USE_HMC5883L
+
+/**
+ * @brief   Enable flag for the INA219 power monitor.
+ */
+#define AMIROLLD_CFG_USE_INA219
+
+/**
+ * @brief   Enable flag for the L3G4200D gyroscope.
+ */
+#define AMIROLLD_CFG_USE_L3G4200D
+
+/**
+ * @brief   Enable flag for the status LED.
+ */
+#define AMIROLLD_CFG_USE_LED
+
+/**
+ * @brief   Enable flag for the LIS331DLH accelerometer.
+ */
+#define AMIROLLD_CFG_USE_LIS331DLH
+
+/**
+ * @brief   Enable flag for the LTC4412 power path controller.
+ */
+#define AMIROLLD_CFG_USE_LTC4412
+
+/**
+ * @brief   Enable flag for the PCA9544A I2C multiplexer.
+ */
+#define AMIROLLD_CFG_USE_PCA9544A
+
+/**
+ * @brief   Enable flag for the TPS62113 step-down converter.
+ */
+#define AMIROLLD_CFG_USE_TPS62113
+
+/**
+ * @brief   Enable flag for the VCNL4020 proximity sensor.
+ */
+#define AMIROLLD_CFG_USE_VCNL4020
+
+#endif /* _ALLDCONF_H_ */
diff --git a/modules/DiWheelDrive_1-1/aosconf.h b/modules/DiWheelDrive_1-1/aosconf.h
new file mode 100644
index 0000000..1685b67
--- /dev/null
+++ b/modules/DiWheelDrive_1-1/aosconf.h
@@ -0,0 +1,161 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _AOSCONF_H_
+#define _AOSCONF_H_
+
+/*
+ * compatibility guards
+ */
+#define _AMIRO_OS_CFG_
+#define _AMIRO_OS_CFG_VERSION_MAJOR_            2
+#define _AMIRO_OS_CFG_VERSION_MINOR_            0
+
+#include <stdbool.h>
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/*
+ * Include an external configuration file to override the following default settings only if required.
+ */
+#if defined(AMIRO_APPS) && (AMIRO_APPS == true)
+  #include <osconf.h>
+#endif
+
+/**
+ * @brief   Flag to set the module as SSSP master.
+ */
+#if !defined(OS_CFG_SSSP_MASTER)
+  #define AMIROOS_CFG_SSSP_MASTER               false
+#else
+  #define AMIROOS_CFG_SSSP_MASTER               OS_CFG_SSSP_MASTER
+#endif
+
+/**
+ * @brief   Time boundary for robot wide clock synchronization in microseconds.
+ * @details Whenever the SSSP S (snychronization) signal gets logically deactivated,
+ *          All modules need to align their local uptime to the nearest multiple of this value.
+ */
+#if !defined(OS_CFG_SSSP_SYSSYNCPERIOD)
+  #define AMIROOS_CFG_SSSP_SYSSYNCPERIOD        1000000
+#else
+  #define AMIROOS_CFG_SSSP_SYSSYNCPERIOD        OS_CFG_SSSP_SYSSYNCPERIOD
+#endif
+
+/**
+ * @brief   Flag to enable/disable debug API.
+ */
+#if !defined(OS_CFG_DBG)
+  #define AMIROOS_CFG_DBG                       true
+#else
+  #define AMIROOS_CFG_DBG                       OS_CFG_DBG
+#endif
+
+/**
+ * @brief   Flag to enable/disable unit tests.
+ */
+#if !defined(OS_CFG_TESTS_ENABLE)
+  #define AMIROOS_CFG_TESTS_ENABLE              true
+#else
+  #define AMIROOS_CFG_TESTS_ENABLE              OS_CFG_TESTS_ENABLE
+#endif
+
+/**
+ * @brief   Flag to enable/disable profiling API.
+ */
+#if !defined(OS_CFG_PROFILE)
+  #define AMIROOS_CFG_PROFILE                   true
+#else
+  #define AMIROOS_CFG_PROFILE                   OS_CFG_PROFILE
+#endif
+
+/**
+ * @brief   Timeout value when waiting for events in the main loop in microseconds.
+ * @details A value of 0 deactivates the timeout.
+ */
+#if !defined(OS_CFG_MAIN_LOOP_TIMEOUT)
+  #define AMIROOS_CFG_MAIN_LOOP_TIMEOUT         0
+#else
+  #define AMIROOS_CFG_MAIN_LOOP_TIMEOUT         OS_CFG_MAIN_LOOP_TIMEOUT
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name System shell options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Shell enable flag.
+ */
+#if (AMIROOS_CFG_TESTS_ENABLE == false) && !defined(OS_CFG_SHELL_ENABLE)
+  #define AMIROOS_CFG_SHELL_ENABLE              true
+#elif (AMIROOS_CFG_TESTS_ENABLE == true)
+  #define AMIROOS_CFG_SHELL_ENABLE              true
+#else
+  #define AMIROOS_CFG_SHELL_ENABLE              OS_CFG_SHELL_ENABLE
+#endif
+
+/**
+ * @brief   Shell thread stack size.
+ */
+#if !defined(OS_CFG_SHELL_STACKSIZE)
+  #define AMIROOS_CFG_SHELL_STACKSIZE           1024
+#else
+  #define AMIROOS_CFG_SHELL_STACKSIZE           OS_CFG_SHELL_STACKSIZE
+#endif
+
+/**
+ * @brief   Shell thread priority.
+ */
+#if !defined(OS_CFG_SHELL_THREADPRIO)
+  #define AMIROOS_CFG_SHELL_THREADPRIO          THD_NORMALPRIO_MIN
+#else
+  #define AMIROOS_CFG_SHELL_THREADPRIO          OS_CFG_SHELL_THREADPRIO
+#endif
+
+/**
+ * @brief   Shell maximum input line length.
+ */
+#if !defined(OS_CFG_SHELL_LINEWIDTH)
+  #define AMIROOS_CFG_SHELL_LINEWIDTH           64
+#else
+  #define AMIROOS_CFG_SHELL_LINEWIDTH           OS_CFG_SHELL_LINEWIDTH
+#endif
+
+/**
+ * @brief   Shell maximum number of arguments.
+ */
+#if !defined(OS_CFG_SHELL_MAXARGS)
+  #define AMIROOS_CFG_SHELL_MAXARGS             4
+#else
+  #define AMIROOS_CFG_SHELL_MAXARGS             OS_CFG_SHELL_MAXARGS
+#endif
+
+/** @} */
+
+#endif /* _AOSCONF_H_ */
+
diff --git a/modules/DiWheelDrive_1-1/board.c b/modules/DiWheelDrive_1-1/board.c
new file mode 100644
index 0000000..7ce79b5
--- /dev/null
+++ b/modules/DiWheelDrive_1-1/board.c
@@ -0,0 +1,80 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include <hal.h>
+
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+/**
+ * @brief   PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ *          This variable is used by the HAL when initializing the PAL driver.
+ */
+const PALConfig pal_default_config = {
+#if STM32_HAS_GPIOA
+  {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
+#endif
+#if STM32_HAS_GPIOB
+  {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
+#endif
+#if STM32_HAS_GPIOC
+  {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
+#endif
+#if STM32_HAS_GPIOD
+  {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
+#endif
+#if STM32_HAS_GPIOE
+  {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
+#endif
+#if STM32_HAS_GPIOF
+  {VAL_GPIOFODR, VAL_GPIOFCRL, VAL_GPIOFCRH},
+#endif
+#if STM32_HAS_GPIOG
+  {VAL_GPIOGODR, VAL_GPIOGCRL, VAL_GPIOGCRH},
+#endif
+};
+#endif
+
+/**
+ * @brief   Early initialization code.
+ * @details This initialization must be performed just after stack setup
+ *          and before any other initialization.
+ */
+void __early_init(void) {
+
+  stm32_clock_init();
+}
+
+/**
+ * @brief   Board-specific initialization code.
+ * @todo    Add your board-specific code, if any.
+ */
+void boardInit(void) {
+  /*
+   * Several I/O pins are re-mapped:
+   *   JTAG disabled and SWJ enabled
+   *   TIM2 to the PA15/PB3/PA2/PA3 pins.
+   *   TIM3 to PC6/PC7 pins.
+   *   USART3 to the PC10/PC11 pins.
+   *   I2C1 to the PB8/PB9 pins.
+   */
+  AFIO->MAPR = AFIO_MAPR_SWJ_CFG_DISABLE |
+               AFIO_MAPR_TIM2_REMAP_PARTIALREMAP1 |
+               AFIO_MAPR_TIM3_REMAP_FULLREMAP |
+               AFIO_MAPR_USART3_REMAP_PARTIALREMAP |
+               AFIO_MAPR_I2C1_REMAP;
+}
diff --git a/modules/DiWheelDrive_1-1/board.h b/modules/DiWheelDrive_1-1/board.h
new file mode 100644
index 0000000..622b7bf
--- /dev/null
+++ b/modules/DiWheelDrive_1-1/board.h
@@ -0,0 +1,629 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/*
+ * Setup for AMiRo DiWheelDrive v1.1 board.
+ */
+
+/*
+ * Board identifier.
+ */
+#define BOARD_DIWHEELDRIVE
+#define BOARD_NAME              "AMiRo DiWheelDrive"
+#define BOARD_VERSION           "1.1"
+
+/*
+ * Board oscillators-related settings.
+ * NOTE: LSE not fitted.
+ */
+#if !defined(STM32_LSECLK)
+#define STM32_LSECLK                0U
+#endif
+
+#if !defined(STM32_HSECLK)
+#define STM32_HSECLK                8000000U
+#endif
+
+/*
+ * Board voltages.
+ * Required for performance limits calculation.
+ */
+#define STM32_VDD                   330U
+
+/*
+ * MCU type as defined in the ST header.
+ */
+#define STM32F103xE
+
+/*
+ * IO pins assignments.
+ */
+#define GPIOA_WKUP                  0U
+#define GPIOA_LED                   1U
+#define GPIOA_DRIVE_PWM1A           2U
+#define GPIOA_DRIVE_PWM1B           3U
+#define GPIOA_PIN4                  4U
+#define GPIOA_MOTION_SCLK           5U
+#define GPIOA_MOTION_MISO           6U
+#define GPIOA_MOTION_MOSI           7U
+#define GPIOA_PIN8                  8U
+#define GPIOA_PROG_RX               9U
+#define GPIOA_PROG_TX               10U
+#define GPIOA_CAN_RX                11U
+#define GPIOA_CAN_TX                12U
+#define GPIOA_SWDIO                 13U
+#define GPIOA_SWCLK                 14U
+#define GPIOA_DRIVE_PWM2B           15U
+
+#define GPIOB_PIN0                  0U
+#define GPIOB_DRIVE_SENSE2          1U
+#define GPIOB_POWER_EN              2U
+#define GPIOB_DRIVE_PWM2A           3U
+#define GPIOB_PIN4                  4U
+#define GPIOB_COMPASS_DRDY          5U
+#define GPIOB_DRIVE_ENC1A           6U
+#define GPIOB_DRIVE_ENC1B           7U
+#define GPIOB_COMPASS_SCL           8U
+#define GPIOB_COMPASS_SDA           9U
+#define GPIOB_IR_SCL                10U
+#define GPIOB_IR_SDA                11U
+#define GPIOB_IR_INT                12U
+#define GPIOB_GYRO_DRDY             13U
+#define GPIOB_SYS_UART_UP           14U
+#define GPIOB_ACCEL_INT_N           15U
+
+#define GPIOC_DRIVE_SENSE1          0U
+#define GPIOC_SYS_INT_N             1U
+#define GPIOC_PIN2                  2U
+#define GPIOC_PATH_DCSTAT           3U
+#define GPIOC_PIN4                  4U
+#define GPIOC_PATH_DCEN             5U
+#define GPIOC_DRIVE_ENC2B           6U
+#define GPIOC_DRIVE_ENC2A           7U
+#define GPIOC_SYS_PD_N              8U
+#define GPIOC_SYS_REG_EN            9U
+#define GPIOC_SYS_UART_RX           10U
+#define GPIOC_SYS_UART_TX           11U
+#define GPIOC_PIN12                 12U
+#define GPIOC_ACCEL_SS_N            13U
+#define GPIOC_GYRO_SS_N             14U
+#define GPIOC_PIN15                 15U
+
+#define GPIOD_OSC_IN                0U
+#define GPIOD_OSC_OUT               1U
+#define GPIOD_SYS_WARMRST_N         2U
+#define GPIOD_PIN3                  3U
+#define GPIOD_PIN4                  4U
+#define GPIOD_PIN5                  5U
+#define GPIOD_PIN6                  6U
+#define GPIOD_PIN7                  7U
+#define GPIOD_PIN8                  8U
+#define GPIOD_PIN9                  9U
+#define GPIOD_PIN10                 10U
+#define GPIOD_PIN11                 11U
+#define GPIOD_PIN12                 12U
+#define GPIOD_PIN13                 13U
+#define GPIOD_PIN14                 14U
+#define GPIOD_PIN15                 15U
+
+#define GPIOE_PIN0                  0U
+#define GPIOE_PIN1                  1U
+#define GPIOE_PIN2                  2U
+#define GPIOE_PIN3                  3U
+#define GPIOE_PIN4                  4U
+#define GPIOE_PIN5                  5U
+#define GPIOE_PIN6                  6U
+#define GPIOE_PIN7                  7U
+#define GPIOE_PIN8                  8U
+#define GPIOE_PIN9                  9U
+#define GPIOE_PIN10                 10U
+#define GPIOE_PIN11                 11U
+#define GPIOE_PIN12                 12U
+#define GPIOE_PIN13                 13U
+#define GPIOE_PIN14                 14U
+#define GPIOE_PIN15                 15U
+
+#define GPIOF_PIN0                  0U
+#define GPIOF_PIN1                  1U
+#define GPIOF_PIN2                  2U
+#define GPIOF_PIN3                  3U
+#define GPIOF_PIN4                  4U
+#define GPIOF_PIN5                  5U
+#define GPIOF_PIN6                  6U
+#define GPIOF_PIN7                  7U
+#define GPIOF_PIN8                  8U
+#define GPIOF_PIN9                  9U
+#define GPIOF_PIN10                 10U
+#define GPIOF_PIN11                 11U
+#define GPIOF_PIN12                 12U
+#define GPIOF_PIN13                 13U
+#define GPIOF_PIN14                 14U
+#define GPIOF_PIN15                 15U
+
+#define GPIOG_PIN0                  0U
+#define GPIOG_PIN1                  1U
+#define GPIOG_PIN2                  2U
+#define GPIOG_PIN3                  3U
+#define GPIOG_PIN4                  4U
+#define GPIOG_PIN5                  5U
+#define GPIOG_PIN6                  6U
+#define GPIOG_PIN7                  7U
+#define GPIOG_PIN8                  8U
+#define GPIOG_PIN9                  9U
+#define GPIOG_PIN10                 10U
+#define GPIOG_PIN11                 11U
+#define GPIOG_PIN12                 12U
+#define GPIOG_PIN13                 13U
+#define GPIOG_PIN14                 14U
+#define GPIOG_PIN15                 15U
+
+/*
+ * IO lines assignments.
+ */
+#define LINE_WKUP                   PAL_LINE(GPIOA, GPIOA_WKUP)
+#define LINE_LED                    PAL_LINE(GPIOA, GPIOA_LED)
+#define LINE_DRIVE_PWM1A            PAL_LINE(GPIOA, GPIOA_DRIVE_PWM1A)
+#define LINE_DRIVE_PWM1B            PAL_LINE(GPIOA, GPIOA_DRIVE_PWM1B)
+#define LINE_MOTION_SCLK            PAL_LINE(GPIOA, GPIOA_MOTION_SCLK)
+#define LINE_MOTION_MISO            PAL_LINE(GPIOA, GPIOA_MOTION_MISO)
+#define LINE_MOTION_MOSI            PAL_LINE(GPIOA, GPIOA_MOTION_MOSI)
+#define LINE_PROG_RX                PAL_LINE(GPIOA, GPIOA_PROG_RX)
+#define LINE_PROG_TX                PAL_LINE(GPIOA, GPIOA_PROG_TX)
+#define LINE_CAN_RX                 PAL_LINE(GPIOA, GPIOA_CAN_RX)
+#define LINE_CAN_TX                 PAL_LINE(GPIOA, GPIOA_CAN_TX)
+#define LINE_SWDIO                  PAL_LINE(GPIOA, GPIOA_SWDIO)
+#define LINE_SWCLK                  PAL_LINE(GPIOA, GPIOA_SWCLK)
+#define LINE_DRIVE_PWM2B            PAL_LINE(GPIOA, GPIOA_DRIVE_PWM2B)
+
+#define LINE_DRIVE_SENSE2           PAL_LINE(GPIOB, GPIOB_DRIVE_SENSE2)
+#define LINE_POWER_EN               PAL_LINE(GPIOB, GPIOB_POWER_EN)
+#define LINE_DRIVE_PWM2A            PAL_LINE(GPIOB, GPIOB_DRIVE_PWM2A)
+#define LINE_COMPASS_DRDY           PAL_LINE(GPIOB, GPIOB_COMPASS_DRDY)
+#define LINE_DRIVE_ENC1A            PAL_LINE(GPIOB, GPIOB_DRIVE_ENC1A)
+#define LINE_DRIVE_ENC1B            PAL_LINE(GPIOB, GPIOB_DRIVE_ENC1B)
+#define LINE_COMPASS_SCL            PAL_LINE(GPIOB, GPIOB_COMPASS_SCL)
+#define LINE_COMPASS_SDA            PAL_LINE(GPIOB, GPIOB_COMPASS_SDA)
+#define LINE_IR_SCL                 PAL_LINE(GPIOB, GPIOB_IR_SCL)
+#define LINE_IR_SDA                 PAL_LINE(GPIOB, GPIOB_IR_SDA)
+#define LINE_IR_INT                 PAL_LINE(GPIOB, GPIOB_IR_INT)
+#define LINE_GYRO_DRDY              PAL_LINE(GPIOB, GPIOB_GYRO_DRDY)
+#define LINE_SYS_UART_UP            PAL_LINE(GPIOB, GPIOB_SYS_UART_UP)
+#define LINE_ACCEL_INT_N            PAL_LINE(GPIOB, GPIOB_ACCEL_INT_N)
+
+#define LINE_DRIVE_SENSE1           PAL_LINE(GPIOC, GPIOC_DRIVE_SENSE1)
+#define LINE_SYS_INT_N              PAL_LINE(GPIOC, GPIOC_SYS_INT_N)
+#define LINE_PATH_DCSTAT            PAL_LINE(GPIOC, GPIOC_PATH_DCSTAT)
+#define LINE_PATH_DCEN              PAL_LINE(GPIOC, GPIOC_PATH_DCEN)
+#define LINE_DRIVE_ENC2B            PAL_LINE(GPIOC, GPIOC_DRIVE_ENC2B)
+#define LINE_DRIVE_ENC2A            PAL_LINE(GPIOC, GPIOC_DRIVE_ENC2A)
+#define LINE_SYS_PD_N               PAL_LINE(GPIOC, GPIOC_SYS_PD_N)
+#define LINE_SYS_REG_EN             PAL_LINE(GPIOC, GPIOC_SYS_REG_EN)
+#define LINE_SYS_UART_RX            PAL_LINE(GPIOC, GPIOC_SYS_UART_RX)
+#define LINE_SYS_UART_TX            PAL_LINE(GPIOC, GPIOC_SYS_UART_TX)
+#define LINE_ACCEL_SS_N             PAL_LINE(GPIOC, GPIOC_ACCEL_SS_N)
+#define LINE_GYRO_SS_N              PAL_LINE(GPIOC, GPIOC_GYRO_SS_N)
+
+#define LINE_OSC_IN                 PAL_LINE(GPIOD, GPIOD_OSC_IN)
+#define LINE_OSC_OUT                PAL_LINE(GPIOD, GPIOD_OSC_OUT)
+#define LINE_SYS_WARMRST_N          PAL_LINE(GPIOD, GPIOD_SYS_WARMRST_N)
+
+/*
+ * I/O ports initial setup, this configuration is established soon after reset
+ * in the initialization code.
+ * Please refer to the STM32 Reference Manual for details.
+ */
+#define PIN_MODE_INPUT              0U
+#define PIN_MODE_OUTPUT_2M          2U
+#define PIN_MODE_OUTPUT_10M         1U
+#define PIN_MODE_OUTPUT_50M         3U
+#define PIN_CNF_INPUT_ANALOG        0U
+#define PIN_CNF_INPUT_FLOATING      1U
+#define PIN_CNF_INPUT_PULLX         2U
+#define PIN_CNF_OUTPUT_PUSHPULL     0U
+#define PIN_CNF_OUTPUT_OPENDRAIN    1U
+#define PIN_CNF_ALTERNATE_PUSHPULL  2U
+#define PIN_CNF_ALTERNATE_OPENDRAIN 3U
+#define PIN_CR(pin, mode, cnf)      (((mode) | ((cnf) << 2U)) << (((pin) % 8U) * 4U))
+#define PIN_ODR_LOW(n)              (0U << (n))
+#define PIN_ODR_HIGH(n)             (1U << (n))
+
+/*
+ * GPIOA setup:
+ *
+ * PA0  - WKUP                      (input floating)
+ * PA1  - LED                       (output opendrain high 50MHz)
+ * PA2  - DRIVE_PWM1A               (alternate pushpull 50MHz)
+ * PA3  - DRIVE_PWM1B               (alternate pushpull 50MHz)
+ * PA4  - PIN4                      (input floating)
+ * PA5  - MOTION_SCLK               (alternate pushpull 50MHz)
+ * PA6  - MOTION_MISO               (input pullup)
+ * PA7  - MOTION_MOSI               (alternate pushpull 50MHz)
+ * PA8  - PIN8                      (input floating)
+ * PA9  - PROG_RX                   (alternate pushpull 50MHz)
+ * PA10 - PROG_TX                   (input pullup)
+ * PA11 - CAN_RX                    (input pullup)
+ * PA12 - CAN_TX                    (input floating)
+ * PA13 - SWDIO                     (input pullup)
+ * PA14 - SWCLK                     (input pullup)
+ * PA15 - DRIVE_PWM2B               (alternate pushpull 50MHz)
+ */
+#define VAL_GPIOACRL                (PIN_CR(GPIOA_WKUP, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOA_LED, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |            \
+                                     PIN_CR(GPIOA_DRIVE_PWM1A, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |  \
+                                     PIN_CR(GPIOA_DRIVE_PWM1B, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |  \
+                                     PIN_CR(GPIOA_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOA_MOTION_SCLK, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |  \
+                                     PIN_CR(GPIOA_MOTION_MISO, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |              \
+                                     PIN_CR(GPIOA_MOTION_MOSI, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL))
+#define VAL_GPIOACRH                (PIN_CR(GPIOA_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOA_PROG_RX, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |      \
+                                     PIN_CR(GPIOA_PROG_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                  \
+                                     PIN_CR(GPIOA_CAN_RX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                   \
+                                     PIN_CR(GPIOA_CAN_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOA_SWDIO, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                    \
+                                     PIN_CR(GPIOA_SWCLK, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                    \
+                                     PIN_CR(GPIOA_DRIVE_PWM2B, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL))
+#define VAL_GPIOAODR                (PIN_ODR_HIGH(GPIOA_WKUP) |                                                    \
+                                     PIN_ODR_HIGH(GPIOA_LED) |                                                     \
+                                     PIN_ODR_HIGH(GPIOA_DRIVE_PWM1A) |                                             \
+                                     PIN_ODR_HIGH(GPIOA_DRIVE_PWM1B) |                                             \
+                                     PIN_ODR_LOW(GPIOA_PIN4) |                                                     \
+                                     PIN_ODR_HIGH(GPIOA_MOTION_SCLK) |                                             \
+                                     PIN_ODR_HIGH(GPIOA_MOTION_MISO) |                                             \
+                                     PIN_ODR_HIGH(GPIOA_MOTION_MOSI) |                                             \
+                                     PIN_ODR_LOW(GPIOA_PIN8) |                                                     \
+                                     PIN_ODR_HIGH(GPIOA_PROG_RX) |                                                 \
+                                     PIN_ODR_HIGH(GPIOA_PROG_TX) |                                                 \
+                                     PIN_ODR_HIGH(GPIOA_CAN_RX) |                                                  \
+                                     PIN_ODR_HIGH(GPIOA_CAN_TX) |                                                  \
+                                     PIN_ODR_HIGH(GPIOA_SWDIO) |                                                   \
+                                     PIN_ODR_HIGH(GPIOA_SWCLK) |                                                   \
+                                     PIN_ODR_HIGH(GPIOA_DRIVE_PWM2B))
+
+/*
+ * GPIOB setup:
+ *
+ * PB0  - PIN0                      (input floating)
+ * PB1  - DRIVE_SENSE2              (input analog)
+ * PB2  - POWER_EN                  (output pushpull low 50MHz)
+ * PB3  - DRIVE_PWM2A               (alternate pushpull 50MHz)
+ * PB4  - PIN4                      (input floating)
+ * PB5  - COMPASS_DRDY              (input pullup)
+ * PB6  - DRIVE_ENC1A               (input floating)
+ * PB7  - DRIVE_ENC1B               (input floating)
+ * PB8  - COMPASS_SCL               (alternate opendrain 50MHz)
+ * PB9  - COMPASS_SDA               (alternate opendrain 50MHz)
+ * PB10 - IR_SCL                    (alternate opendrain 50MHz)
+ * PB11 - IR_SDA                    (alternate opendrain 50MHz)
+ * PB12 - IR_INT                    (input pullup)
+ * PB13 - GYRO_DRDY                 (input pullup)
+ * PB14 - SYS_UART_UP               (output opendrain high 50MHz)
+ * PB15 - ACCEL_INT_N               (input pullup)
+ */
+#define VAL_GPIOBCRL                (PIN_CR(GPIOB_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOB_DRIVE_SENSE2, PIN_MODE_INPUT, PIN_CNF_INPUT_ANALOG) |            \
+                                     PIN_CR(GPIOB_POWER_EN, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |        \
+                                     PIN_CR(GPIOB_DRIVE_PWM2A, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |  \
+                                     PIN_CR(GPIOB_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOB_COMPASS_DRDY, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |             \
+                                     PIN_CR(GPIOB_DRIVE_ENC1A, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
+                                     PIN_CR(GPIOB_DRIVE_ENC1B, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIOBCRH                (PIN_CR(GPIOB_COMPASS_SCL, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) | \
+                                     PIN_CR(GPIOB_COMPASS_SDA, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) | \
+                                     PIN_CR(GPIOB_IR_SCL, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) |      \
+                                     PIN_CR(GPIOB_IR_SDA, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) |      \
+                                     PIN_CR(GPIOB_IR_INT, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOB_GYRO_DRDY, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                \
+                                     PIN_CR(GPIOB_SYS_UART_UP, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |    \
+                                     PIN_CR(GPIOB_ACCEL_INT_N, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX))
+#define VAL_GPIOBODR                (PIN_ODR_LOW(GPIOB_PIN0) |                                                     \
+                                     PIN_ODR_HIGH(GPIOB_DRIVE_SENSE2) |                                            \
+                                     PIN_ODR_LOW(GPIOB_POWER_EN) |                                                 \
+                                     PIN_ODR_HIGH(GPIOB_DRIVE_PWM2A) |                                             \
+                                     PIN_ODR_LOW(GPIOB_PIN4) |                                                     \
+                                     PIN_ODR_HIGH(GPIOB_COMPASS_DRDY) |                                            \
+                                     PIN_ODR_HIGH(GPIOB_DRIVE_ENC1A) |                                             \
+                                     PIN_ODR_HIGH(GPIOB_DRIVE_ENC1B) |                                             \
+                                     PIN_ODR_HIGH(GPIOB_COMPASS_SCL) |                                             \
+                                     PIN_ODR_HIGH(GPIOB_COMPASS_SDA) |                                             \
+                                     PIN_ODR_HIGH(GPIOB_IR_SCL) |                                                  \
+                                     PIN_ODR_HIGH(GPIOB_IR_SDA) |                                                  \
+                                     PIN_ODR_HIGH(GPIOB_IR_INT) |                                                  \
+                                     PIN_ODR_HIGH(GPIOB_GYRO_DRDY) |                                               \
+                                     PIN_ODR_HIGH(GPIOB_SYS_UART_UP) |                                             \
+                                     PIN_ODR_HIGH(GPIOB_ACCEL_INT_N))
+
+/*
+ * GPIOC setup:
+ *
+ * PC0  - DRIVE_SENSE1              (input analog)
+ * PC1  - SYS_INT_N                 (output opendrain low 50MHz)
+ * PC2  - PIN2                      (input floating)
+ * PC3  - PATH_DCSTAT               (input floating)
+ * PC4  - PIN4                      (input floating)
+ * PC5  - PATH_DCEN                 (output pushpull low 50MHz)
+ * PC6  - DRIVE_ENC2B               (input floating)
+ * PC7  - DRIVE_ENC2A               (input floating)
+ * PC8  - SYS_PD_N                  (output opendrain high 50MHz)
+ * PC9  - SYS_REG_EN                (input floating)
+ * PC10 - SYS_UART_RX               (input floating)
+ * PC11 - SYS_UART_TX               (input floating)
+ * PC12 - PIN12                     (input pullup)
+ * PC13 - ACCEL_SS_N                (output pushpull high 50MHz)
+ * PC14 - GYRO_SS_N                 (output pushpull high 50MHz)
+ * PC15 - PIN15                     (input floating)
+ */
+#define VAL_GPIOCCRL                (PIN_CR(GPIOC_DRIVE_SENSE1, PIN_MODE_INPUT, PIN_CNF_INPUT_ANALOG) |            \
+                                     PIN_CR(GPIOC_SYS_INT_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |           \
+                                     PIN_CR(GPIOC_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOC_PATH_DCSTAT, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
+                                     PIN_CR(GPIOC_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOC_PATH_DCEN, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |       \
+                                     PIN_CR(GPIOC_DRIVE_ENC2B, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
+                                     PIN_CR(GPIOC_DRIVE_ENC2A, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIOCCRH                (PIN_CR(GPIOC_SYS_PD_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |       \
+                                     PIN_CR(GPIOC_SYS_REG_EN, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |            \
+                                     PIN_CR(GPIOC_SYS_UART_RX, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
+                                     PIN_CR(GPIOC_SYS_UART_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
+                                     PIN_CR(GPIOC_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOC_ACCEL_SS_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |      \
+                                     PIN_CR(GPIOC_GYRO_SS_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |       \
+                                     PIN_CR(GPIOC_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIOCODR                (PIN_ODR_HIGH(GPIOC_DRIVE_SENSE1) |                                            \
+                                     PIN_ODR_LOW(GPIOC_SYS_INT_N) |                                                \
+                                     PIN_ODR_LOW(GPIOC_PIN2) |                                                     \
+                                     PIN_ODR_HIGH(GPIOC_PATH_DCSTAT) |                                             \
+                                     PIN_ODR_LOW(GPIOC_PIN4) |                                                     \
+                                     PIN_ODR_LOW(GPIOC_PATH_DCEN) |                                                \
+                                     PIN_ODR_HIGH(GPIOC_DRIVE_ENC2B) |                                             \
+                                     PIN_ODR_HIGH(GPIOC_DRIVE_ENC2A) |                                             \
+                                     PIN_ODR_HIGH(GPIOC_SYS_PD_N) |                                                \
+                                     PIN_ODR_HIGH(GPIOC_SYS_REG_EN) |                                              \
+                                     PIN_ODR_HIGH(GPIOC_SYS_UART_RX) |                                             \
+                                     PIN_ODR_HIGH(GPIOC_SYS_UART_TX) |                                             \
+                                     PIN_ODR_LOW(GPIOC_PIN12) |                                                    \
+                                     PIN_ODR_HIGH(GPIOC_ACCEL_SS_N) |                                              \
+                                     PIN_ODR_HIGH(GPIOC_GYRO_SS_N) |                                               \
+                                     PIN_ODR_LOW(GPIOC_PIN15))
+
+/*
+ * GPIOD setup:
+ *
+ * PD0  - OSC_IN                    (input floating)
+ * PD1  - OSC_OUT                   (input floating)
+ * PD2  - SYS_WARMRST_N             (output opendrain high 50MHz)
+ * PD3  - PIN3                      (input floating)
+ * PD4  - PIN4                      (input floating)
+ * PD5  - PIN5                      (input floating)
+ * PD6  - PIN6                      (input floating)
+ * PD7  - PIN7                      (input floating)
+ * PD8  - PIN8                      (input floating)
+ * PD9  - PIN9                      (input floating)
+ * PD10 - PIN10                     (input floating)
+ * PD11 - PIN11                     (input floating)
+ * PD12 - PIN12                     (input floating)
+ * PD13 - PIN13                     (input floating)
+ * PD14 - PIN14                     (input floating)
+ * PD15 - PIN15                     (input floating)
+ */
+#define VAL_GPIODCRL                (PIN_CR(GPIOD_OSC_IN, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOD_OSC_OUT, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
+                                     PIN_CR(GPIOD_SYS_WARMRST_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |  \
+                                     PIN_CR(GPIOD_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOD_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOD_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOD_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOD_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIODCRH                (PIN_CR(GPIOD_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOD_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOD_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOD_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOD_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOD_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOD_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOD_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIODODR                (PIN_ODR_HIGH(GPIOD_OSC_IN) |                                                  \
+                                     PIN_ODR_HIGH(GPIOD_OSC_OUT) |                                                 \
+                                     PIN_ODR_HIGH(GPIOD_SYS_WARMRST_N) |                                           \
+                                     PIN_ODR_LOW(GPIOD_PIN3) |                                                     \
+                                     PIN_ODR_LOW(GPIOD_PIN4) |                                                     \
+                                     PIN_ODR_LOW(GPIOD_PIN5) |                                                     \
+                                     PIN_ODR_LOW(GPIOD_PIN6) |                                                     \
+                                     PIN_ODR_LOW(GPIOD_PIN7) |                                                     \
+                                     PIN_ODR_LOW(GPIOD_PIN8) |                                                     \
+                                     PIN_ODR_LOW(GPIOD_PIN9) |                                                     \
+                                     PIN_ODR_LOW(GPIOD_PIN10) |                                                    \
+                                     PIN_ODR_LOW(GPIOD_PIN11) |                                                    \
+                                     PIN_ODR_LOW(GPIOD_PIN12) |                                                    \
+                                     PIN_ODR_LOW(GPIOD_PIN13) |                                                    \
+                                     PIN_ODR_LOW(GPIOD_PIN14) |                                                    \
+                                     PIN_ODR_LOW(GPIOD_PIN15))
+
+/*
+ * GPIOE setup:
+ *
+ * PE0  - PIN0                      (input floating)
+ * PE1  - PIN1                      (input floating)
+ * PE2  - PIN2                      (input floating)
+ * PE3  - PIN3                      (input floating)
+ * PE4  - PIN4                      (input floating)
+ * PE5  - PIN5                      (input floating)
+ * PE6  - PIN6                      (input floating)
+ * PE7  - PIN7                      (input floating)
+ * PE8  - PIN8                      (input floating)
+ * PE9  - PIN9                      (input floating)
+ * PE10 - PIN10                     (input floating)
+ * PE11 - PIN11                     (input floating)
+ * PE12 - PIN12                     (input floating)
+ * PE13 - PIN13                     (input floating)
+ * PE14 - PIN14                     (input floating)
+ * PE15 - PIN15                     (input floating)
+ */
+#define VAL_GPIOECRL                (PIN_CR(GPIOE_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOE_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOE_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOE_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOE_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOE_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOE_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOE_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIOECRH                (PIN_CR(GPIOE_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOE_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOE_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOE_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOE_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOE_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOE_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOE_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIOEODR                (PIN_ODR_LOW(GPIOE_PIN0) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN1) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN2) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN3) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN4) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN5) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN6) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN7) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN8) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN9) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN10) |                                                    \
+                                     PIN_ODR_LOW(GPIOE_PIN11) |                                                    \
+                                     PIN_ODR_LOW(GPIOE_PIN12) |                                                    \
+                                     PIN_ODR_LOW(GPIOE_PIN13) |                                                    \
+                                     PIN_ODR_LOW(GPIOE_PIN14) |                                                    \
+                                     PIN_ODR_LOW(GPIOE_PIN15))
+
+/*
+ * GPIOF setup:
+ *
+ * PF0  - PIN0                      (input floating)
+ * PF1  - PIN1                      (input floating)
+ * PF2  - PIN2                      (input floating)
+ * PF3  - PIN3                      (input floating)
+ * PF4  - PIN4                      (input floating)
+ * PF5  - PIN5                      (input floating)
+ * PF6  - PIN6                      (input floating)
+ * PF7  - PIN7                      (input floating)
+ * PF8  - PIN8                      (input floating)
+ * PF9  - PIN9                      (input floating)
+ * PF10 - PIN10                     (input floating)
+ * PF11 - PIN11                     (input floating)
+ * PF12 - PIN12                     (input floating)
+ * PF13 - PIN13                     (input floating)
+ * PF14 - PIN14                     (input floating)
+ * PF15 - PIN15                     (input floating)
+ */
+#define VAL_GPIOFCRL                (PIN_CR(GPIOF_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOF_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOF_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOF_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOF_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOF_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOF_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOF_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIOFCRH                (PIN_CR(GPIOF_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOF_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOF_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOF_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOF_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOF_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOF_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOF_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIOFODR                (PIN_ODR_LOW(GPIOF_PIN0) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN1) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN2) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN3) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN4) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN5) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN6) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN7) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN8) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN9) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN10) |                                                    \
+                                     PIN_ODR_LOW(GPIOF_PIN11) |                                                    \
+                                     PIN_ODR_LOW(GPIOF_PIN12) |                                                    \
+                                     PIN_ODR_LOW(GPIOF_PIN13) |                                                    \
+                                     PIN_ODR_LOW(GPIOF_PIN14) |                                                    \
+                                     PIN_ODR_LOW(GPIOF_PIN15))
+
+/*
+ * GPIOG setup:
+ *
+ * PG0  - PIN0                      (input floating)
+ * PG1  - PIN1                      (input floating)
+ * PG2  - PIN2                      (input floating)
+ * PG3  - PIN3                      (input floating)
+ * PG4  - PIN4                      (input floating)
+ * PG5  - PIN5                      (input floating)
+ * PG6  - PIN6                      (input floating)
+ * PG7  - PIN7                      (input floating)
+ * PG8  - PIN8                      (input floating)
+ * PG9  - PIN9                      (input floating)
+ * PG10 - PIN10                     (input floating)
+ * PG11 - PIN11                     (input floating)
+ * PG12 - PIN12                     (input floating)
+ * PG13 - PIN13                     (input floating)
+ * PG14 - PIN14                     (input floating)
+ * PG15 - PIN15                     (input floating)
+ */
+#define VAL_GPIOGCRL                (PIN_CR(GPIOG_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOG_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOG_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOG_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOG_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOG_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOG_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOG_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIOGCRH                (PIN_CR(GPIOG_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOG_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOG_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOG_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOG_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOG_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOG_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOG_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIOGODR                (PIN_ODR_LOW(GPIOG_PIN0) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN1) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN2) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN3) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN4) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN5) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN6) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN7) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN8) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN9) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN10) |                                                    \
+                                     PIN_ODR_LOW(GPIOG_PIN11) |                                                    \
+                                     PIN_ODR_LOW(GPIOG_PIN12) |                                                    \
+                                     PIN_ODR_LOW(GPIOG_PIN13) |                                                    \
+                                     PIN_ODR_LOW(GPIOG_PIN14) |                                                    \
+                                     PIN_ODR_LOW(GPIOG_PIN15))
+
+#if !defined(_FROM_ASM_)
+#ifdef __cplusplus
+extern "C" {
+#endif
+  void boardInit(void);
+#ifdef __cplusplus
+}
+#endif
+#endif /* _FROM_ASM_ */
+
+#endif /* _BOARD_H_ */
diff --git a/modules/DiWheelDrive_1-1/board.mk b/modules/DiWheelDrive_1-1/board.mk
new file mode 100644
index 0000000..7a12204
--- /dev/null
+++ b/modules/DiWheelDrive_1-1/board.mk
@@ -0,0 +1,36 @@
+################################################################################
+# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
+# (AMiRo) platform.                                                            #
+# Copyright (C) 2016..2018  Thomas Schöpping et al.                            #
+#                                                                              #
+# This program is free software: you can redistribute it and/or modify         #
+# it under the terms of the GNU General Public License as published by         #
+# the Free Software Foundation, either version 3 of the License, or            #
+# (at your option) any later version.                                          #
+#                                                                              #
+# This program is distributed in the hope that it will be useful,              #
+# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
+# GNU General Public License for more details.                                 #
+#                                                                              #
+# You should have received a copy of the GNU General Public License            #
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
+#                                                                              #
+# This research/work was supported by the Cluster of Excellence Cognitive      #
+# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
+# funded by the German Research Foundation (DFG).                              #
+################################################################################
+
+
+
+# absolute path to this directory
+BOARD_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
+
+# include paths
+BOARDINC = $(BOARD_DIR)
+
+# C source files
+BOARDSRC = $(BOARD_DIR)board.c
+
+# linker path
+BOARDLD = $(AMIROOS)/hal/ports
diff --git a/modules/DiWheelDrive_1-1/chconf.h b/modules/DiWheelDrive_1-1/chconf.h
new file mode 100644
index 0000000..e6d26b4
--- /dev/null
+++ b/modules/DiWheelDrive_1-1/chconf.h
@@ -0,0 +1,93 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file    os/modules/DiWheelDrive/chconf.h
+ * @brief   ChibiOS Configuration file for the DiWheelDrive v1.1 module.
+ * @details Contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef _CHCONF_H_
+#define _CHCONF_H_
+
+#include <aosconf.h>
+
+/*===========================================================================*/
+/**
+ * @name System timers settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   System time counter resolution.
+ * @note    Allowed values are 16 or 32 bits.
+ */
+#define CH_CFG_ST_RESOLUTION                16
+
+/**
+ * @brief   System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ *          setting also defines the system tick time unit.
+ */
+#if (AMIROOS_CFG_TESTS_ENABLE != true) || defined(__DOXYGEN__)
+#define CH_CFG_ST_FREQUENCY                 1000000UL
+#else
+#define CH_CFG_ST_FREQUENCY                 100000UL
+#endif
+
+/**
+ * @brief   Time delta constant for the tick-less mode.
+ * @note    If this value is zero then the system uses the classic
+ *          periodic tick. This value represents the minimum number
+ *          of ticks that is safe to specify in a timeout directive.
+ *          The value one is not valid, timeouts are rounded up to
+ *          this value.
+ */
+#if (AMIROOS_CFG_TESTS_ENABLE != true) || defined(__DOXYGEN__)
+#define CH_CFG_ST_TIMEDELTA                 10
+#else
+#define CH_CFG_ST_TIMEDELTA                 2
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Port specific settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   NVIC VTOR initialization offset.
+ * @details On initialization, the code at this address in the flash memory will be executed.
+ */
+#define CORTEX_VTOR_INIT 0x00006000U
+
+/** @} */
+
+#include <aos_chconf.h>
+
+#endif  /* _CHCONF_H_ */
+
+/** @} */
diff --git a/modules/DiWheelDrive_1-1/halconf.h b/modules/DiWheelDrive_1-1/halconf.h
new file mode 100644
index 0000000..2308fb7
--- /dev/null
+++ b/modules/DiWheelDrive_1-1/halconf.h
@@ -0,0 +1,388 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file    os/modules/DiWheelDrive/halconf.h
+ * @brief   HAL configuration header for the DiWheelDrive v1.1 module.
+ * @details HAL configuration file, this file allows to enable or disable the
+ *          various device drivers from your application. You may also use
+ *          this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef _HALCONF_H_
+#define _HALCONF_H_
+
+/**
+ * @brief   Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL                 TRUE
+#endif
+
+/**
+ * @brief   Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN                 TRUE
+#endif
+
+/**
+ * @brief   Enables the DAC subsystem.
+ */
+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
+#define HAL_USE_DAC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT                 TRUE
+#endif
+
+/**
+ * @brief   Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT                 FALSE
+#endif
+
+/**
+ * @brief   Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C                 TRUE
+#endif
+
+/**
+ * @brief   Enables the I2S subsystem.
+ */
+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
+#define HAL_USE_I2S                 FALSE
+#endif
+
+/**
+ * @brief   Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU                 FALSE
+#endif
+
+/**
+ * @brief   Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI             FALSE
+#endif
+
+/**
+ * @brief   Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM                 TRUE
+#endif
+
+/**
+ * @brief   Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC                 TRUE
+#endif
+
+/**
+ * @brief   Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL              TRUE
+#endif
+
+/**
+ * @brief   Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB          FALSE
+#endif
+
+/**
+ * @brief   Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI                 TRUE
+#endif
+
+/**
+ * @brief   Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART                FALSE
+#endif
+
+/**
+ * @brief   Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB                 FALSE
+#endif
+
+/**
+ * @brief   Enables the WDG subsystem.
+ */
+#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
+#define HAL_USE_WDG                 FALSE
+#endif
+
+/**
+ * @brief   Enables the QEI subsystem.
+ */
+#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__)
+#define HAL_USE_QEI                 TRUE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT                FALSE
+#endif
+
+/**
+ * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION    FALSE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE          FALSE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION    TRUE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
+#define MAC_USE_ZERO_COPY           FALSE
+#endif
+
+/**
+ * @brief   Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS              FALSE
+#endif
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings.                                          */
+/*===========================================================================*/
+
+/**
+ * @brief   Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ *          routines releasing some extra CPU time for the threads with
+ *          lower priority, this may slow down the driver a bit however.
+ *          This option is recommended also if the SPI driver does not
+ *          use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING            FALSE
+#endif
+
+/*===========================================================================*/
+/* SDC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Number of initialization attempts before rejecting the card.
+ * @note    Attempts are performed at 10mS intervals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY              100
+#endif
+
+/**
+ * @brief   Include support for MMC cards.
+ * @note    MMC support is not yet implemented so this option must be kept
+ *          at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT             FALSE
+#endif
+
+/**
+ * @brief   Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ *          routines releasing some extra CPU time for the threads with
+ *          lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING            FALSE
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings.                                           */
+/*===========================================================================*/
+
+/**
+ * @brief   Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ *          default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE      115200
+#endif
+
+/**
+ * @brief   Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ *          buffers depending on the requirements of your application.
+ * @note    The default is 16 bytes for both the transmission and receive
+ *          buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE         16
+#endif
+
+/*===========================================================================*/
+/* SERIAL_USB driver related setting.                                        */
+/*===========================================================================*/
+
+/**
+ * @brief   Serial over USB buffers size.
+ * @details Configuration parameter, the buffer size must be a multiple of
+ *          the USB data endpoint maximum packet size.
+ * @note    The default is 256 bytes for both the transmission and receive
+ *          buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_SIZE     256
+#endif
+
+/**
+ * @brief   Serial over USB number of buffers.
+ * @note    The default is 2 buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_NUMBER   2
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT                TRUE
+#endif
+
+/**
+ * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION    TRUE
+#endif
+
+/*===========================================================================*/
+/* UART driver related settings.                                             */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
+#define UART_USE_WAIT               FALSE
+#endif
+
+/**
+ * @brief   Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define UART_USE_MUTUAL_EXCLUSION   FALSE
+#endif
+
+/*===========================================================================*/
+/* USB driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
+#define USB_USE_WAIT                FALSE
+#endif
+
+#endif /* _HALCONF_H_ */
+
+/** @} */
diff --git a/modules/DiWheelDrive_1-1/mcuconf.h b/modules/DiWheelDrive_1-1/mcuconf.h
new file mode 100644
index 0000000..272beb0
--- /dev/null
+++ b/modules/DiWheelDrive_1-1/mcuconf.h
@@ -0,0 +1,227 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _MCUCONF_H_
+#define _MCUCONF_H_
+
+#define STM32F103_MCUCONF
+
+/*
+ * STM32F103 drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 15...0       Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3        Lowest...Highest.
+ */
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
+#define STM32_SW                            STM32_SW_PLL
+#define STM32_PLLSRC                        STM32_PLLSRC_HSE
+#define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE                  9
+#define STM32_HPRE                          STM32_HPRE_DIV1
+#define STM32_PPRE1                         STM32_PPRE1_DIV2
+#define STM32_PPRE2                         STM32_PPRE2_DIV2
+#define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
+#define STM32_USBPRE                        STM32_USBPRE_DIV1P5
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
+#define STM32_PVD_ENABLE                    FALSE
+#define STM32_PLS                           STM32_PLS_LEV0
+
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_USE_ADC1                  FALSE
+#define STM32_ADC_ADC1_DMA_PRIORITY         2
+#define STM32_ADC_ADC1_IRQ_PRIORITY         6
+
+/*
+ * CAN driver system settings.
+ */
+#define STM32_CAN_USE_CAN1                  TRUE
+#define STM32_CAN_CAN1_IRQ_PRIORITY         11
+
+/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY       6
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1                  FALSE
+#define STM32_GPT_USE_TIM2                  FALSE
+#define STM32_GPT_USE_TIM3                  FALSE
+#define STM32_GPT_USE_TIM4                  FALSE
+#define STM32_GPT_USE_TIM5                  FALSE
+#define STM32_GPT_USE_TIM8                  FALSE
+#define STM32_GPT_TIM1_IRQ_PRIORITY         7
+#define STM32_GPT_TIM2_IRQ_PRIORITY         7
+#define STM32_GPT_TIM3_IRQ_PRIORITY         7
+#define STM32_GPT_TIM4_IRQ_PRIORITY         7
+#define STM32_GPT_TIM5_IRQ_PRIORITY         7
+#define STM32_GPT_TIM8_IRQ_PRIORITY         7
+
+/*
+ * I2C driver system settings.
+ */
+#define STM32_I2C_USE_I2C1                  TRUE
+#define STM32_I2C_USE_I2C2                  TRUE
+#define STM32_I2C_BUSY_TIMEOUT              50
+#define STM32_I2C_I2C1_IRQ_PRIORITY         5
+#define STM32_I2C_I2C2_IRQ_PRIORITY         5
+#define STM32_I2C_I2C1_DMA_PRIORITY         3
+#define STM32_I2C_I2C2_DMA_PRIORITY         3
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
+#define STM32_I2C_USE_DMA                   FALSE
+
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1                  FALSE
+#define STM32_ICU_USE_TIM2                  FALSE
+#define STM32_ICU_USE_TIM3                  FALSE
+#define STM32_ICU_USE_TIM4                  FALSE
+#define STM32_ICU_USE_TIM5                  FALSE
+#define STM32_ICU_USE_TIM8                  FALSE
+#define STM32_ICU_TIM1_IRQ_PRIORITY         7
+#define STM32_ICU_TIM2_IRQ_PRIORITY         7
+#define STM32_ICU_TIM3_IRQ_PRIORITY         7
+#define STM32_ICU_TIM4_IRQ_PRIORITY         7
+#define STM32_ICU_TIM5_IRQ_PRIORITY         7
+#define STM32_ICU_TIM8_IRQ_PRIORITY         7
+
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED              FALSE
+#define STM32_PWM_USE_TIM1                  FALSE
+#define STM32_PWM_USE_TIM2                  TRUE
+#define STM32_PWM_USE_TIM3                  FALSE
+#define STM32_PWM_USE_TIM4                  FALSE
+#define STM32_PWM_USE_TIM5                  FALSE
+#define STM32_PWM_USE_TIM8                  FALSE
+#define STM32_PWM_TIM1_IRQ_PRIORITY         7
+#define STM32_PWM_TIM2_IRQ_PRIORITY         7
+#define STM32_PWM_TIM3_IRQ_PRIORITY         7
+#define STM32_PWM_TIM4_IRQ_PRIORITY         7
+#define STM32_PWM_TIM5_IRQ_PRIORITY         7
+#define STM32_PWM_TIM8_IRQ_PRIORITY         7
+
+/*
+ * RTC driver system settings.
+ */
+#define STM32_RTC_IRQ_PRIORITY              15
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1             TRUE
+#define STM32_SERIAL_USE_USART2             FALSE
+#define STM32_SERIAL_USE_USART3             FALSE
+#define STM32_SERIAL_USE_UART4              FALSE
+#define STM32_SERIAL_USE_UART5              FALSE
+#define STM32_SERIAL_USART1_PRIORITY        12
+#define STM32_SERIAL_USART2_PRIORITY        12
+#define STM32_SERIAL_USART3_PRIORITY        12
+#define STM32_SERIAL_UART4_PRIORITY         12
+#define STM32_SERIAL_UART5_PRIORITY         12
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1                  TRUE
+#define STM32_SPI_USE_SPI2                  FALSE
+#define STM32_SPI_USE_SPI3                  FALSE
+#define STM32_SPI_SPI1_DMA_PRIORITY         1
+#define STM32_SPI_SPI2_DMA_PRIORITY         1
+#define STM32_SPI_SPI3_DMA_PRIORITY         1
+#define STM32_SPI_SPI1_IRQ_PRIORITY         10
+#define STM32_SPI_SPI2_IRQ_PRIORITY         10
+#define STM32_SPI_SPI3_IRQ_PRIORITY         10
+#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
+
+/*
+ * ST driver system settings.
+ */
+#define STM32_ST_IRQ_PRIORITY               8
+#define STM32_ST_USE_TIMER                  5
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1               FALSE
+#define STM32_UART_USE_USART2               FALSE
+#define STM32_UART_USE_USART3               FALSE
+#define STM32_UART_USART1_IRQ_PRIORITY      12
+#define STM32_UART_USART2_IRQ_PRIORITY      12
+#define STM32_UART_USART3_IRQ_PRIORITY      12
+#define STM32_UART_USART1_DMA_PRIORITY      0
+#define STM32_UART_USART2_DMA_PRIORITY      0
+#define STM32_UART_USART3_DMA_PRIORITY      0
+#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
+
+/*
+ * USB driver system settings.
+ */
+#define STM32_USB_USE_USB1                  FALSE
+#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE
+#define STM32_USB_USB1_HP_IRQ_PRIORITY      13
+#define STM32_USB_USB1_LP_IRQ_PRIORITY      14
+
+/*
+ * WDG driver system settings.
+ */
+#define STM32_WDG_USE_IWDG                  FALSE
+
+/*
+ * QEI driver system settings.
+ */
+#define STM32_QEI_USE_TIM1                  FALSE
+#define STM32_QEI_USE_TIM2                  FALSE
+#define STM32_QEI_USE_TIM3                  TRUE
+#define STM32_QEI_USE_TIM4                  TRUE
+#define STM32_QEI_USE_TIM5                  FALSE
+#define STM32_QEI_USE_TIM8                  FALSE
+
+#endif /* _MCUCONF_H_ */
diff --git a/modules/DiWheelDrive_1-1/module.c b/modules/DiWheelDrive_1-1/module.c
new file mode 100644
index 0000000..989186d
--- /dev/null
+++ b/modules/DiWheelDrive_1-1/module.c
@@ -0,0 +1,778 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include "module.h"
+
+/*===========================================================================*/
+/**
+ * @name Module specific functions
+ * @{
+ */
+/*===========================================================================*/
+#include <amiroos.h>
+
+/**
+ * @brief   Interrupt service routine callback for I/O interrupt signals.
+ *
+ * @param   extp      EXT driver to handle the ISR.
+ * @param   channel   Channel on which the interrupt was encountered.
+ */
+static void _moduleIsrCallback(EXTDriver* extp, expchannel_t channel) {
+  (void)extp;
+
+  chSysLockFromISR();
+  chEvtBroadcastFlagsI(&aos.events.io.source, (1 << channel));
+  chSysUnlockFromISR();
+
+  return;
+}
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name ChibiOS/HAL configuration
+ * @{
+ */
+/*===========================================================================*/
+
+CANConfig moduleHalCanConfig = {
+  /* mcr  */ CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
+  /* btr  */ CAN_BTR_SJW(1) | CAN_BTR_TS2(2) | CAN_BTR_TS1(13) | CAN_BTR_BRP(1),
+};
+
+EXTConfig moduleHalExtConfig = {
+  /* channel configrations */ {
+    /* channel  0 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel  1 */ { // SYS_INT_N/SYS_SYNC_N: automatic interrupt on event
+      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel  2 */ { // SYS_WARMRST_N: automatic interrupt when activated
+      /* mode     */ EXT_MODE_GPIOD | EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel  3 */ { // PATH_DCSTAT: must be enabled explicitely when charging is in progress to detect unexpected voltage drop
+      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_FALLING_EDGE,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel  4 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel  5 */ { // COMPASS_DRDY: must be enabled explicitely
+      /* mode     */ EXT_MODE_GPIOB | APAL2CH_EDGE(HMC5883L_LLD_INT_EDGE),
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel  6 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel  7 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel  8 */ { // SYS_PD_N: automatic interrupt when activated
+      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel  9 */ { // SYS_REG_EN: automatic interrupt when activated
+      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel 10 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel 11 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel 12 */ { // IR_INT: must be enabled explicitely
+      /* mode     */ EXT_MODE_GPIOB | APAL2CH_EDGE(VCNL4020_LLD_INT_EDGE),
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel 13 */ { // GYRO_DRDY: must be enabled explicitely
+      /* mode     */ EXT_MODE_GPIOB | APAL2CH_EDGE(L3G4200D_LLD_INT_EDGE),
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel 14 */ { // SYS_UART_UP: automatic interrupt on event
+      /* mode     */ EXT_MODE_GPIOB | EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel 15 */ { // ACCEL_INT_N: must be enabled explicitely
+      /* mode     */ EXT_MODE_GPIOB | APAL2CH_EDGE(LIS331DLH_LLD_INT_EDGE),
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel 16 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel 17 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel 18 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+  },
+};
+
+I2CConfig moduleHalI2cCompassConfig = {
+  /* I²C mode   */ OPMODE_I2C,
+  /* frequency  */ 400000,
+  /* duty cycle */ FAST_DUTY_CYCLE_2,
+};
+
+I2CConfig moduleHalI2cProxEepromPwrmtrConfig = {
+  /* I²C mode   */ OPMODE_I2C,
+  /* frequency  */ 400000,
+  /* duty cycle */ FAST_DUTY_CYCLE_2,
+};
+
+PWMConfig moduleHalPwmDriveConfig = {
+  /* frequency              */ 7200000,
+  /* period                 */ 360,
+  /* callback               */ NULL,
+  /* channel configurations */ {
+    /* channel 0              */ {
+      /* mode                   */ PWM_OUTPUT_ACTIVE_HIGH,
+      /* callback               */ NULL
+    },
+    /* channel 1              */ {
+      /* mode                   */ PWM_OUTPUT_ACTIVE_HIGH,
+      /* callback               */ NULL
+    },
+    /* channel 2              */ {
+      /* mode                   */ PWM_OUTPUT_ACTIVE_HIGH,
+      /* callback               */ NULL
+    },
+    /* channel 3              */ {
+      /* mode                   */ PWM_OUTPUT_ACTIVE_HIGH,
+      /* callback               */ NULL
+    },
+  },
+  /* TIM CR2 register       */ 0,
+#if STM32_PWM_USE_ADVANCED
+  /* TIM BDTR register      */ 0,
+#endif
+  /* TIM DIER register      */ 0
+};
+
+QEIConfig moduleHalQeiConfig = {
+  /* mode           */ QEI_COUNT_BOTH,
+  /* channel config */ {
+    /* channel 0 */ {
+      /* input mode */ QEI_INPUT_NONINVERTED,
+    },
+    /* channel 1 */ {
+      /* input mode */ QEI_INPUT_NONINVERTED,
+    },
+  },
+  /* encoder range  */  0x10000u,
+};
+
+SerialConfig moduleHalProgIfConfig = {
+  /* bit rate */ 115200,
+  /* CR1      */ 0,
+  /* CR1      */ 0,
+  /* CR1      */ 0,
+};
+
+SPIConfig moduleHalSpiAccelerometerConfig = {
+  /* callback function pointer    */ NULL,
+  /* chip select line port        */ GPIOC,
+  /* chip select line pad number  */ GPIOC_ACCEL_SS_N,
+  /* CR1                          */ SPI_CR1_BR_0,
+  /* CR2                          */ SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN,
+};
+
+SPIConfig moduleHalSpiGyroscopeConfig = {
+  /* callback function pointer    */ NULL,
+  /* chip select line port        */ GPIOC,
+  /* chip select line pad number  */ GPIOC_GYRO_SS_N,
+  /* CR1                          */ SPI_CR1_BR_0,
+  /* CR2                          */ SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN,
+};
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name GPIO definitions
+ * @{
+ */
+/*===========================================================================*/
+
+apalGpio_t moduleGpioLed = {
+  /* port */ GPIOA,
+  /* pad  */ GPIOA_LED,
+};
+
+apalGpio_t moduleGpioPowerEn = {
+  /* port */GPIOB,
+  /* pad  */  GPIOB_POWER_EN,
+};
+
+apalGpio_t moduleGpioCompassDrdy = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_COMPASS_DRDY,
+};
+
+ apalGpio_t moduleGpioIrInt = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_IR_INT,
+};
+
+apalGpio_t moduleGpioGyroDrdy = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_GYRO_DRDY,
+};
+
+apalGpio_t moduleGpioSysUartUp = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_SYS_UART_UP,
+};
+
+apalGpio_t moduleGpioAccelInt = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_ACCEL_INT_N,
+};
+
+apalGpio_t moduleGpioSysSync = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_SYS_INT_N,
+};
+
+apalGpio_t moduleGpioPathDcStat = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_PATH_DCSTAT,
+};
+
+apalGpio_t moduleGpioPathDcEn = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_PATH_DCEN,
+};
+
+apalGpio_t moduleGpioSysPd = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_SYS_PD_N,
+};
+
+apalGpio_t moduleGpioSysRegEn = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_SYS_REG_EN,
+};
+
+apalGpio_t moduleGpioSysWarmrst = {
+  /* port */ GPIOD,
+  /* pad  */ GPIOD_SYS_WARMRST_N,
+};
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name AMiRo-OS core configurations
+ * @{
+ */
+/*===========================================================================*/
+
+apalControlGpio_t moduleSsspPd = {
+  /* GPIO */ &moduleGpioSysPd,
+  /* meta */ {
+    /* active state */ APAL_GPIO_ACTIVE_LOW,
+    /* edge         */ APAL_GPIO_EDGE_FALLING,
+    /* direction    */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
+  },
+};
+
+apalControlGpio_t moduleSsspSync = {
+  /* GPIO */ &moduleGpioSysSync,
+  /* meta */ {
+    /* active state */ APAL_GPIO_ACTIVE_LOW,
+    /* edge         */ APAL_GPIO_EDGE_FALLING,
+    /* direction    */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
+  },
+};
+
+const char* moduleShellPrompt = "DiWheelDrive";
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Low-level drivers
+ * @{
+ */
+/*===========================================================================*/
+
+A3906Driver moduleLldMotors = {
+  /* power enable GPIO  */ {
+    /* GPIO */& moduleGpioPowerEn,
+    /* meta */ {
+      /* active state */ APAL_GPIO_ACTIVE_HIGH,
+      /* edge         */ APAL_GPIO_EDGE_NONE,
+      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
+    },
+  },
+};
+
+AT24C01BNDriver moduleLldEeprom = {
+  /* I2C driver   */ &MODULE_HAL_I2C_PROX_EEPROM_PWRMTR,
+  /* I²C address  */ AT24C01BN_LLD_I2C_ADDR_FIXED,
+};
+
+HMC5883LDriver moduleLldCompass = {
+  /* I²C Driver */ &MODULE_HAL_I2C_COMPASS,
+};
+
+INA219Driver moduleLldPowerMonitorVdd = {
+  /* I2C Driver       */ &MODULE_HAL_I2C_PROX_EEPROM_PWRMTR,
+  /* I²C address      */ INA219_LLD_I2C_ADDR_FIXED,
+  /* current LSB (uA) */ 0x00u,
+  /* configuration    */ NULL,
+};
+
+L3G4200DDriver moduleLldGyroscope = {
+  /* SPI Driver */ &MODULE_HAL_SPI_MOTION,
+};
+
+LEDDriver moduleLldStatusLed = {
+  /* LED enable Gpio */ {
+    /* GPIO       */ &moduleGpioLed,
+    /* GPIO meta  */ {
+      /* active state */ APAL_GPIO_ACTIVE_LOW,
+      /* edge         */ APAL_GPIO_EDGE_NONE,
+      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
+    },
+  },
+};
+
+LIS331DLHDriver moduleLldAccelerometer = {
+  /* SPI Driver */ &MODULE_HAL_SPI_MOTION,
+};
+
+LTC4412Driver moduleLldPowerPathController = {
+  /* Control GPIO */ {
+    /* GPIO       */ &moduleGpioPathDcEn,
+    /* GPIO meta  */ {
+      /* active state */ APAL_GPIO_ACTIVE_HIGH,
+      /* edge         */ APAL_GPIO_EDGE_NONE,
+      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
+    },
+  },
+  /* Status GPIO */ {
+    /* GPIO       */ &moduleGpioPathDcStat,
+    /* GPIO meta  */ {
+      /* active state */ APAL_GPIO_ACTIVE_HIGH,
+      /* edge         */ APAL_GPIO_EDGE_NONE,
+      /* direction    */ APAL_GPIO_DIRECTION_INPUT,
+    },
+  },
+};
+
+PCA9544ADriver moduleLldI2cMultiplexer = {
+  /* I²C driver   */ &MODULE_HAL_I2C_PROX_EEPROM_PWRMTR,
+  /* I²C address  */ PCA9544A_LLD_I2C_ADDR_FIXED | PCA9544A_LLD_I2C_ADDR_A0 | PCA9544A_LLD_I2C_ADDR_A1 | PCA9544A_LLD_I2C_ADDR_A2,
+};
+
+TPS62113Driver moduleLldStepDownConverterVdrive = {
+  /* Power enable Gpio */ {
+    /* GPIO       */ &moduleGpioPowerEn,
+    /* GPIO meta  */ {
+      /* 'power on' state */ APAL_GPIO_ACTIVE_HIGH,
+      /* edge             */ APAL_GPIO_EDGE_NONE,
+      /* direction        */ APAL_GPIO_DIRECTION_OUTPUT,
+    },
+  },
+};
+
+VCNL4020Driver moduleLldProximity = {
+  /* I²C Driver */ &MODULE_HAL_I2C_PROX_EEPROM_PWRMTR,
+};
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Unit tests (UT)
+ * @{
+ */
+/*===========================================================================*/
+#if (AMIROOS_CFG_TESTS_ENABLE == true) || defined(__DOXYGEN__)
+#include <string.h>
+#include <chprintf.h>
+
+/* A3906 (motor driver) */
+static int _utShellCmdCb_AlldA3906(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldA3906, NULL);
+  return AOS_OK;
+}
+static ut_a3906data_t _utA3906Data = {
+  /* driver           */ &moduleLldMotors,
+  /* PWM information  */ {
+    /* driver   */ &MODULE_HAL_PWM_DRIVE,
+    /* channels */ {
+      /* left wheel forward   */ MODULE_HAL_PWM_DRIVE_CHANNEL_LEFT_FORWARD,
+      /* left wheel backward  */ MODULE_HAL_PWM_DRIVE_CHANNEL_LEFT_BACKWARD,
+      /* right wheel forward  */ MODULE_HAL_PWM_DRIVE_CHANNEL_RIGHT_FORWARD,
+      /* right wheel backward */ MODULE_HAL_PWM_DRIVE_CHANNEL_RIGHT_BACKWARD,
+    },
+  },
+  /* QEI information  */ {
+    /* left wheel               */ &MODULE_HAL_QEI_LEFT_WHEEL,
+    /* right wheel              */ &MODULE_HAL_QEI_RIGHT_WHEEL,
+    /* increment per revolution */ MODULE_HAL_QEI_INCREMENTS_PER_REVOLUTION,
+  },
+  /* Wheel diameter   */ 0.05571f,
+  /* timeout          */ 10* MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldA3906  = {
+  /* name           */ "A3906",
+  /* info           */ "motor driver",
+  /* test function  */ utAlldA3906Func,
+  /* shell command  */ {
+    /* name     */ "unittest:MotorDriver",
+    /* callback */ _utShellCmdCb_AlldA3906,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utA3906Data,
+};
+
+/* AT24C01BN (EEPROM) */
+static int _utShellCmdCb_AlldAt24c01bn(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldAt24c01bn, NULL);
+  return AOS_OK;
+}
+static ut_at24c01bndata_t _utAt24c01bnData = {
+  /* driver   */ &moduleLldEeprom,
+  /* timeout  */ MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldAt24c01bn = {
+  /* name           */ "AT24C01BN-SH-B",
+  /* info           */ "1kbit EEPROM",
+  /* test function  */ utAlldAt24c01bnFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:EEPROM",
+    /* callback */ _utShellCmdCb_AlldAt24c01bn,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAt24c01bnData,
+};
+
+/* HMC5883L (compass) */
+static int _utShellCmdCb_AlldHmc5883l(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  extChannelEnable(&MODULE_HAL_EXT, MODULE_GPIO_EXTCHANNEL_COMPASSDRDY);
+  aosUtRun(stream, &moduleUtAlldHmc5883l, NULL);
+  return AOS_OK;
+}
+static ut_hmc5883ldata_t _utHmc5883lData = {
+  /* HMC driver   */ &moduleLldCompass,
+  /* event source */ &aos.events.io.source,
+  /* event flags  */ (1 << MODULE_GPIO_EXTCHANNEL_COMPASSDRDY),
+  /* timeout      */ MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldHmc5883l = {
+  /* name           */ "HMC5883L",
+  /* info           */ "compass",
+  /* test function  */ utAlldHmc5883lFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:Compass",
+    /* callback */ _utShellCmdCb_AlldHmc5883l,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utHmc5883lData,
+};
+
+/* INA219 (power monitor) */
+static int _utShellCmdCb_AlldIna219(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldIna219, "VDD (3.3V)");
+  return AOS_OK;
+}
+static ut_ina219data_t _utIna219Data = {
+  /* driver           */ &moduleLldPowerMonitorVdd,
+  /* expected voltage */ 3.3f,
+  /* tolerance        */ 0.05f,
+  /* timeout */ MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldIna219 = {
+  /* name           */ "INA219",
+  /* info           */ "power monitor",
+  /* test function  */ utAlldIna219Func,
+  /* shell command  */ {
+    /* name     */ "unittest:PowerMonitor",
+    /* callback */ _utShellCmdCb_AlldIna219,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utIna219Data,
+};
+
+/* L3G4200D (gyroscope) */
+static int _utShellCmdCb_AlldL3g4200d(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  extChannelEnable(&MODULE_HAL_EXT, MODULE_GPIO_EXTCHANNEL_GYRODRDY);
+  spiStart(((ut_l3g4200ddata_t*)moduleUtAlldL3g4200d.data)->l3gd->spid, ((ut_l3g4200ddata_t*)moduleUtAlldL3g4200d.data)->spiconf);
+  aosUtRun(stream, &moduleUtAlldL3g4200d, NULL);
+  spiStop(((ut_l3g4200ddata_t*)moduleUtAlldL3g4200d.data)->l3gd->spid);
+  return AOS_OK;
+}
+static ut_l3g4200ddata_t _utL3g4200dData = {
+  /* driver            */ &moduleLldGyroscope,
+  /* SPI configuration */ &moduleHalSpiGyroscopeConfig,
+  /* event source */ &aos.events.io.source,
+  /* event flags  */ (1 << MODULE_GPIO_EXTCHANNEL_GYRODRDY),
+};
+aos_unittest_t moduleUtAlldL3g4200d = {
+  /* name           */ "L3G4200D",
+  /* info           */ "Gyroscope",
+  /* test function  */ utAlldL3g4200dFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:Gyroscope",
+    /* callback */ _utShellCmdCb_AlldL3g4200d,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utL3g4200dData,
+};
+
+/* Status LED */
+static int _utShellCmdCb_AlldLed(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldLed, NULL);
+  return AOS_OK;
+}
+aos_unittest_t moduleUtAlldLed = {
+  /* name           */ "LED",
+  /* info           */ NULL,
+  /* test function  */ utAlldLedFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:StatusLED",
+    /* callback */ _utShellCmdCb_AlldLed,
+    /* next     */ NULL,
+  },
+  /* data           */ &moduleLldStatusLed,
+};
+
+/* LIS331DLH (accelerometer) */
+static int _utShellCmdCb_AlldLis331dlh(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  extChannelEnable(&MODULE_HAL_EXT, MODULE_GPIO_EXTCHANNEL_ACCELINT);
+  spiStart(((ut_lis331dlhdata_t*)moduleUtAlldLis331dlh.data)->lisd->spid, ((ut_lis331dlhdata_t*)moduleUtAlldLis331dlh.data)->spiconf);
+  aosUtRun(stream, &moduleUtAlldLis331dlh, NULL);
+  spiStop(((ut_lis331dlhdata_t*)moduleUtAlldLis331dlh.data)->lisd->spid);
+  return AOS_OK;
+}
+static ut_lis331dlhdata_t _utLis331dlhData = {
+  /* driver            */ &moduleLldAccelerometer,
+  /* SPI configuration */ &moduleHalSpiAccelerometerConfig,
+  /* event source */ &aos.events.io.source,
+  /* event flags  */ (1 << MODULE_GPIO_EXTCHANNEL_ACCELINT),
+};
+aos_unittest_t moduleUtAlldLis331dlh = {
+  /* name           */ "LIS331DLH",
+  /* info           */ "Accelerometer",
+  /* test function  */ utAlldLis331dlhFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:Accelerometer",
+    /* callback */ _utShellCmdCb_AlldLis331dlh,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utLis331dlhData,
+};
+
+/* LTC4412 (power path controller) */
+static int _utShellCmdCb_AlldLtc4412(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldLtc4412, NULL);
+  return AOS_OK;
+}
+aos_unittest_t moduleUtAlldLtc4412 = {
+  /* name           */ "LTC4412",
+  /* info           */ "Power path controller",
+  /* test function  */ utAlldLtc4412Func,
+  /* shell command  */ {
+    /* name     */ "unittest:PowerPathController",
+    /* callback */ _utShellCmdCb_AlldLtc4412,
+    /* next     */ NULL,
+  },
+  /* data           */ &moduleLldPowerPathController,
+};
+
+/* PCA9544A (I2C multiplexer) */
+static int _utShellCmdCb_AlldPca9544a(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldPca9544a, NULL);
+  return AOS_OK;
+}
+static ut_pca9544adata_t _utPca9544aData = {
+  /* driver  */ &moduleLldI2cMultiplexer,
+  /* timeout */ MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldPca9544a = {
+  /* name           */ "PCA9544A",
+  /* info           */ "I2C multiplexer",
+  /* test function  */ utAlldPca9544aFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:I2CMultiplexer",
+    /* callback */ _utShellCmdCb_AlldPca9544a,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utPca9544aData,
+};
+
+/* TPS62113 (step-down converter) */
+static int _utShellCmdCb_AlldTps62113(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldTps62113, NULL);
+  return AOS_OK;
+}
+aos_unittest_t moduleUtAlldTps62113 = {
+  /* name           */ "TPS62113",
+  /* info           */ "Step down converter",
+  /* test function  */ utAlldTps62113Func,
+  /* shell command  */ {
+    /* name     */ "unittest:StepDownConverter",
+    /* callback */ _utShellCmdCb_AlldTps62113,
+    /* next     */ NULL,
+  },
+  /* data           */ &moduleLldStepDownConverterVdrive,
+};
+
+/* VCNL4020 (proximity sensor) */
+static void _utAlldVcnl4020_disableInterrupt(VCNL4020Driver* vcnl)
+{
+  uint8_t intstatus;
+  vcnl4020_lld_writereg(vcnl, VCNL4020_LLD_REGADDR_INTCTRL, 0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+  vcnl4020_lld_readreg(vcnl, VCNL4020_LLD_REGADDR_INTSTATUS, &intstatus, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+  if (intstatus) {
+    vcnl4020_lld_writereg(vcnl, VCNL4020_LLD_REGADDR_INTSTATUS, intstatus, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+  }
+  return;
+}
+static int _utShellCmdCb_AlldVcnl4020(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  enum {
+    UNKNOWN,
+    FL, FR, WL, WR,
+  } sensor = UNKNOWN;
+  // evaluate arguments
+  if (argc == 2) {
+    if (strcmp(argv[1], "--frontleft") == 0 || strcmp(argv[1], "-fl") == 0) {
+      sensor = FL;
+    } else if (strcmp(argv[1], "--frontright") == 0 || strcmp(argv[1], "-fr") == 0) {
+      sensor = FR;
+    } else if (strcmp(argv[1], "--wheelleft") == 0 || strcmp(argv[1], "-wl") == 0) {
+      sensor = WL;
+    } else if (strcmp(argv[1], "--wheelright") == 0 || strcmp(argv[1], "-wr") == 0) {
+      sensor = WR;
+    }
+  }
+  if (sensor != UNKNOWN) {
+    pca9544a_lld_setchannel(&moduleLldI2cMultiplexer, PCA9544A_LLD_CH0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
+    pca9544a_lld_setchannel(&moduleLldI2cMultiplexer, PCA9544A_LLD_CH1, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
+    pca9544a_lld_setchannel(&moduleLldI2cMultiplexer, PCA9544A_LLD_CH2, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
+    pca9544a_lld_setchannel(&moduleLldI2cMultiplexer, PCA9544A_LLD_CH3, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
+    extChannelEnable(&MODULE_HAL_EXT, MODULE_GPIO_EXTCHANNEL_IRINT);
+    switch (sensor) {
+      case FL:
+        pca9544a_lld_setchannel(&moduleLldI2cMultiplexer, PCA9544A_LLD_CH3, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "front left snesor");
+        break;
+      case FR:
+        pca9544a_lld_setchannel(&moduleLldI2cMultiplexer, PCA9544A_LLD_CH0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "front right sensor");
+        break;
+      case WL:
+        pca9544a_lld_setchannel(&moduleLldI2cMultiplexer, PCA9544A_LLD_CH2, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "left wheel sensor");
+        break;
+      case WR:
+        pca9544a_lld_setchannel(&moduleLldI2cMultiplexer, PCA9544A_LLD_CH1, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "right wheel sensor");
+        break;
+      default:
+        break;
+    }
+    return AOS_OK;
+  }
+  // print help
+  chprintf(stream, "Usage: %s OPTION\n", argv[0]);
+  chprintf(stream, "Options:\n");
+  chprintf(stream, "  --frontleft, -fl\n");
+  chprintf(stream, "    Test front left proximity sensor.\n");
+  chprintf(stream, "  --frontrigt, -fr\n");
+  chprintf(stream, "    Test front right proximity sensor.\n");
+  chprintf(stream, "  --wheelleft, -wl\n");
+  chprintf(stream, "    Test left wheel proximity sensor.\n");
+  chprintf(stream, "  --wheelright, -wr\n");
+  chprintf(stream, "    Test right wheel proximity sensor.\n");
+  return AOS_INVALID_ARGUMENTS;
+}
+static ut_vcnl4020data_t _utVcnl4020Data = {
+  /* driver       */ &moduleLldProximity,
+  /* timeout      */ MICROSECONDS_PER_SECOND,
+  /* event source */ &aos.events.io.source,
+  /* event flags  */ (1 << MODULE_GPIO_EXTCHANNEL_IRINT),
+};
+aos_unittest_t moduleUtAlldVcnl4020 = {
+  /* name           */ "VCNL4020",
+  /* info           */ "proximity sensor",
+  /* test function  */ utAlldVcnl4020Func,
+  /* shell command  */ {
+    /* name     */ "unittest:Proximity",
+    /* callback */ _utShellCmdCb_AlldVcnl4020,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utVcnl4020Data,
+};
+
+#endif /* AMIROOS_CFG_TESTS_ENABLE == true */
+
+/** @} */
diff --git a/modules/DiWheelDrive_1-1/module.h b/modules/DiWheelDrive_1-1/module.h
new file mode 100644
index 0000000..a4a0e7b
--- /dev/null
+++ b/modules/DiWheelDrive_1-1/module.h
@@ -0,0 +1,587 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _AMIROOS_MODULE_H_
+#define _AMIROOS_MODULE_H_
+
+/*===========================================================================*/
+/**
+ * @name Module specific functions
+ * @{
+ */
+/*===========================================================================*/
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name ChibiOS/HAL configuration
+ * @{
+ */
+/*===========================================================================*/
+#include <hal.h>
+#include <hal_qei.h>
+
+/**
+ * @brief   CAN driver to use.
+ */
+#define MODULE_HAL_CAN                          CAND1
+
+/**
+ * @brief   Configuration for the CAN driver.
+ */
+extern CANConfig moduleHalCanConfig;
+
+/**
+ * @brief   Interrupt driver to use.
+ */
+#define MODULE_HAL_EXT                          EXTD1
+
+/**
+ * @brief   Interrupt driver configuration.
+ */
+extern EXTConfig moduleHalExtConfig;
+
+/**
+ * @brief   I2C driver to access the compass.
+ */
+#define MODULE_HAL_I2C_COMPASS                  I2CD1
+
+/**
+ * @brief   Configuration for the compass I2C driver.
+ */
+extern I2CConfig moduleHalI2cCompassConfig;
+
+/**
+ * @brief   I2C driver to access multiplexer, proximity sensors, EEPROM and power monitor.
+ */
+#define MODULE_HAL_I2C_PROX_EEPROM_PWRMTR       I2CD2
+
+/**
+ * @brief   Configuration for the multiplexer, proximity, EEPROM and power monitor I2C driver.
+ */
+extern I2CConfig moduleHalI2cProxEepromPwrmtrConfig;
+
+/**
+ * @brief   PWM driver to use.
+ */
+#define MODULE_HAL_PWM_DRIVE                    PWMD2
+
+/**
+ * @brief   Configuration for the PWM driver.
+ */
+extern PWMConfig moduleHalPwmDriveConfig;
+
+/**
+ * @brief   Drive PWM channel for the left wheel forward direction.
+ */
+#define MODULE_HAL_PWM_DRIVE_CHANNEL_LEFT_FORWARD     0
+
+/**
+ * @brief   Drive PWM channel for the left wheel backward direction.
+ */
+#define MODULE_HAL_PWM_DRIVE_CHANNEL_LEFT_BACKWARD    1
+
+/**
+ * @brief   Drive PWM channel for the right wheel forward direction.
+ */
+#define MODULE_HAL_PWM_DRIVE_CHANNEL_RIGHT_FORWARD    2
+
+/**
+ * @brief   Drive PWM channel for the right wheel backward direction.
+ */
+#define MODULE_HAL_PWM_DRIVE_CHANNEL_RIGHT_BACKWARD   3
+
+/**
+ * @brief   Quadrature encooder for the left wheel.
+ */
+#define MODULE_HAL_QEI_LEFT_WHEEL               QEID3
+
+/**
+ * @brief   Quadrature encooder for the right wheel.
+ */
+#define MODULE_HAL_QEI_RIGHT_WHEEL              QEID4
+
+/**
+ * @brief   Configuration for both quadrature encoders.
+ */
+extern QEIConfig moduleHalQeiConfig;
+
+/**
+ * @brief   QEI increments per wheel revolution.
+ * @details 2 signal edges per pulse * 2 signals * 16 pulses per motor revolution * 22:1 gearbox
+ */
+#define MODULE_HAL_QEI_INCREMENTS_PER_REVOLUTION  (apalQEICount_t)(2 * 2 * 16 * 22)
+
+/**
+ * @brief   Serial driver of the programmer interface.
+ */
+#define MODULE_HAL_PROGIF                       SD1
+
+/**
+ * @brief   Configuration for the programmer serial interface driver.
+ */
+extern SerialConfig moduleHalProgIfConfig;
+
+/**
+ * @brief   SPI interface driver for the motion sensors (gyroscope and accelerometer).
+ */
+#define MODULE_HAL_SPI_MOTION                   SPID1
+
+/**
+ * @brief   Configuration for the motion sensor SPI interface  driver to communicate with the accelerometer.
+ */
+extern SPIConfig moduleHalSpiAccelerometerConfig;
+
+/**
+ * @brief   Configuration for the motion sensor SPI interface  driver to communicate with the gyroscope.
+ */
+extern SPIConfig moduleHalSpiGyroscopeConfig;
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name GPIO definitions
+ * @{
+ */
+/*===========================================================================*/
+#include <amiro-lld.h>
+
+/**
+ * @brief   Interrupt channel for the SYS_SYNC signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_SYSSYNC          ((expchannel_t)1)
+
+/**
+ * @brief   Interrupt channel for the SYS_WARMRST signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_SYSWARMRST       ((expchannel_t)2)
+
+/**
+ * @brief   Interrupt channel for the PATH_DCSTAT signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_PATHDCSTAT       ((expchannel_t)3)
+
+/**
+ * @brief   Interrupt channel for the COMPASS_DRDY signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_COMPASSDRDY      ((expchannel_t)5)
+
+/**
+ * @brief   Interrupt channel for the SYS_PD signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_SYSPD            ((expchannel_t)7)
+
+/**
+ * @brief   Interrupt channel for the SYS_REG_EN signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_SYSREGEN         ((expchannel_t)8)
+
+/**
+ * @brief   Interrupt channel for the IR_INT signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_IRINT            ((expchannel_t)12)
+
+/**
+ * @brief   Interrupt channel for the GYRO_DRDY signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_GYRODRDY         ((expchannel_t)13)
+
+/**
+ * @brief   Interrupt channel for the SYS_UART_UP signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_SYSUARTUP        ((expchannel_t)14)
+
+/**
+ * @brief   Interrupt channel for the ACCEL_INT signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_ACCELINT         ((expchannel_t)15)
+
+/**
+ * @brief   LED output signal GPIO.
+ */
+extern apalGpio_t moduleGpioLed;
+
+/**
+ * @brief   POWER_EN output signal GPIO.
+ */
+extern apalGpio_t moduleGpioPowerEn;
+
+/**
+ * @brief   COMPASS_DRDY input signal GPIO.
+ */
+extern apalGpio_t moduleGpioCompassDrdy;
+
+/**
+ * @brief   IR_INT input signal GPIO.
+ */
+extern apalGpio_t moduleGpioIrInt;
+
+/**
+ * @brief   GYRO_DRDY input signal GPIO.
+ */
+extern apalGpio_t moduleGpioGyroDrdy;
+
+/**
+ * @brief   SYS_UART_UP bidirectional signal GPIO.
+ */
+extern apalGpio_t moduleGpioSysUartUp;
+
+/**
+ * @brief   ACCEL_INT input signal GPIO.
+ */
+extern apalGpio_t moduleGpioAccelInt;
+
+/**
+ * @brief   SYS_SNYC bidirectional signal GPIO.
+ */
+extern apalGpio_t moduleGpioSysSync;
+
+/**
+ * @brief   PATH_DCSTAT input signal GPIO.
+ */
+extern apalGpio_t moduleGpioPathDcStat;
+
+/**
+ * @brief   PATH_DCEN output signal GPIO.
+ */
+extern apalGpio_t moduleGpioPathDcEn;
+
+/**
+ * @brief   SYS_PD bidirectional signal GPIO.
+ */
+extern apalGpio_t moduleGpioSysPd;
+
+/**
+ * @brief   SYS_REG_EN input signal GPIO.
+ */
+extern apalGpio_t moduleGpioSysRegEn;
+
+/**
+ * @brief   SYS_WARMRST bidirectional signal GPIO.
+ */
+extern apalGpio_t moduleGpioSysWarmrst;
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name AMiRo-OS core configurations
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Event flag to be set on a SYS_SYNC interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSSYNC          ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_SYSSYNC))
+
+/**
+ * @brief   Event flag to be set on a SYS_WARMRST interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSWARMRST       ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_SYSWARMRST))
+
+/**
+ * @brief   Event flag to be set on a PATH_DCSTAT interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_PATHDCSTAT       ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_PATHDCSTAT))
+
+/**
+ * @brief   Event flag to be set on a COMPASS_DRDY interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_COMPASSDRDY      ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_COMPASSDRDY))
+
+/**
+ * @brief   Event flag to be set on a SYS_PD interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSPD            ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_SYSPD))
+
+/**
+ * @brief   Event flag to be set on a SYS_REG_EN interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSREGEN         ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_SYSREGEN))
+
+/**
+ * @brief   Event flag to be set on a IR_INT interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_IRINT            ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_IRINT))
+
+/**
+ * @brief   Event flag to be set on a GYRO_DRDY interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_GYRODRDY         ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_GYRODRDY))
+
+/**
+ * @brief   Event flag to be set on a SYS_UART_UP interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSUARTUP        ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_SYSUARTUP))
+
+/**
+ * @brief   Event flag to be set on a ACCEL_INT interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_ACCELINT         ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_ACCELINT))
+
+/**
+ * @brief   PD signal for SSSP.
+ */
+extern apalControlGpio_t moduleSsspPd;
+
+/**
+ * @brief   SYNC signal for SSSP.
+ */
+extern apalControlGpio_t moduleSsspSync;
+
+/**
+ * @brief   Shell prompt text.
+ */
+extern const char* moduleShellPrompt;
+
+/**
+ * @brief   Additional HAL initialization hook.
+ */
+#define MODULE_INIT_HAL_EXTRA() {                                             \
+  qeiInit();                                                                  \
+}
+
+/**
+ * @brief   Unit test initialization hook.
+ */
+#define MODULE_INIT_TESTS() {                                                 \
+  /* add unit-test shell commands */                                          \
+  aosShellAddCommand(aos.shell, &moduleUtAlldA3906.shellcmd);                 \
+  aosShellAddCommand(aos.shell, &moduleUtAlldAt24c01bn.shellcmd);             \
+  aosShellAddCommand(aos.shell, &moduleUtAlldHmc5883l.shellcmd);              \
+  aosShellAddCommand(aos.shell, &moduleUtAlldIna219.shellcmd);                \
+  aosShellAddCommand(aos.shell, &moduleUtAlldL3g4200d.shellcmd);              \
+  aosShellAddCommand(aos.shell, &moduleUtAlldLed.shellcmd);                   \
+  aosShellAddCommand(aos.shell, &moduleUtAlldLis331dlh.shellcmd);             \
+  aosShellAddCommand(aos.shell, &moduleUtAlldLtc4412.shellcmd);               \
+  aosShellAddCommand(aos.shell, &moduleUtAlldPca9544a.shellcmd);              \
+  aosShellAddCommand(aos.shell, &moduleUtAlldTps62113.shellcmd);              \
+  aosShellAddCommand(aos.shell, &moduleUtAlldVcnl4020.shellcmd);              \
+}
+
+/**
+ * @brief   Periphery communication interfaces initialization hook.
+ */
+#define MODULE_INIT_PERIPHERY_COMM() {                                        \
+  /* serial driver */                                                         \
+  sdStart(&MODULE_HAL_PROGIF, &moduleHalProgIfConfig);                        \
+  /* I2C */                                                                   \
+  moduleHalI2cCompassConfig.clock_speed = (HMC5883L_LLD_I2C_MAXFREQUENCY < moduleHalI2cCompassConfig.clock_speed) ? HMC5883L_LLD_I2C_MAXFREQUENCY : moduleHalI2cCompassConfig.clock_speed;  \
+  moduleHalI2cCompassConfig.duty_cycle = (moduleHalI2cCompassConfig.clock_speed <= 100000) ? STD_DUTY_CYCLE : FAST_DUTY_CYCLE_2;  \
+  i2cStart(&MODULE_HAL_I2C_COMPASS, &moduleHalI2cCompassConfig);              \
+  moduleHalI2cProxEepromPwrmtrConfig.clock_speed = (PCA9544A_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxEepromPwrmtrConfig.clock_speed) ? PCA9544A_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxEepromPwrmtrConfig.clock_speed; \
+  moduleHalI2cProxEepromPwrmtrConfig.clock_speed = (VCNL4020_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxEepromPwrmtrConfig.clock_speed) ? VCNL4020_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxEepromPwrmtrConfig.clock_speed; \
+  moduleHalI2cProxEepromPwrmtrConfig.clock_speed = (AT24C01BN_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxEepromPwrmtrConfig.clock_speed) ? AT24C01BN_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxEepromPwrmtrConfig.clock_speed; \
+  moduleHalI2cProxEepromPwrmtrConfig.clock_speed = (INA219_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxEepromPwrmtrConfig.clock_speed) ? INA219_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxEepromPwrmtrConfig.clock_speed; \
+  moduleHalI2cProxEepromPwrmtrConfig.duty_cycle = (moduleHalI2cProxEepromPwrmtrConfig.clock_speed <= 100000) ? STD_DUTY_CYCLE : FAST_DUTY_CYCLE_2;  \
+  i2cStart(&MODULE_HAL_I2C_PROX_EEPROM_PWRMTR, &moduleHalI2cProxEepromPwrmtrConfig);  \
+  /* SPI is shared between accelerometer and gyroscope and needs to be restarted for each transmission */ \
+  /* PWM */                                                                   \
+  pwmStart(&MODULE_HAL_PWM_DRIVE, &moduleHalPwmDriveConfig);                  \
+  /* QEI */                                                                   \
+  qeiStart(&MODULE_HAL_QEI_LEFT_WHEEL, &moduleHalQeiConfig);                  \
+  qeiStart(&MODULE_HAL_QEI_RIGHT_WHEEL, &moduleHalQeiConfig);                 \
+  qeiEnable(&MODULE_HAL_QEI_LEFT_WHEEL);                                      \
+  qeiEnable(&MODULE_HAL_QEI_RIGHT_WHEEL);                                     \
+}
+
+/**
+ * @brief   Hook to handle IO events during SSSP startup synchronization.
+ */
+#define MODULE_SSP_STARTUP_OUTRO_IO_EVENT(mask, flags) {                      \
+  /* ignore all events */                                                     \
+  (void)mask;                                                                 \
+  (void)flags;                                                                \
+}
+
+/**
+ * @brief   Periphery communication interface deinitialization hook.
+ */
+#define MODULE_SHUTDOWN_PERIPHERY_COMM() {                                    \
+  /* PWM */                                                                   \
+  pwmStop(&MODULE_HAL_PWM_DRIVE);                                             \
+  /* QEI */                                                                   \
+  qeiDisable(&MODULE_HAL_QEI_LEFT_WHEEL);                                     \
+  qeiDisable(&MODULE_HAL_QEI_RIGHT_WHEEL);                                    \
+  qeiStop(&MODULE_HAL_QEI_LEFT_WHEEL);                                        \
+  qeiStop(&MODULE_HAL_QEI_RIGHT_WHEEL);                                       \
+  /* I2C */                                                                   \
+  i2cStop(&MODULE_HAL_I2C_COMPASS);                                           \
+  i2cStop(&MODULE_HAL_I2C_PROX_EEPROM_PWRMTR);                                \
+  /* don't stop the serial driver so messages can still be printed */         \
+}
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Low-level drivers
+ * @{
+ */
+/*===========================================================================*/
+#include <alld_a3906.h>
+#include <alld_at24c01bn-sh-b.h>
+#include <alld_hmc5883l.h>
+#include <alld_ina219.h>
+#include <alld_l3g4200d.h>
+#include <alld_led.h>
+#include <alld_lis331dlh.h>
+#include <alld_ltc4412.h>
+#include <alld_pca9544a.h>
+#include <alld_tps62113.h>
+#include <alld_vcnl4020.h>
+
+/**
+ * @brief   Motor driver.
+ */
+extern A3906Driver moduleLldMotors;
+
+/**
+ * @brief   EEPROM driver.
+ */
+extern AT24C01BNDriver moduleLldEeprom;
+
+/**
+ * @brief   Compass driver.
+ */
+extern HMC5883LDriver moduleLldCompass;
+
+/**
+ * @brief   Power monitor (VDD) driver.
+ */
+extern INA219Driver moduleLldPowerMonitorVdd;
+
+/**
+ * @brief   Gyroscope driver.
+ */
+extern L3G4200DDriver moduleLldGyroscope;
+
+/**
+ * @brief   Status LED driver.
+ */
+extern LEDDriver moduleLldStatusLed;
+
+/**
+ * @brief   Accelerometer driver.
+ */
+extern LIS331DLHDriver moduleLldAccelerometer;
+
+/**
+ * @brief   Power path controler (charging pins) driver.
+ */
+extern LTC4412Driver moduleLldPowerPathController;
+
+/**
+ * @brief   I2C multiplexer driver.
+ */
+extern PCA9544ADriver moduleLldI2cMultiplexer;
+
+/**
+ * @brief   Step down converter (VDRIVE) driver.
+ */
+extern TPS62113Driver moduleLldStepDownConverterVdrive;
+
+/**
+ * @brief   Proximity sensor driver.
+ */
+extern VCNL4020Driver moduleLldProximity;
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Unit tests (UT)
+ * @{
+ */
+/*===========================================================================*/
+#if (AMIROOS_CFG_TESTS_ENABLE == true) || defined(__DOXYGEN__)
+#include <ut_alld_a3906.h>
+#include <ut_alld_at24c01bn-sh-b.h>
+#include <ut_alld_hmc5883l.h>
+#include <ut_alld_ina219.h>
+#include <ut_alld_l3g4200d.h>
+#include <ut_alld_led.h>
+#include <ut_alld_lis331dlh.h>
+#include <ut_alld_ltc4412.h>
+#include <ut_alld_pca9544a.h>
+#include <ut_alld_tps62113.h>
+#include <ut_alld_vcnl4020.h>
+
+/**
+ * @brief   A3906 (motor driver) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldA3906;
+
+/**
+ * @brief   AT24C01BN-SH-B (EEPROM) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldAt24c01bn;
+
+/**
+ * @brief   HMC5883L (compass) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldHmc5883l;
+
+/**
+ * @brief   INA219 (power monitor) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldIna219;
+
+/**
+ * @brief   L3G4200D (gyroscope) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldL3g4200d;
+
+/**
+ * @brief   Status LED unit test object.
+ */
+extern aos_unittest_t moduleUtAlldLed;
+
+/**
+ * @brief   LIS331DLH (accelerometer) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldLis331dlh;
+
+/**
+ * @brief   LTC4412 (power path controller) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldLtc4412;
+
+/**
+ * @brief   PCA9544A (I2C multiplexer) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldPca9544a;
+
+/**
+ * @brief   TPS62113 (step-down converter) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldTps62113;
+
+/**
+ * @brief   VCNL4020 (proximity sensor) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldVcnl4020;
+
+#endif /* AMIROOS_CFG_TESTS_ENABLE == true */
+
+/** @} */
+
+#endif /* _AMIROOS_MODULE_H_ */
diff --git a/modules/LightRing_1-0/Makefile b/modules/LightRing_1-0/Makefile
new file mode 100644
index 0000000..f178bf0
--- /dev/null
+++ b/modules/LightRing_1-0/Makefile
@@ -0,0 +1,303 @@
+################################################################################
+# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
+# (AMiRo) platform.                                                            #
+# Copyright (C) 2016..2018  Thomas Schöpping et al.                            #
+#                                                                              #
+# This program is free software: you can redistribute it and/or modify         #
+# it under the terms of the GNU General Public License as published by         #
+# the Free Software Foundation, either version 3 of the License, or            #
+# (at your option) any later version.                                          #
+#                                                                              #
+# This program is distributed in the hope that it will be useful,              #
+# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
+# GNU General Public License for more details.                                 #
+#                                                                              #
+# You should have received a copy of the GNU General Public License            #
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
+#                                                                              #
+# This research/work was supported by the Cluster of Excellence Cognitive      #
+# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
+# funded by the German Research Foundation (DFG).                              #
+################################################################################
+
+
+
+################################################################################
+# Build global options                                                         #
+# NOTE: Can be overridden externally.                                          #
+#                                                                              #
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+  USE_OPT = -O2 -fomit-frame-pointer -falign-functions=16 -fstack-usage
+endif
+
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+  USE_COPT = -std=c11
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+  USE_CPPOPT = -fno-rtti -std=c++17
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+  USE_LINK_GC = yes
+endif
+
+# Linker extra options here.
+ifeq ($(USE_LDOPT),)
+  USE_LDOPT =
+endif
+
+# Enable this if you want link time optimizations (LTO)
+ifeq ($(USE_LTO),)
+  USE_LTO = yes
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+  USE_THUMB = yes
+endif
+
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+  USE_VERBOSE_COMPILE = no
+endif
+
+# If enabled, this option makes the build process faster by not compiling
+# modules not used in the current configuration.
+ifeq ($(USE_SMART_BUILD),)
+  USE_SMART_BUILD = no
+endif
+
+#                                                                              #
+# Build global options                                                         #
+################################################################################
+
+################################################################################
+# Architecture or project specific options                                     #
+#                                                                              #
+
+# Stack size to be allocated to the Cortex-M process stack. This stack is
+# the stack used by the main() thread.
+ifeq ($(USE_PROCESS_STACKSIZE),)
+  USE_PROCESS_STACKSIZE = 0x400
+endif
+
+# Stack size to the allocated to the Cortex-M main/exceptions stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
+  USE_EXCEPTIONS_STACKSIZE = 0x400
+endif
+
+# Enables the use of FPU on Cortex-M4.
+# Possible selections are:
+#   no     - no FPU is used (probably equals 'soft')
+#   soft   - does not use the FPU, thus all floating point operations are emulated
+#   softfp - uses the FPU, but uses the integer registers only
+#   hard   - uses the FPU and passes data via the FPU registers
+ifeq ($(USE_FPU),)
+  USE_FPU = no
+endif
+
+#                                                                              #
+# Architecture or project specific options                                     #
+################################################################################
+
+################################################################################
+# Project, sources and paths                                                   #
+#                                                                              #
+
+# Define project name here
+PROJECT := $(patsubst $(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))..)/%,%,$(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))))
+
+# Imported source files and paths
+include ../../../kernel/kernel.mk
+CHIBIOS := $(AMIROOS_KERNEL)
+AMIROOS = ../..
+# Startup files
+include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk
+# HAL-OSAL files
+include $(CHIBIOS)/os/hal/hal.mk
+include $(AMIROOS)/hal/hal.mk
+include $(CHIBIOS)/os/hal/ports/STM32/STM32F1xx/platform.mk
+include $(AMIROOS)/hal/ports/STM32/platform.mk
+include ./board.mk
+include $(CHIBIOS)/os/hal/osal/rt/osal.mk
+# RTOS files
+include $(CHIBIOS)/os/rt/rt.mk
+include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
+# Other files (optional).
+include $(CHIBIOS)/test/rt/test.mk
+# AMiRo-BLT files
+include ../../../bootloader/bootloader.mk
+# AMiRo-LLD files
+include ../../../periphery-lld/periphery-lld.mk
+# AMiRo-OS files
+include $(AMIROOS)/modules/modules.mk
+include $(AMIROOS)/core/core.mk
+include $(AMIROOS)/unittests/unittests.mk
+
+# Define linker script file here
+LDSCRIPT= $(BOARDLD)/STM32F103xE.ld
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = $(STARTUPSRC) \
+       $(KERNSRC) \
+       $(PORTSRC) \
+       $(OSALSRC) \
+       $(HALSRC) \
+       $(PLATFORMSRC) \
+       $(BOARDSRC) \
+       $(MODULESCSRC) \
+       $(TESTSRC) \
+       $(PERIPHERYLLDCSRC) \
+       $(AMIROOSCORECSRC) \
+       $(UNITTESTSCSRC) \
+       $(CHIBIOS)/os/various/evtimer.c \
+       $(CHIBIOS)/os/various/syscalls.c \
+       $(CHIBIOS)/os/hal/lib/streams/chprintf.c \
+       module.c \
+       $(APPSCSRC)
+
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC = $(AMIROOSCORECPPSRC) \
+         $(APPSCPPSRC)
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+ACSRC = $(APPSACSRC)
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+ACPPSRC = $(APPSACPPSRC)
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+TCSRC = $(APPSTCSRC)
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+TCPPSRC = $(APPSTCPPSRC)
+
+# List ASM source files here
+ASMSRC = $(APPSASMSRC)
+ASMXSRC = $(STARTUPASM) \
+          $(PORTASM) \
+          $(OSALASM) \
+          $(APPSASMXSRC)
+
+INCDIR = $(CHIBIOS)/os/license \
+         $(STARTUPINC) \
+         $(KERNINC) \
+         $(PORTINC) \
+         $(OSALINC) \
+         $(HALINC) \
+         $(PLATFORMINC) \
+         $(BOARDINC) \
+         $(MODULESINC) \
+         $(TESTINC) \
+         $(BOOTLOADERINC) \
+         $(CHIBIOS)/os/hal/lib/streams \
+         $(CHIBIOS)/os/various \
+         $(PERIPHERYLLDINC) \
+         $(AMIROOS) \
+         $(AMIROOSCOREINC) \
+         $(UNITTESTSINC) \
+         $(APPSINC)
+
+#                                                                              #
+# Project, sources and paths                                                   #
+################################################################################
+
+################################################################################
+# Compiler settings                                                            #
+# NOTE: Some can be overridden externally.                                     #
+#                                                                              #
+
+MCU  = cortex-m3
+
+#TRGT = arm-elf-
+TRGT = arm-none-eabi-
+CC   = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+#       runtime support makes code size explode.
+LD   = $(TRGT)gcc
+#LD   = $(TRGT)g++
+CP   = $(TRGT)objcopy
+AS   = $(TRGT)gcc -x assembler-with-cpp
+AR   = $(TRGT)ar
+OD   = $(TRGT)objdump
+SZ   = $(TRGT)size
+HEX  = $(CP) -O ihex
+BIN  = $(CP) -O binary
+SREC = $(CP) -O srec --srec-len=248
+
+# ARM-specific options here
+ifeq ($(AOPT),)
+  AOPT =
+endif
+
+# THUMB-specific options here
+ifeq ($(TOPT),)
+  TOPT = -mthumb -DTHUMB
+endif
+
+# Define C warning options here
+ifeq ($(CWARN),)
+  CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
+endif
+
+# Define C++ warning options here
+ifeq ($(CPPWARN),)
+  CPPWARN = -Wall -Wextra -Wundef
+endif
+
+#                                                                              #
+# Compiler settings                                                            #
+################################################################################
+
+################################################################################
+# Start of user section                                                        #
+#                                                                              #
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS +=
+
+# Define ASM defines here
+UADEFS +=
+
+# List all user directories here
+UINCDIR +=
+
+# List the user directory to look for the libraries here
+ULIBDIR +=
+
+# List all user libraries here
+ULIBS +=
+
+#                                                                              #
+# End of user defines                                                          #
+################################################################################
+
+# allow for custom build directory
+ifneq ($(BUILDDIR),)
+  BUILDDIR := $(BUILDDIR)/$(PROJECT)
+endif
+
+RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
+include $(RULESPATH)/rules.mk
+
+include $(AMIROOS)/modules/flash.mk
diff --git a/modules/LightRing_1-0/alldconf.h b/modules/LightRing_1-0/alldconf.h
new file mode 100644
index 0000000..d3445af
--- /dev/null
+++ b/modules/LightRing_1-0/alldconf.h
@@ -0,0 +1,44 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _ALLDCONF_H_
+#define _ALLDCONF_H_
+
+/*
+ * compatibility guards
+ */
+#define _AMIRO_LLD_CFG_
+#define AMIRO_LLD_CFG_VERSION_MAJOR         1
+#define AMIRO_LLD_CFG_VERSION_MINOR         0
+
+/**
+ * @brief   Enable flag for the AT24C01BN-SH-B EEPROM.
+ */
+#define AMIROLLD_CFG_USE_AT24C01BN
+
+/**
+ * @brief   Enable flag for the TLC5947 LED driver.
+ */
+#define AMIROLLD_CFG_USE_TLC5947
+
+/**
+ * @brief   Enable flag for the TPS2051BDBV power switch.
+ */
+#define AMIROLLD_CFG_USE_TPS2051BDBV
+
+#endif /* _ALLDCONF_H_ */
diff --git a/modules/LightRing_1-0/aosconf.h b/modules/LightRing_1-0/aosconf.h
new file mode 100644
index 0000000..1685b67
--- /dev/null
+++ b/modules/LightRing_1-0/aosconf.h
@@ -0,0 +1,161 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _AOSCONF_H_
+#define _AOSCONF_H_
+
+/*
+ * compatibility guards
+ */
+#define _AMIRO_OS_CFG_
+#define _AMIRO_OS_CFG_VERSION_MAJOR_            2
+#define _AMIRO_OS_CFG_VERSION_MINOR_            0
+
+#include <stdbool.h>
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/*
+ * Include an external configuration file to override the following default settings only if required.
+ */
+#if defined(AMIRO_APPS) && (AMIRO_APPS == true)
+  #include <osconf.h>
+#endif
+
+/**
+ * @brief   Flag to set the module as SSSP master.
+ */
+#if !defined(OS_CFG_SSSP_MASTER)
+  #define AMIROOS_CFG_SSSP_MASTER               false
+#else
+  #define AMIROOS_CFG_SSSP_MASTER               OS_CFG_SSSP_MASTER
+#endif
+
+/**
+ * @brief   Time boundary for robot wide clock synchronization in microseconds.
+ * @details Whenever the SSSP S (snychronization) signal gets logically deactivated,
+ *          All modules need to align their local uptime to the nearest multiple of this value.
+ */
+#if !defined(OS_CFG_SSSP_SYSSYNCPERIOD)
+  #define AMIROOS_CFG_SSSP_SYSSYNCPERIOD        1000000
+#else
+  #define AMIROOS_CFG_SSSP_SYSSYNCPERIOD        OS_CFG_SSSP_SYSSYNCPERIOD
+#endif
+
+/**
+ * @brief   Flag to enable/disable debug API.
+ */
+#if !defined(OS_CFG_DBG)
+  #define AMIROOS_CFG_DBG                       true
+#else
+  #define AMIROOS_CFG_DBG                       OS_CFG_DBG
+#endif
+
+/**
+ * @brief   Flag to enable/disable unit tests.
+ */
+#if !defined(OS_CFG_TESTS_ENABLE)
+  #define AMIROOS_CFG_TESTS_ENABLE              true
+#else
+  #define AMIROOS_CFG_TESTS_ENABLE              OS_CFG_TESTS_ENABLE
+#endif
+
+/**
+ * @brief   Flag to enable/disable profiling API.
+ */
+#if !defined(OS_CFG_PROFILE)
+  #define AMIROOS_CFG_PROFILE                   true
+#else
+  #define AMIROOS_CFG_PROFILE                   OS_CFG_PROFILE
+#endif
+
+/**
+ * @brief   Timeout value when waiting for events in the main loop in microseconds.
+ * @details A value of 0 deactivates the timeout.
+ */
+#if !defined(OS_CFG_MAIN_LOOP_TIMEOUT)
+  #define AMIROOS_CFG_MAIN_LOOP_TIMEOUT         0
+#else
+  #define AMIROOS_CFG_MAIN_LOOP_TIMEOUT         OS_CFG_MAIN_LOOP_TIMEOUT
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name System shell options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Shell enable flag.
+ */
+#if (AMIROOS_CFG_TESTS_ENABLE == false) && !defined(OS_CFG_SHELL_ENABLE)
+  #define AMIROOS_CFG_SHELL_ENABLE              true
+#elif (AMIROOS_CFG_TESTS_ENABLE == true)
+  #define AMIROOS_CFG_SHELL_ENABLE              true
+#else
+  #define AMIROOS_CFG_SHELL_ENABLE              OS_CFG_SHELL_ENABLE
+#endif
+
+/**
+ * @brief   Shell thread stack size.
+ */
+#if !defined(OS_CFG_SHELL_STACKSIZE)
+  #define AMIROOS_CFG_SHELL_STACKSIZE           1024
+#else
+  #define AMIROOS_CFG_SHELL_STACKSIZE           OS_CFG_SHELL_STACKSIZE
+#endif
+
+/**
+ * @brief   Shell thread priority.
+ */
+#if !defined(OS_CFG_SHELL_THREADPRIO)
+  #define AMIROOS_CFG_SHELL_THREADPRIO          THD_NORMALPRIO_MIN
+#else
+  #define AMIROOS_CFG_SHELL_THREADPRIO          OS_CFG_SHELL_THREADPRIO
+#endif
+
+/**
+ * @brief   Shell maximum input line length.
+ */
+#if !defined(OS_CFG_SHELL_LINEWIDTH)
+  #define AMIROOS_CFG_SHELL_LINEWIDTH           64
+#else
+  #define AMIROOS_CFG_SHELL_LINEWIDTH           OS_CFG_SHELL_LINEWIDTH
+#endif
+
+/**
+ * @brief   Shell maximum number of arguments.
+ */
+#if !defined(OS_CFG_SHELL_MAXARGS)
+  #define AMIROOS_CFG_SHELL_MAXARGS             4
+#else
+  #define AMIROOS_CFG_SHELL_MAXARGS             OS_CFG_SHELL_MAXARGS
+#endif
+
+/** @} */
+
+#endif /* _AOSCONF_H_ */
+
diff --git a/modules/LightRing_1-0/board.c b/modules/LightRing_1-0/board.c
new file mode 100644
index 0000000..1880ef6
--- /dev/null
+++ b/modules/LightRing_1-0/board.c
@@ -0,0 +1,73 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include <hal.h>
+
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+/**
+ * @brief   PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ *          This variable is used by the HAL when initializing the PAL driver.
+ */
+const PALConfig pal_default_config = {
+#if STM32_HAS_GPIOA
+  {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
+#endif
+#if STM32_HAS_GPIOB
+  {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
+#endif
+#if STM32_HAS_GPIOC
+  {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
+#endif
+#if STM32_HAS_GPIOD
+  {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
+#endif
+#if STM32_HAS_GPIOE
+  {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
+#endif
+#if STM32_HAS_GPIOF
+  {VAL_GPIOFODR, VAL_GPIOFCRL, VAL_GPIOFCRH},
+#endif
+#if STM32_HAS_GPIOG
+  {VAL_GPIOGODR, VAL_GPIOGCRL, VAL_GPIOGCRH},
+#endif
+};
+#endif
+
+/**
+ * @brief   Early initialization code.
+ * @details This initialization must be performed just after stack setup
+ *          and before any other initialization.
+ */
+void __early_init(void) {
+
+  stm32_clock_init();
+}
+
+/**
+ * @brief   Board-specific initialization code.
+ * @todo    Add your board-specific code, if any.
+ */
+void boardInit(void) {
+  /*
+   * Several I/O pins are re-mapped:
+   *   JTAG disabled and SWD enabled
+   */
+  AFIO->MAPR = AFIO_MAPR_SWJ_CFG_JTAGDISABLE |
+               AFIO_MAPR_USART3_REMAP_PARTIALREMAP;
+}
diff --git a/modules/LightRing_1-0/board.h b/modules/LightRing_1-0/board.h
new file mode 100644
index 0000000..df514ca
--- /dev/null
+++ b/modules/LightRing_1-0/board.h
@@ -0,0 +1,613 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/*
+ * Setup for AMiRo LightRing v1.0 board.
+ */
+
+/*
+ * Board identifier.
+ */
+#define BOARD_LIGHTRING
+#define BOARD_NAME              "AMiRo LightRing"
+#define BOARD_VERSION           "1.0"
+
+/*
+ * Board oscillators-related settings.
+ * NOTE: LSE not fitted.
+ */
+#if !defined(STM32_LSECLK)
+#define STM32_LSECLK                0U
+#endif
+
+#if !defined(STM32_HSECLK)
+#define STM32_HSECLK                8000000U
+#endif
+
+/*
+ * Board voltages.
+ * Required for performance limits calculation.
+ */
+#define STM32_VDD                   330U
+
+/*
+ * MCU type as defined in the ST header.
+ */
+#define STM32F103xE
+
+/*
+ * IO pins assignments.
+ */
+#define GPIOA_PIN0                  0U
+#define GPIOA_PIN1                  1U
+#define GPIOA_LASER_RX              2U
+#define GPIOA_LASER_TX              3U
+#define GPIOA_LIGHT_BLANK           4U
+#define GPIOA_LIGHT_SCLK            5U
+#define GPIOA_PIN6                  6U
+#define GPIOA_LIGHT_MOSI            7U
+#define GPIOA_PIN8                  8U
+#define GPIOA_PROG_RX               9U
+#define GPIOA_PROG_TX               10U
+#define GPIOA_CAN_RX                11U
+#define GPIOA_CAN_TX                12U
+#define GPIOA_SWDIO                 13U
+#define GPIOA_SWCLK                 14U
+#define GPIOA_PIN15                 15U
+
+#define GPIOB_PIN0                  0U
+#define GPIOB_PIN1                  1U
+#define GPIOB_LASER_EN              2U
+#define GPIOB_PIN3                  3U
+#define GPIOB_PIN4                  4U
+#define GPIOB_LASER_OC_N            5U
+#define GPIOB_SYS_UART_DN           6U
+#define GPIOB_PIN7                  7U
+#define GPIOB_WL_GDO2               8U
+#define GPIOB_WL_GDO0               9U
+#define GPIOB_MEM_SCL               10U
+#define GPIOB_MEM_SDA               11U
+#define GPIOB_WL_SS_N               12U
+#define GPIOB_WL_SCLK               13U
+#define GPIOB_WL_MISO               14U
+#define GPIOB_WL_MOSI               15U
+
+#define GPIOC_PIN0                  0U
+#define GPIOC_PIN1                  1U
+#define GPIOC_PIN2                  2U
+#define GPIOC_PIN3                  3U
+#define GPIOC_LIGHT_XLAT            4U
+#define GPIOC_PIN5                  5U
+#define GPIOC_PIN6                  6U
+#define GPIOC_PIN7                  7U
+#define GPIOC_PIN8                  8U
+#define GPIOC_PIN9                  9U
+#define GPIOC_SYS_UART_RX           10U
+#define GPIOC_SYS_UART_TX           11U
+#define GPIOC_PIN12                 12U
+#define GPIOC_PIN13                 13U
+#define GPIOC_SYS_PD_N              14U
+#define GPIOC_PIN15                 15U
+
+#define GPIOD_OSC_IN                0U
+#define GPIOD_OSC_OUT               1U
+#define GPIOD_SYS_INT_N             2U
+#define GPIOD_PIN3                  3U
+#define GPIOD_PIN4                  4U
+#define GPIOD_PIN5                  5U
+#define GPIOD_PIN6                  6U
+#define GPIOD_PIN7                  7U
+#define GPIOD_PIN8                  8U
+#define GPIOD_PIN9                  9U
+#define GPIOD_PIN10                 10U
+#define GPIOD_PIN11                 11U
+#define GPIOD_PIN12                 12U
+#define GPIOD_PIN13                 13U
+#define GPIOD_PIN14                 14U
+#define GPIOD_PIN15                 15U
+
+#define GPIOE_PIN0                  0U
+#define GPIOE_PIN1                  1U
+#define GPIOE_PIN2                  2U
+#define GPIOE_PIN3                  3U
+#define GPIOE_PIN4                  4U
+#define GPIOE_PIN5                  5U
+#define GPIOE_PIN6                  6U
+#define GPIOE_PIN7                  7U
+#define GPIOE_PIN8                  8U
+#define GPIOE_PIN9                  9U
+#define GPIOE_PIN10                 10U
+#define GPIOE_PIN11                 11U
+#define GPIOE_PIN12                 12U
+#define GPIOE_PIN13                 13U
+#define GPIOE_PIN14                 14U
+#define GPIOE_PIN15                 15U
+
+#define GPIOF_PIN0                  0U
+#define GPIOF_PIN1                  1U
+#define GPIOF_PIN2                  2U
+#define GPIOF_PIN3                  3U
+#define GPIOF_PIN4                  4U
+#define GPIOF_PIN5                  5U
+#define GPIOF_PIN6                  6U
+#define GPIOF_PIN7                  7U
+#define GPIOF_PIN8                  8U
+#define GPIOF_PIN9                  9U
+#define GPIOF_PIN10                 10U
+#define GPIOF_PIN11                 11U
+#define GPIOF_PIN12                 12U
+#define GPIOF_PIN13                 13U
+#define GPIOF_PIN14                 14U
+#define GPIOF_PIN15                 15U
+
+#define GPIOG_PIN0                  0U
+#define GPIOG_PIN1                  1U
+#define GPIOG_PIN2                  2U
+#define GPIOG_PIN3                  3U
+#define GPIOG_PIN4                  4U
+#define GPIOG_PIN5                  5U
+#define GPIOG_PIN6                  6U
+#define GPIOG_PIN7                  7U
+#define GPIOG_PIN8                  8U
+#define GPIOG_PIN9                  9U
+#define GPIOG_PIN10                 10U
+#define GPIOG_PIN11                 11U
+#define GPIOG_PIN12                 12U
+#define GPIOG_PIN13                 13U
+#define GPIOG_PIN14                 14U
+#define GPIOG_PIN15                 15U
+
+/*
+ * IO lines assignments.
+ */
+#define LINE_LASER_RX               PAL_LINE(GPIOA, GPIOA_LASER_RX)
+#define LINE_LASER_TX               PAL_LINE(GPIOA, GPIOA_LASER_TX)
+#define LINE_LIGHT_BLANK            PAL_LINE(GPIOA, GPIOA_LIGHT_BLANK)
+#define LINE_LIGHT_SCLK             PAL_LINE(GPIOA, GPIOA_LIGHT_SCLK)
+#define LINE_LIGHT_MOSI             PAL_LINE(GPIOA, GPIOA_LIGHT_MOSI)
+#define LINE_PROG_RX                PAL_LINE(GPIOA, GPIOA_PROG_RX)
+#define LINE_PROG_TX                PAL_LINE(GPIOA, GPIOA_PROG_TX)
+#define LINE_CAN_RX                 PAL_LINE(GPIOA, GPIOA_CAN_RX)
+#define LINE_CAN_TX                 PAL_LINE(GPIOA, GPIOA_CAN_TX)
+#define LINE_SWDIO                  PAL_LINE(GPIOA, GPIOA_SWDIO)
+#define LINE_SWCLK                  PAL_LINE(GPIOA, GPIOA_SWCLK)
+
+#define LINE_LASER_EN               PAL_LINE(GPIOB, GPIOB_LASER_EN)
+#define LINE_LASER_OC_N             PAL_LINE(GPIOB, GPIOB_LASER_OC_N)
+#define LINE_SYS_UART_DN            PAL_LINE(GPIOB, GPIOB_SYS_UART_DN)
+#define LINE_WL_GDO2                PAL_LINE(GPIOB, GPIOB_WL_GDO2)
+#define LINE_WL_GDO0                PAL_LINE(GPIOB, GPIOB_WL_GDO0)
+#define LINE_MEM_SCL                PAL_LINE(GPIOB, GPIOB_MEM_SCL)
+#define LINE_MEM_SDA                PAL_LINE(GPIOB, GPIOB_MEM_SDA)
+#define LINE_WL_SS_N                PAL_LINE(GPIOB, GPIOB_WL_SS_N)
+#define LINE_WL_SCLK                PAL_LINE(GPIOB, GPIOB_WL_SCLK)
+#define LINE_WL_MISO                PAL_LINE(GPIOB, GPIOB_WL_MISO)
+#define LINE_WL_MOSI                PAL_LINE(GPIOB, GPIOB_WL_MOSI)
+
+#define LINE_LIGHT_XLAT             PAL_LINE(GPIOC, GPIOC_LIGHT_XLAT)
+#define LINE_SYS_UART_RX            PAL_LINE(GPIOC, GPIOC_SYS_UART_RX)
+#define LINE_SYS_UART_TX            PAL_LINE(GPIOC, GPIOC_SYS_UART_TX)
+#define LINE_SYS_PD_N               PAL_LINE(GPIOC, GPIOC_SYS_PD_N)
+
+#define LINE_SYS_INT_N              PAL_LINE(GPIOD, GPIOD_SYS_INT_N)
+
+/*
+ * I/O ports initial setup, this configuration is established soon after reset
+ * in the initialization code.
+ * Please refer to the STM32 Reference Manual for details.
+ */
+#define PIN_MODE_INPUT              0U
+#define PIN_MODE_OUTPUT_2M          2U
+#define PIN_MODE_OUTPUT_10M         1U
+#define PIN_MODE_OUTPUT_50M         3U
+#define PIN_CNF_INPUT_ANALOG        0U
+#define PIN_CNF_INPUT_FLOATING      1U
+#define PIN_CNF_INPUT_PULLX         2U
+#define PIN_CNF_OUTPUT_PUSHPULL     0U
+#define PIN_CNF_OUTPUT_OPENDRAIN    1U
+#define PIN_CNF_ALTERNATE_PUSHPULL  2U
+#define PIN_CNF_ALTERNATE_OPENDRAIN 3U
+#define PIN_CR(pin, mode, cnf)      (((mode) | ((cnf) << 2U)) << (((pin) % 8U) * 4U))
+#define PIN_ODR_LOW(n)              (0U << (n))
+#define PIN_ODR_HIGH(n)             (1U << (n))
+
+/*
+ * GPIOA setup:
+ *
+ * PA0  - PIN0                      (input floating)
+ * PA1  - PIN1                      (input floating)
+ * PA2  - LASER_RX                  (alternate pushpull high 50MHz)
+ * PA3  - LASER_TX                  (input pullup)
+ * PA4  - LIGHT_BLANK               (output pushpull high 50MHz)
+ * PA5  - LIGHT_SCLK                (alternate pushpull 50MHz)
+ * PA6  - PIN6                      (input foating)
+ * PA7  - LIGHT_MOSI                (alternate pushpull 50MHz)
+ * PA8  - PIN8                      (input floating)
+ * PA9  - PROG_RX                   (alternate pushpull 50MHz)
+ * PA10 - PROG_TX                   (input pullup)
+ * PA11 - CAN_RX                    (input floating)
+ * PA12 - CAN_TX                    (alternate pushpull 50MHz)
+ * PA13 - SWDIO                     (input pullup)
+ * PA14 - SWCLK                     (input pullup)
+ * PA15 - PIN15                     (input floating)
+ */
+#define VAL_GPIOACRL                (PIN_CR(GPIOA_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOA_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOA_LASER_RX, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |   \
+                                     PIN_CR(GPIOA_LASER_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |               \
+                                     PIN_CR(GPIOA_LIGHT_BLANK, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |   \
+                                     PIN_CR(GPIOA_LIGHT_SCLK, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) | \
+                                     PIN_CR(GPIOA_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOA_LIGHT_MOSI, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL))
+#define VAL_GPIOACRH                (PIN_CR(GPIOA_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOA_PROG_RX, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |    \
+                                     PIN_CR(GPIOA_PROG_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                \
+                                     PIN_CR(GPIOA_CAN_RX, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |              \
+                                     PIN_CR(GPIOA_CAN_TX, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |     \
+                                     PIN_CR(GPIOA_SWDIO, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                  \
+                                     PIN_CR(GPIOA_SWCLK, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                  \
+                                     PIN_CR(GPIOA_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIOAODR                (PIN_ODR_LOW(GPIOA_PIN0) |                                                   \
+                                     PIN_ODR_LOW(GPIOA_PIN1) |                                                   \
+                                     PIN_ODR_HIGH(GPIOA_LASER_RX) |                                              \
+                                     PIN_ODR_HIGH(GPIOA_LASER_TX) |                                              \
+                                     PIN_ODR_HIGH(GPIOA_LIGHT_BLANK) |                                           \
+                                     PIN_ODR_HIGH(GPIOA_LIGHT_SCLK) |                                            \
+                                     PIN_ODR_LOW(GPIOA_PIN6) |                                                   \
+                                     PIN_ODR_HIGH(GPIOA_LIGHT_MOSI) |                                            \
+                                     PIN_ODR_LOW(GPIOA_PIN8) |                                                   \
+                                     PIN_ODR_HIGH(GPIOA_PROG_RX) |                                               \
+                                     PIN_ODR_HIGH(GPIOA_PROG_TX) |                                               \
+                                     PIN_ODR_HIGH(GPIOA_CAN_RX) |                                                \
+                                     PIN_ODR_HIGH(GPIOA_CAN_TX) |                                                \
+                                     PIN_ODR_HIGH(GPIOA_SWDIO) |                                                 \
+                                     PIN_ODR_HIGH(GPIOA_SWCLK) |                                                 \
+                                     PIN_ODR_LOW(GPIOA_PIN15))
+
+/*
+ * GPIOB setup:
+ *
+ * PB0  - PIN0                      (input floating)
+ * PB1  - PIN1                      (input floating)
+ * PB2  - LASER_EN                  (output pushpull low 50MHz)
+ * PB3  - PIN3                      (input floating)
+ * PB4  - PIN4                      (input floating)
+ * PB5  - LASER_OC_N                (input floating)
+ * PB6  - SYS_UART_DN               (output opendrain high 50MHz)
+ * PB7  - PIN7                      (input foating)
+ * PB8  - WL_GDO2                   (input pullup)
+ * PB9  - WL_GDO0                   (input pullup)
+ * PB10 - MEM_SCL                   (alternate opendrain 50MHz)
+ * PB11 - MEM_SDA                   (alternate opendrain 50MHz)
+ * PB12 - WL_SS_N                   (output pushpull high 50MHz)
+ * PB13 - WL_SCLK                   (alternate pushpull 50MHz)
+ * PB14 - WL_MISO                   (input pullup)
+ * PB15 - WL_MOSI                   (alternate pushpull 50MHz)
+ */
+#define VAL_GPIOBCRL                (PIN_CR(GPIOB_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOB_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOB_LASER_EN, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |      \
+                                     PIN_CR(GPIOB_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOB_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOB_LASER_OC_N, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |          \
+                                     PIN_CR(GPIOB_SYS_UART_DN, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |  \
+                                     PIN_CR(GPIOB_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIOBCRH                (PIN_CR(GPIOB_WL_GDO2, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                \
+                                     PIN_CR(GPIOB_WL_GDO0, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                \
+                                     PIN_CR(GPIOB_MEM_SCL, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) |   \
+                                     PIN_CR(GPIOB_MEM_SDA, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) |   \
+                                     PIN_CR(GPIOB_WL_SS_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |       \
+                                     PIN_CR(GPIOB_WL_SCLK, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |    \
+                                     PIN_CR(GPIOB_WL_MISO, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                \
+                                     PIN_CR(GPIOB_WL_MOSI, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL))
+#define VAL_GPIOBODR                (PIN_ODR_LOW(GPIOB_PIN0) |                                                   \
+                                     PIN_ODR_LOW(GPIOB_PIN1) |                                                   \
+                                     PIN_ODR_LOW(GPIOB_LASER_EN) |                                               \
+                                     PIN_ODR_LOW(GPIOB_PIN3) |                                                   \
+                                     PIN_ODR_LOW(GPIOB_PIN4) |                                                   \
+                                     PIN_ODR_HIGH(GPIOB_LASER_OC_N) |                                            \
+                                     PIN_ODR_HIGH(GPIOB_SYS_UART_DN) |                                           \
+                                     PIN_ODR_LOW(GPIOB_PIN7) |                                                   \
+                                     PIN_ODR_HIGH(GPIOB_WL_GDO2) |                                               \
+                                     PIN_ODR_HIGH(GPIOB_WL_GDO0) |                                               \
+                                     PIN_ODR_HIGH(GPIOB_MEM_SCL) |                                               \
+                                     PIN_ODR_HIGH(GPIOB_MEM_SDA) |                                               \
+                                     PIN_ODR_HIGH(GPIOB_WL_SS_N) |                                               \
+                                     PIN_ODR_HIGH(GPIOB_WL_SCLK) |                                               \
+                                     PIN_ODR_HIGH(GPIOB_WL_MISO) |                                               \
+                                     PIN_ODR_HIGH(GPIOB_WL_MOSI))
+
+/*
+ * GPIOC setup:
+ *
+ * PC0  - PIN0                      (input floating)
+ * PC1  - PIN1                      (input floating)
+ * PC2  - PIN2                      (input floating)
+ * PC3  - PIN3                      (input floating)
+ * PC4  - LIGHT_XLAT                (output pushpull high 10MHz)
+ * PC5  - PIN5                      (input floating)
+ * PC6  - PIN6                      (input floating)
+ * PC7  - PIN7                      (input floating)
+ * PC8  - PIN8                      (input floating)
+ * PC9  - PIN9                      (input floating)
+ * PC10 - SYS_UART_RX               (input pullup)
+ * PC11 - SYS_UART_TX               (input pullup)
+ * PC12 - PIN12                     (input floating)
+ * PC13 - PIN13                     (input floating)
+ * PC14 - SYS_PD_N                  (output opendrain high 50MHz)
+ * PC15 - PIN15                     (input floating)
+ */
+#define VAL_GPIOCCRL                (PIN_CR(GPIOC_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOC_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOC_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOC_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOC_LIGHT_XLAT, PIN_MODE_OUTPUT_10M, PIN_CNF_OUTPUT_PUSHPULL) |    \
+                                     PIN_CR(GPIOC_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOC_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOC_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIOCCRH                (PIN_CR(GPIOC_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOC_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOC_SYS_UART_RX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |            \
+                                     PIN_CR(GPIOC_SYS_UART_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |            \
+                                     PIN_CR(GPIOC_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
+                                     PIN_CR(GPIOC_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
+                                     PIN_CR(GPIOC_SYS_PD_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |     \
+                                     PIN_CR(GPIOC_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIOCODR                (PIN_ODR_LOW(GPIOC_PIN0) |                                                   \
+                                     PIN_ODR_LOW(GPIOC_PIN1) |                                                   \
+                                     PIN_ODR_LOW(GPIOC_PIN2) |                                                   \
+                                     PIN_ODR_LOW(GPIOC_PIN3) |                                                   \
+                                     PIN_ODR_LOW(GPIOC_LIGHT_XLAT) |                                             \
+                                     PIN_ODR_LOW(GPIOC_PIN5) |                                                   \
+                                     PIN_ODR_LOW(GPIOC_PIN6) |                                                   \
+                                     PIN_ODR_LOW(GPIOC_PIN7) |                                                   \
+                                     PIN_ODR_LOW(GPIOC_PIN8) |                                                   \
+                                     PIN_ODR_LOW(GPIOC_PIN9) |                                                   \
+                                     PIN_ODR_HIGH(GPIOC_SYS_UART_RX) |                                           \
+                                     PIN_ODR_HIGH(GPIOC_SYS_UART_TX) |                                           \
+                                     PIN_ODR_LOW(GPIOC_PIN12) |                                                  \
+                                     PIN_ODR_LOW(GPIOC_PIN13) |                                                  \
+                                     PIN_ODR_HIGH(GPIOC_SYS_PD_N) |                                              \
+                                     PIN_ODR_LOW(GPIOC_PIN15))
+
+/*
+ * GPIOD setup:
+ *
+ * PD0  - OSC_IN                    (input floating)
+ * PD1  - OSC_OUT                   (input floating)
+ * PD2  - SYS_INT_N                 (output opendrain low 50MHz)
+ * PD3  - PIN3                      (input floating)
+ * PD4  - PIN4                      (input floating)
+ * PD5  - PIN5                      (input floating)
+ * PD6  - PIN6                      (input floating)
+ * PD7  - PIN7                      (input floating)
+ * PD8  - PIN8                      (input floating)
+ * PD9  - PIN9                      (input floating)
+ * PD10 - PIN10                     (input floating)
+ * PD11 - PIN11                     (input floating)
+ * PD12 - PIN12                     (input floating)
+ * PD13 - PIN13                     (input floating)
+ * PD14 - PIN14                     (input floating)
+ * PD15 - PIN15                     (input floating)
+ */
+#define VAL_GPIODCRL                (PIN_CR(GPIOD_OSC_IN, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |              \
+                                     PIN_CR(GPIOD_OSC_OUT, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |             \
+                                     PIN_CR(GPIOD_SYS_INT_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |    \
+                                     PIN_CR(GPIOD_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOD_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOD_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOD_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOD_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIODCRH                (PIN_CR(GPIOD_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOD_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
+                                     PIN_CR(GPIOD_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
+                                     PIN_CR(GPIOD_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
+                                     PIN_CR(GPIOD_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
+                                     PIN_CR(GPIOD_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
+                                     PIN_CR(GPIOD_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
+                                     PIN_CR(GPIOD_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIODODR                (PIN_ODR_HIGH(GPIOD_OSC_IN) |                                                \
+                                     PIN_ODR_HIGH(GPIOD_OSC_OUT) |                                               \
+                                     PIN_ODR_LOW(GPIOD_SYS_INT_N) |                                             \
+                                     PIN_ODR_LOW(GPIOD_PIN3) |                                                   \
+                                     PIN_ODR_LOW(GPIOD_PIN4) |                                                   \
+                                     PIN_ODR_LOW(GPIOD_PIN5) |                                                   \
+                                     PIN_ODR_LOW(GPIOD_PIN6) |                                                   \
+                                     PIN_ODR_LOW(GPIOD_PIN7) |                                                   \
+                                     PIN_ODR_LOW(GPIOD_PIN8) |                                                   \
+                                     PIN_ODR_LOW(GPIOD_PIN9) |                                                   \
+                                     PIN_ODR_LOW(GPIOD_PIN10) |                                                  \
+                                     PIN_ODR_LOW(GPIOD_PIN11) |                                                  \
+                                     PIN_ODR_LOW(GPIOD_PIN12) |                                                  \
+                                     PIN_ODR_LOW(GPIOD_PIN13) |                                                  \
+                                     PIN_ODR_LOW(GPIOD_PIN14) |                                                  \
+                                     PIN_ODR_LOW(GPIOD_PIN15))
+
+/*
+ * GPIOE setup:
+ *
+ * PE0  - PIN0                      (input floating)
+ * PE1  - PIN1                      (input floating)
+ * PE2  - PIN2                      (input floating)
+ * PE3  - PIN3                      (input floating)
+ * PE4  - PIN4                      (input floating)
+ * PE5  - PIN5                      (input floating)
+ * PE6  - PIN6                      (input floating)
+ * PE7  - PIN7                      (input floating)
+ * PE8  - PIN8                      (input floating)
+ * PE9  - PIN9                      (input floating)
+ * PE10 - PIN10                     (input floating)
+ * PE11 - PIN11                     (input floating)
+ * PE12 - PIN12                     (input floating)
+ * PE13 - PIN13                     (input floating)
+ * PE14 - PIN14                     (input floating)
+ * PE15 - PIN15                     (input floating)
+ */
+#define VAL_GPIOECRL                (PIN_CR(GPIOE_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOE_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOE_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOE_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOE_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOE_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOE_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOE_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIOECRH                (PIN_CR(GPIOE_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOE_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOE_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOE_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOE_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOE_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOE_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOE_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIOEODR                (PIN_ODR_LOW(GPIOE_PIN0) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN1) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN2) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN3) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN4) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN5) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN6) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN7) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN8) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN9) |                                                     \
+                                     PIN_ODR_LOW(GPIOE_PIN10) |                                                    \
+                                     PIN_ODR_LOW(GPIOE_PIN11) |                                                    \
+                                     PIN_ODR_LOW(GPIOE_PIN12) |                                                    \
+                                     PIN_ODR_LOW(GPIOE_PIN13) |                                                    \
+                                     PIN_ODR_LOW(GPIOE_PIN14) |                                                    \
+                                     PIN_ODR_LOW(GPIOE_PIN15))
+
+/*
+ * GPIOF setup:
+ *
+ * PF0  - PIN0                      (input floating)
+ * PF1  - PIN1                      (input floating)
+ * PF2  - PIN2                      (input floating)
+ * PF3  - PIN3                      (input floating)
+ * PF4  - PIN4                      (input floating)
+ * PF5  - PIN5                      (input floating)
+ * PF6  - PIN6                      (input floating)
+ * PF7  - PIN7                      (input floating)
+ * PF8  - PIN8                      (input floating)
+ * PF9  - PIN9                      (input floating)
+ * PF10 - PIN10                     (input floating)
+ * PF11 - PIN11                     (input floating)
+ * PF12 - PIN12                     (input floating)
+ * PF13 - PIN13                     (input floating)
+ * PF14 - PIN14                     (input floating)
+ * PF15 - PIN15                     (input floating)
+ */
+#define VAL_GPIOFCRL                (PIN_CR(GPIOF_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOF_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOF_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOF_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOF_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOF_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOF_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOF_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIOFCRH                (PIN_CR(GPIOF_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOF_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOF_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOF_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOF_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOF_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOF_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOF_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIOFODR                (PIN_ODR_LOW(GPIOF_PIN0) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN1) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN2) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN3) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN4) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN5) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN6) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN7) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN8) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN9) |                                                     \
+                                     PIN_ODR_LOW(GPIOF_PIN10) |                                                    \
+                                     PIN_ODR_LOW(GPIOF_PIN11) |                                                    \
+                                     PIN_ODR_LOW(GPIOF_PIN12) |                                                    \
+                                     PIN_ODR_LOW(GPIOF_PIN13) |                                                    \
+                                     PIN_ODR_LOW(GPIOF_PIN14) |                                                    \
+                                     PIN_ODR_LOW(GPIOF_PIN15))
+
+/*
+ * GPIOG setup:
+ *
+ * PG0  - PIN0                      (input floating)
+ * PG1  - PIN1                      (input floating)
+ * PG2  - PIN2                      (input floating)
+ * PG3  - PIN3                      (input floating)
+ * PG4  - PIN4                      (input floating)
+ * PG5  - PIN5                      (input floating)
+ * PG6  - PIN6                      (input floating)
+ * PG7  - PIN7                      (input floating)
+ * PG8  - PIN8                      (input floating)
+ * PG9  - PIN9                      (input floating)
+ * PG10 - PIN10                     (input floating)
+ * PG11 - PIN11                     (input floating)
+ * PG12 - PIN12                     (input floating)
+ * PG13 - PIN13                     (input floating)
+ * PG14 - PIN14                     (input floating)
+ * PG15 - PIN15                     (input floating)
+ */
+#define VAL_GPIOGCRL                (PIN_CR(GPIOG_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOG_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOG_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOG_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOG_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOG_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOG_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOG_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIOGCRH                (PIN_CR(GPIOG_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOG_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
+                                     PIN_CR(GPIOG_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOG_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOG_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOG_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOG_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
+                                     PIN_CR(GPIOG_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
+#define VAL_GPIOGODR                (PIN_ODR_LOW(GPIOG_PIN0) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN1) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN2) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN3) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN4) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN5) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN6) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN7) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN8) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN9) |                                                     \
+                                     PIN_ODR_LOW(GPIOG_PIN10) |                                                    \
+                                     PIN_ODR_LOW(GPIOG_PIN11) |                                                    \
+                                     PIN_ODR_LOW(GPIOG_PIN12) |                                                    \
+                                     PIN_ODR_LOW(GPIOG_PIN13) |                                                    \
+                                     PIN_ODR_LOW(GPIOG_PIN14) |                                                    \
+                                     PIN_ODR_LOW(GPIOG_PIN15))
+
+#if !defined(_FROM_ASM_)
+#ifdef __cplusplus
+extern "C" {
+#endif
+  void boardInit(void);
+#ifdef __cplusplus
+}
+#endif
+#endif /* _FROM_ASM_ */
+
+#endif /* _BOARD_H_ */
diff --git a/modules/LightRing_1-0/board.mk b/modules/LightRing_1-0/board.mk
new file mode 100644
index 0000000..7a12204
--- /dev/null
+++ b/modules/LightRing_1-0/board.mk
@@ -0,0 +1,36 @@
+################################################################################
+# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
+# (AMiRo) platform.                                                            #
+# Copyright (C) 2016..2018  Thomas Schöpping et al.                            #
+#                                                                              #
+# This program is free software: you can redistribute it and/or modify         #
+# it under the terms of the GNU General Public License as published by         #
+# the Free Software Foundation, either version 3 of the License, or            #
+# (at your option) any later version.                                          #
+#                                                                              #
+# This program is distributed in the hope that it will be useful,              #
+# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
+# GNU General Public License for more details.                                 #
+#                                                                              #
+# You should have received a copy of the GNU General Public License            #
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
+#                                                                              #
+# This research/work was supported by the Cluster of Excellence Cognitive      #
+# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
+# funded by the German Research Foundation (DFG).                              #
+################################################################################
+
+
+
+# absolute path to this directory
+BOARD_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
+
+# include paths
+BOARDINC = $(BOARD_DIR)
+
+# C source files
+BOARDSRC = $(BOARD_DIR)board.c
+
+# linker path
+BOARDLD = $(AMIROOS)/hal/ports
diff --git a/modules/LightRing_1-0/chconf.h b/modules/LightRing_1-0/chconf.h
new file mode 100644
index 0000000..c679bee
--- /dev/null
+++ b/modules/LightRing_1-0/chconf.h
@@ -0,0 +1,93 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file    os/modules/LightRing/chconf.h
+ * @brief   ChibiOS Configuration file for the LightRing v1.0 module.
+ * @details Contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef _CHCONF_H_
+#define _CHCONF_H_
+
+#include <aosconf.h>
+
+/*===========================================================================*/
+/**
+ * @name System timers settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   System time counter resolution.
+ * @note    Allowed values are 16 or 32 bits.
+ */
+#define CH_CFG_ST_RESOLUTION                16
+
+/**
+ * @brief   System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ *          setting also defines the system tick time unit.
+ */
+#if (AMIROOS_CFG_TESTS_ENABLE != true) || defined(__DOXYGEN__)
+#define CH_CFG_ST_FREQUENCY                 1000000UL
+#else
+#define CH_CFG_ST_FREQUENCY                 100000UL
+#endif
+
+/**
+ * @brief   Time delta constant for the tick-less mode.
+ * @note    If this value is zero then the system uses the classic
+ *          periodic tick. This value represents the minimum number
+ *          of ticks that is safe to specify in a timeout directive.
+ *          The value one is not valid, timeouts are rounded up to
+ *          this value.
+ */
+#if (AMIROOS_CFG_TESTS_ENABLE != true) || defined(__DOXYGEN__)
+#define CH_CFG_ST_TIMEDELTA                 10
+#else
+#define CH_CFG_ST_TIMEDELTA                 2
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Port specific settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   NVIC VTOR initialization offset.
+ * @details On initialization, the code at this address in the flash memory will be executed.
+ */
+#define CORTEX_VTOR_INIT 0x00006000U
+
+/** @} */
+
+#include <aos_chconf.h>
+
+#endif  /* _CHCONF_H_ */
+
+/** @} */
diff --git a/modules/LightRing_1-0/halconf.h b/modules/LightRing_1-0/halconf.h
new file mode 100644
index 0000000..5e21005
--- /dev/null
+++ b/modules/LightRing_1-0/halconf.h
@@ -0,0 +1,388 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file    os/modules/LightRing/halconf.h
+ * @brief   HAL configuration header for the LightRing v1.0 module.
+ * @details HAL configuration file, this file allows to enable or disable the
+ *          various device drivers from your application. You may also use
+ *          this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef _HALCONF_H_
+#define _HALCONF_H_
+
+/**
+ * @brief   Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL                 TRUE
+#endif
+
+/**
+ * @brief   Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN                 TRUE
+#endif
+
+/**
+ * @brief   Enables the DAC subsystem.
+ */
+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
+#define HAL_USE_DAC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT                 TRUE
+#endif
+
+/**
+ * @brief   Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT                 FALSE
+#endif
+
+/**
+ * @brief   Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C                 TRUE
+#endif
+
+/**
+ * @brief   Enables the I2S subsystem.
+ */
+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
+#define HAL_USE_I2S                 FALSE
+#endif
+
+/**
+ * @brief   Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU                 FALSE
+#endif
+
+/**
+ * @brief   Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI             FALSE
+#endif
+
+/**
+ * @brief   Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM                 FALSE
+#endif
+
+/**
+ * @brief   Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC                 TRUE
+#endif
+
+/**
+ * @brief   Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL              TRUE
+#endif
+
+/**
+ * @brief   Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB          FALSE
+#endif
+
+/**
+ * @brief   Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI                 TRUE
+#endif
+
+/**
+ * @brief   Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART                FALSE
+#endif
+
+/**
+ * @brief   Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB                 FALSE
+#endif
+
+/**
+ * @brief   Enables the WDG subsystem.
+ */
+#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
+#define HAL_USE_WDG                 FALSE
+#endif
+
+/**
+ * @brief   Enables the QEI subsystem.
+ */
+#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__)
+#define HAL_USE_QEI                 FALSE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT                FALSE
+#endif
+
+/**
+ * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION    FALSE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE          FALSE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION    TRUE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
+#define MAC_USE_ZERO_COPY           FALSE
+#endif
+
+/**
+ * @brief   Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS              FALSE
+#endif
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings.                                          */
+/*===========================================================================*/
+
+/**
+ * @brief   Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ *          routines releasing some extra CPU time for the threads with
+ *          lower priority, this may slow down the driver a bit however.
+ *          This option is recommended also if the SPI driver does not
+ *          use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING            FALSE
+#endif
+
+/*===========================================================================*/
+/* SDC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Number of initialization attempts before rejecting the card.
+ * @note    Attempts are performed at 10mS intervals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY              100
+#endif
+
+/**
+ * @brief   Include support for MMC cards.
+ * @note    MMC support is not yet implemented so this option must be kept
+ *          at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT             FALSE
+#endif
+
+/**
+ * @brief   Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ *          routines releasing some extra CPU time for the threads with
+ *          lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING            FALSE
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings.                                           */
+/*===========================================================================*/
+
+/**
+ * @brief   Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ *          default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE      115200
+#endif
+
+/**
+ * @brief   Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ *          buffers depending on the requirements of your application.
+ * @note    The default is 16 bytes for both the transmission and receive
+ *          buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE         16
+#endif
+
+/*===========================================================================*/
+/* SERIAL_USB driver related setting.                                        */
+/*===========================================================================*/
+
+/**
+ * @brief   Serial over USB buffers size.
+ * @details Configuration parameter, the buffer size must be a multiple of
+ *          the USB data endpoint maximum packet size.
+ * @note    The default is 256 bytes for both the transmission and receive
+ *          buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_SIZE     256
+#endif
+
+/**
+ * @brief   Serial over USB number of buffers.
+ * @note    The default is 2 buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_NUMBER   2
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT                TRUE
+#endif
+
+/**
+ * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION    TRUE
+#endif
+
+/*===========================================================================*/
+/* UART driver related settings.                                             */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
+#define UART_USE_WAIT               FALSE
+#endif
+
+/**
+ * @brief   Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define UART_USE_MUTUAL_EXCLUSION   FALSE
+#endif
+
+/*===========================================================================*/
+/* USB driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
+#define USB_USE_WAIT                FALSE
+#endif
+
+#endif /* _HALCONF_H_ */
+
+/** @} */
diff --git a/modules/LightRing_1-0/mcuconf.h b/modules/LightRing_1-0/mcuconf.h
new file mode 100644
index 0000000..6381f70
--- /dev/null
+++ b/modules/LightRing_1-0/mcuconf.h
@@ -0,0 +1,227 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _MCUCONF_H_
+#define _MCUCONF_H_
+
+#define STM32F103_MCUCONF
+
+/*
+ * STM32F103 drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 15...0       Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3        Lowest...Highest.
+ */
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   FALSE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
+#define STM32_SW                            STM32_SW_PLL
+#define STM32_PLLSRC                        STM32_PLLSRC_HSE
+#define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE                  9
+#define STM32_HPRE                          STM32_HPRE_DIV1
+#define STM32_PPRE1                         STM32_PPRE1_DIV2
+#define STM32_PPRE2                         STM32_PPRE2_DIV2
+#define STM32_ADCPRE                        STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED            TRUE
+#define STM32_USBPRE                        STM32_USBPRE_DIV1P5
+#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
+#define STM32_PVD_ENABLE                    FALSE
+#define STM32_PLS                           STM32_PLS_LEV0
+
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_USE_ADC1                  FALSE
+#define STM32_ADC_ADC1_DMA_PRIORITY         2
+#define STM32_ADC_ADC1_IRQ_PRIORITY         6
+
+/*
+ * CAN driver system settings.
+ */
+#define STM32_CAN_USE_CAN1                  TRUE
+#define STM32_CAN_CAN1_IRQ_PRIORITY         11
+
+/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY       6
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1                  TRUE
+#define STM32_GPT_USE_TIM2                  FALSE
+#define STM32_GPT_USE_TIM3                  FALSE
+#define STM32_GPT_USE_TIM4                  FALSE
+#define STM32_GPT_USE_TIM5                  FALSE
+#define STM32_GPT_USE_TIM8                  FALSE
+#define STM32_GPT_TIM1_IRQ_PRIORITY         7
+#define STM32_GPT_TIM2_IRQ_PRIORITY         7
+#define STM32_GPT_TIM3_IRQ_PRIORITY         7
+#define STM32_GPT_TIM4_IRQ_PRIORITY         7
+#define STM32_GPT_TIM5_IRQ_PRIORITY         7
+#define STM32_GPT_TIM8_IRQ_PRIORITY         7
+
+/*
+ * I2C driver system settings.
+ */
+#define STM32_I2C_USE_I2C1                  FALSE
+#define STM32_I2C_USE_I2C2                  TRUE
+#define STM32_I2C_BUSY_TIMEOUT              50
+#define STM32_I2C_I2C1_IRQ_PRIORITY         5
+#define STM32_I2C_I2C2_IRQ_PRIORITY         5
+#define STM32_I2C_I2C1_DMA_PRIORITY         3
+#define STM32_I2C_I2C2_DMA_PRIORITY         3
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
+#define STM32_I2C_USE_DMA                   FALSE
+
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1                  FALSE
+#define STM32_ICU_USE_TIM2                  FALSE
+#define STM32_ICU_USE_TIM3                  FALSE
+#define STM32_ICU_USE_TIM4                  FALSE
+#define STM32_ICU_USE_TIM5                  FALSE
+#define STM32_ICU_USE_TIM8                  FALSE
+#define STM32_ICU_TIM1_IRQ_PRIORITY         7
+#define STM32_ICU_TIM2_IRQ_PRIORITY         7
+#define STM32_ICU_TIM3_IRQ_PRIORITY         7
+#define STM32_ICU_TIM4_IRQ_PRIORITY         7
+#define STM32_ICU_TIM5_IRQ_PRIORITY         7
+#define STM32_ICU_TIM8_IRQ_PRIORITY         7
+
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED              FALSE
+#define STM32_PWM_USE_TIM1                  FALSE
+#define STM32_PWM_USE_TIM2                  FALSE
+#define STM32_PWM_USE_TIM3                  FALSE
+#define STM32_PWM_USE_TIM4                  FALSE
+#define STM32_PWM_USE_TIM5                  FALSE
+#define STM32_PWM_USE_TIM8                  FALSE
+#define STM32_PWM_TIM1_IRQ_PRIORITY         7
+#define STM32_PWM_TIM2_IRQ_PRIORITY         7
+#define STM32_PWM_TIM3_IRQ_PRIORITY         7
+#define STM32_PWM_TIM4_IRQ_PRIORITY         7
+#define STM32_PWM_TIM5_IRQ_PRIORITY         7
+#define STM32_PWM_TIM8_IRQ_PRIORITY         7
+
+/*
+ * RTC driver system settings.
+ */
+#define STM32_RTC_IRQ_PRIORITY              15
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1             TRUE
+#define STM32_SERIAL_USE_USART2             TRUE
+#define STM32_SERIAL_USE_USART3             FALSE
+#define STM32_SERIAL_USE_UART4              FALSE
+#define STM32_SERIAL_USE_UART5              FALSE
+#define STM32_SERIAL_USART1_PRIORITY        12
+#define STM32_SERIAL_USART2_PRIORITY        12
+#define STM32_SERIAL_USART3_PRIORITY        12
+#define STM32_SERIAL_UART4_PRIORITY         12
+#define STM32_SERIAL_UART5_PRIORITY         12
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1                  TRUE
+#define STM32_SPI_USE_SPI2                  TRUE
+#define STM32_SPI_USE_SPI3                  FALSE
+#define STM32_SPI_SPI1_DMA_PRIORITY         1
+#define STM32_SPI_SPI2_DMA_PRIORITY         1
+#define STM32_SPI_SPI3_DMA_PRIORITY         1
+#define STM32_SPI_SPI1_IRQ_PRIORITY         10
+#define STM32_SPI_SPI2_IRQ_PRIORITY         10
+#define STM32_SPI_SPI3_IRQ_PRIORITY         10
+#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
+
+/*
+ * ST driver system settings.
+ */
+#define STM32_ST_IRQ_PRIORITY               8
+#define STM32_ST_USE_TIMER                  2
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1               FALSE
+#define STM32_UART_USE_USART2               FALSE
+#define STM32_UART_USE_USART3               FALSE
+#define STM32_UART_USART1_IRQ_PRIORITY      12
+#define STM32_UART_USART2_IRQ_PRIORITY      12
+#define STM32_UART_USART3_IRQ_PRIORITY      12
+#define STM32_UART_USART1_DMA_PRIORITY      0
+#define STM32_UART_USART2_DMA_PRIORITY      0
+#define STM32_UART_USART3_DMA_PRIORITY      0
+#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
+
+/*
+ * USB driver system settings.
+ */
+#define STM32_USB_USE_USB1                  FALSE
+#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE
+#define STM32_USB_USB1_HP_IRQ_PRIORITY      13
+#define STM32_USB_USB1_LP_IRQ_PRIORITY      14
+
+/*
+ * WDG driver system settings.
+ */
+#define STM32_WDG_USE_IWDG                  FALSE
+
+/*
+ * QEI driver system settings.
+ */
+#define STM32_QEI_USE_TIM1                  FALSE
+#define STM32_QEI_USE_TIM2                  FALSE
+#define STM32_QEI_USE_TIM3                  FALSE
+#define STM32_QEI_USE_TIM4                  FALSE
+#define STM32_QEI_USE_TIM5                  FALSE
+#define STM32_QEI_USE_TIM8                  FALSE
+
+#endif /* _MCUCONF_H_ */
diff --git a/modules/LightRing_1-0/module.c b/modules/LightRing_1-0/module.c
new file mode 100644
index 0000000..e27dda3
--- /dev/null
+++ b/modules/LightRing_1-0/module.c
@@ -0,0 +1,371 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include "module.h"
+
+/*===========================================================================*/
+/**
+ * @name Module specific functions
+ * @{
+ */
+/*===========================================================================*/
+#include <amiroos.h>
+
+/**
+ * @brief   Interrupt service routine callback for I/O interrupt signals.
+ *
+ * @param   extp      EXT driver to handle the ISR.
+ * @param   channel   Channel on which the interrupt was encountered.
+ */
+static void _moduleIsrCallback(EXTDriver* extp, expchannel_t channel) {
+  (void)extp;
+
+  chSysLockFromISR();
+  chEvtBroadcastFlagsI(&aos.events.io.source, (1 << channel));
+  chSysUnlockFromISR();
+
+  return;
+}
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name ChibiOS/HAL configuration
+ * @{
+ */
+/*===========================================================================*/
+
+CANConfig moduleHalCanConfig = {
+  /* mcr  */ CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
+  /* btr  */ CAN_BTR_SJW(1) | CAN_BTR_TS2(2) | CAN_BTR_TS1(13) | CAN_BTR_BRP(1),
+};
+
+EXTConfig moduleHalExtConfig = {
+  /* channel configrations */ {
+    /* channel  0 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel  1 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel  2 */ { // SYS_SYNC_N: automatic interrupt on event
+      /* mode     */ EXT_MODE_GPIOD | EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
+      /* callback */ _moduleIsrCallback
+    },
+    /* channel  3 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel  4 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel  5 */ { // LASER_OC_N: must be enabled explicitely
+      /* mode     */ EXT_MODE_GPIOB | EXT_CH_MODE_FALLING_EDGE,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel  6 */ { // SYS_UART_DN: automatic interrupt on event
+      /* mode     */ EXT_MODE_GPIOB | EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel  7 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel  8 */ { // WL_GDO0: must be enabled explicitely
+      /* mode     */ EXT_MODE_GPIOB | EXT_CH_MODE_BOTH_EDGES,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel  9 */ { // WL_GDO2: must be enabled explicitely
+      /* mode     */ EXT_MODE_GPIOB | EXT_CH_MODE_BOTH_EDGES,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel 10 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel 11 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel 12 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel 13 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel 14 */ { // SYS_PD_N: automatic interrupt when activated
+      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART,
+      /* callback */ _moduleIsrCallback
+    },
+    /* channel 15 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel 16 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel 17 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel 18 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+  }
+};
+
+I2CConfig moduleHalI2cEepromConfig = {
+  /* I²C mode   */ OPMODE_I2C,
+  /* frequency  */ 400000, // TODO: replace with some macro (-> ChibiOS/HAL)
+  /* duty cycle */ FAST_DUTY_CYCLE_2,
+};
+
+SerialConfig moduleHalProgIfConfig = {
+  /* bit rate */ 115200,
+  /* CR1      */ 0,
+  /* CR1      */ 0,
+  /* CR1      */ 0,
+};
+
+SPIConfig moduleHalSpiLightConfig = {
+  /* callback function pointer   */ NULL,
+  /* chip select line port       */ GPIOC,
+  /* chip select line pad number */ GPIOC_LIGHT_XLAT,
+  /* CR1                         */ SPI_CR1_BR_0 | SPI_CR1_BR_1,
+  /* CR2                         */ SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN,
+};
+
+/*===========================================================================*/
+/**
+ * @name GPIO definitions
+ * @{
+ */
+/*===========================================================================*/
+
+apalGpio_t moduleGpioLightBlank = {
+  /* port */ GPIOA,
+  /* pad  */ GPIOA_LIGHT_BLANK,
+};
+
+apalGpio_t moduleGpioLaserEn = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_LASER_EN,
+};
+
+apalGpio_t moduleGpioLaserOc = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_LASER_OC_N,
+};
+
+apalGpio_t moduleGpioSysUartDn = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_SYS_UART_DN,
+};
+
+apalGpio_t moduleGpioWlGdo2 = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_WL_GDO2,
+};
+
+apalGpio_t moduleGpioWlGdo0= {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_WL_GDO0,
+};
+
+apalGpio_t moduleGpioLightXlat = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_LIGHT_XLAT,
+};
+
+apalGpio_t moduleGpioSysPd = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_SYS_PD_N,
+};
+
+apalGpio_t moduleGpioSysSync = {
+  /* port */ GPIOD,
+  /* pad  */ GPIOD_SYS_INT_N,
+};
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name AMiRo-OS core configurations
+ * @{
+ */
+/*===========================================================================*/
+
+apalControlGpio_t moduleSsspPd = {
+  /* GPIO */ &moduleGpioSysPd,
+  /* meta */ {
+    /* active state */ APAL_GPIO_ACTIVE_LOW,
+    /* edge         */ APAL_GPIO_EDGE_FALLING,
+    /* direction    */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
+  },
+};
+
+apalControlGpio_t moduleSsspSync = {
+  /* GPIO */ &moduleGpioSysSync,
+  /* meta */ {
+    /* active state */ APAL_GPIO_ACTIVE_LOW,
+    /* edge         */ APAL_GPIO_EDGE_FALLING,
+    /* direction    */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
+  },
+};
+
+const char* moduleShellPrompt = "LightRing";
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Low-level drivers
+ * @{
+ */
+/*===========================================================================*/
+
+AT24C01BNDriver moduleLldEeprom = {
+  /* I2C driver   */ &MODULE_HAL_I2C_EEPROM,
+  /* I2C address  */ 0x00u,
+};
+
+TLC5947Driver moduleLldLedPwm = {
+  /* SPI driver         */ &MODULE_HAL_SPI_LIGHT,
+  /* BLANK signal GPIO  */ {
+    /* GPIO */ &moduleGpioLightBlank,
+    /* meta */ {
+      /* active state */ TLC5947_LLD_BLANK_ACTIVE_STATE,
+      /* edge         */ APAL_GPIO_EDGE_NONE,
+      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
+    },
+  },
+  /* XLAT signal GPIO   */ {
+    /* GPIO */ &moduleGpioLightXlat,
+    /* meta */ {
+      /* active state */ TLC5947_LLD_XLAT_ACTIVE_STATE,
+      /* edge         */ APAL_GPIO_EDGE_NONE,
+      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
+    },
+  },
+};
+
+TPS2051BDriver moduleLldPowerSwitchLaser = {
+  /* laser enable gpio */ {
+    /* GPIO */ &moduleGpioLaserEn,
+    /* meta */ {
+      /* active state */ APAL_GPIO_ACTIVE_HIGH,
+      /* edge         */ APAL_GPIO_EDGE_NONE,
+      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
+    },
+  },
+  /* laser overcurrent gpio */ {
+    /* GPIO         */ &moduleGpioLaserOc,
+    /* meta */ {
+      /* active state */ APAL_GPIO_ACTIVE_LOW,
+      /* edge         */ APAL_GPIO_EDGE_NONE,
+      /* direction    */ APAL_GPIO_DIRECTION_INPUT,
+    },
+  },
+};
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Unit tests (UT)
+ * @{
+ */
+/*===========================================================================*/
+#if (AMIROOS_CFG_TESTS_ENABLE == true) || defined(__DOXYGEN__)
+
+/* EEPROM (AT24C01BN) */
+static int _utShellCmdCb_AlldAt24c01bn(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldAt24c01bn, NULL);
+  return AOS_OK;
+}
+static ut_at24c01bndata_t _utAt24c01bnData = {
+  /* driver   */ &moduleLldEeprom,
+  /* timeout  */ MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldAt24c01bn = {
+  /* name           */ "AT24C01BN-SH-B",
+  /* info           */ "1kbit EEPROM",
+  /* test function  */ utAlldAt24c01bnFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:EEPROM",
+    /* callback */ _utShellCmdCb_AlldAt24c01bn,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAt24c01bnData,
+};
+
+/* LED PWM driver (TLD5947) */
+static int _utShellCmdCb_Tlc5947(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldTlc5947, NULL);
+  return AOS_OK;
+}
+aos_unittest_t moduleUtAlldTlc5947 = {
+  /* info           */ "TLC5947",
+  /* name           */ "LED PWM driver",
+  /* test function  */ utAlldTlc5947Func,
+  /* shell command  */ {
+    /* name     */ "unittest:Lights",
+    /* callback */ _utShellCmdCb_Tlc5947,
+    /* next     */ NULL,
+  },
+  /* data           */ &moduleLldLedPwm,
+};
+
+/* power switch (Laser) */
+static int _utShellCmdCb_Tps2051bdbv(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream,&moduleUtAlldTps2051bdbv, NULL);
+  return AOS_OK;
+}
+aos_unittest_t moduleUtAlldTps2051bdbv = {
+  /* info           */ "TPS2051BDBV",
+  /* name           */ "current-limited power switch",
+  /* test function  */ utAlldTps2051bdbvFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:PowerSwitch",
+    /* callback */ _utShellCmdCb_Tps2051bdbv,
+    /* next     */ NULL,
+  },
+  /* data           */ &moduleLldPowerSwitchLaser,
+};
+
+#endif /* AMIROOS_CFG_TESTS_ENABLE == true */
+
+/** @} */
diff --git a/modules/LightRing_1-0/module.h b/modules/LightRing_1-0/module.h
new file mode 100644
index 0000000..5e06d5d
--- /dev/null
+++ b/modules/LightRing_1-0/module.h
@@ -0,0 +1,331 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _AMIROOS_MODULE_H_
+#define _AMIROOS_MODULE_H_
+
+/*===========================================================================*/
+/**
+ * @name Module specific functions
+ * @{
+ */
+/*===========================================================================*/
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name ChibiOS/HAL configuration
+ * @{
+ */
+/*===========================================================================*/
+#include <hal.h>
+
+/**
+ * @brief   CAN driver to use.
+ */
+#define MODULE_HAL_CAN                          CAND1
+
+/**
+ * @brief   Configuration for the CAN driver.
+ */
+extern CANConfig moduleHalCanConfig;
+
+/**
+ * @brief   Interrupt driver to use.
+ */
+#define MODULE_HAL_EXT                          EXTD1
+
+/**
+ * @brief   Interrupt driver configuration.
+ */
+extern EXTConfig moduleHalExtConfig;
+
+/**
+ * @brief   I2C driver to access the EEPROM.
+ */
+#define MODULE_HAL_I2C_EEPROM                   I2CD2
+
+/**
+ * @brief   Configuration for the EEPROM I2C driver.
+ */
+extern I2CConfig moduleHalI2cEepromConfig;
+
+/**
+ * @brief   Serial driver of the programmer interface.
+ */
+#define MODULE_HAL_PROGIF                       SD1
+
+/**
+ * @brief   Configuration for the programmer serial interface driver.
+ */
+extern SerialConfig moduleHalProgIfConfig;
+
+/**
+ * @brief   SPI interface driver for the motion sensors (gyroscope and accelerometer).
+ */
+#define MODULE_HAL_SPI_LIGHT                    SPID1
+
+/**
+ * @brief   Configuration for the SPI interface driver to communicate with the LED driver.
+ */
+extern SPIConfig moduleHalSpiLightConfig;
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name GPIO definitions
+ * @{
+ */
+/*===========================================================================*/
+#include <amiro-lld.h>
+
+/**
+ * @brief   Interrupt channel for the SYS_SYNC signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_SYSSYNC          ((expchannel_t)2)
+
+/**
+ * @brief   Interrupt channel for the LASER_OC signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_LASEROC          ((expchannel_t)5)
+
+/**
+ * @brief   Interrupt channel for the SYS_UART_DN signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_SYSUARTDN        ((expchannel_t)6)
+
+/**
+ * @brief   Interrupt channel for the WL_GDO2 signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_WLGDO2           ((expchannel_t)8)
+
+/**
+ * @brief   Interrupt channel for the WL_GDO0 signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_WLGDO0           ((expchannel_t)9)
+
+/**
+ * @brief   Interrupt channel for the SYS_PD signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_SYSPD            ((expchannel_t)14)
+
+/**
+ * @brief   LIGHT_BANK output signal GPIO.
+ */
+extern apalGpio_t moduleGpioLightBlank;
+
+/**
+ * @brief   LASER_EN output signal GPIO.
+ */
+extern apalGpio_t moduleGpioLaserEn;
+
+/**
+ * @brief   LASER_OC input signal GPIO.
+ */
+extern apalGpio_t moduleGpioLaserOc;
+
+/**
+ * @brief   SYS_UART_DN bidirectional signal GPIO.
+ */
+extern apalGpio_t moduleGpioSysUartDn;
+
+/**
+ * @brief   WL_GDO2 input signal GPIO.
+ */
+extern apalGpio_t moduleGpioWlGdo2;
+
+/**
+ * @brief   WL_GDO0 input signal GPIO.
+ */
+extern apalGpio_t moduleGpioWlGdo0;
+
+/**
+ * @brief   LIGHT_XLAT output signal GPIO.
+ */
+extern apalGpio_t moduleGpioLightXlat;
+
+/**
+ * @brief   SYS_PD bidirectional signal GPIO.
+ */
+extern apalGpio_t moduleGpioSysPd;
+
+/**
+ * @brief   SYS_SYNC bidirectional signal GPIO.
+ */
+extern apalGpio_t moduleGpioSysSync;
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name AMiRo-OS core configurations
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Event flag to be set on a LASER_OC interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_LASEROC          ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_LASEROC))
+
+/**
+ * @brief   Event flag to be set on a SYS_UART_DN interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSUARTDN        ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_SYSUARTDN))
+
+/**
+ * @brief   Event flag to be set on a WL_GDO2 interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_WLGDO2           ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_WLGDO2))
+
+/**
+ * @brief   Event flag to be set on a WL_GDO0 interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_WLGDO0           ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_WLGDO0))
+
+/**
+ * @brief   Event flag to be set on a SYS_PD interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSPD            ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_SYSPD))
+
+/**
+ * @brief   Event flag to be set on a SYS_SYNC interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSSYNC          ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_SYSSYNC))
+
+/**
+ * @brief   PD signal for SSSP.
+ */
+extern apalControlGpio_t moduleSsspPd;
+
+/**
+ * @brief   SYNC signal for SSSP.
+ */
+extern apalControlGpio_t moduleSsspSync;
+
+/**
+ * @brief   Shell prompt text.
+ */
+extern const char* moduleShellPrompt;
+
+/**
+ * @brief   Unit test initialization hook.
+ */
+#define MODULE_INIT_TESTS() {                                                 \
+  /* add unit-test shell commands */                                          \
+  aosShellAddCommand(aos.shell, &moduleUtAlldAt24c01bn.shellcmd);             \
+  aosShellAddCommand(aos.shell, &moduleUtAlldTlc5947.shellcmd);               \
+  aosShellAddCommand(aos.shell, &moduleUtAlldTps2051bdbv.shellcmd);           \
+}
+
+/**
+ * @brief   Periphery communication interfaces initialization hook.
+ */
+#define MODULE_INIT_PERIPHERY_COMM() {                                        \
+  /* serial driver */                                                         \
+  sdStart(&MODULE_HAL_PROGIF, &moduleHalProgIfConfig);                        \
+  /* I2C */                                                                   \
+  moduleHalI2cEepromConfig.clock_speed = (AT24C01BN_LLD_I2C_MAXFREQUENCY < moduleHalI2cEepromConfig.clock_speed) ? AT24C01BN_LLD_I2C_MAXFREQUENCY : moduleHalI2cEepromConfig.clock_speed; \
+  moduleHalI2cEepromConfig.duty_cycle = (moduleHalI2cEepromConfig.clock_speed <= 100000) ? STD_DUTY_CYCLE : FAST_DUTY_CYCLE_2;  \
+  i2cStart(&MODULE_HAL_I2C_EEPROM, &moduleHalI2cEepromConfig);                \
+  /* SPI */                                                                   \
+  spiStart(&MODULE_HAL_SPI_LIGHT, &moduleHalSpiLightConfig);                  \
+}
+
+/**
+ * @brief   Hook to handle IO events during SSSP startup synchronization.
+ */
+#define MODULE_SSP_STARTUP_OUTRO_IO_EVENT(mask, flags) {                      \
+  /* ignore all events */                                                     \
+  (void)mask;                                                                 \
+  (void)flags;                                                                \
+}
+
+/**
+ * @brief   Periphery communication interface deinitialization hook.
+ */
+#define MODULE_SHUTDOWN_PERIPHERY_COMM() {                                    \
+  /* SPI */                                                                   \
+  spiStop(&MODULE_HAL_SPI_LIGHT);                                             \
+  /* I2C */                                                                   \
+  i2cStop(&MODULE_HAL_I2C_EEPROM);                                            \
+  /* don't stop the serial driver so messages can still be printed */         \
+}
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Low-level drivers
+ * @{
+ */
+/*===========================================================================*/
+#include <alld_at24c01bn-sh-b.h>
+#include <alld_tlc5947.h>
+#include <alld_tps2051bdbv.h>
+
+/**
+ * @brief   EEPROM driver.
+ */
+extern AT24C01BNDriver moduleLldEeprom;
+
+/**
+ * @brief   LED PWM driver.
+ */
+extern TLC5947Driver moduleLldLedPwm;
+
+/**
+ * @brief   Power switch driver for the laser supply power.
+ */
+extern TPS2051BDriver moduleLldPowerSwitchLaser;
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Unit tests (UT)
+ * @{
+ */
+/*===========================================================================*/
+#if (AMIROOS_CFG_TESTS_ENABLE == true) || defined(__DOXYGEN__)
+#include <ut_alld_at24c01bn-sh-b.h>
+#include <ut_alld_tlc5947.h>
+#include <ut_alld_tps2051bdbv.h>
+
+/**
+ * @brief   EEPROM unit test object.
+ */
+extern aos_unittest_t moduleUtAlldAt24c01bn;
+
+/**
+ * @brief   LED PWM driver unit test object.
+ */
+extern aos_unittest_t moduleUtAlldTlc5947;
+
+/**
+ * @brief   Current-limited power switch (Laser output)
+ */
+extern aos_unittest_t moduleUtAlldTps2051bdbv;
+
+#endif /* AMIROOS_CFG_TESTS_ENABLE == true */
+
+/** @} */
+
+#endif /* _AMIROOS_MODULE_H_ */
diff --git a/modules/Makefile b/modules/Makefile
new file mode 100644
index 0000000..99be89b
--- /dev/null
+++ b/modules/Makefile
@@ -0,0 +1,47 @@
+################################################################################
+# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
+# (AMiRo) platform.                                                            #
+# Copyright (C) 2016..2018  Thomas Schöpping et al.                            #
+#                                                                              #
+# This program is free software: you can redistribute it and/or modify         #
+# it under the terms of the GNU General Public License as published by         #
+# the Free Software Foundation, either version 3 of the License, or            #
+# (at your option) any later version.                                          #
+#                                                                              #
+# This program is distributed in the hope that it will be useful,              #
+# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
+# GNU General Public License for more details.                                 #
+#                                                                              #
+# You should have received a copy of the GNU General Public License            #
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
+#                                                                              #
+# This research/work was supported by the Cluster of Excellence Cognitive      #
+# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
+# funded by the German Research Foundation (DFG).                              #
+################################################################################
+
+
+
+include $(dir $(lastword $(MAKEFILE_LIST)))modules.mk
+
+ifneq ($(BUILDDIR),)
+  export BUILDDIR
+endif
+
+CLEANTRGS = $(MODULES:%=clean_%)
+FLASHTRGS = $(MODULES:%=flash_%)
+
+.PHONY: all $(MODULES) flash $(FLASHTRGS) clean $(CLEANTRGS)
+
+all: $(MODULES)
+$(MODULES):
+	$(MAKE) -C $(MODULES_DIR)$@
+
+flash: $(FLASHTRGS)
+$(FLASHTRGS):
+	$(MAKE) -C $(MODULES_DIR)$(@:flash_%=%) flash
+
+clean: $(CLEANTRGS)
+$(CLEANTRGS):
+	$(MAKE) -C $(MODULES_DIR)$(@:clean_%=%) clean
diff --git a/modules/PowerManagement_1-1/Makefile b/modules/PowerManagement_1-1/Makefile
new file mode 100644
index 0000000..ebd5442
--- /dev/null
+++ b/modules/PowerManagement_1-1/Makefile
@@ -0,0 +1,303 @@
+################################################################################
+# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
+# (AMiRo) platform.                                                            #
+# Copyright (C) 2016..2018  Thomas Schöpping et al.                            #
+#                                                                              #
+# This program is free software: you can redistribute it and/or modify         #
+# it under the terms of the GNU General Public License as published by         #
+# the Free Software Foundation, either version 3 of the License, or            #
+# (at your option) any later version.                                          #
+#                                                                              #
+# This program is distributed in the hope that it will be useful,              #
+# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
+# GNU General Public License for more details.                                 #
+#                                                                              #
+# You should have received a copy of the GNU General Public License            #
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
+#                                                                              #
+# This research/work was supported by the Cluster of Excellence Cognitive      #
+# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
+# funded by the German Research Foundation (DFG).                              #
+################################################################################
+
+
+
+################################################################################
+# Build global options                                                         #
+# NOTE: Can be overridden externally.                                          #
+#                                                                              #
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+  USE_OPT = -O2 -fomit-frame-pointer -falign-functions=16 -fstack-usage
+endif
+
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+  USE_COPT = -std=c11
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+  USE_CPPOPT = -fno-rtti -std=c++17
+endif
+
+# Enable this if you want the linker to remove unused code and data
+ifeq ($(USE_LINK_GC),)
+  USE_LINK_GC = yes
+endif
+
+# Linker extra options here.
+ifeq ($(USE_LDOPT),)
+  USE_LDOPT =
+endif
+
+# Enable this if you want link time optimizations (LTO)
+ifeq ($(USE_LTO),)
+  USE_LTO = yes
+endif
+
+# If enabled, this option allows to compile the application in THUMB mode.
+ifeq ($(USE_THUMB),)
+  USE_THUMB = yes
+endif
+
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+  USE_VERBOSE_COMPILE = no
+endif
+
+# If enabled, this option makes the build process faster by not compiling
+# modules not used in the current configuration.
+ifeq ($(USE_SMART_BUILD),)
+  USE_SMART_BUILD = no
+endif
+
+#                                                                              #
+# Build global options                                                         #
+################################################################################
+
+################################################################################
+# Architecture or project specific options                                     #
+#                                                                              #
+
+# Stack size to be allocated to the Cortex-M process stack. This stack is
+# the stack used by the main() thread.
+ifeq ($(USE_PROCESS_STACKSIZE),)
+  USE_PROCESS_STACKSIZE = 0x400
+endif
+
+# Stack size to the allocated to the Cortex-M main/exceptions stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
+  USE_EXCEPTIONS_STACKSIZE = 0x400
+endif
+
+# Enables the use of FPU on Cortex-M4.
+# Possible selections are:
+#   no     - no FPU is used (probably equals 'soft')
+#   soft   - does not use the FPU, thus all floating point operations are emulated
+#   softfp - uses the FPU, but uses the integer registers only
+#   hard   - uses the FPU and passes data via the FPU registers
+ifeq ($(USE_FPU),)
+  USE_FPU = softfp
+endif
+
+#                                                                              #
+# Architecture or project specific options                                     #
+################################################################################
+
+################################################################################
+# Project, sources and paths                                                   #
+#                                                                              #
+
+# Define project name here
+PROJECT := $(patsubst $(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))..)/%,%,$(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))))
+
+# Imported source files and paths
+include ../../../kernel/kernel.mk
+CHIBIOS := $(AMIROOS_KERNEL)
+AMIROOS = ../..
+# Startup files
+include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk
+# HAL-OSAL files
+include $(CHIBIOS)/os/hal/hal.mk
+include $(AMIROOS)/hal/hal.mk
+include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk
+include $(AMIROOS)/hal/ports/STM32/platform.mk
+include ./board.mk
+include $(CHIBIOS)/os/hal/osal/rt/osal.mk
+# RTOS files
+include $(CHIBIOS)/os/rt/rt.mk
+include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
+# Other files (optional).
+include $(CHIBIOS)/test/rt/test.mk
+# AMiRo-BLT files
+include ../../../bootloader/bootloader.mk
+# AMiRo-LLD files
+include ../../../periphery-lld/periphery-lld.mk
+# AMiRo-OS files
+include $(AMIROOS)/modules/modules.mk
+include $(AMIROOS)/core/core.mk
+include $(AMIROOS)/unittests/unittests.mk
+
+# Define linker script file here
+LDSCRIPT= $(BOARDLD)/STM32F405xG.ld
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = $(STARTUPSRC) \
+       $(KERNSRC) \
+       $(PORTSRC) \
+       $(OSALSRC) \
+       $(HALSRC) \
+       $(PLATFORMSRC) \
+       $(BOARDSRC) \
+       $(MODULESCSRC) \
+       $(TESTSRC) \
+       $(PERIPHERYLLDCSRC) \
+       $(AMIROOSCORECSRC) \
+       $(UNITTESTSCSRC) \
+       $(CHIBIOS)/os/various/evtimer.c \
+       $(CHIBIOS)/os/various/syscalls.c \
+       $(CHIBIOS)/os/hal/lib/streams/chprintf.c \
+       module.c \
+       $(APPSCSRC)
+
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC = $(AMIROOSCORECPPSRC) \
+         $(APPSCPPSRC)
+
+# C sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+ACSRC = $(APPSACSRC)
+
+# C++ sources to be compiled in ARM mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+ACPPSRC = $(APPSACPPSRC)
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+TCSRC = $(APPSTCSRC)
+
+# C sources to be compiled in THUMB mode regardless of the global setting.
+# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
+#       option that results in lower performance and larger code size.
+TCPPSRC = $(APPSTCPPSRC)
+
+# List ASM source files here
+ASMSRC = $(APPSASMSRC)
+ASMXSRC = $(STARTUPASM) \
+          $(PORTASM) \
+          $(OSALASM) \
+          $(APPSASMXSRC)
+
+INCDIR = $(CHIBIOS)/os/license \
+         $(STARTUPINC) \
+         $(KERNINC) \
+         $(PORTINC) \
+         $(OSALINC) \
+         $(HALINC) \
+         $(PLATFORMINC) \
+         $(BOARDINC) \
+         $(MODULESINC) \
+         $(TESTINC) \
+         $(BOOTLOADERINC) \
+         $(CHIBIOS)/os/hal/lib/streams \
+         $(CHIBIOS)/os/various \
+         $(PERIPHERYLLDINC) \
+         $(AMIROOS) \
+         $(AMIROOSCOREINC) \
+         $(UNITTESTSINC) \
+         $(APPSINC)
+
+#                                                                              #
+# Project, sources and paths                                                   #
+################################################################################
+
+################################################################################
+# Compiler settings                                                            #
+# NOTE: Some can be overridden externally.                                     #
+#                                                                              #
+
+MCU  = cortex-m4
+
+#TRGT = arm-elf-
+TRGT = arm-none-eabi-
+CC   = $(TRGT)gcc
+CPPC = $(TRGT)g++
+# Enable loading with g++ only if you need C++ runtime support.
+# NOTE: You can use C++ even without C++ support if you are careful. C++
+#       runtime support makes code size explode.
+LD   = $(TRGT)gcc
+#LD   = $(TRGT)g++
+CP   = $(TRGT)objcopy
+AS   = $(TRGT)gcc -x assembler-with-cpp
+AR   = $(TRGT)ar
+OD   = $(TRGT)objdump
+SZ   = $(TRGT)size
+HEX  = $(CP) -O ihex
+BIN  = $(CP) -O binary
+SREC = $(CP) -O srec --srec-len=248
+
+# ARM-specific options here
+ifeq ($(AOPT),)
+  AOPT =
+endif
+
+# THUMB-specific options here
+ifeq ($(TOPT),)
+  TOPT = -mthumb -DTHUMB
+endif
+
+# Define C warning options here
+ifeq ($(CWARN),)
+  CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
+endif
+
+# Define C++ warning options here
+ifeq ($(CPPWARN),)
+  CPPWARN = -Wall -Wextra -Wundef
+endif
+
+#                                                                              #
+# Compiler settings                                                            #
+################################################################################
+
+################################################################################
+# Start of user section                                                        #
+#                                                                              #
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS +=
+
+# Define ASM defines here
+UADEFS +=
+
+# List all user directories here
+UINCDIR +=
+
+# List the user directory to look for the libraries here
+ULIBDIR +=
+
+# List all user libraries here
+ULIBS +=
+
+#                                                                              #
+# End of user defines                                                          #
+################################################################################
+
+# allow for custom build directory
+ifneq ($(BUILDDIR),)
+  BUILDDIR := $(BUILDDIR)/$(PROJECT)
+endif
+
+RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
+include $(RULESPATH)/rules.mk
+
+include $(AMIROOS)/modules/flash.mk
diff --git a/modules/PowerManagement_1-1/alldconf.h b/modules/PowerManagement_1-1/alldconf.h
new file mode 100644
index 0000000..14572d2
--- /dev/null
+++ b/modules/PowerManagement_1-1/alldconf.h
@@ -0,0 +1,84 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _ALLDCONF_H_
+#define _ALLDCONF_H_
+
+/*
+ * compatibility guards
+ */
+#define _AMIRO_LLD_CFG_
+#define AMIRO_LLD_CFG_VERSION_MAJOR         1
+#define AMIRO_LLD_CFG_VERSION_MINOR         0
+
+/**
+ * @brief   Enable flag for the AT24C01BN-SH-B EEPROM.
+ */
+#define AMIROLLD_CFG_USE_AT24C01BN
+
+/**
+ * @brief   Enable flag for the BQ24103A charger.
+ */
+#define AMIROLLD_CFG_USE_BQ24103A
+
+/**
+ * @brief   Enable flag for the BQ27500 fuel gauge.
+ */
+#define AMIROLLD_CFG_USE_BQ27500
+
+/**
+ * @brief   Enable flag for the INA219 power monitor.
+ */
+#define AMIROLLD_CFG_USE_INA219
+
+/**
+ * @brief   Enable flag for the status LED.
+ */
+#define AMIROLLD_CFG_USE_LED
+
+/**
+ * @brief   Enable flag for the MPR121 touch sensor.
+ */
+#define AMIROLLD_CFG_USE_MPR121
+
+/**
+ * @brief   Enable flag for the PCA9544A I2C multiplexer.
+ */
+#define AMIROLLD_CFG_USE_PCA9544A
+
+/**
+ * @brief   Enable flag for the PKLCS1212E4001 buzzer.
+ */
+#define AMIROLLD_CFG_USE_PKLCS1212E4001
+
+/**
+ * @brief   Enable flag for the TPS2051BDBV power switch.
+ */
+#define AMIROLLD_CFG_USE_TPS2051BDBV
+
+/**
+ * @brief   Enable flag for the TPS62113 step-down converter.
+ */
+#define AMIROLLD_CFG_USE_TPS62113
+
+/**
+ * @brief   Enable flag for the VCNL4020 proximity sensor.
+ */
+#define AMIROLLD_CFG_USE_VCNL4020
+
+#endif /* _ALLDCONF_H_ */
diff --git a/modules/PowerManagement_1-1/aosconf.h b/modules/PowerManagement_1-1/aosconf.h
new file mode 100644
index 0000000..c0dc96d
--- /dev/null
+++ b/modules/PowerManagement_1-1/aosconf.h
@@ -0,0 +1,161 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _AOSCONF_H_
+#define _AOSCONF_H_
+
+/*
+ * compatibility guards
+ */
+#define _AMIRO_OS_CFG_
+#define _AMIRO_OS_CFG_VERSION_MAJOR_            2
+#define _AMIRO_OS_CFG_VERSION_MINOR_            0
+
+#include <stdbool.h>
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/*
+ * Include an external configuration file to override the following default settings only if required.
+ */
+#if defined(AMIRO_APPS) && (AMIRO_APPS == true)
+  #include <osconf.h>
+#endif
+
+/**
+ * @brief   Flag to set the module as SSSP master.
+ */
+#if !defined(OS_CFG_SSSP_MASTER)
+  #define AMIROOS_CFG_SSSP_MASTER               true
+#else
+  #define AMIROOS_CFG_SSSP_MASTER               OS_CFG_SSSP_MASTER
+#endif
+
+/**
+ * @brief   Time boundary for robot wide clock synchronization in microseconds.
+ * @details Whenever the SSSP S (snychronization) signal gets logically deactivated,
+ *          All modules need to align their local uptime to the nearest multiple of this value.
+ */
+#if !defined(OS_CFG_SSSP_SYSSYNCPERIOD)
+  #define AMIROOS_CFG_SSSP_SYSSYNCPERIOD        1000000
+#else
+  #define AMIROOS_CFG_SSSP_SYSSYNCPERIOD        OS_CFG_SSSP_SYSSYNCPERIOD
+#endif
+
+/**
+ * @brief   Flag to enable/disable debug API.
+ */
+#if !defined(OS_CFG_DBG)
+  #define AMIROOS_CFG_DBG                       true
+#else
+  #define AMIROOS_CFG_DBG                       OS_CFG_DBG
+#endif
+
+/**
+ * @brief   Flag to enable/disable unit tests.
+ */
+#if !defined(OS_CFG_TESTS_ENABLE)
+  #define AMIROOS_CFG_TESTS_ENABLE              true
+#else
+  #define AMIROOS_CFG_TESTS_ENABLE              OS_CFG_TESTS_ENABLE
+#endif
+
+/**
+ * @brief   Flag to enable/disable profiling API.
+ */
+#if !defined(OS_CFG_PROFILE)
+  #define AMIROOS_CFG_PROFILE                   true
+#else
+  #define AMIROOS_CFG_PROFILE                   OS_CFG_PROFILE
+#endif
+
+/**
+ * @brief   Timeout value when waiting for events in the main loop in microseconds.
+ * @details A value of 0 deactivates the timeout.
+ */
+#if !defined(OS_CFG_MAIN_LOOP_TIMEOUT)
+  #define AMIROOS_CFG_MAIN_LOOP_TIMEOUT         0
+#else
+  #define AMIROOS_CFG_MAIN_LOOP_TIMEOUT         OS_CFG_MAIN_LOOP_TIMEOUT
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name System shell options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Shell enable flag.
+ */
+#if (AMIROOS_CFG_TESTS_ENABLE == false) && !defined(OS_CFG_SHELL_ENABLE)
+  #define AMIROOS_CFG_SHELL_ENABLE              true
+#elif (AMIROOS_CFG_TESTS_ENABLE == true)
+  #define AMIROOS_CFG_SHELL_ENABLE              true
+#else
+  #define AMIROOS_CFG_SHELL_ENABLE              OS_CFG_SHELL_ENABLE
+#endif
+
+/**
+ * @brief   Shell thread stack size.
+ */
+#if !defined(OS_CFG_SHELL_STACKSIZE)
+  #define AMIROOS_CFG_SHELL_STACKSIZE           1024
+#else
+  #define AMIROOS_CFG_SHELL_STACKSIZE           OS_CFG_SHELL_STACKSIZE
+#endif
+
+/**
+ * @brief   Shell thread priority.
+ */
+#if !defined(OS_CFG_SHELL_THREADPRIO)
+  #define AMIROOS_CFG_SHELL_THREADPRIO          THD_NORMALPRIO_MIN
+#else
+  #define AMIROOS_CFG_SHELL_THREADPRIO          OS_CFG_SHELL_THREADPRIO
+#endif
+
+/**
+ * @brief   Shell maximum input line length.
+ */
+#if !defined(OS_CFG_SHELL_LINEWIDTH)
+  #define AMIROOS_CFG_SHELL_LINEWIDTH           64
+#else
+  #define AMIROOS_CFG_SHELL_LINEWIDTH           OS_CFG_SHELL_LINEWIDTH
+#endif
+
+/**
+ * @brief   Shell maximum number of arguments.
+ */
+#if !defined(OS_CFG_SHELL_MAXARGS)
+  #define AMIROOS_CFG_SHELL_MAXARGS             4
+#else
+  #define AMIROOS_CFG_SHELL_MAXARGS             OS_CFG_SHELL_MAXARGS
+#endif
+
+/** @} */
+
+#endif /* _AOSCONF_H_ */
+
diff --git a/modules/PowerManagement_1-1/board.c b/modules/PowerManagement_1-1/board.c
new file mode 100644
index 0000000..7e6ad50
--- /dev/null
+++ b/modules/PowerManagement_1-1/board.c
@@ -0,0 +1,82 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include <hal.h>
+
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+/**
+ * @brief   PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ *          This variable is used by the HAL when initializing the PAL driver.
+ */
+const PALConfig pal_default_config = {
+#if STM32_HAS_GPIOA
+  {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
+   VAL_GPIOA_ODR,   VAL_GPIOA_AFRL,   VAL_GPIOA_AFRH},
+#endif
+#if STM32_HAS_GPIOB
+  {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
+   VAL_GPIOB_ODR,   VAL_GPIOB_AFRL,   VAL_GPIOB_AFRH},
+#endif
+#if STM32_HAS_GPIOC
+  {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
+   VAL_GPIOC_ODR,   VAL_GPIOC_AFRL,   VAL_GPIOC_AFRH},
+#endif
+#if STM32_HAS_GPIOD
+  {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
+   VAL_GPIOD_ODR,   VAL_GPIOD_AFRL,   VAL_GPIOD_AFRH},
+#endif
+#if STM32_HAS_GPIOE
+  {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
+   VAL_GPIOE_ODR,   VAL_GPIOE_AFRL,   VAL_GPIOE_AFRH},
+#endif
+#if STM32_HAS_GPIOF
+  {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
+   VAL_GPIOF_ODR,   VAL_GPIOF_AFRL,   VAL_GPIOF_AFRH},
+#endif
+#if STM32_HAS_GPIOG
+  {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
+   VAL_GPIOG_ODR,   VAL_GPIOG_AFRL,   VAL_GPIOG_AFRH},
+#endif
+#if STM32_HAS_GPIOH
+  {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
+   VAL_GPIOH_ODR,   VAL_GPIOH_AFRL,   VAL_GPIOH_AFRH},
+#endif
+#if STM32_HAS_GPIOI
+  {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
+   VAL_GPIOI_ODR,   VAL_GPIOI_AFRL,   VAL_GPIOI_AFRH}
+#endif
+};
+#endif
+
+/**
+ * @brief   Early initialization code.
+ * @details This initialization must be performed just after stack setup
+ *          and before any other initialization.
+ */
+void __early_init(void) {
+
+  stm32_clock_init();
+}
+
+/**
+ * @brief   Board-specific initialization code.
+ * @todo    Add your board-specific code, if any.
+ */
+void boardInit(void) {
+}
diff --git a/modules/PowerManagement_1-1/board.h b/modules/PowerManagement_1-1/board.h
new file mode 100644
index 0000000..af5f788
--- /dev/null
+++ b/modules/PowerManagement_1-1/board.h
@@ -0,0 +1,1374 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/*
+ * Setup for AMiRo PowerManagement v1.1 board.
+ */
+
+/*
+ * Board identifier.
+ */
+#define BOARD_POWERMANAGEMENT
+#define BOARD_NAME                      "AMiRo PowerManagement"
+#define BOARD_VERSION                   "1.1"
+
+/*
+ * Board oscillators-related settings.
+ * NOTE: LSE not fitted.
+ */
+#if !defined(STM32_LSECLK)
+#define STM32_LSECLK                    0U
+#endif
+
+#if !defined(STM32_HSECLK)
+#define STM32_HSECLK                    8000000U
+#endif
+
+/*
+ * Board voltages.
+ * Required for performance limits calculation.
+ */
+#define STM32_VDD                       330U
+
+/*
+ * MCU type as defined in the ST header.
+ */
+#define STM32F405xx
+
+/*
+ * STM32F4 alternate function definitions
+ */
+#define STM32F4xx_AF_system             0U
+#define STM32F4xx_AF_TIM1to2            1U
+#define STM32F4xx_AF_TIM3to5            2U
+#define STM32F4xx_AF_TIM8to11           3U
+#define STM32F4xx_AF_I2C1to3            4U
+#define STM32F4xx_AF_SPI1to2            5U
+#define STM32F4xx_AF_SPI3               6U
+#define STM32F4xx_AF_USART1to3          7U
+#define STM32F4xx_AF_USART4to6          8U
+#define STM32F4xx_AF_CAN1to2_TIM12to14  9U
+#define STM32F4xx_AF_OTG_HSFS           10U
+#define STM32F4xx_AF_ETH                11U
+#define STM32F4xx_AF_FSMC_SDIO_OTGHS    12U
+#define STM32F4xx_AF_DCMI               13U
+#define STM32F4xx_AF_EVENTOUT           15U
+
+/*
+ * IO pins assignments.
+ */
+#define GPIOA_WKUP                      0U
+#define GPIOA_PIN1                      1U
+#define GPIOA_SYS_UART_TX               2U
+#define GPIOA_SYS_UART_RX               3U
+#define GPIOA_SYS_SPI_SS0_N             4U
+#define GPIOA_SYS_SPI_SCLK              5U
+#define GPIOA_SYS_SPI_MISO              6U
+#define GPIOA_SYS_SPI_MOSI              7U
+#define GPIOA_SYS_REG_EN                8U
+#define GPIOA_PROG_RX                   9U
+#define GPIOA_PROG_TX                   10U
+#define GPIOA_CAN_RX                    11U
+#define GPIOA_CAN_TX                    12U
+#define GPIOA_SWDIO                     13U
+#define GPIOA_SWCLK                     14U
+#define GPIOA_SYS_SPI_SS1_N             15U
+
+#define GPIOB_IR_INT1_N                 0U
+#define GPIOB_VSYS_SENSE                1U
+#define GPIOB_POWER_EN                  2U
+#define GPIOB_SYS_UART_DN               3U
+#define GPIOB_CHARGE_STAT2A             4U
+#define GPIOB_BUZZER                    5U
+#define GPIOB_GAUGE_BATLOW2             6U
+#define GPIOB_GAUGE_BATGD2_N            7U
+#define GPIOB_GAUGE_SCL2                8U
+#define GPIOB_GAUGE_SDA2                9U
+#define GPIOB_GAUGE_SCL1                10U
+#define GPIOB_GAUGE_SDA1                11U
+#define GPIOB_LED                       12U
+#define GPIOB_BT_RTS                    13U
+#define GPIOB_BT_CTS                    14U
+#define GPIOB_SYS_UART_UP               15U
+
+#define GPIOC_CHARGE_STAT1A             0U
+#define GPIOC_GAUGE_BATLOW1             1U
+#define GPIOC_GAUGE_BATGD1_N            2U
+#define GPIOC_CHARGE_EN1_N              3U
+#define GPIOC_IR_INT2_N                 4U
+#define GPIOC_TOUCH_INT_N               5U
+#define GPIOC_SYS_DONE                  6U
+#define GPIOC_SYS_PROG_N                7U
+#define GPIOC_PATH_DC                   8U
+#define GPIOC_SYS_SPI_DIR               9U
+#define GPIOC_BT_RX                     10U
+#define GPIOC_BT_TX                     11U
+#define GPIOC_SYS_INT_N                 12U
+#define GPIOC_SYS_PD_N                  13U
+#define GPIOC_SYS_WARMRST_N             14U
+#define GPIOC_BT_RST                    15U
+
+#define GPIOD_PIN0                      0U
+#define GPIOD_PIN1                      1U
+#define GPIOD_CHARGE_EN2_N              2U
+#define GPIOD_PIN3                      3U
+#define GPIOD_PIN4                      4U
+#define GPIOD_PIN5                      5U
+#define GPIOD_PIN6                      6U
+#define GPIOD_PIN7                      7U
+#define GPIOD_PIN8                      8U
+#define GPIOD_PIN9                      9U
+#define GPIOD_PIN10                     10U
+#define GPIOD_PIN11                     11U
+#define GPIOD_PIN12                     12U
+#define GPIOD_PIN13                     13U
+#define GPIOD_PIN14                     14U
+#define GPIOD_PIN15                     15U
+
+#define GPIOE_PIN0                      0U
+#define GPIOE_PIN1                      1U
+#define GPIOE_PIN2                      2U
+#define GPIOE_PIN3                      3U
+#define GPIOE_PIN4                      4U
+#define GPIOE_PIN5                      5U
+#define GPIOE_PIN6                      6U
+#define GPIOE_PIN7                      7U
+#define GPIOE_PIN8                      8U
+#define GPIOE_PIN9                      9U
+#define GPIOE_PIN10                     10U
+#define GPIOE_PIN11                     11U
+#define GPIOE_PIN12                     12U
+#define GPIOE_PIN13                     13U
+#define GPIOE_PIN14                     14U
+#define GPIOE_PIN15                     15U
+
+#define GPIOF_PIN0                      0U
+#define GPIOF_PIN1                      1U
+#define GPIOF_PIN2                      2U
+#define GPIOF_PIN3                      3U
+#define GPIOF_PIN4                      4U
+#define GPIOF_PIN5                      5U
+#define GPIOF_PIN6                      6U
+#define GPIOF_PIN7                      7U
+#define GPIOF_PIN8                      8U
+#define GPIOF_PIN9                      9U
+#define GPIOF_PIN10                     10U
+#define GPIOF_PIN11                     11U
+#define GPIOF_PIN12                     12U
+#define GPIOF_PIN13                     13U
+#define GPIOF_PIN14                     14U
+#define GPIOF_PIN15                     15U
+
+#define GPIOG_PIN0                      0U
+#define GPIOG_PIN1                      1U
+#define GPIOG_PIN2                      2U
+#define GPIOG_PIN3                      3U
+#define GPIOG_PIN4                      4U
+#define GPIOG_PIN5                      5U
+#define GPIOG_PIN6                      6U
+#define GPIOG_PIN7                      7U
+#define GPIOG_PIN8                      8U
+#define GPIOG_PIN9                      9U
+#define GPIOG_PIN10                     10U
+#define GPIOG_PIN11                     11U
+#define GPIOG_PIN12                     12U
+#define GPIOG_PIN13                     13U
+#define GPIOG_PIN14                     14U
+#define GPIOG_PIN15                     15U
+
+#define GPIOH_OSC_IN                    0U
+#define GPIOH_OSC_OUT                   1U
+#define GPIOH_PIN2                      2U
+#define GPIOH_PIN3                      3U
+#define GPIOH_PIN4                      4U
+#define GPIOH_PIN5                      5U
+#define GPIOH_PIN6                      6U
+#define GPIOH_PIN7                      7U
+#define GPIOH_PIN8                      8U
+#define GPIOH_PIN9                      9U
+#define GPIOH_PIN10                     10U
+#define GPIOH_PIN11                     11U
+#define GPIOH_PIN12                     12U
+#define GPIOH_PIN13                     13U
+#define GPIOH_PIN14                     14U
+#define GPIOH_PIN15                     15U
+
+#define GPIOI_PIN0                      0U
+#define GPIOI_PIN1                      1U
+#define GPIOI_PIN2                      2U
+#define GPIOI_PIN3                      3U
+#define GPIOI_PIN4                      4U
+#define GPIOI_PIN5                      5U
+#define GPIOI_PIN6                      6U
+#define GPIOI_PIN7                      7U
+#define GPIOI_PIN8                      8U
+#define GPIOI_PIN9                      9U
+#define GPIOI_PIN10                     10U
+#define GPIOI_PIN11                     11U
+#define GPIOI_PIN12                     12U
+#define GPIOI_PIN13                     13U
+#define GPIOI_PIN14                     14U
+#define GPIOI_PIN15                     15U
+
+/*
+ * IO lines assignments.
+ */
+#define LINE_WKUP                       PAL_LINE(GPIOA, GPIOA_WKUP)
+#define LINE_SYS_UART_TX                PAL_LINE(GPIOA, GPIOA_SYS_UART_TX)
+#define LINE_SYS_UART_RX                PAL_LINE(GPIOA, GPIOA_SYS_UART_RX)
+#define LINE_SYS_SPI_SS0_N              PAL_LINE(GPIOA, GPIOA_SYS_SPI_SS0_N)
+#define LINE_SYS_SPI_SCLK               PAL_LINE(GPIOA, GPIOA_SYS_SPI_SCLK)
+#define LINE_SYS_SPI_MISO               PAL_LINE(GPIOA, GPIOA_SYS_SPI_MISO)
+#define LINE_SYS_SPI_MOSI               PAL_LINE(GPIOA, GPIOA_SYS_SPI_MOSI)
+#define LINE_SYS_REG_EN                 PAL_LINE(GPIOA, GPIOA_SYS_REG_EN)
+#define LINE_PROG_RX                    PAL_LINE(GPIOA, GPIOA_PROG_RX)
+#define LINE_PROG_TX                    PAL_LINE(GPIOA, GPIOA_PROG_TX)
+#define LINE_CAN_RX                     PAL_LINE(GPIOA, GPIOA_CAN_RX)
+#define LINE_CAN_TX                     PAL_LINE(GPIOA, GPIOA_CAN_TX)
+#define LINE_SWDIO                      PAL_LINE(GPIOA, GPIOA_SWDIO)
+#define LINE_SWCLK                      PAL_LINE(GPIOA, GPIOA_SWCLK)
+#define LINE_SYS_SPI_SS1_N              PAL_LINE(GPIOA, GPIOA_SYS_SPI_SS1_N)
+
+#define LINE_IR_INT1_N                  PAL_LINE(GPIOB, GPIOB_IR_INT1_N)
+#define LINE_VSYS_SENSE                 PAL_LINE(GPIOB, GPIOB_VSYS_SENSE)
+#define LINE_POWER_EN                   PAL_LINE(GPIOB, GPIOB_POWER_EN)
+#define LINE_SYS_UART_DN                PAL_LINE(GPIOB, GPIOB_SYS_UART_DN)
+#define LINE_CHARGE_STAT2A              PAL_LINE(GPIOB, GPIOB_CHARGE_STAT2A)
+#define LINE_BUZZER                     PAL_LINE(GPIOB, GPIOB_BUZZER)
+#define LINE_GAUGE_BATLOW2              PAL_LINE(GPIOB, GPIOB_GAUGE_BATLOW2)
+#define LINE_GAUGE_BATGD2_N             PAL_LINE(GPIOB, GPIOB_GAUGE_BATGD2_N)
+#define LINE_GAUGE_SCL2                 PAL_LINE(GPIOB, GPIOB_GAUGE_SCL2)
+#define LINE_GAUGE_SDA2                 PAL_LINE(GPIOB, GPIOB_GAUGE_SDA2)
+#define LINE_GAUGE_SCL1                 PAL_LINE(GPIOB, GPIOB_GAUGE_SCL1)
+#define LINE_GAUGE_SDA1                 PAL_LINE(GPIOB, GPIOB_GAUGE_SDA1)
+#define LINE_LED                        PAL_LINE(GPIOB, GPIOB_LED)
+#define LINE_BT_RTS                     PAL_LINE(GPIOB, GPIOB_BT_RTS)
+#define LINE_BT_CTS                     PAL_LINE(GPIOB, GPIOB_BT_CTS)
+#define LINE_SYS_UART_UP                PAL_LINE(GPIOB, GPIOB_SYS_UART_UP)
+
+#define LINE_CHARGE_STAT1A              PAL_LINE(GPIOC, GPIOC_CHARGE_STAT1A)
+#define LINE_GAUGE_BATLOW1              PAL_LINE(GPIOC, GPIOC_GAUGE_BATLOW1)
+#define LINE_GAUGE_BATGD1_N             PAL_LINE(GPIOC, GPIOC_GAUGE_BATGD1_N)
+#define LINE_CHARGE_EN1_N               PAL_LINE(GPIOC, GPIOC_CHARGE_EN1_N)
+#define LINE_IR_INT2_N                  PAL_LINE(GPIOC, GPIOC_IR_INT2_N)
+#define LINE_TOUCH_INT_N                PAL_LINE(GPIOC, GPIOC_TOUCH_INT_N)
+#define LINE_SYS_DONE                   PAL_LINE(GPIOC, GPIOC_SYS_DONE)
+#define LINE_SYS_PROG_N                 PAL_LINE(GPIOC, GPIOC_SYS_PROG_N)
+#define LINE_PATH_DC                    PAL_LINE(GPIOC, GPIOC_PATH_DC)
+#define LINE_SYS_SPI_DIR                PAL_LINE(GPIOC, GPIOC_SYS_SPI_DIR)
+#define LINE_BT_RX                      PAL_LINE(GPIOC, GPIOC_BT_RX)
+#define LINE_BT_TX                      PAL_LINE(GPIOC, GPIOC_BT_TX)
+#define LINE_SYS_INT_N                  PAL_LINE(GPIOC, GPIOC_SYS_INT_N)
+#define LINE_SYS_PD_N                   PAL_LINE(GPIOC, GPIOC_SYS_PD_N)
+#define LINE_SYS_WARMRST_N              PAL_LINE(GPIOC, GPIOC_SYS_WARMRST_N)
+#define LINE_BT_RST                     PAL_LINE(GPIOC, GPIOC_BT_RST)
+
+#define LINE_CHARGE_EN2_N               PAL_LINE(GPIOD, GPIOD_CHARGE_EN2_N)
+
+#define LINE_OSC_IN                     PAL_LINE(GPIOH, 0U)
+#define LINE_OSC_OUT                    PAL_LINE(GPIOH, 1U)
+
+/*
+ * I/O ports initial setup, this configuration is established soon after reset
+ * in the initialization code.
+ * Please refer to the STM32 Reference Manual for details.
+ */
+#define PIN_MODE_INPUT(n)               (0U << ((n) * 2U))
+#define PIN_MODE_OUTPUT(n)              (1U << ((n) * 2U))
+#define PIN_MODE_ALTERNATE(n)           (2U << ((n) * 2U))
+#define PIN_MODE_ANALOG(n)              (3U << ((n) * 2U))
+#define PIN_ODR_LOW(n)                  (0U << (n))
+#define PIN_ODR_HIGH(n)                 (1U << (n))
+#define PIN_OTYPE_PUSHPULL(n)           (0U << (n))
+#define PIN_OTYPE_OPENDRAIN(n)          (1U << (n))
+#define PIN_OSPEED_LOW(n)               (0U << ((n) * 2U))
+#define PIN_OSPEED_MEDIUM(n)            (1U << ((n) * 2U))
+#define PIN_OSPEED_HIGH(n)              (2U << ((n) * 2U))
+#define PIN_OSPEED_VERYHIGH(n)          (3U << ((n) * 2U))
+#define PIN_PUPDR_FLOATING(n)           (0U << ((n) * 2U))
+#define PIN_PUPDR_PULLUP(n)             (1U << ((n) * 2U))
+#define PIN_PUPDR_PULLDOWN(n)           (2U << ((n) * 2U))
+#define PIN_AFIO_AF(n, v)               ((v) << (((n) % 8U) * 4U))
+
+/*
+ * GPIOA setup:
+ *
+ * PA0  - WKUP                          (input floating)
+ * PA1  - PIN1                          (input pullup)
+ * PA2  - SYS_UART_TX                   (input floating)
+ * PA3  - SYS_UART_RX                   (alternate 7 pushpull floating)
+ * PA4  - SYS_SPI_SS0_N                 (input floating)
+ * PA5  - SYS_SPI_SCLK                  (alternate 5 pushpull floating)
+ * PA6  - SYS_SPI_MISO                  (alternate 5 pushpull floating)
+ * PA7  - SYS_SPI_MOSI                  (alternate 5 pushpull floating)
+ * PA8  - SYS_REG_EN                    (output pushpull high)
+ * PA9  - PROG_RX                       (alternate 7 pushpull floating)
+ * PA10 - PROG_TX                       (alternate 7 pushpull pullup)
+ * PA11 - CAN_RX                        (alternate 9 pushpull floating)
+ * PA12 - CAN_TX                        (input floating)
+ * PA13 - SWDIO                         (alternate 0 pushpull floating)
+ * PA14 - SWCLK                         (alternate 0 pushpull floating)
+ * PA15 - SYS_SPI_SS1_N                 (input floating)
+ */
+#define VAL_GPIOA_MODER                 (PIN_MODE_INPUT(GPIOA_WKUP) |                                 \
+                                         PIN_MODE_INPUT(GPIOA_PIN1) |                                 \
+                                         PIN_MODE_INPUT(GPIOA_SYS_UART_TX) |                          \
+                                         PIN_MODE_ALTERNATE(GPIOA_SYS_UART_RX) |                      \
+                                         PIN_MODE_INPUT(GPIOA_SYS_SPI_SS0_N) |                        \
+                                         PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_SCLK) |                     \
+                                         PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MISO) |                     \
+                                         PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MOSI) |                     \
+                                         PIN_MODE_OUTPUT(GPIOA_SYS_REG_EN) |                          \
+                                         PIN_MODE_ALTERNATE(GPIOA_PROG_RX) |                          \
+                                         PIN_MODE_ALTERNATE(GPIOA_PROG_TX) |                          \
+                                         PIN_MODE_ALTERNATE(GPIOA_CAN_RX) |                           \
+                                         PIN_MODE_INPUT(GPIOA_CAN_TX) |                               \
+                                         PIN_MODE_ALTERNATE(GPIOA_SWDIO) |                            \
+                                         PIN_MODE_ALTERNATE(GPIOA_SWCLK) |                            \
+                                         PIN_MODE_INPUT(GPIOA_SYS_SPI_SS1_N))
+#define VAL_GPIOA_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOA_WKUP) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_PIN1) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_UART_TX) |                      \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_UART_RX) |                      \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SS0_N) |                    \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SCLK) |                     \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_MISO) |                     \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_MOSI) |                     \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_REG_EN) |                       \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_PROG_RX) |                          \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_PROG_TX) |                          \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_CAN_RX) |                           \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_CAN_TX) |                           \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SS1_N))
+#define VAL_GPIOA_OSPEEDR               (PIN_OSPEED_VERYHIGH(GPIOA_WKUP) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_PIN1) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_UART_TX) |                     \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_UART_RX) |                     \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SS0_N) |                   \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SCLK) |                    \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_MISO) |                    \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_MOSI) |                    \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_REG_EN) |                      \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_PROG_RX) |                         \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_PROG_TX) |                         \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_CAN_RX) |                          \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_CAN_TX) |                          \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SWDIO) |                           \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SWCLK) |                           \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SS1_N))
+#define VAL_GPIOA_PUPDR                 (PIN_PUPDR_FLOATING(GPIOA_WKUP) |                             \
+                                         PIN_PUPDR_PULLUP(GPIOA_PIN1) |                               \
+                                         PIN_PUPDR_FLOATING(GPIOA_SYS_UART_TX) |                      \
+                                         PIN_PUPDR_FLOATING(GPIOA_SYS_UART_RX) |                      \
+                                         PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SS0_N) |                    \
+                                         PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SCLK) |                     \
+                                         PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_MISO) |                     \
+                                         PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_MOSI) |                     \
+                                         PIN_PUPDR_FLOATING(GPIOA_SYS_REG_EN) |                       \
+                                         PIN_PUPDR_FLOATING(GPIOA_PROG_RX) |                          \
+                                         PIN_PUPDR_PULLUP(GPIOA_PROG_TX) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOA_CAN_RX) |                           \
+                                         PIN_PUPDR_FLOATING(GPIOA_CAN_TX) |                           \
+                                         PIN_PUPDR_FLOATING(GPIOA_SWDIO) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOA_SWCLK) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SS1_N))
+#define VAL_GPIOA_ODR                   (PIN_ODR_HIGH(GPIOA_WKUP) |                                   \
+                                         PIN_ODR_HIGH(GPIOA_PIN1) |                                   \
+                                         PIN_ODR_HIGH(GPIOA_SYS_UART_TX) |                            \
+                                         PIN_ODR_HIGH(GPIOA_SYS_UART_RX) |                            \
+                                         PIN_ODR_HIGH(GPIOA_SYS_SPI_SS0_N) |                          \
+                                         PIN_ODR_HIGH(GPIOA_SYS_SPI_SCLK) |                           \
+                                         PIN_ODR_HIGH(GPIOA_SYS_SPI_MISO) |                           \
+                                         PIN_ODR_HIGH(GPIOA_SYS_SPI_MOSI) |                           \
+                                         PIN_ODR_HIGH(GPIOA_SYS_REG_EN) |                             \
+                                         PIN_ODR_HIGH(GPIOA_PROG_RX) |                                \
+                                         PIN_ODR_HIGH(GPIOA_PROG_TX) |                                \
+                                         PIN_ODR_HIGH(GPIOA_CAN_RX) |                                 \
+                                         PIN_ODR_HIGH(GPIOA_CAN_TX) |                                 \
+                                         PIN_ODR_HIGH(GPIOA_SWDIO) |                                  \
+                                         PIN_ODR_HIGH(GPIOA_SWCLK) |                                  \
+                                         PIN_ODR_HIGH(GPIOA_SYS_SPI_SS1_N))
+#define VAL_GPIOA_AFRL                  (PIN_AFIO_AF(GPIOA_WKUP, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOA_PIN1, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOA_SYS_UART_TX, STM32F4xx_AF_USART1to3) |     \
+                                         PIN_AFIO_AF(GPIOA_SYS_UART_RX, STM32F4xx_AF_USART1to3) |     \
+                                         PIN_AFIO_AF(GPIOA_SYS_SPI_SS0_N, STM32F4xx_AF_system) |      \
+                                         PIN_AFIO_AF(GPIOA_SYS_SPI_SCLK, STM32F4xx_AF_SPI1to2) |      \
+                                         PIN_AFIO_AF(GPIOA_SYS_SPI_MISO, STM32F4xx_AF_SPI1to2) |      \
+                                         PIN_AFIO_AF(GPIOA_SYS_SPI_MOSI, STM32F4xx_AF_SPI1to2))
+#define VAL_GPIOA_AFRH                  (PIN_AFIO_AF(GPIOA_SYS_REG_EN, STM32F4xx_AF_system) |         \
+                                         PIN_AFIO_AF(GPIOA_PROG_RX, STM32F4xx_AF_USART1to3) |         \
+                                         PIN_AFIO_AF(GPIOA_PROG_TX, STM32F4xx_AF_USART1to3) |         \
+                                         PIN_AFIO_AF(GPIOA_CAN_RX, STM32F4xx_AF_CAN1to2_TIM12to14) |  \
+                                         PIN_AFIO_AF(GPIOA_CAN_TX, STM32F4xx_AF_CAN1to2_TIM12to14) |  \
+                                         PIN_AFIO_AF(GPIOA_SWDIO, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOA_SWCLK, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOA_SYS_SPI_SS1_N, STM32F4xx_AF_system))
+
+/*
+ * GPIOB setup:
+ *
+ * PB0  - IR_INT1_N                     (input floating)
+ * PB1  - VSYS_SENSE                    (analog)
+ * PB2  - POWER_EN                      (output pushpull high)
+ * PB3  - SYS_UART_DN                   (output opendrain high)
+ * PB4  - CHARGE_STAT2A                 (inout floating)
+ * PB5  - BUZZER                        (alternate 2 pushpull floating)
+ * PB6  - GAUGE_BATLOW2                 (input floating)
+ * PB7  - GAUGE_BATGD2_N                (input floating)
+ * PB8  - GAUGE_SCL2                    (alternate 4 opendrain floating)
+ * PB9  - GAUGE_SDA2                    (alternate 4 opendrain floating)
+ * PB10 - GAUGE_SCL1                    (alternate 4 opendrain floating)
+ * PB11 - GAUGE_SDA1                    (alternate 4 opendrain floating)
+ * PB12 - LED                           (output opendrain high)
+ * PB13 - BT_RTS                        (alternate 7 pushpull floating)
+ * PB14 - BT_CTS                        (inout floating)
+ * PB15 - SYS_UART_UP                   (output opendrain high)
+ */
+#define VAL_GPIOB_MODER                 (PIN_MODE_INPUT(GPIOB_IR_INT1_N) |                            \
+                                         PIN_MODE_ANALOG(GPIOB_VSYS_SENSE) |                          \
+                                         PIN_MODE_OUTPUT(GPIOB_POWER_EN) |                            \
+                                         PIN_MODE_OUTPUT(GPIOB_SYS_UART_DN) |                         \
+                                         PIN_MODE_INPUT(GPIOB_CHARGE_STAT2A) |                        \
+                                         PIN_MODE_ALTERNATE(GPIOB_BUZZER) |                           \
+                                         PIN_MODE_INPUT(GPIOB_GAUGE_BATLOW2) |                        \
+                                         PIN_MODE_INPUT(GPIOB_GAUGE_BATGD2_N) |                       \
+                                         PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL2) |                       \
+                                         PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA2) |                       \
+                                         PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL1) |                       \
+                                         PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA1) |                       \
+                                         PIN_MODE_OUTPUT(GPIOB_LED) |                                 \
+                                         PIN_MODE_ALTERNATE(GPIOB_BT_RTS) |                           \
+                                         PIN_MODE_INPUT(GPIOB_BT_CTS) |                               \
+                                         PIN_MODE_OUTPUT(GPIOB_SYS_UART_UP))
+#define VAL_GPIOB_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOB_IR_INT1_N) |                        \
+                                         PIN_OTYPE_PUSHPULL(GPIOB_VSYS_SENSE) |                       \
+                                         PIN_OTYPE_PUSHPULL(GPIOB_POWER_EN) |                         \
+                                         PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_DN) |                     \
+                                         PIN_OTYPE_PUSHPULL(GPIOB_CHARGE_STAT2A) |                    \
+                                         PIN_OTYPE_PUSHPULL(GPIOB_BUZZER) |                           \
+                                         PIN_OTYPE_PUSHPULL(GPIOB_GAUGE_BATLOW2) |                    \
+                                         PIN_OTYPE_PUSHPULL(GPIOB_GAUGE_BATGD2_N) |                   \
+                                         PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL2) |                      \
+                                         PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA2) |                      \
+                                         PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL1) |                      \
+                                         PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA1) |                      \
+                                         PIN_OTYPE_OPENDRAIN(GPIOB_LED) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOB_BT_RTS) |                           \
+                                         PIN_OTYPE_PUSHPULL(GPIOB_BT_CTS) |                           \
+                                         PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_UP))
+#define VAL_GPIOB_OSPEEDR               (PIN_OSPEED_VERYHIGH(GPIOB_IR_INT1_N) |                       \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_VSYS_SENSE) |                      \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_POWER_EN) |                        \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_SYS_UART_DN) |                     \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_CHARGE_STAT2A) |                   \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_BUZZER) |                          \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_BATLOW2) |                   \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_BATGD2_N) |                  \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SCL2) |                      \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SDA2) |                      \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SCL1) |                      \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SDA1) |                      \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_LED) |                             \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_BT_RTS) |                          \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_BT_CTS) |                          \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_SYS_UART_UP))
+#define VAL_GPIOB_PUPDR                 (PIN_PUPDR_FLOATING(GPIOB_IR_INT1_N) |                        \
+                                         PIN_PUPDR_FLOATING(GPIOB_VSYS_SENSE) |                       \
+                                         PIN_PUPDR_FLOATING(GPIOB_POWER_EN) |                         \
+                                         PIN_PUPDR_FLOATING(GPIOB_SYS_UART_DN) |                      \
+                                         PIN_PUPDR_FLOATING(GPIOB_CHARGE_STAT2A) |                    \
+                                         PIN_PUPDR_FLOATING(GPIOB_BUZZER) |                           \
+                                         PIN_PUPDR_FLOATING(GPIOB_GAUGE_BATLOW2) |                    \
+                                         PIN_PUPDR_FLOATING(GPIOB_GAUGE_BATGD2_N) |                   \
+                                         PIN_PUPDR_FLOATING(GPIOB_GAUGE_SCL2) |                       \
+                                         PIN_PUPDR_FLOATING(GPIOB_GAUGE_SDA2) |                       \
+                                         PIN_PUPDR_FLOATING(GPIOB_GAUGE_SCL1) |                       \
+                                         PIN_PUPDR_FLOATING(GPIOB_GAUGE_SDA1) |                       \
+                                         PIN_PUPDR_FLOATING(GPIOB_LED) |                              \
+                                         PIN_PUPDR_FLOATING(GPIOB_BT_RTS) |                           \
+                                         PIN_PUPDR_FLOATING(GPIOB_BT_CTS) |                           \
+                                         PIN_PUPDR_FLOATING(GPIOB_SYS_UART_UP))
+#define VAL_GPIOB_ODR                   (PIN_ODR_HIGH(GPIOB_IR_INT1_N) |                              \
+                                         PIN_ODR_HIGH(GPIOB_VSYS_SENSE) |                             \
+                                         PIN_ODR_HIGH(GPIOB_POWER_EN) |                               \
+                                         PIN_ODR_HIGH(GPIOB_SYS_UART_DN) |                            \
+                                         PIN_ODR_HIGH(GPIOB_CHARGE_STAT2A) |                          \
+                                         PIN_ODR_HIGH(GPIOB_BUZZER) |                                 \
+                                         PIN_ODR_HIGH(GPIOB_GAUGE_BATLOW2) |                          \
+                                         PIN_ODR_HIGH(GPIOB_GAUGE_BATGD2_N) |                         \
+                                         PIN_ODR_HIGH(GPIOB_GAUGE_SCL2) |                             \
+                                         PIN_ODR_HIGH(GPIOB_GAUGE_SDA2) |                             \
+                                         PIN_ODR_HIGH(GPIOB_GAUGE_SCL1) |                             \
+                                         PIN_ODR_HIGH(GPIOB_GAUGE_SDA1) |                             \
+                                         PIN_ODR_HIGH(GPIOB_LED) |                                    \
+                                         PIN_ODR_HIGH(GPIOB_BT_RTS) |                                 \
+                                         PIN_ODR_HIGH(GPIOB_BT_CTS) |                                 \
+                                         PIN_ODR_HIGH(GPIOB_SYS_UART_UP))
+#define VAL_GPIOB_AFRL                  (PIN_AFIO_AF(GPIOB_IR_INT1_N, STM32F4xx_AF_system) |          \
+                                         PIN_AFIO_AF(GPIOB_VSYS_SENSE, STM32F4xx_AF_system) |         \
+                                         PIN_AFIO_AF(GPIOB_POWER_EN, STM32F4xx_AF_system) |           \
+                                         PIN_AFIO_AF(GPIOB_SYS_UART_DN, STM32F4xx_AF_system) |        \
+                                         PIN_AFIO_AF(GPIOB_CHARGE_STAT2A, STM32F4xx_AF_system) |      \
+                                         PIN_AFIO_AF(GPIOB_BUZZER, STM32F4xx_AF_TIM3to5) |            \
+                                         PIN_AFIO_AF(GPIOB_GAUGE_BATLOW2, STM32F4xx_AF_system) |      \
+                                         PIN_AFIO_AF(GPIOB_GAUGE_BATGD2_N, STM32F4xx_AF_system))
+#define VAL_GPIOB_AFRH                  (PIN_AFIO_AF(GPIOB_GAUGE_SCL2, STM32F4xx_AF_I2C1to3) |        \
+                                         PIN_AFIO_AF(GPIOB_GAUGE_SDA2, STM32F4xx_AF_I2C1to3) |        \
+                                         PIN_AFIO_AF(GPIOB_GAUGE_SCL1, STM32F4xx_AF_I2C1to3) |        \
+                                         PIN_AFIO_AF(GPIOB_GAUGE_SDA1, STM32F4xx_AF_I2C1to3) |        \
+                                         PIN_AFIO_AF(GPIOB_LED, STM32F4xx_AF_system) |                \
+                                         PIN_AFIO_AF(GPIOB_BT_RTS, STM32F4xx_AF_USART1to3) |          \
+                                         PIN_AFIO_AF(GPIOB_BT_CTS, STM32F4xx_AF_USART1to3) |          \
+                                         PIN_AFIO_AF(GPIOB_SYS_UART_UP, STM32F4xx_AF_system))
+
+/*
+ * GPIOC setup:
+ *
+ * PC0  - CHARGE_STAT1A                 (input floating)
+ * PC1  - GAUGE_BATLOW1                 (input floating)
+ * PC2  - GAUGE_BATGD1_N                (input floating)
+ * PC3  - CHARGE_EN1_N                  (output opendrain high)
+ * PC4  - IR_INT2_N                     (input floating)
+ * PC5  - TOUCH_INT_N                   (input floating)
+ * PC6  - SYS_DONE                      (input floating)
+ * PC7  - SYS_PROG_N                    (output opendrain high)
+ * PC8  - PATH_DC                       (input floating)
+ * PC9  - SYS_SPI_DIR                   (output opendrain high)
+ * PC10 - BT_RX                         (alternate 7 pushpull floating)
+ * PC11 - BT_TX                         (alternate 7 pushpull floating)
+ * PC12 - SYS_INT_N                     (output opendrain low)
+ * PC13 - SYS_PD_N                      (output opendrain high)
+ * PC14 - SYS_WARMRST_N                 (output opendrain high)
+ * PC15 - BT_RST                        (output opendrain high)
+ */
+#define VAL_GPIOC_MODER                 (PIN_MODE_INPUT(GPIOC_CHARGE_STAT1A) |                        \
+                                         PIN_MODE_INPUT(GPIOC_GAUGE_BATLOW1) |                        \
+                                         PIN_MODE_INPUT(GPIOC_GAUGE_BATGD1_N) |                       \
+                                         PIN_MODE_OUTPUT(GPIOC_CHARGE_EN1_N) |                        \
+                                         PIN_MODE_INPUT(GPIOC_IR_INT2_N) |                            \
+                                         PIN_MODE_INPUT(GPIOC_TOUCH_INT_N) |                          \
+                                         PIN_MODE_INPUT(GPIOC_SYS_DONE) |                             \
+                                         PIN_MODE_OUTPUT(GPIOC_SYS_PROG_N) |                          \
+                                         PIN_MODE_INPUT(GPIOC_PATH_DC) |                              \
+                                         PIN_MODE_OUTPUT(GPIOC_SYS_SPI_DIR) |                         \
+                                         PIN_MODE_ALTERNATE(GPIOC_BT_RX) |                            \
+                                         PIN_MODE_ALTERNATE(GPIOC_BT_TX) |                            \
+                                         PIN_MODE_OUTPUT(GPIOC_SYS_INT_N) |                           \
+                                         PIN_MODE_OUTPUT(GPIOC_SYS_PD_N) |                            \
+                                         PIN_MODE_OUTPUT(GPIOC_SYS_WARMRST_N) |                       \
+                                         PIN_MODE_OUTPUT(GPIOC_BT_RST))
+#define VAL_GPIOC_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOC_CHARGE_STAT1A) |                    \
+                                         PIN_OTYPE_PUSHPULL(GPIOC_GAUGE_BATLOW1) |                    \
+                                         PIN_OTYPE_PUSHPULL(GPIOC_GAUGE_BATGD1_N) |                   \
+                                         PIN_OTYPE_OPENDRAIN(GPIOC_CHARGE_EN1_N) |                    \
+                                         PIN_OTYPE_PUSHPULL(GPIOC_IR_INT2_N) |                        \
+                                         PIN_OTYPE_PUSHPULL(GPIOC_TOUCH_INT_N) |                      \
+                                         PIN_OTYPE_PUSHPULL(GPIOC_SYS_DONE) |                         \
+                                         PIN_OTYPE_OPENDRAIN(GPIOC_SYS_PROG_N) |                      \
+                                         PIN_OTYPE_PUSHPULL(GPIOC_PATH_DC) |                          \
+                                         PIN_OTYPE_OPENDRAIN(GPIOC_SYS_SPI_DIR) |                     \
+                                         PIN_OTYPE_PUSHPULL(GPIOC_BT_RX) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOC_BT_TX) |                            \
+                                         PIN_OTYPE_OPENDRAIN(GPIOC_SYS_INT_N) |                       \
+                                         PIN_OTYPE_OPENDRAIN(GPIOC_SYS_PD_N) |                        \
+                                         PIN_OTYPE_OPENDRAIN(GPIOC_SYS_WARMRST_N) |                   \
+                                         PIN_OTYPE_OPENDRAIN(GPIOC_BT_RST))
+#define VAL_GPIOC_OSPEEDR               (PIN_OSPEED_VERYHIGH(GPIOC_CHARGE_STAT1A) |                   \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_GAUGE_BATLOW1) |                   \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_GAUGE_BATGD1_N) |                  \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_CHARGE_EN1_N) |                    \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_IR_INT2_N) |                       \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_TOUCH_INT_N) |                     \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_SYS_DONE) |                        \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_SYS_PROG_N) |                      \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_PATH_DC) |                         \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_SYS_SPI_DIR) |                     \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_BT_RX) |                           \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_BT_TX) |                           \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_SYS_INT_N) |                       \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_SYS_PD_N) |                        \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_SYS_WARMRST_N) |                   \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_BT_RST))
+#define VAL_GPIOC_PUPDR                 (PIN_PUPDR_FLOATING(GPIOC_CHARGE_STAT1A) |                    \
+                                         PIN_PUPDR_FLOATING(GPIOC_GAUGE_BATLOW1) |                    \
+                                         PIN_PUPDR_FLOATING(GPIOC_GAUGE_BATGD1_N) |                   \
+                                         PIN_PUPDR_FLOATING(GPIOC_CHARGE_EN1_N) |                     \
+                                         PIN_PUPDR_FLOATING(GPIOC_IR_INT2_N) |                        \
+                                         PIN_PUPDR_FLOATING(GPIOC_TOUCH_INT_N) |                      \
+                                         PIN_PUPDR_FLOATING(GPIOC_SYS_DONE) |                         \
+                                         PIN_PUPDR_FLOATING(GPIOC_SYS_PROG_N) |                       \
+                                         PIN_PUPDR_FLOATING(GPIOC_PATH_DC) |                          \
+                                         PIN_PUPDR_FLOATING(GPIOC_SYS_SPI_DIR) |                      \
+                                         PIN_PUPDR_FLOATING(GPIOC_BT_RX) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOC_BT_TX) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOC_SYS_INT_N) |                        \
+                                         PIN_PUPDR_FLOATING(GPIOC_SYS_PD_N) |                         \
+                                         PIN_PUPDR_FLOATING(GPIOC_SYS_WARMRST_N) |                    \
+                                         PIN_PUPDR_FLOATING(GPIOC_BT_RST))
+#define VAL_GPIOC_ODR                   (PIN_ODR_HIGH(GPIOC_CHARGE_STAT1A) |                          \
+                                         PIN_ODR_HIGH(GPIOC_GAUGE_BATLOW1) |                          \
+                                         PIN_ODR_HIGH(GPIOC_GAUGE_BATGD1_N) |                         \
+                                         PIN_ODR_HIGH(GPIOC_CHARGE_EN1_N) |                           \
+                                         PIN_ODR_HIGH(GPIOC_IR_INT2_N) |                              \
+                                         PIN_ODR_HIGH(GPIOC_TOUCH_INT_N) |                            \
+                                         PIN_ODR_HIGH(GPIOC_SYS_DONE) |                               \
+                                         PIN_ODR_HIGH(GPIOC_SYS_PROG_N) |                             \
+                                         PIN_ODR_LOW(GPIOC_PATH_DC) |                                 \
+                                         PIN_ODR_HIGH(GPIOC_SYS_SPI_DIR) |                            \
+                                         PIN_ODR_HIGH(GPIOC_BT_RX) |                                  \
+                                         PIN_ODR_HIGH(GPIOC_BT_TX) |                                  \
+                                         PIN_ODR_LOW(GPIOC_SYS_INT_N) |                               \
+                                         PIN_ODR_HIGH(GPIOC_SYS_PD_N) |                               \
+                                         PIN_ODR_HIGH(GPIOC_SYS_WARMRST_N) |                          \
+                                         PIN_ODR_HIGH(GPIOC_BT_RST))
+#define VAL_GPIOC_AFRL                  (PIN_AFIO_AF(GPIOC_CHARGE_STAT1A, STM32F4xx_AF_system) |      \
+                                         PIN_AFIO_AF(GPIOC_GAUGE_BATLOW1, STM32F4xx_AF_system) |      \
+                                         PIN_AFIO_AF(GPIOC_GAUGE_BATGD1_N, STM32F4xx_AF_system) |     \
+                                         PIN_AFIO_AF(GPIOC_CHARGE_EN1_N, STM32F4xx_AF_system) |       \
+                                         PIN_AFIO_AF(GPIOC_IR_INT2_N, STM32F4xx_AF_system) |          \
+                                         PIN_AFIO_AF(GPIOC_TOUCH_INT_N, STM32F4xx_AF_system) |        \
+                                         PIN_AFIO_AF(GPIOC_SYS_DONE, STM32F4xx_AF_system) |           \
+                                         PIN_AFIO_AF(GPIOC_SYS_PROG_N, STM32F4xx_AF_system))
+#define VAL_GPIOC_AFRH                  (PIN_AFIO_AF(GPIOC_PATH_DC, STM32F4xx_AF_system) |            \
+                                         PIN_AFIO_AF(GPIOC_SYS_SPI_DIR, STM32F4xx_AF_system) |        \
+                                         PIN_AFIO_AF(GPIOC_BT_RX, STM32F4xx_AF_USART1to3) |           \
+                                         PIN_AFIO_AF(GPIOC_BT_TX, STM32F4xx_AF_USART1to3) |           \
+                                         PIN_AFIO_AF(GPIOC_SYS_INT_N, STM32F4xx_AF_system) |          \
+                                         PIN_AFIO_AF(GPIOC_SYS_PD_N, STM32F4xx_AF_system) |           \
+                                         PIN_AFIO_AF(GPIOC_SYS_WARMRST_N, STM32F4xx_AF_system) |      \
+                                         PIN_AFIO_AF(GPIOC_BT_RST, STM32F4xx_AF_system))
+
+/*
+ * GPIOD setup:
+ *
+ * PD0  - PIN0                          (input floating)
+ * PD1  - PIN1                          (input floating)
+ * PD2  - CHARGE_EN2_N                  (output opendrain high)
+ * PD3  - PIN3                          (input floating)
+ * PD4  - PIN4                          (input floating)
+ * PD5  - PIN5                          (input floating)
+ * PD6  - PIN6                          (input floating)
+ * PD7  - PIN7                          (input floating)
+ * PD8  - PIN8                          (input floating)
+ * PD9  - PIN9                          (input floating)
+ * PD10 - PIN10                         (input floating)
+ * PD11 - PIN11                         (input floating)
+ * PD12 - PIN12                         (input floating)
+ * PD13 - PIN13                         (input floating)
+ * PD14 - PIN14                         (input floating)
+ * PD15 - PIN15                         (input floating)
+ */
+#define VAL_GPIOD_MODER                 (PIN_MODE_INPUT(GPIOD_PIN0) |                                 \
+                                         PIN_MODE_INPUT(GPIOD_PIN1) |                                 \
+                                         PIN_MODE_OUTPUT(GPIOD_CHARGE_EN2_N) |                        \
+                                         PIN_MODE_INPUT(GPIOD_PIN3) |                                 \
+                                         PIN_MODE_INPUT(GPIOD_PIN4) |                                 \
+                                         PIN_MODE_INPUT(GPIOD_PIN5) |                                 \
+                                         PIN_MODE_INPUT(GPIOD_PIN6) |                                 \
+                                         PIN_MODE_INPUT(GPIOD_PIN7) |                                 \
+                                         PIN_MODE_INPUT(GPIOD_PIN8) |                                 \
+                                         PIN_MODE_INPUT(GPIOD_PIN9) |                                 \
+                                         PIN_MODE_INPUT(GPIOD_PIN10) |                                \
+                                         PIN_MODE_INPUT(GPIOD_PIN11) |                                \
+                                         PIN_MODE_INPUT(GPIOD_PIN12) |                                \
+                                         PIN_MODE_INPUT(GPIOD_PIN13) |                                \
+                                         PIN_MODE_INPUT(GPIOD_PIN14) |                                \
+                                         PIN_MODE_INPUT(GPIOD_PIN15))
+#define VAL_GPIOD_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN1) |                             \
+                                         PIN_OTYPE_OPENDRAIN(GPIOD_CHARGE_EN2_N) |                    \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN3) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN4) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN5) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN6) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN7) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN8) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN9) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN10) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN11) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN12) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN13) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN14) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
+#define VAL_GPIOD_OSPEEDR               (PIN_OSPEED_VERYHIGH(GPIOD_PIN0) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN1) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_CHARGE_EN2_N) |                    \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN3) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN4) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN5) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN6) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN7) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN8) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN9) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN10) |                           \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN11) |                           \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN12) |                           \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN13) |                           \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN14) |                           \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN15))
+#define VAL_GPIOD_PUPDR                 (PIN_PUPDR_PULLUP(GPIOD_PIN0) |                               \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN1) |                               \
+                                         PIN_PUPDR_FLOATING(GPIOD_CHARGE_EN2_N) |                     \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN3) |                               \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN4) |                               \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN5) |                               \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN6) |                               \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN7) |                               \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN8) |                               \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN9) |                               \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN10) |                              \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN11) |                              \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN12) |                              \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN13) |                              \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN14) |                              \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN15))
+#define VAL_GPIOD_ODR                   (PIN_ODR_HIGH(GPIOD_PIN0) |                                   \
+                                         PIN_ODR_HIGH(GPIOD_PIN1) |                                   \
+                                         PIN_ODR_HIGH(GPIOD_CHARGE_EN2_N) |                           \
+                                         PIN_ODR_HIGH(GPIOD_PIN3) |                                   \
+                                         PIN_ODR_HIGH(GPIOD_PIN4) |                                   \
+                                         PIN_ODR_HIGH(GPIOD_PIN5) |                                   \
+                                         PIN_ODR_HIGH(GPIOD_PIN6) |                                   \
+                                         PIN_ODR_HIGH(GPIOD_PIN7) |                                   \
+                                         PIN_ODR_HIGH(GPIOD_PIN8) |                                   \
+                                         PIN_ODR_HIGH(GPIOD_PIN9) |                                   \
+                                         PIN_ODR_HIGH(GPIOD_PIN10) |                                  \
+                                         PIN_ODR_HIGH(GPIOD_PIN11) |                                  \
+                                         PIN_ODR_HIGH(GPIOD_PIN12) |                                  \
+                                         PIN_ODR_HIGH(GPIOD_PIN13) |                                  \
+                                         PIN_ODR_HIGH(GPIOD_PIN14) |                                  \
+                                         PIN_ODR_HIGH(GPIOD_PIN15))
+#define VAL_GPIOD_AFRL                  (PIN_AFIO_AF(GPIOD_PIN0, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOD_PIN1, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOD_CHARGE_EN2_N, STM32F4xx_AF_system) |       \
+                                         PIN_AFIO_AF(GPIOD_PIN3, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOD_PIN4, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOD_PIN5, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOD_PIN6, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOD_PIN7, STM32F4xx_AF_system))
+#define VAL_GPIOD_AFRH                  (PIN_AFIO_AF(GPIOD_PIN8, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOD_PIN9, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOD_PIN10, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOD_PIN11, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOD_PIN12, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOD_PIN13, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOD_PIN14, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOD_PIN15, STM32F4xx_AF_system))
+
+/*
+ * GPIOE setup:
+ *
+ * PE0  - PIN0                          (input floating)
+ * PE1  - PIN1                          (input floating)
+ * PE2  - PIN2                          (input floating)
+ * PE3  - PIN3                          (input floating)
+ * PE4  - PIN4                          (input floating)
+ * PE5  - PIN5                          (input floating)
+ * PE6  - PIN6                          (input floating)
+ * PE7  - PIN7                          (input floating)
+ * PE8  - PIN8                          (input floating)
+ * PE9  - PIN9                          (input floating)
+ * PE10 - PIN10                         (input floating)
+ * PE11 - PIN11                         (input floating)
+ * PE12 - PIN12                         (input floating)
+ * PE13 - PIN13                         (input floating)
+ * PE14 - PIN14                         (input floating)
+ * PE15 - PIN15                         (input floating)
+ */
+#define VAL_GPIOE_MODER                 (PIN_MODE_INPUT(GPIOE_PIN0) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN1) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN2) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN3) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN4) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN5) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN6) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN7) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN8) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN9) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN10) |                                \
+                                         PIN_MODE_INPUT(GPIOE_PIN11) |                                \
+                                         PIN_MODE_INPUT(GPIOE_PIN12) |                                \
+                                         PIN_MODE_INPUT(GPIOE_PIN13) |                                \
+                                         PIN_MODE_INPUT(GPIOE_PIN14) |                                \
+                                         PIN_MODE_INPUT(GPIOE_PIN15))
+#define VAL_GPIOE_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN1) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN2) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN3) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN4) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN5) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN6) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN7) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN8) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN9) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN10) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN11) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN12) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN13) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN14) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
+#define VAL_GPIOE_OSPEEDR               (PIN_OSPEED_LOW(GPIOE_PIN0) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN1) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN2) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN3) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN4) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN5) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN6) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN7) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN8) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN9) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN10) |                                \
+                                         PIN_OSPEED_LOW(GPIOE_PIN11) |                                \
+                                         PIN_OSPEED_LOW(GPIOE_PIN12) |                                \
+                                         PIN_OSPEED_LOW(GPIOE_PIN13) |                                \
+                                         PIN_OSPEED_LOW(GPIOE_PIN14) |                                \
+                                         PIN_OSPEED_LOW(GPIOE_PIN15))
+#define VAL_GPIOE_PUPDR                 (PIN_PUPDR_FLOATING(GPIOE_PIN0) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN1) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN2) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN3) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN4) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN5) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN6) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN7) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN8) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN9) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN10) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN11) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN12) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN13) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN14) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN15))
+#define VAL_GPIOE_ODR                   (PIN_ODR_LOW(GPIOE_PIN0) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN1) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN2) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN3) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN4) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN5) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN6) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN7) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN8) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN9) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN10) |                                   \
+                                         PIN_ODR_LOW(GPIOE_PIN11) |                                   \
+                                         PIN_ODR_LOW(GPIOE_PIN12) |                                   \
+                                         PIN_ODR_LOW(GPIOE_PIN13) |                                   \
+                                         PIN_ODR_LOW(GPIOE_PIN14) |                                   \
+                                         PIN_ODR_LOW(GPIOE_PIN15))
+#define VAL_GPIOE_AFRL                  (PIN_AFIO_AF(GPIOE_PIN0, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOE_PIN1, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOE_PIN2, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOE_PIN3, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOE_PIN4, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOE_PIN5, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOE_PIN6, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOE_PIN7, STM32F4xx_AF_system))
+#define VAL_GPIOE_AFRH                  (PIN_AFIO_AF(GPIOE_PIN8, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOE_PIN9, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOE_PIN10, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOE_PIN11, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOE_PIN12, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOE_PIN13, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOE_PIN14, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOE_PIN15, STM32F4xx_AF_system))
+
+/*
+ * GPIOF setup:
+ *
+ * PF0  - PIN0                          (input floating)
+ * PF1  - PIN1                          (input floating)
+ * PF2  - PIN2                          (input floating)
+ * PF3  - PIN3                          (input floating)
+ * PF4  - PIN4                          (input floating)
+ * PF5  - PIN5                          (input floating)
+ * PF6  - PIN6                          (input floating)
+ * PF7  - PIN7                          (input floating)
+ * PF8  - PIN8                          (input floating)
+ * PF9  - PIN9                          (input floating)
+ * PF10 - PIN10                         (input floating)
+ * PF11 - PIN11                         (input floating)
+ * PF12 - PIN12                         (input floating)
+ * PF13 - PIN13                         (input floating)
+ * PF14 - PIN14                         (input floating)
+ * PF15 - PIN15                         (input floating)
+ */
+#define VAL_GPIOF_MODER                 (PIN_MODE_INPUT(GPIOF_PIN0) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN1) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN2) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN3) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN4) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN5) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN6) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN7) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN8) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN9) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN10) |                                \
+                                         PIN_MODE_INPUT(GPIOF_PIN11) |                                \
+                                         PIN_MODE_INPUT(GPIOF_PIN12) |                                \
+                                         PIN_MODE_INPUT(GPIOF_PIN13) |                                \
+                                         PIN_MODE_INPUT(GPIOF_PIN14) |                                \
+                                         PIN_MODE_INPUT(GPIOF_PIN15))
+#define VAL_GPIOF_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN1) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN2) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN3) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN4) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN5) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN6) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN7) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN8) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN9) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN10) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN11) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN12) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN13) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN14) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
+#define VAL_GPIOF_OSPEEDR               (PIN_OSPEED_LOW(GPIOF_PIN0) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN1) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN2) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN3) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN4) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN5) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN6) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN7) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN8) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN9) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN10) |                                \
+                                         PIN_OSPEED_LOW(GPIOF_PIN11) |                                \
+                                         PIN_OSPEED_LOW(GPIOF_PIN12) |                                \
+                                         PIN_OSPEED_LOW(GPIOF_PIN13) |                                \
+                                         PIN_OSPEED_LOW(GPIOF_PIN14) |                                \
+                                         PIN_OSPEED_LOW(GPIOF_PIN15))
+#define VAL_GPIOF_PUPDR                 (PIN_PUPDR_FLOATING(GPIOF_PIN0) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN1) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN2) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN3) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN4) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN5) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN6) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN7) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN8) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN9) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN10) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN11) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN12) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN13) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN14) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN15))
+#define VAL_GPIOF_ODR                   (PIN_ODR_LOW(GPIOF_PIN0) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN1) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN2) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN3) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN4) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN5) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN6) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN7) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN8) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN9) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN10) |                                   \
+                                         PIN_ODR_LOW(GPIOF_PIN11) |                                   \
+                                         PIN_ODR_LOW(GPIOF_PIN12) |                                   \
+                                         PIN_ODR_LOW(GPIOF_PIN13) |                                   \
+                                         PIN_ODR_LOW(GPIOF_PIN14) |                                   \
+                                         PIN_ODR_LOW(GPIOF_PIN15))
+#define VAL_GPIOF_AFRL                  (PIN_AFIO_AF(GPIOF_PIN0, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOF_PIN1, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOF_PIN2, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOF_PIN3, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOF_PIN4, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOF_PIN5, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOF_PIN6, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOF_PIN7, STM32F4xx_AF_system))
+#define VAL_GPIOF_AFRH                  (PIN_AFIO_AF(GPIOF_PIN8, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOF_PIN9, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOF_PIN10, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOF_PIN11, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOF_PIN12, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOF_PIN13, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOF_PIN14, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOF_PIN15, STM32F4xx_AF_system))
+
+/*
+ * GPIOG setup:
+ *
+ * PG0  - PIN0                          (input floating)
+ * PG1  - PIN1                          (input floating)
+ * PG2  - PIN2                          (input floating)
+ * PG3  - PIN3                          (input floating)
+ * PG4  - PIN4                          (input floating)
+ * PG5  - PIN5                          (input floating)
+ * PG6  - PIN6                          (input floating)
+ * PG7  - PIN7                          (input floating)
+ * PG8  - PIN8                          (input floating)
+ * PG9  - PIN9                          (input floating)
+ * PG10 - PIN10                         (input floating)
+ * PG11 - PIN11                         (input floating)
+ * PG12 - PIN12                         (input floating)
+ * PG13 - PIN13                         (input floating)
+ * PG14 - PIN14                         (input floating)
+ * PG15 - PIN15                         (input floating)
+ */
+#define VAL_GPIOG_MODER                 (PIN_MODE_INPUT(GPIOG_PIN0) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN1) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN2) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN3) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN4) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN5) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN6) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN7) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN8) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN9) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN10) |                                \
+                                         PIN_MODE_INPUT(GPIOG_PIN11) |                                \
+                                         PIN_MODE_INPUT(GPIOG_PIN12) |                                \
+                                         PIN_MODE_INPUT(GPIOG_PIN13) |                                \
+                                         PIN_MODE_INPUT(GPIOG_PIN14) |                                \
+                                         PIN_MODE_INPUT(GPIOG_PIN15))
+#define VAL_GPIOG_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN1) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN2) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN3) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN4) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN5) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN6) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN7) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN8) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN9) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN10) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN11) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN12) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN13) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN14) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
+#define VAL_GPIOG_OSPEEDR               (PIN_OSPEED_LOW(GPIOG_PIN0) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN1) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN2) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN3) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN4) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN5) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN6) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN7) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN8) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN9) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN10) |                                \
+                                         PIN_OSPEED_LOW(GPIOG_PIN11) |                                \
+                                         PIN_OSPEED_LOW(GPIOG_PIN12) |                                \
+                                         PIN_OSPEED_LOW(GPIOG_PIN13) |                                \
+                                         PIN_OSPEED_LOW(GPIOG_PIN14) |                                \
+                                         PIN_OSPEED_LOW(GPIOG_PIN15))
+#define VAL_GPIOG_PUPDR                 (PIN_PUPDR_FLOATING(GPIOG_PIN0) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN1) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN2) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN3) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN4) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN5) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN6) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN7) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN8) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN9) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN10) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN11) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN12) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN13) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN14) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN15))
+#define VAL_GPIOG_ODR                   (PIN_ODR_LOW(GPIOG_PIN0) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN1) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN2) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN3) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN4) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN5) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN6) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN7) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN8) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN9) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN10) |                                   \
+                                         PIN_ODR_LOW(GPIOG_PIN11) |                                   \
+                                         PIN_ODR_LOW(GPIOG_PIN12) |                                   \
+                                         PIN_ODR_LOW(GPIOG_PIN13) |                                   \
+                                         PIN_ODR_LOW(GPIOG_PIN14) |                                   \
+                                         PIN_ODR_LOW(GPIOG_PIN15))
+#define VAL_GPIOG_AFRL                  (PIN_AFIO_AF(GPIOG_PIN0, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOG_PIN1, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOG_PIN2, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOG_PIN3, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOG_PIN4, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOG_PIN5, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOG_PIN6, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOG_PIN7, STM32F4xx_AF_system))
+#define VAL_GPIOG_AFRH                  (PIN_AFIO_AF(GPIOG_PIN8, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOG_PIN9, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOG_PIN10, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOG_PIN11, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOG_PIN12, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOG_PIN13, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOG_PIN14, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOG_PIN15, STM32F4xx_AF_system))
+
+/*
+ * GPIOH setup:
+ *
+ * PH0  - OSC_IN                        (input floating)
+ * PH1  - OSC_OUT                       (input floating)
+ * PH2  - PIN2                          (input floating)
+ * PH3  - PIN3                          (input floating)
+ * PH4  - PIN4                          (input floating)
+ * PH5  - PIN5                          (input floating)
+ * PH6  - PIN6                          (input floating)
+ * PH7  - PIN7                          (input floating)
+ * PH8  - PIN8                          (input floating)
+ * PH9  - PIN9                          (input floating)
+ * PH10 - PIN10                         (input floating)
+ * PH11 - PIN11                         (input floating)
+ * PH12 - PIN12                         (input floating)
+ * PH13 - PIN13                         (input floating)
+ * PH14 - PIN14                         (input floating)
+ * PH15 - PIN15                         (input floating)
+ */
+#define VAL_GPIOH_MODER                 (PIN_MODE_INPUT(GPIOH_OSC_IN) |                               \
+                                         PIN_MODE_INPUT(GPIOH_OSC_OUT) |                              \
+                                         PIN_MODE_INPUT(GPIOH_PIN2) |                                 \
+                                         PIN_MODE_INPUT(GPIOH_PIN3) |                                 \
+                                         PIN_MODE_INPUT(GPIOH_PIN4) |                                 \
+                                         PIN_MODE_INPUT(GPIOH_PIN5) |                                 \
+                                         PIN_MODE_INPUT(GPIOH_PIN6) |                                 \
+                                         PIN_MODE_INPUT(GPIOH_PIN7) |                                 \
+                                         PIN_MODE_INPUT(GPIOH_PIN8) |                                 \
+                                         PIN_MODE_INPUT(GPIOH_PIN9) |                                 \
+                                         PIN_MODE_INPUT(GPIOH_PIN10) |                                \
+                                         PIN_MODE_INPUT(GPIOH_PIN11) |                                \
+                                         PIN_MODE_INPUT(GPIOH_PIN12) |                                \
+                                         PIN_MODE_INPUT(GPIOH_PIN13) |                                \
+                                         PIN_MODE_INPUT(GPIOH_PIN14) |                                \
+                                         PIN_MODE_INPUT(GPIOH_PIN15))
+#define VAL_GPIOH_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) |                           \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) |                          \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN2) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN3) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN4) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN5) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN6) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN7) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN8) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN9) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN10) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN11) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN12) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN13) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN14) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN15))
+#define VAL_GPIOH_OSPEEDR               (PIN_OSPEED_VERYHIGH(GPIOH_OSC_IN) |                          \
+                                         PIN_OSPEED_VERYHIGH(GPIOH_OSC_OUT) |                         \
+                                         PIN_OSPEED_LOW(GPIOH_PIN2) |                                 \
+                                         PIN_OSPEED_LOW(GPIOH_PIN3) |                                 \
+                                         PIN_OSPEED_LOW(GPIOH_PIN4) |                                 \
+                                         PIN_OSPEED_LOW(GPIOH_PIN5) |                                 \
+                                         PIN_OSPEED_LOW(GPIOH_PIN6) |                                 \
+                                         PIN_OSPEED_LOW(GPIOH_PIN7) |                                 \
+                                         PIN_OSPEED_LOW(GPIOH_PIN8) |                                 \
+                                         PIN_OSPEED_LOW(GPIOH_PIN9) |                                 \
+                                         PIN_OSPEED_LOW(GPIOH_PIN10) |                                \
+                                         PIN_OSPEED_LOW(GPIOH_PIN11) |                                \
+                                         PIN_OSPEED_LOW(GPIOH_PIN12) |                                \
+                                         PIN_OSPEED_LOW(GPIOH_PIN13) |                                \
+                                         PIN_OSPEED_LOW(GPIOH_PIN14) |                                \
+                                         PIN_OSPEED_LOW(GPIOH_PIN15))
+#define VAL_GPIOH_PUPDR                 (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) |                           \
+                                         PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) |                          \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN2) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN3) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN4) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN5) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN6) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN7) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN8) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN9) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN10) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN11) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN12) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN13) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN14) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN15))
+#define VAL_GPIOH_ODR                   (PIN_ODR_HIGH(GPIOH_OSC_IN) |                                 \
+                                         PIN_ODR_HIGH(GPIOH_OSC_OUT) |                                \
+                                         PIN_ODR_HIGH(GPIOH_PIN2) |                                   \
+                                         PIN_ODR_HIGH(GPIOH_PIN3) |                                   \
+                                         PIN_ODR_HIGH(GPIOH_PIN4) |                                   \
+                                         PIN_ODR_HIGH(GPIOH_PIN5) |                                   \
+                                         PIN_ODR_HIGH(GPIOH_PIN6) |                                   \
+                                         PIN_ODR_HIGH(GPIOH_PIN7) |                                   \
+                                         PIN_ODR_HIGH(GPIOH_PIN8) |                                   \
+                                         PIN_ODR_HIGH(GPIOH_PIN9) |                                   \
+                                         PIN_ODR_HIGH(GPIOH_PIN10) |                                  \
+                                         PIN_ODR_HIGH(GPIOH_PIN11) |                                  \
+                                         PIN_ODR_HIGH(GPIOH_PIN12) |                                  \
+                                         PIN_ODR_HIGH(GPIOH_PIN13) |                                  \
+                                         PIN_ODR_HIGH(GPIOH_PIN14) |                                  \
+                                         PIN_ODR_HIGH(GPIOH_PIN15))
+#define VAL_GPIOH_AFRL                  (PIN_AFIO_AF(GPIOH_OSC_IN, STM32F4xx_AF_system) |             \
+                                         PIN_AFIO_AF(GPIOH_OSC_OUT, STM32F4xx_AF_system) |            \
+                                         PIN_AFIO_AF(GPIOH_PIN2, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOH_PIN3, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOH_PIN4, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOH_PIN5, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOH_PIN6, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOH_PIN7, STM32F4xx_AF_system))
+#define VAL_GPIOH_AFRH                  (PIN_AFIO_AF(GPIOH_PIN8, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOH_PIN9, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOH_PIN10, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOH_PIN11, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOH_PIN12, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOH_PIN13, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOH_PIN14, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOH_PIN15, STM32F4xx_AF_system))
+
+/*
+ * GPIOI setup:
+ *
+ * PI0  - PIN0                          (input floating)
+ * PI1  - PIN1                          (input floating)
+ * PI2  - PIN2                          (input floating)
+ * PI3  - PIN3                          (input floating)
+ * PI4  - PIN4                          (input floating)
+ * PI5  - PIN5                          (input floating)
+ * PI6  - PIN6                          (input floating)
+ * PI7  - PIN7                          (input floating)
+ * PI8  - PIN8                          (input floating)
+ * PI9  - PIN9                          (input floating)
+ * PI10 - PIN10                         (input floating)
+ * PI11 - PIN11                         (input floating)
+ * PI12 - PIN12                         (input floating)
+ * PI13 - PIN13                         (input floating)
+ * PI14 - PIN14                         (input floating)
+ * PI15 - PIN15                         (input floating)
+ */
+#define VAL_GPIOI_MODER                 (PIN_MODE_INPUT(GPIOI_PIN0) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN1) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN2) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN3) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN4) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN5) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN6) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN7) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN8) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN9) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN10) |                                \
+                                         PIN_MODE_INPUT(GPIOI_PIN11) |                                \
+                                         PIN_MODE_INPUT(GPIOI_PIN12) |                                \
+                                         PIN_MODE_INPUT(GPIOI_PIN13) |                                \
+                                         PIN_MODE_INPUT(GPIOI_PIN14) |                                \
+                                         PIN_MODE_INPUT(GPIOI_PIN15))
+#define VAL_GPIOI_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN1) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN2) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN3) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN4) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN5) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN6) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN7) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN8) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN9) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN10) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN11) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN12) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN13) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN14) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN15))
+#define VAL_GPIOI_OSPEEDR               (PIN_OSPEED_LOW(GPIOI_PIN0) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN1) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN2) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN3) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN4) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN5) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN6) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN7) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN8) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN9) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN10) |                                \
+                                         PIN_OSPEED_LOW(GPIOI_PIN11) |                                \
+                                         PIN_OSPEED_LOW(GPIOI_PIN12) |                                \
+                                         PIN_OSPEED_LOW(GPIOI_PIN13) |                                \
+                                         PIN_OSPEED_LOW(GPIOI_PIN14) |                                \
+                                         PIN_OSPEED_LOW(GPIOI_PIN15))
+#define VAL_GPIOI_PUPDR                 (PIN_PUPDR_FLOATING(GPIOI_PIN0) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN1) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN2) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN3) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN4) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN5) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN6) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN7) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN8) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN9) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN10) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN11) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN12) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN13) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN14) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN15))
+#define VAL_GPIOI_ODR                   (PIN_ODR_LOW(GPIOI_PIN0) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN1) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN2) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN3) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN4) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN5) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN6) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN7) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN8) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN9) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN10) |                                   \
+                                         PIN_ODR_LOW(GPIOI_PIN11) |                                   \
+                                         PIN_ODR_LOW(GPIOI_PIN12) |                                   \
+                                         PIN_ODR_LOW(GPIOI_PIN13) |                                   \
+                                         PIN_ODR_LOW(GPIOI_PIN14) |                                   \
+                                         PIN_ODR_LOW(GPIOI_PIN15))
+#define VAL_GPIOI_AFRL                  (PIN_AFIO_AF(GPIOI_PIN0, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOI_PIN1, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOI_PIN2, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOI_PIN3, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOI_PIN4, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOI_PIN5, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOI_PIN6, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOI_PIN7, STM32F4xx_AF_system))
+#define VAL_GPIOI_AFRH                  (PIN_AFIO_AF(GPIOI_PIN8, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOI_PIN9, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOI_PIN10, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOI_PIN11, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOI_PIN12, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOI_PIN13, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOI_PIN14, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOI_PIN15, STM32F4xx_AF_system))
+
+#if !defined(_FROM_ASM_)
+#ifdef __cplusplus
+extern "C" {
+#endif
+  void boardInit(void);
+#ifdef __cplusplus
+}
+#endif
+#endif /* _FROM_ASM_ */
+
+#endif /* _BOARD_H_ */
diff --git a/modules/PowerManagement_1-1/board.mk b/modules/PowerManagement_1-1/board.mk
new file mode 100644
index 0000000..7a12204
--- /dev/null
+++ b/modules/PowerManagement_1-1/board.mk
@@ -0,0 +1,36 @@
+################################################################################
+# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
+# (AMiRo) platform.                                                            #
+# Copyright (C) 2016..2018  Thomas Schöpping et al.                            #
+#                                                                              #
+# This program is free software: you can redistribute it and/or modify         #
+# it under the terms of the GNU General Public License as published by         #
+# the Free Software Foundation, either version 3 of the License, or            #
+# (at your option) any later version.                                          #
+#                                                                              #
+# This program is distributed in the hope that it will be useful,              #
+# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
+# GNU General Public License for more details.                                 #
+#                                                                              #
+# You should have received a copy of the GNU General Public License            #
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
+#                                                                              #
+# This research/work was supported by the Cluster of Excellence Cognitive      #
+# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
+# funded by the German Research Foundation (DFG).                              #
+################################################################################
+
+
+
+# absolute path to this directory
+BOARD_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
+
+# include paths
+BOARDINC = $(BOARD_DIR)
+
+# C source files
+BOARDSRC = $(BOARD_DIR)board.c
+
+# linker path
+BOARDLD = $(AMIROOS)/hal/ports
diff --git a/modules/PowerManagement_1-1/chconf.h b/modules/PowerManagement_1-1/chconf.h
new file mode 100644
index 0000000..7ee734c
--- /dev/null
+++ b/modules/PowerManagement_1-1/chconf.h
@@ -0,0 +1,85 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file    os/modules/PowerManagement/chconf.h
+ * @brief   ChibiOS Configuration file for the PowerManagement v1.1 module.
+ * @details Contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef _CHCONF_H_
+#define _CHCONF_H_
+
+#include <aosconf.h>
+
+/*===========================================================================*/
+/**
+ * @name System timers settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   System time counter resolution.
+ * @note    Allowed values are 16 or 32 bits.
+ */
+#define CH_CFG_ST_RESOLUTION                32
+
+/**
+ * @brief   System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ *          setting also defines the system tick time unit.
+ */
+#define CH_CFG_ST_FREQUENCY                 1000000UL
+
+/**
+ * @brief   Time delta constant for the tick-less mode.
+ * @note    If this value is zero then the system uses the classic
+ *          periodic tick. This value represents the minimum number
+ *          of ticks that is safe to specify in a timeout directive.
+ *          The value one is not valid, timeouts are rounded up to
+ *          this value.
+ */
+#define CH_CFG_ST_TIMEDELTA                 10
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Port specific settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   NVIC VTOR initialization offset.
+ * @details On initialization, the code at this address in the flash memory will be executed.
+ */
+#define CORTEX_VTOR_INIT 0x00008000U
+
+/** @} */
+
+#include <aos_chconf.h>
+
+#endif  /* _CHCONF_H_ */
+
+/** @} */
diff --git a/modules/PowerManagement_1-1/halconf.h b/modules/PowerManagement_1-1/halconf.h
new file mode 100644
index 0000000..b97e72b
--- /dev/null
+++ b/modules/PowerManagement_1-1/halconf.h
@@ -0,0 +1,388 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file    os/modules/PowerManagement/halconf.h
+ * @brief   HAL configuration header for the PowerManagement v1.1 module.
+ * @details HAL configuration file, this file allows to enable or disable the
+ *          various device drivers from your application. You may also use
+ *          this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef _HALCONF_H_
+#define _HALCONF_H_
+
+/**
+ * @brief   Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL                 TRUE
+#endif
+
+/**
+ * @brief   Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC                 TRUE
+#endif
+
+/**
+ * @brief   Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN                 TRUE
+#endif
+
+/**
+ * @brief   Enables the DAC subsystem.
+ */
+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
+#define HAL_USE_DAC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT                 TRUE
+#endif
+
+/**
+ * @brief   Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT                 FALSE
+#endif
+
+/**
+ * @brief   Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C                 TRUE
+#endif
+
+/**
+ * @brief   Enables the I2S subsystem.
+ */
+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
+#define HAL_USE_I2S                 FALSE
+#endif
+
+/**
+ * @brief   Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU                 FALSE
+#endif
+
+/**
+ * @brief   Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI             FALSE
+#endif
+
+/**
+ * @brief   Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM                 TRUE
+#endif
+
+/**
+ * @brief   Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC                 TRUE
+#endif
+
+/**
+ * @brief   Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC                 FALSE
+#endif
+
+/**
+ * @brief   Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL              TRUE
+#endif
+
+/**
+ * @brief   Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB          FALSE
+#endif
+
+/**
+ * @brief   Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI                 TRUE
+#endif
+
+/**
+ * @brief   Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART                FALSE
+#endif
+
+/**
+ * @brief   Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB                 FALSE
+#endif
+
+/**
+ * @brief   Enables the WDG subsystem.
+ */
+#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
+#define HAL_USE_WDG                 FALSE
+#endif
+
+/**
+ * @brief   Enables the QEI subsystem.
+ */
+#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__)
+#define HAL_USE_QEI                 FALSE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT                TRUE
+#endif
+
+/**
+ * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION    FALSE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE          FALSE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION    TRUE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
+#define MAC_USE_ZERO_COPY           FALSE
+#endif
+
+/**
+ * @brief   Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS              FALSE
+#endif
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings.                                          */
+/*===========================================================================*/
+
+/**
+ * @brief   Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ *          routines releasing some extra CPU time for the threads with
+ *          lower priority, this may slow down the driver a bit however.
+ *          This option is recommended also if the SPI driver does not
+ *          use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING            FALSE
+#endif
+
+/*===========================================================================*/
+/* SDC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Number of initialization attempts before rejecting the card.
+ * @note    Attempts are performed at 10mS intervals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY              100
+#endif
+
+/**
+ * @brief   Include support for MMC cards.
+ * @note    MMC support is not yet implemented so this option must be kept
+ *          at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT             FALSE
+#endif
+
+/**
+ * @brief   Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ *          routines releasing some extra CPU time for the threads with
+ *          lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING            FALSE
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings.                                           */
+/*===========================================================================*/
+
+/**
+ * @brief   Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ *          default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE      115200
+#endif
+
+/**
+ * @brief   Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ *          buffers depending on the requirements of your application.
+ * @note    The default is 16 bytes for both the transmission and receive
+ *          buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE         16
+#endif
+
+/*===========================================================================*/
+/* SERIAL_USB driver related setting.                                        */
+/*===========================================================================*/
+
+/**
+ * @brief   Serial over USB buffers size.
+ * @details Configuration parameter, the buffer size must be a multiple of
+ *          the USB data endpoint maximum packet size.
+ * @note    The default is 256 bytes for both the transmission and receive
+ *          buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_SIZE     256
+#endif
+
+/**
+ * @brief   Serial over USB number of buffers.
+ * @note    The default is 2 buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_NUMBER   2
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT                TRUE
+#endif
+
+/**
+ * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION    TRUE
+#endif
+
+/*===========================================================================*/
+/* UART driver related settings.                                             */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
+#define UART_USE_WAIT               FALSE
+#endif
+
+/**
+ * @brief   Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define UART_USE_MUTUAL_EXCLUSION   FALSE
+#endif
+
+/*===========================================================================*/
+/* USB driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
+#define USB_USE_WAIT                FALSE
+#endif
+
+#endif /* _HALCONF_H_ */
+
+/** @} */
diff --git a/modules/PowerManagement_1-1/mcuconf.h b/modules/PowerManagement_1-1/mcuconf.h
new file mode 100644
index 0000000..fd198b9
--- /dev/null
+++ b/modules/PowerManagement_1-1/mcuconf.h
@@ -0,0 +1,362 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _MCUCONF_H_
+#define _MCUCONF_H_
+
+#define STM32F4xx_MCUCONF
+
+/*
+ * Some old revisions of F4x MCU randomly chrashes with certain compiler options enabled.
+ * This flag makes the kernel dynamically detect the MCUs ID code and CPU ID and react accordingly.
+ * (see ChibiOS kernel: os/hal/ports/STM32/STM32F4xx/hal_lld.c)
+ */
+#define STM32_USE_REVISION_A_FIX
+
+/*
+ * STM32F4xx drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 15...0       Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3        Lowest...Highest.
+ */
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   TRUE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
+#define STM32_CLOCK48_REQUIRED              TRUE
+#define STM32_SW                            STM32_SW_PLL
+#define STM32_PLLSRC                        STM32_PLLSRC_HSE
+#define STM32_PLLM_VALUE                    8
+#define STM32_PLLN_VALUE                    336
+#define STM32_PLLP_VALUE                    2
+#define STM32_PLLQ_VALUE                    7
+#define STM32_HPRE                          STM32_HPRE_DIV1
+#define STM32_PPRE1                         STM32_PPRE1_DIV4
+#define STM32_PPRE2                         STM32_PPRE2_DIV2
+#define STM32_RTCSEL                        STM32_RTCSEL_LSI
+#define STM32_RTCPRE_VALUE                  8
+#define STM32_MCO1SEL                       STM32_MCO1SEL_HSI
+#define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1
+#define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK
+#define STM32_MCO2PRE                       STM32_MCO2PRE_DIV5
+#define STM32_I2SSRC                        STM32_I2SSRC_CKIN
+#define STM32_PLLI2SN_VALUE                 192
+#define STM32_PLLI2SR_VALUE                 5
+#define STM32_PVD_ENABLE                    FALSE
+#define STM32_PLS                           STM32_PLS_LEV0
+#define STM32_BKPRAM_ENABLE                 FALSE
+
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_ADCPRE                    ADC_CCR_ADCPRE_DIV4
+#define STM32_ADC_USE_ADC1                  TRUE
+#define STM32_ADC_USE_ADC2                  FALSE
+#define STM32_ADC_USE_ADC3                  FALSE
+#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(2, 4)
+#define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(2, 2)
+#define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(2, 1)
+#define STM32_ADC_ADC1_DMA_PRIORITY         2
+#define STM32_ADC_ADC2_DMA_PRIORITY         2
+#define STM32_ADC_ADC3_DMA_PRIORITY         2
+#define STM32_ADC_IRQ_PRIORITY              6
+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6
+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6
+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6
+
+/*
+ * CAN driver system settings.
+ */
+#define STM32_CAN_USE_CAN1                  TRUE
+#define STM32_CAN_USE_CAN2                  FALSE
+#define STM32_CAN_CAN1_IRQ_PRIORITY         11
+#define STM32_CAN_CAN2_IRQ_PRIORITY         11
+
+/*
+ * DAC driver system settings.
+ */
+#define STM32_DAC_DUAL_MODE                 FALSE
+#define STM32_DAC_USE_DAC1_CH1              FALSE
+#define STM32_DAC_USE_DAC1_CH2              FALSE
+#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY     10
+#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY     10
+#define STM32_DAC_DAC1_CH1_DMA_PRIORITY     2
+#define STM32_DAC_DAC1_CH2_DMA_PRIORITY     2
+#define STM32_DAC_DAC1_CH1_DMA_STREAM       STM32_DMA_STREAM_ID(1, 5)
+#define STM32_DAC_DAC1_CH2_DMA_STREAM       STM32_DMA_STREAM_ID(1, 6)
+
+/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY        6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY       15
+#define STM32_EXT_EXTI18_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI20_IRQ_PRIORITY       6
+#define STM32_EXT_EXTI21_IRQ_PRIORITY       15
+#define STM32_EXT_EXTI22_IRQ_PRIORITY       15
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1                  FALSE
+#define STM32_GPT_USE_TIM2                  FALSE
+#define STM32_GPT_USE_TIM3                  FALSE
+#define STM32_GPT_USE_TIM4                  FALSE
+#define STM32_GPT_USE_TIM5                  FALSE
+#define STM32_GPT_USE_TIM6                  FALSE
+#define STM32_GPT_USE_TIM7                  FALSE
+#define STM32_GPT_USE_TIM8                  FALSE
+#define STM32_GPT_USE_TIM9                  FALSE
+#define STM32_GPT_USE_TIM11                 FALSE
+#define STM32_GPT_USE_TIM12                 FALSE
+#define STM32_GPT_USE_TIM14                 FALSE
+#define STM32_GPT_TIM1_IRQ_PRIORITY         7
+#define STM32_GPT_TIM2_IRQ_PRIORITY         7
+#define STM32_GPT_TIM3_IRQ_PRIORITY         7
+#define STM32_GPT_TIM4_IRQ_PRIORITY         7
+#define STM32_GPT_TIM5_IRQ_PRIORITY         7
+#define STM32_GPT_TIM6_IRQ_PRIORITY         7
+#define STM32_GPT_TIM7_IRQ_PRIORITY         7
+#define STM32_GPT_TIM8_IRQ_PRIORITY         7
+#define STM32_GPT_TIM9_IRQ_PRIORITY         7
+#define STM32_GPT_TIM11_IRQ_PRIORITY        7
+#define STM32_GPT_TIM12_IRQ_PRIORITY        7
+#define STM32_GPT_TIM14_IRQ_PRIORITY        7
+
+/*
+ * I2C driver system settings.
+ */
+#define STM32_I2C_USE_I2C1                  TRUE
+#define STM32_I2C_USE_I2C2                  TRUE
+#define STM32_I2C_USE_I2C3                  FALSE
+#define STM32_I2C_BUSY_TIMEOUT              50
+#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)
+#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)
+#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)
+#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)
+#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)
+#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
+#define STM32_I2C_I2C1_IRQ_PRIORITY         5
+#define STM32_I2C_I2C2_IRQ_PRIORITY         5
+#define STM32_I2C_I2C3_IRQ_PRIORITY         5
+#define STM32_I2C_I2C1_DMA_PRIORITY         3
+#define STM32_I2C_I2C2_DMA_PRIORITY         3
+#define STM32_I2C_I2C3_DMA_PRIORITY         3
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
+#define STM32_I2C_USE_DMA                   TRUE
+
+/*
+ * I2S driver system settings.
+ */
+#define STM32_I2S_USE_SPI2                  FALSE
+#define STM32_I2S_USE_SPI3                  FALSE
+#define STM32_I2S_SPI2_IRQ_PRIORITY         10
+#define STM32_I2S_SPI3_IRQ_PRIORITY         10
+#define STM32_I2S_SPI2_DMA_PRIORITY         1
+#define STM32_I2S_SPI3_DMA_PRIORITY         1
+#define STM32_I2S_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)
+#define STM32_I2S_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
+#define STM32_I2S_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)
+#define STM32_I2S_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)
+#define STM32_I2S_DMA_ERROR_HOOK(i2sp)      osalSysHalt("DMA failure")
+
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1                  FALSE
+#define STM32_ICU_USE_TIM2                  FALSE
+#define STM32_ICU_USE_TIM3                  FALSE
+#define STM32_ICU_USE_TIM4                  FALSE
+#define STM32_ICU_USE_TIM5                  FALSE
+#define STM32_ICU_USE_TIM8                  FALSE
+#define STM32_ICU_USE_TIM9                  FALSE
+#define STM32_ICU_TIM1_IRQ_PRIORITY         7
+#define STM32_ICU_TIM2_IRQ_PRIORITY         7
+#define STM32_ICU_TIM3_IRQ_PRIORITY         7
+#define STM32_ICU_TIM4_IRQ_PRIORITY         7
+#define STM32_ICU_TIM5_IRQ_PRIORITY         7
+#define STM32_ICU_TIM8_IRQ_PRIORITY         7
+#define STM32_ICU_TIM9_IRQ_PRIORITY         7
+
+/*
+ * MAC driver system settings.
+ */
+#define STM32_MAC_TRANSMIT_BUFFERS          2
+#define STM32_MAC_RECEIVE_BUFFERS           4
+#define STM32_MAC_BUFFERS_SIZE              1522
+#define STM32_MAC_PHY_TIMEOUT               100
+#define STM32_MAC_ETH1_CHANGE_PHY_STATE     TRUE
+#define STM32_MAC_ETH1_IRQ_PRIORITY         13
+#define STM32_MAC_IP_CHECKSUM_OFFLOAD       0
+
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED              FALSE
+#define STM32_PWM_USE_TIM1                  FALSE
+#define STM32_PWM_USE_TIM2                  FALSE
+#define STM32_PWM_USE_TIM3                  TRUE
+#define STM32_PWM_USE_TIM4                  FALSE
+#define STM32_PWM_USE_TIM5                  FALSE
+#define STM32_PWM_USE_TIM8                  FALSE
+#define STM32_PWM_USE_TIM9                  FALSE
+#define STM32_PWM_TIM1_IRQ_PRIORITY         7
+#define STM32_PWM_TIM2_IRQ_PRIORITY         7
+#define STM32_PWM_TIM3_IRQ_PRIORITY         7
+#define STM32_PWM_TIM4_IRQ_PRIORITY         7
+#define STM32_PWM_TIM5_IRQ_PRIORITY         7
+#define STM32_PWM_TIM8_IRQ_PRIORITY         7
+#define STM32_PWM_TIM9_IRQ_PRIORITY         7
+
+/*
+ * SDC driver system settings.
+ */
+#define STM32_SDC_SDIO_DMA_PRIORITY         3
+#define STM32_SDC_SDIO_IRQ_PRIORITY         9
+#define STM32_SDC_WRITE_TIMEOUT_MS          250
+#define STM32_SDC_READ_TIMEOUT_MS           25
+#define STM32_SDC_CLOCK_ACTIVATION_DELAY    10
+#define STM32_SDC_SDIO_UNALIGNED_SUPPORT    TRUE
+#define STM32_SDC_SDIO_DMA_STREAM           STM32_DMA_STREAM_ID(2, 3)
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1             TRUE
+#define STM32_SERIAL_USE_USART2             FALSE
+#define STM32_SERIAL_USE_USART3             FALSE
+#define STM32_SERIAL_USE_UART4              FALSE
+#define STM32_SERIAL_USE_UART5              FALSE
+#define STM32_SERIAL_USE_USART6             FALSE
+#define STM32_SERIAL_USART1_PRIORITY        12
+#define STM32_SERIAL_USART2_PRIORITY        12
+#define STM32_SERIAL_USART3_PRIORITY        12
+#define STM32_SERIAL_UART4_PRIORITY         12
+#define STM32_SERIAL_UART5_PRIORITY         12
+#define STM32_SERIAL_USART6_PRIORITY        12
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1                  TRUE
+#define STM32_SPI_USE_SPI2                  FALSE
+#define STM32_SPI_USE_SPI3                  FALSE
+#define STM32_SPI_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 0)
+#define STM32_SPI_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 3)
+#define STM32_SPI_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)
+#define STM32_SPI_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
+#define STM32_SPI_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)
+#define STM32_SPI_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)
+#define STM32_SPI_SPI1_DMA_PRIORITY         1
+#define STM32_SPI_SPI2_DMA_PRIORITY         1
+#define STM32_SPI_SPI3_DMA_PRIORITY         1
+#define STM32_SPI_SPI1_IRQ_PRIORITY         10
+#define STM32_SPI_SPI2_IRQ_PRIORITY         10
+#define STM32_SPI_SPI3_IRQ_PRIORITY         10
+#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
+
+/*
+ * ST driver system settings.
+ */
+#define STM32_ST_IRQ_PRIORITY               8
+#define STM32_ST_USE_TIMER                  2
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1               FALSE
+#define STM32_UART_USE_USART2               TRUE
+#define STM32_UART_USE_USART3               TRUE
+#define STM32_UART_USE_UART4                FALSE
+#define STM32_UART_USE_UART5                FALSE
+#define STM32_UART_USE_USART6               FALSE
+#define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 5)
+#define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)
+#define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 5)
+#define STM32_UART_USART2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6)
+#define STM32_UART_USART3_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 1)
+#define STM32_UART_USART3_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 3)
+#define STM32_UART_UART4_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 2)
+#define STM32_UART_UART4_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 4)
+#define STM32_UART_UART5_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 0)
+#define STM32_UART_UART5_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 7)
+#define STM32_UART_USART6_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 2)
+#define STM32_UART_USART6_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)
+#define STM32_UART_USART1_IRQ_PRIORITY      12
+#define STM32_UART_USART2_IRQ_PRIORITY      12
+#define STM32_UART_USART3_IRQ_PRIORITY      12
+#define STM32_UART_UART4_IRQ_PRIORITY       12
+#define STM32_UART_UART5_IRQ_PRIORITY       12
+#define STM32_UART_USART6_IRQ_PRIORITY      12
+#define STM32_UART_USART1_DMA_PRIORITY      0
+#define STM32_UART_USART2_DMA_PRIORITY      0
+#define STM32_UART_USART3_DMA_PRIORITY      0
+#define STM32_UART_UART4_DMA_PRIORITY       0
+#define STM32_UART_UART5_DMA_PRIORITY       0
+#define STM32_UART_USART6_DMA_PRIORITY      0
+#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
+
+/*
+ * USB driver system settings.
+ */
+#define STM32_USB_USE_OTG1                  FALSE
+#define STM32_USB_USE_OTG2                  FALSE
+#define STM32_USB_OTG1_IRQ_PRIORITY         14
+#define STM32_USB_OTG2_IRQ_PRIORITY         14
+#define STM32_USB_OTG1_RX_FIFO_SIZE         512
+#define STM32_USB_OTG2_RX_FIFO_SIZE         1024
+#define STM32_USB_OTG_THREAD_PRIO           LOWPRIO
+#define STM32_USB_OTG_THREAD_STACK_SIZE     128
+#define STM32_USB_OTGFIFO_FILL_BASEPRI      0
+
+/*
+ * WDG driver system settings.
+ */
+#define STM32_WDG_USE_IWDG                  FALSE
+
+/*
+ * QEI driver system settings.
+ */
+#define STM32_QEI_USE_TIM1                  FALSE
+#define STM32_QEI_USE_TIM2                  FALSE
+#define STM32_QEI_USE_TIM3                  FALSE
+#define STM32_QEI_USE_TIM4                  FALSE
+#define STM32_QEI_USE_TIM5                  FALSE
+#define STM32_QEI_USE_TIM8                  FALSE
+
+#endif /* _MCUCONF_H_ */
diff --git a/modules/PowerManagement_1-1/module.c b/modules/PowerManagement_1-1/module.c
new file mode 100644
index 0000000..94feab6
--- /dev/null
+++ b/modules/PowerManagement_1-1/module.c
@@ -0,0 +1,1139 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include "module.h"
+
+/*===========================================================================*/
+/**
+ * @name Module specific functions
+ * @{
+ */
+/*===========================================================================*/
+#include <amiroos.h>
+
+/**
+ * @brief   Interrupt service routine callback for I/O interrupt signals.
+ *
+ * @param   extp      EXT driver to handle the ISR.
+ * @param   channel   Channel on which the interrupt was encountered.
+ */
+static void _moduleIsrCallback(EXTDriver* extp, expchannel_t channel) {
+  (void)extp;
+
+  chSysLockFromISR();
+  chEvtBroadcastFlagsI(&aos.events.io.source, (1 << channel));
+  chSysUnlockFromISR();
+
+  return;
+}
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name ChibiOS/HAL configuration
+ * @{
+ */
+/*===========================================================================*/
+
+ADCConversionGroup moduleHalAdcVsysConversionGroup = {
+  /* buffer type        */ true,
+  /* number of channels */ 1,
+  /* callback function  */ NULL,
+  /* error callback     */ NULL,
+  /* CR1                */ ADC_CR1_AWDEN | ADC_CR1_AWDIE,
+  /* CR2                */ ADC_CR2_SWSTART | ADC_CR2_CONT,
+  /* SMPR1              */ 0,
+  /* SMPR2              */ ADC_SMPR2_SMP_AN9(ADC_SAMPLE_480),
+  /* HTR                */ ADC_HTR_HT,
+  /* LTR                */ 0,
+  /* SQR1               */ ADC_SQR1_NUM_CH(1),
+  /* SQR2               */ 0,
+  /* SQR3               */ ADC_SQR3_SQ1_N(ADC_CHANNEL_IN9),
+};
+
+CANConfig moduleHalCanConfig = {
+  /* mcr  */ CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
+  /* btr  */ CAN_BTR_SJW(1) | CAN_BTR_TS2(2) | CAN_BTR_TS1(13) | CAN_BTR_BRP(1),
+};
+
+EXTConfig moduleHalExtConfig = {
+  /* channel configrations */ {
+    /* channel  0 */ { // IR_INT1_N: must be enabled explicitely
+      /* mode     */ EXT_MODE_GPIOB | APAL2CH_EDGE(VCNL4020_LLD_INT_EDGE),
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel  1 */ { // GAUGE_BATLOW1: must be enabled explicitely
+      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_RISING_EDGE,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel  2 */ { // GAUGE_BATDG1_N: must be enabled expliciety
+      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_RISING_EDGE,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel  3 */ { // SYS_UART_DN: automatic interrupt on event
+      /* mode     */ EXT_MODE_GPIOB | EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel  4 */ { // IR_INT2_N: must be enabled explicitely
+      /* mode     */ EXT_MODE_GPIOC | APAL2CH_EDGE(VCNL4020_LLD_INT_EDGE),
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel  5 */ { // TOUCH_INT: must be enabled explicitely
+      /* mode     */ EXT_MODE_GPIOC | APAL2CH_EDGE(MPR121_LLD_INT_EDGE),
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel  6 */ { // GAUGE_BATLOW2: must be enabled explicitely
+      /* mode     */ EXT_MODE_GPIOB | EXT_CH_MODE_RISING_EDGE,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel  7 */ { // GAUGE_BATDG2_N: must be enabled expliciety
+      /* mode     */ EXT_MODE_GPIOB | EXT_CH_MODE_RISING_EDGE,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel  8 */ { // PATH_DC: must be enabled explicitely
+      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_BOTH_EDGES,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel  9 */ { // SYS_SPI_DIR: must be enabled explicitely
+      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_BOTH_EDGES,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel 10 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel 11 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel 12 */ { // SYS_SYNC_N: automatic interrupt on event
+      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel 13 */ { // SYS_PD_N: automatic interrupt when activated
+      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel 14 */ { // SYS_WARMRST_N: automatic interrupt when activated
+      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel 15 */ { // SYS_UART_UP: automatic interrupt on event
+      /* mode     */ EXT_MODE_GPIOB| EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
+      /* callback */ _moduleIsrCallback,
+    },
+    /* channel 16 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel 17 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel 18 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel 19 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel 20 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel 21 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+    /* channel 22 */ {
+      /* mode     */ EXT_CH_MODE_DISABLED,
+      /* callback */ NULL,
+    },
+  },
+};
+
+I2CConfig moduleHalI2cProxPm18Pm33GaugeRearConfig = {
+  /* I²C mode   */ OPMODE_I2C,
+  /* frequency  */ 400000, // TODO: replace with some macro (-> ChibiOS/HAL)
+  /* duty cycle */ FAST_DUTY_CYCLE_2,
+};
+
+I2CConfig moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig = {
+  /* I²C mode   */ OPMODE_I2C,
+  /* frequency  */ 400000, // TODO: replace with some macro (-> ChibiOS/HAL)
+  /* duty cycle */ FAST_DUTY_CYCLE_2,
+};
+
+PWMConfig moduleHalPwmBuzzerConfig = {
+  /* frequency              */ 1000000,
+  /* period                 */ 0,
+  /* callback               */ NULL,
+  /* channel configurations */ {
+    /* channel 0              */ {
+      /* mode                   */ PWM_OUTPUT_DISABLED,
+      /* callback               */ NULL
+    },
+    /* channel 1              */ {
+      /* mode                   */ PWM_OUTPUT_ACTIVE_HIGH,
+      /* callback               */ NULL
+    },
+    /* channel 2              */ {
+      /* mode                   */ PWM_OUTPUT_DISABLED,
+      /* callback               */ NULL
+    },
+    /* channel 3              */ {
+      /* mode                   */ PWM_OUTPUT_DISABLED,
+      /* callback               */ NULL
+    },
+  },
+  /* TIM CR2 register       */ 0,
+#if STM32_PWM_USE_ADVANCED
+  /* TIM BDTR register      */ 0,
+#endif
+  /* TIM DIER register      */ 0,
+};
+
+SerialConfig moduleHalProgIfConfig = {
+  /* bit rate */ 115200,
+  /* CR1      */ 0,
+  /* CR1      */ 0,
+  /* CR1      */ 0,
+};
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name GPIO definitions
+ * @{
+ */
+/*===========================================================================*/
+
+apalGpio_t moduleGpioSysRegEn = {
+  /* port */ GPIOA,
+  /* pad  */ GPIOA_SYS_REG_EN,
+};
+
+apalGpio_t moduleGpioIrInt1 = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_IR_INT1_N,
+};
+
+apalGpio_t moduleGpioPowerEn = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_POWER_EN,
+};
+
+apalGpio_t moduleGpioSysUartDn = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_SYS_UART_DN,
+};
+
+apalGpio_t moduleGpioChargeStat2A = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_CHARGE_STAT2A,
+};
+
+apalGpio_t moduleGpioGaugeBatLow2 = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_GAUGE_BATLOW2,
+};
+
+apalGpio_t moduleGpioGaugeBatGd2 = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_GAUGE_BATGD2_N,
+};
+
+apalGpio_t moduleGpioLed = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_LED,
+};
+
+apalGpio_t moduleGpioSysUartUp = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_SYS_UART_UP,
+};
+
+apalGpio_t moduleGpioChargeStat1A = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_CHARGE_STAT1A,
+};
+
+apalGpio_t moduleGpioGaugeBatLow1 = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_GAUGE_BATLOW1,
+};
+
+apalGpio_t moduleGpioGaugeBatGd1 = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_GAUGE_BATGD1_N,
+};
+
+apalGpio_t moduleGpioChargeEn1 = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_CHARGE_EN1_N,
+};
+
+apalGpio_t moduleGpioIrInt2 = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_IR_INT2_N,
+};
+
+apalGpio_t moduleGpioTouchInt = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_TOUCH_INT_N,
+};
+
+apalGpio_t moduleGpioSysDone = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_SYS_DONE,
+};
+
+apalGpio_t moduleGpioSysProg = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_SYS_PROG_N,
+};
+
+apalGpio_t moduleGpioPathDc = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_PATH_DC,
+};
+
+apalGpio_t moduleGpioSysSpiDir = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_SYS_SPI_DIR,
+};
+
+apalGpio_t moduleGpioSysSync = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_SYS_INT_N,
+};
+
+apalGpio_t moduleGpioSysPd = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_SYS_PD_N,
+};
+
+apalGpio_t moduleGpioSysWarmrst = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_SYS_WARMRST_N,
+};
+
+apalGpio_t moduleGpioBtRst = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_BT_RST,
+};
+
+apalGpio_t moduleGpioChargeEn2 = {
+  /* port */ GPIOD,
+  /* pad  */ GPIOD_CHARGE_EN2_N,
+};
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name AMiRo-OS core configurations
+ * @{
+ */
+/*===========================================================================*/
+
+apalControlGpio_t moduleSsspPd = {
+  /* GPIO */ &moduleGpioSysPd,
+  /* meta */ {
+    /* active state */ APAL_GPIO_ACTIVE_LOW,
+    /* edge         */ APAL_GPIO_EDGE_FALLING,
+    /* direction    */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
+  },
+};
+
+apalControlGpio_t moduleSsspSync = {
+  /* GPIO */ &moduleGpioSysSync,
+  /* meta */ {
+    /* active state */ APAL_GPIO_ACTIVE_LOW,
+    /* edge         */ APAL_GPIO_EDGE_FALLING,
+    /* direction    */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
+  },
+};
+
+const char* moduleShellPrompt = "PowerManagement";
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Low-level drivers
+ * @{
+ */
+/*===========================================================================*/
+
+AT24C01BNDriver moduleLldEeprom = {
+  /* I2C driver   */ &MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT,
+  /* I2C address  */ AT24C01BN_LLD_I2C_ADDR_FIXED,
+};
+
+BQ24103ADriver moduleLldBatteryChargerFront = {
+  /* charge enable GPIO */ {
+    /* GPIO */ &moduleGpioChargeEn1,
+    /* meta */ {
+      /* active state */ APAL_GPIO_ACTIVE_LOW,
+      /* edge         */ APAL_GPIO_EDGE_NONE,
+      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
+    },
+  },
+  /* charge status GPIO */ {
+    /* GPIO */ &moduleGpioChargeStat1A,
+    /* meta */ {
+      /* active state */ APAL_GPIO_ACTIVE_LOW,
+      /* edge         */ APAL_GPIO_EDGE_NONE,
+      /* direction    */ APAL_GPIO_DIRECTION_INPUT,
+    },
+  },
+};
+
+BQ24103ADriver moduleLldBatteryChargerRear = {
+  /* charge enable GPIO */ {
+    /* GPIO */ &moduleGpioChargeEn2,
+    /* meta */ {
+      /* active state */ APAL_GPIO_ACTIVE_LOW,
+      /* edge         */ APAL_GPIO_EDGE_NONE,
+      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
+    },
+  },
+  /* charge status GPIO */ {
+    /* GPIO */ &moduleGpioChargeStat2A,
+    /* meta */ {
+      /* active state */ APAL_GPIO_ACTIVE_LOW,
+      /* edge         */ APAL_GPIO_EDGE_NONE,
+      /* direction    */ APAL_GPIO_DIRECTION_INPUT,
+    },
+  },
+};
+
+BQ27500Driver moduleLldFuelGaugeFront = {
+  /* I2C driver       */ &MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT,
+  /* battery low GPIO */ {
+    /* GPIO */ &moduleGpioGaugeBatLow1,
+    /* meta */ {
+      /* active state */ APAL_GPIO_ACTIVE_HIGH,
+      /* edge         */ APAL_GPIO_EDGE_NONE,
+      /* direction    */ APAL_GPIO_DIRECTION_INPUT,
+    },
+  },
+  /* battery good GPIO */ {
+    /* GPIO */ &moduleGpioGaugeBatGd1,
+    /* meta */ {
+      /* active state */ APAL_GPIO_ACTIVE_LOW,
+      /* edge         */ APAL_GPIO_EDGE_NONE,
+      /* direction    */ APAL_GPIO_DIRECTION_INPUT,
+    },
+  },
+};
+
+BQ27500Driver moduleLldFuelGaugeRear = {
+  /* I2C driver       */ &MODULE_HAL_I2C_PROX_PM18_PM33_GAUGEREAR,
+  /* battery low GPIO */ {
+    /* GPIO */ &moduleGpioGaugeBatLow2,
+    /* meta */ {
+      /* active state */ APAL_GPIO_ACTIVE_HIGH,
+      /* edge         */ APAL_GPIO_EDGE_NONE,
+      /* direction    */ APAL_GPIO_DIRECTION_INPUT,
+    },
+  },
+  /* battery good GPIO */ {
+    /* GPIO */ &moduleGpioGaugeBatGd2,
+    /* meta */ {
+      /* active state */ APAL_GPIO_ACTIVE_LOW,
+      /* edge         */ APAL_GPIO_EDGE_NONE,
+      /* direction    */ APAL_GPIO_DIRECTION_INPUT,
+    },
+  },
+};
+
+INA219Driver moduleLldPowerMonitorVdd = {
+  /* I2C Driver       */ &MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT,
+  /* I²C address      */ INA219_LLD_I2C_ADDR_A0 | INA219_LLD_I2C_ADDR_A1,
+  /* current LSB (uA) */ 0x00u,
+  /* configuration    */ NULL,
+};
+
+INA219Driver moduleLldPowerMonitorVio18 = {
+  /* I2C Driver       */ &MODULE_HAL_I2C_PROX_PM18_PM33_GAUGEREAR,
+  /* I²C address      */ INA219_LLD_I2C_ADDR_A1,
+  /* current LSB (uA) */ 0x00u,
+  /* configuration    */ NULL,
+};
+
+INA219Driver moduleLldPowerMonitorVio33 = {
+  /* I2C Driver       */ &MODULE_HAL_I2C_PROX_PM18_PM33_GAUGEREAR,
+  /* I²C address      */ INA219_LLD_I2C_ADDR_FIXED,
+  /* current LSB (uA) */ 0x00u,
+  /* configuration    */ NULL,
+};
+
+INA219Driver moduleLldPowerMonitorVsys42 = {
+  /* I2C Driver       */ &MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT,
+  /* I²C address      */ INA219_LLD_I2C_ADDR_FIXED,
+  /* current LSB (uA) */ 0x00u,
+  /* configuration    */ NULL,
+};
+
+INA219Driver moduleLldPowerMonitorVio50 = {
+  /* I2C Driver       */ &MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT,
+  /* I²C address      */ INA219_LLD_I2C_ADDR_A1,
+  /* current LSB (uA) */ 0x00u,
+  /* configuration    */ NULL,
+};
+
+LEDDriver moduleLldStatusLed = {
+  /* LED GPIO */ {
+    /* GPIO */ &moduleGpioLed,
+    /* meta */ {
+      /* active state */ APAL_GPIO_ACTIVE_LOW,
+      /* edge         */ APAL_GPIO_EDGE_NONE,
+      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
+    },
+  },
+};
+
+MPR121Driver moduleLldTouch = {
+  /* I²C Driver */ &MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT,
+};
+
+PCA9544ADriver moduleLldI2cMultiplexer1 = {
+  /* I²C driver   */ &MODULE_HAL_I2C_PROX_PM18_PM33_GAUGEREAR,
+  /* I²C address  */ PCA9544A_LLD_I2C_ADDR_A0 | PCA9544A_LLD_I2C_ADDR_A1 | PCA9544A_LLD_I2C_ADDR_A2,
+};
+
+PCA9544ADriver moduleLldI2cMultiplexer2 = {
+  /* I²C driver   */ &MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT,
+  /* I²C address  */ PCA9544A_LLD_I2C_ADDR_A0 | PCA9544A_LLD_I2C_ADDR_A1 | PCA9544A_LLD_I2C_ADDR_A2,
+};
+
+TPS62113Driver moduleLldStepDownConverter = {
+  /* Power enable GPIO */ {
+    /* GPIO       */ &moduleGpioPowerEn,
+    /* GPIO meta  */ {
+      /* active state */ APAL_GPIO_ACTIVE_HIGH,
+      /* egde         */ APAL_GPIO_EDGE_NONE,
+      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
+    },
+  },
+};
+
+VCNL4020Driver moduleLldProximity1 = {
+  /* I²C Driver */ &MODULE_HAL_I2C_PROX_PM18_PM33_GAUGEREAR,
+};
+
+VCNL4020Driver moduleLldProximity2 = {
+  /* I²C Driver */ &MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT,
+};
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Unit tests (UT)
+ * @{
+ */
+/*===========================================================================*/
+#if (AMIROOS_CFG_TESTS_ENABLE == true) || defined(__DOXYGEN__)
+#include <string.h>
+
+/* ADC  */
+static int _utShellCmdCb_Adc(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAdcVsys, NULL);
+  return AOS_OK;
+}
+static ut_adcdata_t _utAdcVsysData = {
+  /* driver               */ &MODULE_HAL_ADC_VSYS,
+  /* ADC conversion group */ &moduleHalAdcVsysConversionGroup,
+};
+aos_unittest_t moduleUtAdcVsys = {
+  /* name           */ "ADC",
+  /* info           */ "VSYS",
+  /* test function  */ utAdcFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:ADC",
+    /* callback */ _utShellCmdCb_Adc,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAdcVsysData,
+};
+
+/* AT24C01BN-SH-B (EEPROM) */
+static int _utShellCmdCb_AlldAt24c01bn(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldAt24c01bn, NULL);
+  return AOS_OK;
+}
+static ut_at24c01bndata_t _utAlldAt24c01bnData = {
+  /* driver   */ &moduleLldEeprom,
+  /* timeout  */ MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldAt24c01bn = {
+  /* name           */ "AT24C01BN-SH-B",
+  /* info           */ "1kbit EEPROM",
+  /* test function  */ utAlldAt24c01bnFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:EEPROM",
+    /* callback */ _utShellCmdCb_AlldAt24c01bn,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldAt24c01bnData,
+};
+
+/* BQ24103A (battery charger) */
+static int _utShellCmdCb_AlldBq24103a(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  // local variables
+  bool print_help = false;
+
+  // evaluate argument
+  if (argc == 2) {
+    if (strcmp(argv[1], "-f") == 0 || strcmp(argv[1], "--front") == 0) {
+      moduleUtAlldBq24103a.data = &moduleLldBatteryChargerFront;
+      aosUtRun(stream, &moduleUtAlldBq24103a, "front battery");
+      moduleUtAlldBq24103a.data = NULL;
+    }
+    else if (strcmp(argv[1], "-r") == 0 || strcmp(argv[1], "--rear") == 0) {
+      moduleUtAlldBq24103a.data = &moduleLldBatteryChargerRear;
+      aosUtRun(stream, &moduleUtAlldBq24103a, "rear battery");
+      moduleUtAlldBq24103a.data = NULL;
+    }
+    else {
+      print_help = true;
+    }
+  } else {
+    print_help = true;
+  }
+
+  // print help or just return
+  if (print_help) {
+    chprintf(stream, "Usage: %s OPTION\n", argv[0]);
+    chprintf(stream, "Options:\n");
+    chprintf(stream, "  --front, -f\n");
+    chprintf(stream, "    Test the front battery charger.\n");
+    chprintf(stream, "  --rear, -r\n");
+    chprintf(stream, "    Test the rear battery charger.\n");
+    return AOS_INVALID_ARGUMENTS;
+  } else {
+    return AOS_OK;
+  }
+}
+aos_unittest_t moduleUtAlldBq24103a = {
+  /* name           */ "BQ24103A",
+  /* info           */ "battery charger",
+  /* test function  */ utAlldBq24103aFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:BatteryCharger",
+    /* callback */ _utShellCmdCb_AlldBq24103a,
+    /* next     */ NULL,
+  },
+  /* data           */ NULL,
+};
+
+/* BQ27500 (fuel gauge) */
+static int _utShellCmdCb_AlldBq27500(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  // evaluate arguments
+  if (argc == 2) {
+    if (strcmp(argv[1], "-f") == 0 || strcmp(argv[1], "--front") == 0) {
+      ((ut_bq27500data_t*)moduleUtAlldBq27500.data)->driver = &moduleLldFuelGaugeFront;
+      aosUtRun(stream, &moduleUtAlldBq27500, "front battery");
+      ((ut_bq27500data_t*)moduleUtAlldBq27500.data)->driver = NULL;
+      return AOS_OK;
+    }
+    else if (strcmp(argv[1], "-r") == 0 || strcmp(argv[1], "--rear") == 0) {
+      ((ut_bq27500data_t*)moduleUtAlldBq27500.data)->driver = &moduleLldFuelGaugeRear;
+      aosUtRun(stream, &moduleUtAlldBq27500, "rear battery");
+      ((ut_bq27500data_t*)moduleUtAlldBq27500.data)->driver = NULL;
+      return AOS_OK;
+    }
+  }
+  // print help
+  chprintf(stream, "Usage: %s OPTION\n", argv[0]);
+  chprintf(stream, "Options:\n");
+  chprintf(stream, "  --front, -f\n");
+  chprintf(stream, "    Test the front battery fuel gauge.\n");
+  chprintf(stream, "  --rear, -r\n");
+  chprintf(stream, "    Test the rear battery fuel gauge.\n");
+  return AOS_INVALID_ARGUMENTS;
+}
+static ut_bq27500data_t _utAlldBq27500Data = {
+  /* driver   */ NULL,
+  /* timeout  */ MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldBq27500 = {
+  /* name           */ "BQ27500",
+  /* info           */ "fuel gauge",
+  /* test function  */ utAlldBq27500Func,
+  /* shell command  */ {
+    /* name     */ "unittest:FuelGauge",
+    /* callback */ _utShellCmdCb_AlldBq27500,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldBq27500Data,
+};
+
+/* BQ27500 (fuel gauge) in combination with BQ24103A (battery charger) */
+static int _utShellCmdCb_AlldBq27500Bq24103a(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  // evaluate arguments
+  if (argc == 2) {
+    if (strcmp(argv[1], "-f") == 0 || strcmp(argv[1], "--front") == 0) {
+      ((ut_bq27500bq24103adata_t*)moduleUtAlldBq27500Bq24103a.data)->bq27500 = &moduleLldFuelGaugeFront;
+      ((ut_bq27500bq24103adata_t*)moduleUtAlldBq27500Bq24103a.data)->bq24103a = &moduleLldBatteryChargerFront;
+      aosUtRun(stream, &moduleUtAlldBq27500Bq24103a, "front battery");
+      ((ut_bq27500bq24103adata_t*)moduleUtAlldBq27500Bq24103a.data)->bq27500 = NULL;
+      ((ut_bq27500bq24103adata_t*)moduleUtAlldBq27500Bq24103a.data)->bq24103a = NULL;
+      return AOS_OK;
+    }
+    else if (strcmp(argv[1], "-r") == 0 || strcmp(argv[1], "--rear") == 0) {
+      ((ut_bq27500bq24103adata_t*)moduleUtAlldBq27500Bq24103a.data)->bq27500 = &moduleLldFuelGaugeRear;
+      ((ut_bq27500bq24103adata_t*)moduleUtAlldBq27500Bq24103a.data)->bq24103a = &moduleLldBatteryChargerRear;
+      aosUtRun(stream, &moduleUtAlldBq27500Bq24103a, "rear battery");
+      ((ut_bq27500bq24103adata_t*)moduleUtAlldBq27500Bq24103a.data)->bq27500 = NULL;
+      ((ut_bq27500bq24103adata_t*)moduleUtAlldBq27500Bq24103a.data)->bq24103a = NULL;
+      return AOS_OK;
+    }
+  }
+  // print help
+  chprintf(stream, "Usage: %s OPTION\n", argv[0]);
+  chprintf(stream, "Options:\n");
+  chprintf(stream, "  --front, -f\n");
+  chprintf(stream, "    Test the front battery fuel gauge and charger.\n");
+  chprintf(stream, "  --rear, -r\n");
+  chprintf(stream, "    Test the rear battery fuel gauge and charger.\n");
+  return AOS_INVALID_ARGUMENTS;
+}
+static ut_bq27500bq24103adata_t _utAlldBq27500Bq24103aData= {
+  /* BQ27500 driver   */ NULL,
+  /* BQ23203A driver  */ NULL,
+  /* timeout          */ MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldBq27500Bq24103a = {
+  /* name           */ "BQ27500 & BQ24103A",
+  /* info           */ "fuel gauge & battery charger",
+  /* test function  */ utAlldBq27500Bq24103aFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:FuelGauge&BatteryCharger",
+    /* callback */ _utShellCmdCb_AlldBq27500Bq24103a,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldBq27500Bq24103aData,
+};
+
+/* INA219 (power monitor) */
+static int _utShellCmdCb_AlldIna219(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  // evaluate arguments
+  if (argc == 2) {
+    if (strcmp(argv[1], "VDD") == 0) {
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = &moduleLldPowerMonitorVdd;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 3.3f;
+      aosUtRun(stream, &moduleUtAlldIna219, "VDD (3.3V)");
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = NULL;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 0.0f;
+      return AOS_OK;
+    }
+    else if (strcmp(argv[1], "VIO1.8") == 0) {
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = &moduleLldPowerMonitorVio18;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 1.8f;
+      aosUtRun(stream, &moduleUtAlldIna219, "VIO (1.8V)");
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = NULL;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 0.0f;
+      return AOS_OK;
+    }
+    else if (strcmp(argv[1], "VIO3.3") == 0) {
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = &moduleLldPowerMonitorVio33;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 3.3f;
+      aosUtRun(stream, &moduleUtAlldIna219, "VIO (3.3V)");
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = NULL;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 0.0f;
+      return AOS_OK;
+    }
+    else if (strcmp(argv[1], "VSYS4.2") == 0) {
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = &moduleLldPowerMonitorVsys42;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 4.2f;
+      aosUtRun(stream, &moduleUtAlldIna219, "VSYS (4.2V)");
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = NULL;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 0.0f;
+      return AOS_OK;
+    }
+    else if (strcmp(argv[1], "VIO5.0") == 0) {
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = &moduleLldPowerMonitorVio50;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 5.0f;
+      aosUtRun(stream, &moduleUtAlldIna219, "VIO (5.0V)");
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = NULL;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 0.0f;
+      return AOS_OK;
+    }
+  }
+  // print help
+  chprintf(stream, "Usage: %s OPTION\n", argv[0]);
+  chprintf(stream, "Options:\n");
+  chprintf(stream, "  VDD\n");
+  chprintf(stream, "    Test VDD (3.3V) power monitor.\n");
+  chprintf(stream, "  VIO1.8\n");
+  chprintf(stream, "    Test VIO 1.8V power monitor.\n");
+  chprintf(stream, "  VIO3.3\n");
+  chprintf(stream, "    Test VIO 3.3V power monitor.\n");
+  chprintf(stream, "  VSYS4.2\n");
+  chprintf(stream, "    Test VSYS 4.2V power monitor.\n");
+  chprintf(stream, "  VIO5.0\n");
+  chprintf(stream, "    Test VIO 5.0V power monitor.\n");
+  return AOS_INVALID_ARGUMENTS;
+}
+static ut_ina219data_t _utAlldIna219Data = {
+  /* driver           */ NULL,
+  /* expected voltage */ 0.0f,
+  /* tolerance        */ 0.05f,
+  /* timeout          */ MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldIna219 = {
+  /* name           */ "INA219",
+  /* info           */ "power monitor",
+  /* test function  */ utAlldIna219Func,
+  /* shell command  */ {
+    /* name     */ "unittest:PowerMonitor",
+    /* callback */ _utShellCmdCb_AlldIna219,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldIna219Data,
+};
+
+/* Status LED */
+static int _utShellCmdCb_AlldLed(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldLed, NULL);
+  return AOS_OK;
+}
+aos_unittest_t moduleUtAlldLed = {
+  /* name           */ "LED",
+  /* info           */ NULL,
+  /* test function  */ utAlldLedFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:StatusLED",
+    /* callback */ _utShellCmdCb_AlldLed,
+    /* next     */ NULL,
+  },
+  /* data           */ &moduleLldStatusLed,
+};
+
+/* MPR121 (touch sensor) */
+static int _utShellCmdCb_AlldMpr121(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  extChannelEnable(&MODULE_HAL_EXT, MODULE_GPIO_EXTCHANNEL_TOUCHINT);
+  aosUtRun(stream, &moduleUtAlldMpr121, NULL);
+  return AOS_OK;
+}
+static ut_mpr121data_t _utAlldMpr121Data= {
+  /* MPR121 driver  */ &moduleLldTouch,
+  /* timeout        */ MICROSECONDS_PER_SECOND,
+  /* event source   */ &aos.events.io.source,
+  /* event flags    */ (1 << MODULE_GPIO_EXTCHANNEL_TOUCHINT),
+};
+aos_unittest_t moduleUtAlldMpr121 = {
+  /* name           */ "MPR121",
+  /* info           */ "touch sensor",
+  /* test function  */ utAlldMpr121Func,
+  /* shell command  */ {
+    /* name     */ "unittest:Touch",
+    /* callback */ _utShellCmdCb_AlldMpr121,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldMpr121Data,
+};
+
+/* PCA9544A (I2C multiplexer) */
+static int _utShellCmdCb_AlldPca5944a(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  // evaluate arguments
+  if (argc == 2) {
+    if (strcmp(argv[1], "#1") == 0) {
+      ((ut_pca9544adata_t*)moduleUtAlldPca9544a.data)->driver = &moduleLldI2cMultiplexer1;
+      aosUtRun(stream, &moduleUtAlldPca9544a, "I2C bus #1");
+      ((ut_pca9544adata_t*)moduleUtAlldPca9544a.data)->driver = NULL;
+      return AOS_OK;
+    }
+    else if (strcmp(argv[1], "#2") == 0) {
+      ((ut_pca9544adata_t*)moduleUtAlldPca9544a.data)->driver = &moduleLldI2cMultiplexer2;
+      aosUtRun(stream, &moduleUtAlldPca9544a, "I2C bus #2");
+      ((ut_pca9544adata_t*)moduleUtAlldPca9544a.data)->driver = NULL;
+      return AOS_OK;
+    }
+  }
+  // print help
+  chprintf(stream, "Usage: %s OPTION\n", argv[0]);
+  chprintf(stream, "Options:\n");
+  chprintf(stream, "  #1\n");
+  chprintf(stream, "    Test the multiplexer on the I2C bus #1.\n");
+  chprintf(stream, "  #2\n");
+  chprintf(stream, "    Test the multiplexer on the I2C bus #2.\n");
+  return AOS_INVALID_ARGUMENTS;
+}
+static ut_pca9544adata_t _utAlldPca9544aData = {
+  /* driver   */ NULL,
+  /* timeout  */ MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldPca9544a = {
+  /* name           */ "PCA9544A",
+  /* info           */ "I2C multiplexer",
+  /* test function  */ utAlldPca9544aFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:I2CMultiplexer",
+    /* callback */ _utShellCmdCb_AlldPca5944a,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldPca9544aData,
+};
+
+/* PKLCS1212E4001 (buzzer) */
+static int _utShellCmdCb_AlldPklcs1212e4001(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldPklcs1212e4001, NULL);
+  return AOS_OK;
+}
+static ut_pklcs1212e4001_t _utAlldPklcs1212e4001Data = {
+  /* PWM driver   */ &MODULE_HAL_PWM_BUZZER,
+  /* PWM channel  */ MODULE_HAL_PWM_BUZZER_CHANNEL
+};
+aos_unittest_t moduleUtAlldPklcs1212e4001 = {
+  /* name           */ "PKLCS1212E4001",
+  /* info           */ "buzzer",
+  /* test function  */ utAlldPklcs1212e4001Func,
+  /* shell command  */ {
+    /* name     */ "unittest:Buzzer",
+    /* callback */ _utShellCmdCb_AlldPklcs1212e4001,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldPklcs1212e4001Data,
+};
+
+/* TPS62113 (stop-down converter) */
+static int _utShellCmdCb_AlldTps62113(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  // Although there are four TPS62113 on the PCB, they all share the same input signal.
+  // A sa result, no additional shell arguments need to be evaluated.
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldTps62113, NULL);
+  return AOS_OK;
+}
+aos_unittest_t moduleUtAlldTps62113 = {
+  /* name           */ "TPS62113",
+  /* info           */ "step-down converter",
+  /* test function  */ utAlldTps62113Func,
+  /* shell command  */ {
+    /* name     */ "unittest:StepDownConverter",
+    /* callback */ _utShellCmdCb_AlldTps62113,
+    /* next     */ NULL,
+  },
+  /* data           */ &moduleLldStepDownConverter,
+};
+
+/* TPS62113 (step-donw converter) in combination with INA219 (power monitor) */
+static int _utShellCmdCb_AlldTps62113Ina219(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldTps62113Ina219, "VSYS (4.2V)");
+  return AOS_OK;
+}
+ut_tps62113ina219data_t _utAlldTps62113Ina219Data = {
+  /* TPS62113 */ &moduleLldStepDownConverter,
+  /* INA219   */ &moduleLldPowerMonitorVsys42,
+  /* timeout  */ MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldTps62113Ina219 = {
+  /* name           */ "TPS62113 & INA219",
+  /* info           */ "step-down converter & power monitor",
+  /* test function  */ utAlldTps62113Ina219Func,
+  /* shell command  */ {
+    /* name     */ "unittest:StepDownConverter&PowerMonitor",
+    /* callback */ _utShellCmdCb_AlldTps62113Ina219,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldTps62113Ina219Data,
+};
+
+/* VCNL4020 (proximity sensor) */
+static void _utAlldVcnl4020_disableInterrupt(VCNL4020Driver* vcnl)
+{
+  uint8_t intstatus;
+  vcnl4020_lld_writereg(vcnl, VCNL4020_LLD_REGADDR_INTCTRL, 0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+  vcnl4020_lld_readreg(vcnl, VCNL4020_LLD_REGADDR_INTSTATUS, &intstatus, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+  if (intstatus) {
+    vcnl4020_lld_writereg(vcnl, VCNL4020_LLD_REGADDR_INTSTATUS, intstatus, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+  }
+  return;
+}
+static int _utShellCmdCb_AlldVcnl4020(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  enum {
+    UNKNOWN,
+    NNE, ENE, ESE, SSE, SSW,WSW,WNW, NNW,
+  } sensor = UNKNOWN;
+  // evaluate arguments
+  if (argc == 2) {
+    if (strcmp(argv[1], "-nne") == 0) {
+      sensor = NNE;
+    } else if (strcmp(argv[1], "-ene") == 0) {
+      sensor = ENE;
+    } else if (strcmp(argv[1], "-ese") == 0) {
+      sensor = ESE;
+    } else if (strcmp(argv[1], "-sse") == 0) {
+      sensor = SSE;
+    } else if (strcmp(argv[1], "-ssw") == 0) {
+      sensor = SSW;
+    } else if (strcmp(argv[1], "-wsw") == 0) {
+      sensor = WSW;
+    } else if (strcmp(argv[1], "-wnw") == 0) {
+      sensor = WNW;
+    } else if (strcmp(argv[1], "-nnw") == 0) {
+      sensor = NNW;
+    }
+  }
+  if (sensor != UNKNOWN) {
+    PCA9544ADriver* mux = NULL;
+    switch (sensor) {
+      case SSE:
+      case SSW:
+      case WSW:
+      case WNW:
+        mux = &moduleLldI2cMultiplexer1;
+        ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld = &moduleLldProximity1;
+        ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->evtflags = (1 << MODULE_GPIO_EXTCHANNEL_IRINT2);
+        extChannelEnable(&MODULE_HAL_EXT, MODULE_GPIO_EXTCHANNEL_IRINT2);
+        break;
+      case NNW:
+      case NNE:
+      case ENE:
+      case ESE:
+        mux = &moduleLldI2cMultiplexer2;
+        ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld = &moduleLldProximity2;
+        ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->evtflags = (1 << MODULE_GPIO_EXTCHANNEL_IRINT1);
+        extChannelEnable(&MODULE_HAL_EXT, MODULE_GPIO_EXTCHANNEL_IRINT1);
+        break;
+      default:
+        break;
+    }
+    pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
+    pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH1, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
+    pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH2, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
+    pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH3, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
+    switch (sensor) {
+      case NNE:
+        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH1, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "north-northeast sensor");
+        break;
+      case ENE:
+        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH3, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "east-northeast sensor");
+        break;
+      case ESE:
+        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH2, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "north-southeast sensor");
+        break;
+      case SSE:
+        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "south-southeast sensor");
+        break;
+      case SSW:
+        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH1, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "south-southwest sensor");
+        break;
+      case WSW:
+        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH3, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "west-southwest sensor");
+        break;
+      case WNW:
+        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH2, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "west-northwest sensor");
+        break;
+      case NNW:
+        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "north-northwest sensor");
+        break;
+      default:
+        break;
+    }
+    ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld = NULL;
+    ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->evtflags = 0;
+    return AOS_OK;
+  }
+  // print help
+  chprintf(stream, "Usage: %s OPTION\n", argv[0]);
+  chprintf(stream, "Options:\n");
+  chprintf(stream, "  -nne\n");
+  chprintf(stream, "    Test north-northeast sensor.\n");
+  chprintf(stream, "  -ene\n");
+  chprintf(stream, "    Test east-northeast sensor.\n");
+  chprintf(stream, "  -ese\n");
+  chprintf(stream, "    Test east-southeast sensor.\n");
+  chprintf(stream, "  -sse\n");
+  chprintf(stream, "    Test south-southeast sensor.\n");
+  chprintf(stream, "  -ssw\n");
+  chprintf(stream, "    Test south-southwest sensor.\n");
+  chprintf(stream, "  -wsw\n");
+  chprintf(stream, "    Test west-southwest sensor.\n");
+  chprintf(stream, "  -wnw\n");
+  chprintf(stream, "    Test west-northwest sensor.\n");
+  chprintf(stream, "  -nnw\n");
+  chprintf(stream, "    Test north-northwest sensor.\n");
+  return AOS_INVALID_ARGUMENTS;
+}
+static ut_vcnl4020data_t _utAlldVcnl4020Data = {
+  /* driver       */ NULL,
+  /* timeout      */ MICROSECONDS_PER_SECOND,
+  /* event source */ &aos.events.io.source,
+  /* event flags  */ 0,
+};
+aos_unittest_t moduleUtAlldVcnl4020 = {
+  /* name           */ "VCNL4020",
+  /* info           */ "proximity sensor",
+  /* test function  */ utAlldVcnl4020Func,
+  /* shell command  */ {
+    /* name     */ "unittest:Proximity",
+    /* callback */ _utShellCmdCb_AlldVcnl4020,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldVcnl4020Data,
+};
+
+#endif /* AMIROOS_CFG_TESTS_ENABLE == true */
+
+/** @} */
diff --git a/modules/PowerManagement_1-1/module.h b/modules/PowerManagement_1-1/module.h
new file mode 100644
index 0000000..edd1dc2
--- /dev/null
+++ b/modules/PowerManagement_1-1/module.h
@@ -0,0 +1,706 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef _AMIROOS_MODULE_H_
+#define _AMIROOS_MODULE_H_
+
+/*===========================================================================*/
+/**
+ * @name Module specific functions
+ * @{
+ */
+/*===========================================================================*/
+
+/*
+ * @brief Makro to store data in the core coupled memory (ccm).
+ *        Example:
+ *        int compute_buffer[128] CCM_RAM;
+ *
+ * @note The ccm is not connected to any bus system.
+ */
+#define CCM_RAM                                 __attribute__((section(".ram4"), aligned(4)))
+
+/*
+ * @brief Makro to store data in the ethernet memory (eth).
+ *        Example:
+ *        int dma_buffer[128] ETH_RAM;
+ *
+ * @note The eth is a dedicated memory block with its own DMA controller.
+ */
+#define ETH_RAM                                 __attribute__((section(".ram2"), aligned(4)))
+
+/*
+ * @brief Makro to store data in the backup memory (bckp).
+ *        Example:
+ *        int backup_buffer[128] BCKP_RAM;
+ *
+ * @note The eth is a dedicated memory block with its own DMA controller.
+ */
+#define BCKP_RAM                                __attribute__((section(".ram5"), aligned(4)))
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name ChibiOS/HAL configuration
+ * @{
+ */
+/*===========================================================================*/
+#include <hal.h>
+
+/**
+ * @brief   ADC driver for reading the system voltage.
+ */
+#define MODULE_HAL_ADC_VSYS                     ADCD1
+
+/**
+ * @brief   Configuration for the ADC.
+ */
+extern ADCConversionGroup moduleHalAdcVsysConversionGroup;
+
+/**
+ * @brief   CAN driver to use.
+ */
+#define MODULE_HAL_CAN                          CAND1
+
+/**
+ * @brief   Configuration for the CAN driver.
+ */
+extern CANConfig moduleHalCanConfig;
+
+/**
+ * @brief   Interrupt driver to use.
+ */
+#define MODULE_HAL_EXT                          EXTD1
+
+/**
+ * @brief   Interrupt driver configuration.
+ */
+extern EXTConfig moduleHalExtConfig;
+
+/**
+ * @brief   I2C driver to access multiplexer, proximity sensors 1 to 4, power monitors for VIO1.8 and VIO 3.3, and fuel gauge (rear battery).
+ */
+#define MODULE_HAL_I2C_PROX_PM18_PM33_GAUGEREAR I2CD1
+
+/**
+ * @brief   Configuration for the multiplexer, proximity sensors 1 to 4, power monitors for VIO1.8 and VIO 3.3, and fuel gauge (rear battery) I2C driver.
+ */
+extern I2CConfig moduleHalI2cProxPm18Pm33GaugeRearConfig;
+
+/**
+ * @brief   I2C driver to access multiplexer, proximity sensors 5 to 8, power monitors for VSYS4.2, VIO 5.0 and VDD, EEPROM, touch sensor, and fuel gauge (front battery).
+ */
+#define MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT I2CD2
+
+/**
+ * @brief   Configuration for the multiplexer, proximity sensors 1 to 4, power monitors for VIO1.8 and VIO 3.3, and fuel gauge (rear battery) I2C driver.
+ */
+extern I2CConfig moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig;
+
+/**
+ * @brief   PWM driver for the buzzer.
+ */
+#define MODULE_HAL_PWM_BUZZER                   PWMD3
+
+/**
+ * @brief   Configuration of the PWM driver.
+ */
+extern PWMConfig moduleHalPwmBuzzerConfig;
+
+/**
+ * @brief   PWM channeö for the buzzer.
+ */
+#define MODULE_HAL_PWM_BUZZER_CHANNEL           1
+
+/**
+ * @brief   Serial driver of the programmer interface.
+ */
+#define MODULE_HAL_PROGIF                       SD1
+
+/**
+ * @brief   Configuration for the programmer serial interface driver.
+ */
+extern SerialConfig moduleHalProgIfConfig;
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name GPIO definitions
+ * @{
+ */
+/*===========================================================================*/
+#include <amiro-lld.h>
+
+/**
+ * @brief   Interrupt channel for the IR_INT1 and CHARGE_STAT1A signals.
+ */
+#define MODULE_GPIO_EXTCHANNEL_IRINT1           ((expchannel_t)0)
+
+/**
+ * @brief   Interrupt channel for the GAUGE_BATLOW1 signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_GAUGEBATLOW1     ((expchannel_t)1)
+
+/**
+ * @brief   Interrupt channel for the GAUGE_BATGD1 signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_GAUGEBATGD1      ((expchannel_t)2)
+
+/**
+ * @brief   Interrupt channel for the SYS_UART_DN signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_SYSUARTDN        ((expchannel_t)3)
+
+/**
+ * @brief   Interrupt channel for the IR_INT2 and CHARGE_STAT2A signals.
+ */
+#define MODULE_GPIO_EXTCHANNEL_IRINT2           ((expchannel_t)4)
+
+/**
+ * @brief   Interrupt channel for the TOUCH_INT signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_TOUCHINT         ((expchannel_t)5)
+
+/**
+ * @brief   Interrupt channel for the GAUGE_BATLOW2 signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_GAUGEBATLOW2     ((expchannel_t)6)
+
+/**
+ * @brief   Interrupt channel for the GAUGE_BATGD2 signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_GAUGEBATGD2      ((expchannel_t)7)
+
+/**
+ * @brief   Interrupt channel for the PATH_DC signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_PATHDC           ((expchannel_t)8)
+
+/**
+ * @brief   Interrupt channel for the SYS_SPI_DIR signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_SYSSPIDIR        ((expchannel_t)9)
+
+/**
+ * @brief   Interrupt channel for the SYS_SYNC signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_SYSSYNC          ((expchannel_t)12)
+
+/**
+ * @brief   Interrupt channel for the SYS_PD signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_SYSPD            ((expchannel_t)13)
+
+/**
+ * @brief   Interrupt channel for the SYS_WARMRST signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_SYSWARMRST       ((expchannel_t)14)
+
+/**
+ * @brief   Interrupt channel for the SYS_UART_UP signal.
+ */
+#define MODULE_GPIO_EXTCHANNEL_SYSUARTUP        ((expchannel_t)15)
+
+/**
+ * @brief   SYS_REG_EN output signal GPIO.
+ */
+extern apalGpio_t moduleGpioSysRegEn;
+
+/**
+ * @brief   IR_INT1 input signal GPIO.
+ */
+extern apalGpio_t moduleGpioIrInt1;
+
+/**
+ * @brief   POWER_EN output signal GPIO.
+ */
+extern apalGpio_t moduleGpioPowerEn;
+
+/**
+ * @brief   SYS_UART_DN bidirectional signal GPIO.
+ */
+extern apalGpio_t moduleGpioSysUartDn;
+
+/**
+ * @brief   CHARGE_STAT2A input signal GPIO.
+ */
+extern apalGpio_t moduleGpioChargeStat2A;
+
+/**
+ * @brief   GAUGE_BATLOW2 input signal GPIO.
+ */
+extern apalGpio_t moduleGpioGaugeBatLow2;
+
+/**
+ * @brief   GAUGE_BATGD2 input signal GPIO.
+ */
+extern apalGpio_t moduleGpioGaugeBatGd2;
+
+/**
+ * @brief   LED output signal GPIO.
+ */
+extern apalGpio_t moduleGpioLed;
+
+/**
+ * @brief   SYS_UART_UP bidirectional signal GPIO.
+ */
+extern apalGpio_t moduleGpioSysUartUp;
+
+/**
+ * @brief   CHARGE_STAT1A input signal GPIO.
+ */
+extern apalGpio_t moduleGpioChargeStat1A;
+
+/**
+ * @brief   GAUGE_BATLOW1 input signal GPIO.
+ */
+extern apalGpio_t moduleGpioGaugeBatLow1;
+
+/**
+ * @brief   GAUGE_BATGD1 input signal GPIO.
+ */
+extern apalGpio_t moduleGpioGaugeBatGd1;
+
+/**
+ * @brief   CHARG_EN1 output signal GPIO.
+ */
+extern apalGpio_t moduleGpioChargeEn1;
+
+/**
+ * @brief   IR_INT2 input signal GPIO.
+ */
+extern apalGpio_t moduleGpioIrInt2;
+
+/**
+ * @brief   TOUCH_INT input signal GPIO.
+ */
+extern apalGpio_t moduleGpioTouchInt;
+
+/**
+ * @brief   SYS_DONE input signal GPIO.
+ */
+extern apalGpio_t moduleGpioSysDone;
+
+/**
+ * @brief   SYS_PROG output signal GPIO.
+ */
+extern apalGpio_t moduleGpioSysProg;
+
+/**
+ * @brief   PATH_DC input signal GPIO.
+ */
+extern apalGpio_t moduleGpioPathDc;
+
+/**
+ * @brief   SYS_SPI_DIR bidirectional signal GPIO.
+ */
+extern apalGpio_t moduleGpioSysSpiDir;
+
+/**
+ * @brief   SYS_SYNC bidirectional signal GPIO.
+ */
+extern apalGpio_t moduleGpioSysSync;
+
+/**
+ * @brief   SYS_PD bidirectional signal GPIO.
+ */
+extern apalGpio_t moduleGpioSysPd;
+
+/**
+ * @brief   SYS_WARMRST bidirectional signal GPIO.
+ */
+extern apalGpio_t moduleGpioSysWarmrst;
+
+/**
+ * @brief   BT_RST output signal GPIO.
+ */
+extern apalGpio_t moduleGpioBtRst;
+
+/**
+ * @brief   CHARGE_EN2 output signal GPIO.
+ */
+extern apalGpio_t moduleGpioChargeEn2;
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name AMiRo-OS core configurations
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Event flag to be set on a IR_INT1 / CHARGE_STAT1A interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_IRINT1           ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_IRINT1)
+
+/**
+ * @brief   Event flag to be set on a GAUGE_BATLOW1 interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_GAUGEBATLOW1     ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_GAUGEBATLOW1)
+
+/**
+ * @brief   Event flag to be set on a GAUGE_BATGD1 interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_GAUGEBATGD1      ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_GAUGEBATGD1)
+
+/**
+ * @brief   Event flag to be set on a SYS_UART_DN interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSUARTDN        ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_SYSUARTDN)
+
+/**
+ * @brief   Event flag to be set on a IR_INT2 / CHARGE_STAT2A interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_IRINT2           ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_IRINT2)
+
+/**
+ * @brief   Event flag to be set on a TOUCH_INT interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_TOUCHINT         ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_TOUCHINT)
+
+/**
+ * @brief   Event flag to be set on a GAUGE_BATLOW2 interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_GAUGEBATLOW2     ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_GAUGEBATLOW2)
+
+/**
+ * @brief   Event flag to be set on a GAUGE_BATGD2 interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_GAUGEBATGD2      ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_GAUGEBATGD2)
+
+/**
+ * @brief   Event flag to be set on a PATH_DC interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_PATHDC           ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_PATHDC)
+
+/**
+ * @brief   Event flag to be set on a SYS_SPI_DIR interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSSPIDIR        ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_SYSSPIDIR)
+
+/**
+ * @brief   Event flag to be set on a SYS_SYNC interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSSYNC          ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_SYSSYNC)
+
+/**
+ * @brief   Event flag to be set on a SYS_PD interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSPD            ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_SYSPD)
+
+/**
+ * @brief   Event flag to be set on a SYS_WARMRST interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSWARMRST       ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_SYSWARMRST)
+
+/**
+ * @brief   Event flag to be set on a SYS_UART_UP interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSUARTUP        ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_SYSUARTUP)
+
+/**
+ * @brief   PD signal for SSSP.
+ */
+extern apalControlGpio_t moduleSsspPd;
+
+/**
+ * @brief   SYNC signal for SSSP.
+ */
+extern apalControlGpio_t moduleSsspSync;
+
+/**
+ * @brief   Shell prompt text.
+ */
+extern const char* moduleShellPrompt;
+
+/**
+ * @brief   Unit test initialization hook.
+ */
+#define MODULE_INIT_TESTS() {                                                 \
+  /* add unit-test shell commands */                                          \
+  aosShellAddCommand(aos.shell, &moduleUtAdcVsys.shellcmd);                   \
+  aosShellAddCommand(aos.shell, &moduleUtAlldAt24c01bn.shellcmd);             \
+  aosShellAddCommand(aos.shell, &moduleUtAlldBq24103a.shellcmd);              \
+  aosShellAddCommand(aos.shell, &moduleUtAlldBq27500.shellcmd);               \
+  aosShellAddCommand(aos.shell, &moduleUtAlldBq27500Bq24103a.shellcmd);       \
+  aosShellAddCommand(aos.shell, &moduleUtAlldIna219.shellcmd);                \
+  aosShellAddCommand(aos.shell, &moduleUtAlldMpr121.shellcmd);                \
+  aosShellAddCommand(aos.shell, &moduleUtAlldPca9544a.shellcmd);              \
+  aosShellAddCommand(aos.shell, &moduleUtAlldPklcs1212e4001.shellcmd);        \
+  aosShellAddCommand(aos.shell, &moduleUtAlldLed.shellcmd);                   \
+  aosShellAddCommand(aos.shell, &moduleUtAlldTps62113.shellcmd);              \
+  aosShellAddCommand(aos.shell, &moduleUtAlldTps62113Ina219.shellcmd);        \
+  aosShellAddCommand(aos.shell, &moduleUtAlldVcnl4020.shellcmd);              \
+}
+
+/**
+ * @brief   Periphery communication interfaces initialization hook.
+ */
+#define MODULE_INIT_PERIPHERY_COMM() {                                        \
+  /* serial driver */                                                         \
+  sdStart(&MODULE_HAL_PROGIF, &moduleHalProgIfConfig);                        \
+  /* I2C */                                                                   \
+  moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed = (PCA9544A_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed) ? PCA9544A_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed;  \
+  moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed = (VCNL4020_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed) ? VCNL4020_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed;  \
+  moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed = (INA219_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed) ? INA219_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed;  \
+  moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed = (BQ27500_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed) ? BQ27500_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed;  \
+  moduleHalI2cProxPm18Pm33GaugeRearConfig.duty_cycle = (moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed <= 100000) ? STD_DUTY_CYCLE : FAST_DUTY_CYCLE_2;  \
+  i2cStart(&MODULE_HAL_I2C_PROX_PM18_PM33_GAUGEREAR, &moduleHalI2cProxPm18Pm33GaugeRearConfig); \
+  moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed = (PCA9544A_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed) ? PCA9544A_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed; \
+  moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed = (VCNL4020_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed) ? VCNL4020_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed; \
+  moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed = (INA219_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed) ? INA219_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed; \
+  moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed = (AT24C01BN_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed) ? AT24C01BN_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed; \
+  moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed = (MPR121_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed) ? MPR121_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed; \
+  moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed = (BQ27500_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed) ? BQ27500_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed; \
+  moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.duty_cycle = (moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed <= 100000) ? STD_DUTY_CYCLE : FAST_DUTY_CYCLE_2;  \
+  i2cStart(&MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT, &moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig);  \
+  /* ADC */                                                                   \
+  adcStart(&MODULE_HAL_ADC_VSYS, NULL);                                       \
+  /* PWM */                                                                   \
+  pwmStart(&MODULE_HAL_PWM_BUZZER, &moduleHalPwmBuzzerConfig);                \
+  moduleHalPwmBuzzerConfig.frequency = MODULE_HAL_PWM_BUZZER.clock;           \
+  pwmStop(&MODULE_HAL_PWM_BUZZER);                                            \
+  moduleHalPwmBuzzerConfig.period = moduleHalPwmBuzzerConfig.frequency / PKLCS1212E4001_LLD_FREQUENCY_SPEC; \
+  pwmStart(&MODULE_HAL_PWM_BUZZER, &moduleHalPwmBuzzerConfig);                \
+}
+
+/**
+ * @brief   Hook to handle IO events during SSSP startup synchronization.
+ */
+#define MODULE_SSP_STARTUP_OUTRO_IO_EVENT(mask, flags) {                      \
+  /* ignore all events */                                                     \
+  (void)mask;                                                                 \
+  (void)flags;                                                                \
+}
+
+/**
+ * @brief   Periphery communication interface deinitialization hook.
+ */
+#define MODULE_SHUTDOWN_PERIPHERY_COMM() {                                    \
+  /* PWM */                                                                   \
+  pwmStop(&MODULE_HAL_PWM_BUZZER);                                            \
+  /* ADC */                                                                   \
+  adcStop(&MODULE_HAL_ADC_VSYS);                                              \
+  /* I2C */                                                                   \
+  i2cStop(&MODULE_HAL_I2C_PROX_PM18_PM33_GAUGEREAR);                          \
+  i2cStop(&MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT);      \
+  /* don't stop the serial driver so messages can still be printed */         \
+}
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Low-level drivers
+ * @{
+ */
+/*===========================================================================*/
+#include <alld_at24c01bn-sh-b.h>
+#include <alld_bq24103a.h>
+#include <alld_bq27500.h>
+#include <alld_ina219.h>
+#include <alld_led.h>
+#include <alld_mpr121.h>
+#include <alld_pca9544a.h>
+#include <alld_pklcs1212e4001.h>
+#include <alld_tps62113.h>
+#include <alld_vcnl4020.h>
+
+/**
+ * @brief   EEPROM driver.
+ */
+extern AT24C01BNDriver moduleLldEeprom;
+
+/**
+ * @brief   Battery charger (front battery) driver.
+ */
+extern BQ24103ADriver moduleLldBatteryChargerFront;
+
+/**
+ * @brief   Battery charger (rear battery) driver.
+ */
+extern BQ24103ADriver moduleLldBatteryChargerRear;
+
+/**
+ * @brief   Fuel gauge (front battery) driver.
+ */
+extern BQ27500Driver moduleLldFuelGaugeFront;
+
+/**
+ * @brief   Fuel gauge (rear battery) driver.
+ */
+extern BQ27500Driver moduleLldFuelGaugeRear;
+
+/**
+ * @brief   Power monitor (VDD) driver.
+ */
+extern INA219Driver moduleLldPowerMonitorVdd;
+
+/**
+ * @brief   Power monitor (VIO 1.8) driver.
+ */
+extern INA219Driver moduleLldPowerMonitorVio18;
+
+/**
+ * @brief   Power monitor (VIO 3.3) driver.
+ */
+extern INA219Driver moduleLldPowerMonitorVio33;
+
+/**
+ * @brief   Power monitor (VSYS 4.2) driver.
+ */
+extern INA219Driver moduleLldPowerMonitorVsys42;
+
+/**
+ * @brief   Power monitor (VIO 5.0) driver.
+ */
+extern INA219Driver moduleLldPowerMonitorVio50;
+
+/**
+ * @brief   Status LED driver.
+ */
+extern LEDDriver moduleLldStatusLed;
+
+/**
+ * @brief   Touch sensor driver.
+ */
+extern MPR121Driver moduleLldTouch;
+
+/**
+ * @brief   I2C multiplexer (I2C 1) driver.
+ */
+extern PCA9544ADriver moduleLldI2cMultiplexer1;
+
+/**
+ * @brief   I2C multiplexer (I2C 2) driver.
+ */
+extern PCA9544ADriver moduleLldI2cMultiplexer2;
+
+/**
+ * @brief   Step down converter driver.
+ * @note    Although there multiple TPS62113, those are completely identical from driver few (share the same signals).
+ */
+extern TPS62113Driver moduleLldStepDownConverter;
+
+/**
+ * @brief   Proximity sensor (I2C 1) driver.
+ */
+extern VCNL4020Driver moduleLldProximity1;
+
+/**
+ * @brief   Proximity sensor (I2C 2) driver.
+ */
+extern VCNL4020Driver moduleLldProximity2;
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Unit tests (UT)
+ * @{
+ */
+/*===========================================================================*/
+#if (AMIROOS_CFG_TESTS_ENABLE == true) || defined(__DOXYGEN__)
+#include <ut_lld_adc.h>
+#include <ut_alld_at24c01bn-sh-b.h>
+#include <ut_alld_bq24103a.h>
+#include <ut_alld_bq27500.h>
+#include <ut_alld_bq27500_bq24103a.h>
+#include <ut_alld_ina219.h>
+#include <ut_alld_led.h>
+#include <ut_alld_mpr121.h>
+#include <ut_alld_pca9544a.h>
+#include <ut_alld_pklcs1212e4001.h>
+#include <ut_alld_tps62113.h>
+#include <ut_alld_tps62113_ina219.h>
+#include <ut_alld_vcnl4020.h>
+
+/**
+ * @brief   ADC unit test object.
+ */
+extern aos_unittest_t moduleUtAdcVsys;
+
+/**
+ * @brief   AT24C01BN-SH-B (EEPROM) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldAt24c01bn;
+
+/**
+ * @brief   BQ24103A (battery charger) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldBq24103a;
+
+/**
+ * @brief   BQ27500 (fuel gauge) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldBq27500;
+
+/**
+ * @brief   BQ27500 (fuela gauge) in combination with BQ24103A (battery charger) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldBq27500Bq24103a;
+
+/**
+ * @brief   INA219 (power monitor) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldIna219;
+
+/**
+ * @brief   Status LED unit test object.
+ */
+extern aos_unittest_t moduleUtAlldLed;
+
+/**
+ * @brief   MPR121 (touch sensor) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldMpr121;
+
+/**
+ * @brief   PCA9544A (I2C multiplexer) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldPca9544a;
+
+/**
+ * @brief   PKLCS1212E4001 (buzzer) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldPklcs1212e4001;
+
+/**
+ * @brief   TPS62113 (step-down converter) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldTps62113;
+
+/**
+ * @brief   TPS62113 (step-sown converter) in combination with INA219 (power monitor) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldTps62113Ina219;
+
+/**
+ * @brief   VCNL4020 (proximity sensor) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldVcnl4020;
+
+#endif /* AMIROOS_CFG_TESTS_ENABLE == true */
+
+/** @} */
+
+#endif /* _AMIROOS_MODULE_H_ */
diff --git a/modules/aos_chconf.h b/modules/aos_chconf.h
new file mode 100644
index 0000000..823a1e4
--- /dev/null
+++ b/modules/aos_chconf.h
@@ -0,0 +1,558 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2018  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file    os/modules/common/chconf.h
+ * @brief   Common ChibiOS Configuration file for the all modules.
+ * @details Contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef _AOS_CHCONF_H_
+#define _AOS_CHCONF_H_
+
+#define _CHIBIOS_RT_CONF_
+
+#include <aosconf.h>
+
+/*===========================================================================*/
+/**
+ * @name System timers settings
+ */
+/*===========================================================================*/
+
+// These settings are specific to each module.
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ *          threads before preemption occurs. Setting this value to zero
+ *          disables the preemption for threads with equal priority and the
+ *          round robin becomes cooperative. Note that higher priority
+ *          threads can still preempt, the kernel is always preemptive.
+ * @note    Disabling the round robin preemption makes the kernel more compact
+ *          and generally faster.
+ * @note    The round robin preemption is not supported in tickless mode and
+ *          must be set to zero in that case.
+ */
+#define CH_CFG_TIME_QUANTUM                 0
+
+/**
+ * @brief   Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ *          then the whole available RAM is used. The core memory is made
+ *          available to the heap allocator and/or can be used directly through
+ *          the simplified core memory allocator.
+ *
+ * @note    In order to let the OS manage the whole RAM the linker script must
+ *          provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note    Requires @p CH_CFG_USE_MEMCORE.
+ */
+#define CH_CFG_MEMCORE_SIZE                 0
+
+/**
+ * @brief   Idle thread automatic spawn suppression.
+ * @details When this option is activated the function @p chSysInit()
+ *          does not spawn the idle thread. The application @p main()
+ *          function becomes the idle thread and must implement an
+ *          infinite loop.
+ */
+#define CH_CFG_NO_IDLE_THREAD               FALSE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Performance options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ *          is used when two possible implementations exist.
+ *
+ * @note    This is not related to the compiler optimization options.
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_OPTIMIZE_SPEED               TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Time Measurement APIs.
+ * @details If enabled then the time measurement APIs are included in
+ *          the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_TM                       TRUE
+
+/**
+ * @brief   Threads registry APIs.
+ * @details If enabled then the registry APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_REGISTRY                 FALSE
+
+/**
+ * @brief   Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ *          the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_WAITEXIT                 TRUE
+
+/**
+ * @brief   Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_SEMAPHORES               TRUE
+
+/**
+ * @brief   Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ *          priority rather than in FIFO order.
+ *
+ * @note    The default is @p FALSE. Enable this if you have special
+ *          requirements.
+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE
+
+/**
+ * @brief   Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_MUTEXES                  TRUE
+
+/**
+ * @brief   Enables recursive behavior on mutexes.
+ * @note    Recursive mutexes are heavier and have an increased
+ *          memory footprint.
+ *
+ * @note    The default is @p FALSE.
+ * @note    Requires @p CH_CFG_USE_MUTEXES.
+ */
+#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE
+
+/**
+ * @brief   Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_MUTEXES.
+ */
+#define CH_CFG_USE_CONDVARS                 TRUE
+
+/**
+ * @brief   Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ *          specification are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_CONDVARS.
+ */
+#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE
+
+/**
+ * @brief   Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_EVENTS                   TRUE
+
+/**
+ * @brief   Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ *          are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_EVENTS.
+ */
+#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE
+
+/**
+ * @brief   Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_MESSAGES                 FALSE
+
+/**
+ * @brief   Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ *          FIFO order.
+ *
+ * @note    The default is @p FALSE. Enable this if you have special
+ *          requirements.
+ * @note    Requires @p CH_CFG_USE_MESSAGES.
+ */
+#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE
+
+/**
+ * @brief   Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ *          included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_MAILBOXES                FALSE
+
+/**
+ * @brief   I/O Queues APIs.
+ * @details If enabled then the I/O queues APIs are included in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_QUEUES                   FALSE
+
+/**
+ * @brief   Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMCORE                  FALSE
+
+/**
+ * @brief   Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
+ *          @p CH_CFG_USE_SEMAPHORES.
+ * @note    Mutexes are recommended.
+ */
+#define CH_CFG_USE_HEAP                     FALSE
+
+/**
+ * @brief   Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMPOOLS                 FALSE
+
+/**
+ * @brief   Dynamic Threads APIs.
+ * @details If enabled then the dynamic threads creation APIs are included
+ *          in the kernel.
+ *
+ * @note    The default is @p TRUE.
+ * @note    Requires @p CH_CFG_USE_WAITEXIT.
+ * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
+ */
+#define CH_CFG_USE_DYNAMIC                  FALSE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Debug options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Debug option, kernel statistics.
+ *
+ * @note    The default is @p FALSE.
+ */
+#if ((CH_CFG_USE_TM == TRUE) && (AMIROOS_CFG_DBG == true)) || defined(__DOXYGEN__)
+  #define CH_DBG_STATISTICS                 TRUE
+#else
+  #define CH_DBG_STATISTICS                 FALSE
+#endif
+
+/**
+ * @brief   Debug option, system state check.
+ * @details If enabled the correct call protocol for system APIs is checked
+ *          at runtime.
+ *
+ * @note    The default is @p FALSE.
+ */
+#if (AMIROOS_CFG_DBG == true) || defined(__DOXYGEN__)
+  #define CH_DBG_SYSTEM_STATE_CHECK         TRUE
+#else
+  #define CH_DBG_SYSTEM_STATE_CHECK         FALSE
+#endif
+
+/**
+ * @brief   Debug option, parameters checks.
+ * @details If enabled then the checks on the API functions input
+ *          parameters are activated.
+ *
+ * @note    The default is @p FALSE.
+ */
+#if (AMIROOS_CFG_DBG == true) || defined(__DOXYGEN__)
+  #define CH_DBG_ENABLE_CHECKS              TRUE
+#else
+  #define CH_DBG_ENABLE_CHECKS              FALSE
+#endif
+
+/**
+ * @brief   Debug option, consistency checks.
+ * @details If enabled then all the assertions in the kernel code are
+ *          activated. This includes consistency checks inside the kernel,
+ *          runtime anomalies and port-defined checks.
+ *
+ * @note    The default is @p FALSE.
+ */
+#if (AMIROOS_CFG_DBG == true) || defined(__DOXYGEN__)
+  #define CH_DBG_ENABLE_ASSERTS             TRUE
+#else
+  #define CH_DBG_ENABLE_ASSERTS             FALSE
+#endif
+
+/**
+ * @brief   Debug option, trace buffer.
+ * @details If enabled then the trace buffer is activated.
+ *
+ * @note    The default is @p CH_DBG_TRACE_MASK_DISABLED.
+ */
+#define CH_DBG_TRACE_MASK                   CH_DBG_TRACE_MASK_DISABLED
+
+/**
+ * @brief   Trace buffer entries.
+ * @note    The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
+ *          different from @p CH_DBG_TRACE_MASK_DISABLED.
+ */
+#define CH_DBG_TRACE_BUFFER_SIZE            128
+
+/**
+ * @brief   Debug option, stack checks.
+ * @details If enabled then a runtime stack check is performed.
+ *
+ * @note    The default is @p FALSE.
+ * @note    The stack check is performed in a architecture/port dependent way.
+ *          It may not be implemented or some ports.
+ * @note    The default failure mode is to halt the system with the global
+ *          @p panic_msg variable set to @p NULL.
+ */
+#if (AMIROOS_CFG_DBG == true) || defined(__DOXYGEN__)
+  #define CH_DBG_ENABLE_STACK_CHECK         TRUE
+#else
+  #define CH_DBG_ENABLE_STACK_CHECK         FALSE
+#endif
+
+/**
+ * @brief   Debug option, stacks initialization.
+ * @details If enabled then the threads working area is filled with a byte
+ *          value when a thread is created. This can be useful for the
+ *          runtime measurement of the used stack.
+ *
+ * @note    The default is @p FALSE.
+ */
+#if (AMIROOS_CFG_PROFILE == true) || defined(__DOXYGEN__)
+  #define CH_DBG_FILL_THREADS               TRUE
+#else
+  #define CH_DBG_FILL_THREADS               FALSE
+#endif
+
+/**
+ * @brief   Debug option, threads profiling.
+ * @details If enabled then a field is added to the @p thread_t structure that
+ *          counts the system ticks occurred while executing the thread.
+ *
+ * @note    The default is @p FALSE.
+ * @note    This debug option is not currently compatible with the
+ *          tickless mode.
+ */
+#if ((CH_CFG_ST_TIMEDELTA == 0) && (AMIROOS_CFG_PROFILE == true)) || defined(__DOXYGEN__)
+  #define CH_DBG_THREADS_PROFILING          TRUE
+#else
+  #define CH_DBG_THREADS_PROFILING          FALSE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel hooks
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Threads descriptor structure extension.
+ * @details User fields added to the end of the @p thread_t structure.
+ */
+#define CH_CFG_THREAD_EXTRA_FIELDS                                          \
+  /* Add threads custom fields here.*/
+
+/**
+ * @brief   Threads initialization hook.
+ * @details User initialization code added to the @p chThdInit() API.
+ *
+ * @note    It is invoked from within @p chThdInit() and implicitly from all
+ *          the threads creation APIs.
+ */
+#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \
+  /* Add threads initialization code here.*/                                \
+}
+
+/**
+ * @brief   Threads finalization hook.
+ * @details User finalization code added to the @p chThdExit() API.
+ *
+ * @note    It is inserted into lock zone.
+ * @note    It is also invoked when the threads simply return in order to
+ *          terminate.
+ */
+#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \
+  /* Add threads finalization code here.*/                                  \
+}
+
+/**
+ * @brief   Context switch hook.
+ * @details This hook is invoked just before switching between threads.
+ */
+#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \
+  /* Context switch code here.*/                                            \
+}
+
+/**
+ * @brief   ISR enter hook.
+ */
+#define CH_CFG_IRQ_PROLOGUE_HOOK() {                                        \
+  /* IRQ prologue code here.*/                                              \
+}
+
+/**
+ * @brief   ISR exit hook.
+ */
+#define CH_CFG_IRQ_EPILOGUE_HOOK() {                                        \
+  /* IRQ epilogue code here.*/                                              \
+}
+
+/**
+ * @brief   Idle thread enter hook.
+ * @note    This hook is invoked within a critical zone, no OS functions
+ *          should be invoked from here.
+ * @note    This macro can be used to activate a power saving mode.
+ */
+#define CH_CFG_IDLE_ENTER_HOOK() {                                          \
+  /* Idle-enter code here.*/                                                \
+}
+
+/**
+ * @brief   Idle thread leave hook.
+ * @note    This hook is invoked within a critical zone, no OS functions
+ *          should be invoked from here.
+ * @note    This macro can be used to deactivate a power saving mode.
+ */
+#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \
+  /* Idle-leave code here.*/                                                \
+}
+
+/**
+ * @brief   Idle Loop hook.
+ * @details This hook is continuously invoked by the idle thread loop.
+ */
+#define CH_CFG_IDLE_LOOP_HOOK() {                                           \
+  /* Idle loop code here.*/                                                 \
+}
+
+/**
+ * @brief   System tick event hook.
+ * @details This hook is invoked in the system tick handler immediately
+ *          after processing the virtual timers queue.
+ */
+#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \
+  /* System tick event code here.*/                                         \
+}
+
+/**
+ * @brief   System halt hook.
+ * @details This hook is invoked in case to a system halting error before
+ *          the system is halted.
+ */
+#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \
+  extern void aosPrintHaltErrorCode(const char* reason);                       \
+  aosPrintHaltErrorCode(reason);                                               \
+}
+
+/**
+ * @brief   Trace hook.
+ * @details This hook is invoked each time a new record is written in the
+ *          trace buffer.
+ */
+#define CH_CFG_TRACE_HOOK(tep) {                                            \
+  /* Trace code here.*/                                                     \
+}
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Port specific settings
+ */
+/*===========================================================================*/
+
+// These settings are specific to each module.
+
+/*===========================================================================*/
+/**
+ * @name other
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Flag to enable/disable floating point support in chprinf()
+ */
+#define CHPRINTF_USE_FLOAT                  TRUE
+
+/** @} */
+
+#endif  /* _AOS_CHCONF_H_ */
+
+/** @} */
diff --git a/modules/flash.mk b/modules/flash.mk
new file mode 100644
index 0000000..21e9339
--- /dev/null
+++ b/modules/flash.mk
@@ -0,0 +1,48 @@
+################################################################################
+# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
+# (AMiRo) platform.                                                            #
+# Copyright (C) 2016..2018  Thomas Schöpping et al.                            #
+#                                                                              #
+# This program is free software: you can redistribute it and/or modify         #
+# it under the terms of the GNU General Public License as published by         #
+# the Free Software Foundation, either version 3 of the License, or            #
+# (at your option) any later version.                                          #
+#                                                                              #
+# This program is distributed in the hope that it will be useful,              #
+# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
+# GNU General Public License for more details.                                 #
+#                                                                              #
+# You should have received a copy of the GNU General Public License            #
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
+#                                                                              #
+# This research/work was supported by the Cluster of Excellence Cognitive      #
+# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
+# funded by the German Research Foundation (DFG).                              #
+################################################################################
+
+
+
+# the path to this makefile
+FLASH_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
+
+include $(FLASH_DIR)../../bootloader/bootloader.mk
+
+# the files to flash
+ifdef PROJECT
+  FLASH_MODULES = $(PROJECT)
+  FLASH_FILES = build/$(PROJECT).$(FLASHTOOL_EXT)
+else
+  FLASH_MODULES = $(MODULES)
+  FLASH_FILES = $(foreach module,$(MODULES),$(module)/build/$(module).$(FLASHTOOL_EXT))
+endif
+
+flash: $(FLASH_FILES)
+	$(info )
+ifeq ($(FLASHTOOL),SerialBoot)
+	$(info Flashing ($(FLASHTOOL)):)
+	$(FLASHTOOL_CMD) $(FLASHTOOL_ARGS)
+else
+	$(info ERROR: unable to flash the module (SerialBoot unavailable))
+endif
+
diff --git a/modules/modules.mk b/modules/modules.mk
new file mode 100644
index 0000000..1d84a5d
--- /dev/null
+++ b/modules/modules.mk
@@ -0,0 +1,37 @@
+################################################################################
+# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
+# (AMiRo) platform.                                                            #
+# Copyright (C) 2016..2018  Thomas Schöpping et al.                            #
+#                                                                              #
+# This program is free software: you can redistribute it and/or modify         #
+# it under the terms of the GNU General Public License as published by         #
+# the Free Software Foundation, either version 3 of the License, or            #
+# (at your option) any later version.                                          #
+#                                                                              #
+# This program is distributed in the hope that it will be useful,              #
+# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
+# GNU General Public License for more details.                                 #
+#                                                                              #
+# You should have received a copy of the GNU General Public License            #
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
+#                                                                              #
+# This research/work was supported by the Cluster of Excellence Cognitive      #
+# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
+# funded by the German Research Foundation (DFG).                              #
+################################################################################
+
+
+
+# absolute path to this directory
+MODULES_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
+
+# list of available modules
+MODULES = $(patsubst $(MODULES_DIR)%/,%,$(sort $(dir $(wildcard $(MODULES_DIR)*/*))))
+
+# include paths
+MODULESINC = $(MODULES_DIR)
+
+# C source files
+MODULESCSRC = $(MODULES_DIR)
+
diff --git a/os/modules/DiWheelDrive_1-1/Makefile b/os/modules/DiWheelDrive_1-1/Makefile
deleted file mode 100644
index f178bf0..0000000
--- a/os/modules/DiWheelDrive_1-1/Makefile
+++ /dev/null
@@ -1,303 +0,0 @@
-################################################################################
-# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
-# (AMiRo) platform.                                                            #
-# Copyright (C) 2016..2018  Thomas Schöpping et al.                            #
-#                                                                              #
-# This program is free software: you can redistribute it and/or modify         #
-# it under the terms of the GNU General Public License as published by         #
-# the Free Software Foundation, either version 3 of the License, or            #
-# (at your option) any later version.                                          #
-#                                                                              #
-# This program is distributed in the hope that it will be useful,              #
-# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
-# GNU General Public License for more details.                                 #
-#                                                                              #
-# You should have received a copy of the GNU General Public License            #
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
-#                                                                              #
-# This research/work was supported by the Cluster of Excellence Cognitive      #
-# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
-# funded by the German Research Foundation (DFG).                              #
-################################################################################
-
-
-
-################################################################################
-# Build global options                                                         #
-# NOTE: Can be overridden externally.                                          #
-#                                                                              #
-
-# Compiler options here.
-ifeq ($(USE_OPT),)
-  USE_OPT = -O2 -fomit-frame-pointer -falign-functions=16 -fstack-usage
-endif
-
-# C specific options here (added to USE_OPT).
-ifeq ($(USE_COPT),)
-  USE_COPT = -std=c11
-endif
-
-# C++ specific options here (added to USE_OPT).
-ifeq ($(USE_CPPOPT),)
-  USE_CPPOPT = -fno-rtti -std=c++17
-endif
-
-# Enable this if you want the linker to remove unused code and data
-ifeq ($(USE_LINK_GC),)
-  USE_LINK_GC = yes
-endif
-
-# Linker extra options here.
-ifeq ($(USE_LDOPT),)
-  USE_LDOPT =
-endif
-
-# Enable this if you want link time optimizations (LTO)
-ifeq ($(USE_LTO),)
-  USE_LTO = yes
-endif
-
-# If enabled, this option allows to compile the application in THUMB mode.
-ifeq ($(USE_THUMB),)
-  USE_THUMB = yes
-endif
-
-# Enable this if you want to see the full log while compiling.
-ifeq ($(USE_VERBOSE_COMPILE),)
-  USE_VERBOSE_COMPILE = no
-endif
-
-# If enabled, this option makes the build process faster by not compiling
-# modules not used in the current configuration.
-ifeq ($(USE_SMART_BUILD),)
-  USE_SMART_BUILD = no
-endif
-
-#                                                                              #
-# Build global options                                                         #
-################################################################################
-
-################################################################################
-# Architecture or project specific options                                     #
-#                                                                              #
-
-# Stack size to be allocated to the Cortex-M process stack. This stack is
-# the stack used by the main() thread.
-ifeq ($(USE_PROCESS_STACKSIZE),)
-  USE_PROCESS_STACKSIZE = 0x400
-endif
-
-# Stack size to the allocated to the Cortex-M main/exceptions stack. This
-# stack is used for processing interrupts and exceptions.
-ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
-  USE_EXCEPTIONS_STACKSIZE = 0x400
-endif
-
-# Enables the use of FPU on Cortex-M4.
-# Possible selections are:
-#   no     - no FPU is used (probably equals 'soft')
-#   soft   - does not use the FPU, thus all floating point operations are emulated
-#   softfp - uses the FPU, but uses the integer registers only
-#   hard   - uses the FPU and passes data via the FPU registers
-ifeq ($(USE_FPU),)
-  USE_FPU = no
-endif
-
-#                                                                              #
-# Architecture or project specific options                                     #
-################################################################################
-
-################################################################################
-# Project, sources and paths                                                   #
-#                                                                              #
-
-# Define project name here
-PROJECT := $(patsubst $(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))..)/%,%,$(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))))
-
-# Imported source files and paths
-include ../../../kernel/kernel.mk
-CHIBIOS := $(AMIROOS_KERNEL)
-AMIROOS = ../..
-# Startup files
-include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk
-# HAL-OSAL files
-include $(CHIBIOS)/os/hal/hal.mk
-include $(AMIROOS)/hal/hal.mk
-include $(CHIBIOS)/os/hal/ports/STM32/STM32F1xx/platform.mk
-include $(AMIROOS)/hal/ports/STM32/platform.mk
-include ./board.mk
-include $(CHIBIOS)/os/hal/osal/rt/osal.mk
-# RTOS files
-include $(CHIBIOS)/os/rt/rt.mk
-include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
-# Other files (optional).
-include $(CHIBIOS)/test/rt/test.mk
-# AMiRo-BLT files
-include ../../../bootloader/bootloader.mk
-# AMiRo-LLD files
-include ../../../periphery-lld/periphery-lld.mk
-# AMiRo-OS files
-include $(AMIROOS)/modules/modules.mk
-include $(AMIROOS)/core/core.mk
-include $(AMIROOS)/unittests/unittests.mk
-
-# Define linker script file here
-LDSCRIPT= $(BOARDLD)/STM32F103xE.ld
-
-# C sources that can be compiled in ARM or THUMB mode depending on the global
-# setting.
-CSRC = $(STARTUPSRC) \
-       $(KERNSRC) \
-       $(PORTSRC) \
-       $(OSALSRC) \
-       $(HALSRC) \
-       $(PLATFORMSRC) \
-       $(BOARDSRC) \
-       $(MODULESCSRC) \
-       $(TESTSRC) \
-       $(PERIPHERYLLDCSRC) \
-       $(AMIROOSCORECSRC) \
-       $(UNITTESTSCSRC) \
-       $(CHIBIOS)/os/various/evtimer.c \
-       $(CHIBIOS)/os/various/syscalls.c \
-       $(CHIBIOS)/os/hal/lib/streams/chprintf.c \
-       module.c \
-       $(APPSCSRC)
-
-# C++ sources that can be compiled in ARM or THUMB mode depending on the global
-# setting.
-CPPSRC = $(AMIROOSCORECPPSRC) \
-         $(APPSCPPSRC)
-
-# C sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-ACSRC = $(APPSACSRC)
-
-# C++ sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-ACPPSRC = $(APPSACPPSRC)
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-TCSRC = $(APPSTCSRC)
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-TCPPSRC = $(APPSTCPPSRC)
-
-# List ASM source files here
-ASMSRC = $(APPSASMSRC)
-ASMXSRC = $(STARTUPASM) \
-          $(PORTASM) \
-          $(OSALASM) \
-          $(APPSASMXSRC)
-
-INCDIR = $(CHIBIOS)/os/license \
-         $(STARTUPINC) \
-         $(KERNINC) \
-         $(PORTINC) \
-         $(OSALINC) \
-         $(HALINC) \
-         $(PLATFORMINC) \
-         $(BOARDINC) \
-         $(MODULESINC) \
-         $(TESTINC) \
-         $(BOOTLOADERINC) \
-         $(CHIBIOS)/os/hal/lib/streams \
-         $(CHIBIOS)/os/various \
-         $(PERIPHERYLLDINC) \
-         $(AMIROOS) \
-         $(AMIROOSCOREINC) \
-         $(UNITTESTSINC) \
-         $(APPSINC)
-
-#                                                                              #
-# Project, sources and paths                                                   #
-################################################################################
-
-################################################################################
-# Compiler settings                                                            #
-# NOTE: Some can be overridden externally.                                     #
-#                                                                              #
-
-MCU  = cortex-m3
-
-#TRGT = arm-elf-
-TRGT = arm-none-eabi-
-CC   = $(TRGT)gcc
-CPPC = $(TRGT)g++
-# Enable loading with g++ only if you need C++ runtime support.
-# NOTE: You can use C++ even without C++ support if you are careful. C++
-#       runtime support makes code size explode.
-LD   = $(TRGT)gcc
-#LD   = $(TRGT)g++
-CP   = $(TRGT)objcopy
-AS   = $(TRGT)gcc -x assembler-with-cpp
-AR   = $(TRGT)ar
-OD   = $(TRGT)objdump
-SZ   = $(TRGT)size
-HEX  = $(CP) -O ihex
-BIN  = $(CP) -O binary
-SREC = $(CP) -O srec --srec-len=248
-
-# ARM-specific options here
-ifeq ($(AOPT),)
-  AOPT =
-endif
-
-# THUMB-specific options here
-ifeq ($(TOPT),)
-  TOPT = -mthumb -DTHUMB
-endif
-
-# Define C warning options here
-ifeq ($(CWARN),)
-  CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
-endif
-
-# Define C++ warning options here
-ifeq ($(CPPWARN),)
-  CPPWARN = -Wall -Wextra -Wundef
-endif
-
-#                                                                              #
-# Compiler settings                                                            #
-################################################################################
-
-################################################################################
-# Start of user section                                                        #
-#                                                                              #
-
-# List all user C define here, like -D_DEBUG=1
-UDEFS +=
-
-# Define ASM defines here
-UADEFS +=
-
-# List all user directories here
-UINCDIR +=
-
-# List the user directory to look for the libraries here
-ULIBDIR +=
-
-# List all user libraries here
-ULIBS +=
-
-#                                                                              #
-# End of user defines                                                          #
-################################################################################
-
-# allow for custom build directory
-ifneq ($(BUILDDIR),)
-  BUILDDIR := $(BUILDDIR)/$(PROJECT)
-endif
-
-RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
-include $(RULESPATH)/rules.mk
-
-include $(AMIROOS)/modules/flash.mk
diff --git a/os/modules/DiWheelDrive_1-1/alldconf.h b/os/modules/DiWheelDrive_1-1/alldconf.h
deleted file mode 100644
index 5b810a1..0000000
--- a/os/modules/DiWheelDrive_1-1/alldconf.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#ifndef _ALLDCONF_H_
-#define _ALLDCONF_H_
-
-/*
- * compatibility guards
- */
-#define _AMIRO_LLD_CFG_
-#define AMIRO_LLD_CFG_VERSION_MAJOR         1
-#define AMIRO_LLD_CFG_VERSION_MINOR         0
-
-/**
- * @brief   Enable flag for the A3906 motor driver.
- */
-#define AMIROLLD_CFG_USE_A3906
-
-/**
- * @brief   Enable flag for the AT24C01BN-SH-B EEPROM.
- */
-#define AMIROLLD_CFG_USE_AT24C01BN
-
-/**
- * @brief   Enable flag for the MHC5883L compass.
- */
-#define AMIROLLD_CFG_USE_HMC5883L
-
-/**
- * @brief   Enable flag for the INA219 power monitor.
- */
-#define AMIROLLD_CFG_USE_INA219
-
-/**
- * @brief   Enable flag for the L3G4200D gyroscope.
- */
-#define AMIROLLD_CFG_USE_L3G4200D
-
-/**
- * @brief   Enable flag for the status LED.
- */
-#define AMIROLLD_CFG_USE_LED
-
-/**
- * @brief   Enable flag for the LIS331DLH accelerometer.
- */
-#define AMIROLLD_CFG_USE_LIS331DLH
-
-/**
- * @brief   Enable flag for the LTC4412 power path controller.
- */
-#define AMIROLLD_CFG_USE_LTC4412
-
-/**
- * @brief   Enable flag for the PCA9544A I2C multiplexer.
- */
-#define AMIROLLD_CFG_USE_PCA9544A
-
-/**
- * @brief   Enable flag for the TPS62113 step-down converter.
- */
-#define AMIROLLD_CFG_USE_TPS62113
-
-/**
- * @brief   Enable flag for the VCNL4020 proximity sensor.
- */
-#define AMIROLLD_CFG_USE_VCNL4020
-
-#endif /* _ALLDCONF_H_ */
diff --git a/os/modules/DiWheelDrive_1-1/aosconf.h b/os/modules/DiWheelDrive_1-1/aosconf.h
deleted file mode 100644
index 1685b67..0000000
--- a/os/modules/DiWheelDrive_1-1/aosconf.h
+++ /dev/null
@@ -1,161 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#ifndef _AOSCONF_H_
-#define _AOSCONF_H_
-
-/*
- * compatibility guards
- */
-#define _AMIRO_OS_CFG_
-#define _AMIRO_OS_CFG_VERSION_MAJOR_            2
-#define _AMIRO_OS_CFG_VERSION_MINOR_            0
-
-#include <stdbool.h>
-
-/*===========================================================================*/
-/**
- * @name Kernel parameters and options
- * @{
- */
-/*===========================================================================*/
-
-/*
- * Include an external configuration file to override the following default settings only if required.
- */
-#if defined(AMIRO_APPS) && (AMIRO_APPS == true)
-  #include <osconf.h>
-#endif
-
-/**
- * @brief   Flag to set the module as SSSP master.
- */
-#if !defined(OS_CFG_SSSP_MASTER)
-  #define AMIROOS_CFG_SSSP_MASTER               false
-#else
-  #define AMIROOS_CFG_SSSP_MASTER               OS_CFG_SSSP_MASTER
-#endif
-
-/**
- * @brief   Time boundary for robot wide clock synchronization in microseconds.
- * @details Whenever the SSSP S (snychronization) signal gets logically deactivated,
- *          All modules need to align their local uptime to the nearest multiple of this value.
- */
-#if !defined(OS_CFG_SSSP_SYSSYNCPERIOD)
-  #define AMIROOS_CFG_SSSP_SYSSYNCPERIOD        1000000
-#else
-  #define AMIROOS_CFG_SSSP_SYSSYNCPERIOD        OS_CFG_SSSP_SYSSYNCPERIOD
-#endif
-
-/**
- * @brief   Flag to enable/disable debug API.
- */
-#if !defined(OS_CFG_DBG)
-  #define AMIROOS_CFG_DBG                       true
-#else
-  #define AMIROOS_CFG_DBG                       OS_CFG_DBG
-#endif
-
-/**
- * @brief   Flag to enable/disable unit tests.
- */
-#if !defined(OS_CFG_TESTS_ENABLE)
-  #define AMIROOS_CFG_TESTS_ENABLE              true
-#else
-  #define AMIROOS_CFG_TESTS_ENABLE              OS_CFG_TESTS_ENABLE
-#endif
-
-/**
- * @brief   Flag to enable/disable profiling API.
- */
-#if !defined(OS_CFG_PROFILE)
-  #define AMIROOS_CFG_PROFILE                   true
-#else
-  #define AMIROOS_CFG_PROFILE                   OS_CFG_PROFILE
-#endif
-
-/**
- * @brief   Timeout value when waiting for events in the main loop in microseconds.
- * @details A value of 0 deactivates the timeout.
- */
-#if !defined(OS_CFG_MAIN_LOOP_TIMEOUT)
-  #define AMIROOS_CFG_MAIN_LOOP_TIMEOUT         0
-#else
-  #define AMIROOS_CFG_MAIN_LOOP_TIMEOUT         OS_CFG_MAIN_LOOP_TIMEOUT
-#endif
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name System shell options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Shell enable flag.
- */
-#if (AMIROOS_CFG_TESTS_ENABLE == false) && !defined(OS_CFG_SHELL_ENABLE)
-  #define AMIROOS_CFG_SHELL_ENABLE              true
-#elif (AMIROOS_CFG_TESTS_ENABLE == true)
-  #define AMIROOS_CFG_SHELL_ENABLE              true
-#else
-  #define AMIROOS_CFG_SHELL_ENABLE              OS_CFG_SHELL_ENABLE
-#endif
-
-/**
- * @brief   Shell thread stack size.
- */
-#if !defined(OS_CFG_SHELL_STACKSIZE)
-  #define AMIROOS_CFG_SHELL_STACKSIZE           1024
-#else
-  #define AMIROOS_CFG_SHELL_STACKSIZE           OS_CFG_SHELL_STACKSIZE
-#endif
-
-/**
- * @brief   Shell thread priority.
- */
-#if !defined(OS_CFG_SHELL_THREADPRIO)
-  #define AMIROOS_CFG_SHELL_THREADPRIO          THD_NORMALPRIO_MIN
-#else
-  #define AMIROOS_CFG_SHELL_THREADPRIO          OS_CFG_SHELL_THREADPRIO
-#endif
-
-/**
- * @brief   Shell maximum input line length.
- */
-#if !defined(OS_CFG_SHELL_LINEWIDTH)
-  #define AMIROOS_CFG_SHELL_LINEWIDTH           64
-#else
-  #define AMIROOS_CFG_SHELL_LINEWIDTH           OS_CFG_SHELL_LINEWIDTH
-#endif
-
-/**
- * @brief   Shell maximum number of arguments.
- */
-#if !defined(OS_CFG_SHELL_MAXARGS)
-  #define AMIROOS_CFG_SHELL_MAXARGS             4
-#else
-  #define AMIROOS_CFG_SHELL_MAXARGS             OS_CFG_SHELL_MAXARGS
-#endif
-
-/** @} */
-
-#endif /* _AOSCONF_H_ */
-
diff --git a/os/modules/DiWheelDrive_1-1/board.c b/os/modules/DiWheelDrive_1-1/board.c
deleted file mode 100644
index 7ce79b5..0000000
--- a/os/modules/DiWheelDrive_1-1/board.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#include <hal.h>
-
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-/**
- * @brief   PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- *          This variable is used by the HAL when initializing the PAL driver.
- */
-const PALConfig pal_default_config = {
-#if STM32_HAS_GPIOA
-  {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
-#endif
-#if STM32_HAS_GPIOB
-  {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
-#endif
-#if STM32_HAS_GPIOC
-  {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
-#endif
-#if STM32_HAS_GPIOD
-  {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
-#endif
-#if STM32_HAS_GPIOE
-  {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
-#endif
-#if STM32_HAS_GPIOF
-  {VAL_GPIOFODR, VAL_GPIOFCRL, VAL_GPIOFCRH},
-#endif
-#if STM32_HAS_GPIOG
-  {VAL_GPIOGODR, VAL_GPIOGCRL, VAL_GPIOGCRH},
-#endif
-};
-#endif
-
-/**
- * @brief   Early initialization code.
- * @details This initialization must be performed just after stack setup
- *          and before any other initialization.
- */
-void __early_init(void) {
-
-  stm32_clock_init();
-}
-
-/**
- * @brief   Board-specific initialization code.
- * @todo    Add your board-specific code, if any.
- */
-void boardInit(void) {
-  /*
-   * Several I/O pins are re-mapped:
-   *   JTAG disabled and SWJ enabled
-   *   TIM2 to the PA15/PB3/PA2/PA3 pins.
-   *   TIM3 to PC6/PC7 pins.
-   *   USART3 to the PC10/PC11 pins.
-   *   I2C1 to the PB8/PB9 pins.
-   */
-  AFIO->MAPR = AFIO_MAPR_SWJ_CFG_DISABLE |
-               AFIO_MAPR_TIM2_REMAP_PARTIALREMAP1 |
-               AFIO_MAPR_TIM3_REMAP_FULLREMAP |
-               AFIO_MAPR_USART3_REMAP_PARTIALREMAP |
-               AFIO_MAPR_I2C1_REMAP;
-}
diff --git a/os/modules/DiWheelDrive_1-1/board.h b/os/modules/DiWheelDrive_1-1/board.h
deleted file mode 100644
index 622b7bf..0000000
--- a/os/modules/DiWheelDrive_1-1/board.h
+++ /dev/null
@@ -1,629 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for AMiRo DiWheelDrive v1.1 board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_DIWHEELDRIVE
-#define BOARD_NAME              "AMiRo DiWheelDrive"
-#define BOARD_VERSION           "1.1"
-
-/*
- * Board oscillators-related settings.
- * NOTE: LSE not fitted.
- */
-#if !defined(STM32_LSECLK)
-#define STM32_LSECLK                0U
-#endif
-
-#if !defined(STM32_HSECLK)
-#define STM32_HSECLK                8000000U
-#endif
-
-/*
- * Board voltages.
- * Required for performance limits calculation.
- */
-#define STM32_VDD                   330U
-
-/*
- * MCU type as defined in the ST header.
- */
-#define STM32F103xE
-
-/*
- * IO pins assignments.
- */
-#define GPIOA_WKUP                  0U
-#define GPIOA_LED                   1U
-#define GPIOA_DRIVE_PWM1A           2U
-#define GPIOA_DRIVE_PWM1B           3U
-#define GPIOA_PIN4                  4U
-#define GPIOA_MOTION_SCLK           5U
-#define GPIOA_MOTION_MISO           6U
-#define GPIOA_MOTION_MOSI           7U
-#define GPIOA_PIN8                  8U
-#define GPIOA_PROG_RX               9U
-#define GPIOA_PROG_TX               10U
-#define GPIOA_CAN_RX                11U
-#define GPIOA_CAN_TX                12U
-#define GPIOA_SWDIO                 13U
-#define GPIOA_SWCLK                 14U
-#define GPIOA_DRIVE_PWM2B           15U
-
-#define GPIOB_PIN0                  0U
-#define GPIOB_DRIVE_SENSE2          1U
-#define GPIOB_POWER_EN              2U
-#define GPIOB_DRIVE_PWM2A           3U
-#define GPIOB_PIN4                  4U
-#define GPIOB_COMPASS_DRDY          5U
-#define GPIOB_DRIVE_ENC1A           6U
-#define GPIOB_DRIVE_ENC1B           7U
-#define GPIOB_COMPASS_SCL           8U
-#define GPIOB_COMPASS_SDA           9U
-#define GPIOB_IR_SCL                10U
-#define GPIOB_IR_SDA                11U
-#define GPIOB_IR_INT                12U
-#define GPIOB_GYRO_DRDY             13U
-#define GPIOB_SYS_UART_UP           14U
-#define GPIOB_ACCEL_INT_N           15U
-
-#define GPIOC_DRIVE_SENSE1          0U
-#define GPIOC_SYS_INT_N             1U
-#define GPIOC_PIN2                  2U
-#define GPIOC_PATH_DCSTAT           3U
-#define GPIOC_PIN4                  4U
-#define GPIOC_PATH_DCEN             5U
-#define GPIOC_DRIVE_ENC2B           6U
-#define GPIOC_DRIVE_ENC2A           7U
-#define GPIOC_SYS_PD_N              8U
-#define GPIOC_SYS_REG_EN            9U
-#define GPIOC_SYS_UART_RX           10U
-#define GPIOC_SYS_UART_TX           11U
-#define GPIOC_PIN12                 12U
-#define GPIOC_ACCEL_SS_N            13U
-#define GPIOC_GYRO_SS_N             14U
-#define GPIOC_PIN15                 15U
-
-#define GPIOD_OSC_IN                0U
-#define GPIOD_OSC_OUT               1U
-#define GPIOD_SYS_WARMRST_N         2U
-#define GPIOD_PIN3                  3U
-#define GPIOD_PIN4                  4U
-#define GPIOD_PIN5                  5U
-#define GPIOD_PIN6                  6U
-#define GPIOD_PIN7                  7U
-#define GPIOD_PIN8                  8U
-#define GPIOD_PIN9                  9U
-#define GPIOD_PIN10                 10U
-#define GPIOD_PIN11                 11U
-#define GPIOD_PIN12                 12U
-#define GPIOD_PIN13                 13U
-#define GPIOD_PIN14                 14U
-#define GPIOD_PIN15                 15U
-
-#define GPIOE_PIN0                  0U
-#define GPIOE_PIN1                  1U
-#define GPIOE_PIN2                  2U
-#define GPIOE_PIN3                  3U
-#define GPIOE_PIN4                  4U
-#define GPIOE_PIN5                  5U
-#define GPIOE_PIN6                  6U
-#define GPIOE_PIN7                  7U
-#define GPIOE_PIN8                  8U
-#define GPIOE_PIN9                  9U
-#define GPIOE_PIN10                 10U
-#define GPIOE_PIN11                 11U
-#define GPIOE_PIN12                 12U
-#define GPIOE_PIN13                 13U
-#define GPIOE_PIN14                 14U
-#define GPIOE_PIN15                 15U
-
-#define GPIOF_PIN0                  0U
-#define GPIOF_PIN1                  1U
-#define GPIOF_PIN2                  2U
-#define GPIOF_PIN3                  3U
-#define GPIOF_PIN4                  4U
-#define GPIOF_PIN5                  5U
-#define GPIOF_PIN6                  6U
-#define GPIOF_PIN7                  7U
-#define GPIOF_PIN8                  8U
-#define GPIOF_PIN9                  9U
-#define GPIOF_PIN10                 10U
-#define GPIOF_PIN11                 11U
-#define GPIOF_PIN12                 12U
-#define GPIOF_PIN13                 13U
-#define GPIOF_PIN14                 14U
-#define GPIOF_PIN15                 15U
-
-#define GPIOG_PIN0                  0U
-#define GPIOG_PIN1                  1U
-#define GPIOG_PIN2                  2U
-#define GPIOG_PIN3                  3U
-#define GPIOG_PIN4                  4U
-#define GPIOG_PIN5                  5U
-#define GPIOG_PIN6                  6U
-#define GPIOG_PIN7                  7U
-#define GPIOG_PIN8                  8U
-#define GPIOG_PIN9                  9U
-#define GPIOG_PIN10                 10U
-#define GPIOG_PIN11                 11U
-#define GPIOG_PIN12                 12U
-#define GPIOG_PIN13                 13U
-#define GPIOG_PIN14                 14U
-#define GPIOG_PIN15                 15U
-
-/*
- * IO lines assignments.
- */
-#define LINE_WKUP                   PAL_LINE(GPIOA, GPIOA_WKUP)
-#define LINE_LED                    PAL_LINE(GPIOA, GPIOA_LED)
-#define LINE_DRIVE_PWM1A            PAL_LINE(GPIOA, GPIOA_DRIVE_PWM1A)
-#define LINE_DRIVE_PWM1B            PAL_LINE(GPIOA, GPIOA_DRIVE_PWM1B)
-#define LINE_MOTION_SCLK            PAL_LINE(GPIOA, GPIOA_MOTION_SCLK)
-#define LINE_MOTION_MISO            PAL_LINE(GPIOA, GPIOA_MOTION_MISO)
-#define LINE_MOTION_MOSI            PAL_LINE(GPIOA, GPIOA_MOTION_MOSI)
-#define LINE_PROG_RX                PAL_LINE(GPIOA, GPIOA_PROG_RX)
-#define LINE_PROG_TX                PAL_LINE(GPIOA, GPIOA_PROG_TX)
-#define LINE_CAN_RX                 PAL_LINE(GPIOA, GPIOA_CAN_RX)
-#define LINE_CAN_TX                 PAL_LINE(GPIOA, GPIOA_CAN_TX)
-#define LINE_SWDIO                  PAL_LINE(GPIOA, GPIOA_SWDIO)
-#define LINE_SWCLK                  PAL_LINE(GPIOA, GPIOA_SWCLK)
-#define LINE_DRIVE_PWM2B            PAL_LINE(GPIOA, GPIOA_DRIVE_PWM2B)
-
-#define LINE_DRIVE_SENSE2           PAL_LINE(GPIOB, GPIOB_DRIVE_SENSE2)
-#define LINE_POWER_EN               PAL_LINE(GPIOB, GPIOB_POWER_EN)
-#define LINE_DRIVE_PWM2A            PAL_LINE(GPIOB, GPIOB_DRIVE_PWM2A)
-#define LINE_COMPASS_DRDY           PAL_LINE(GPIOB, GPIOB_COMPASS_DRDY)
-#define LINE_DRIVE_ENC1A            PAL_LINE(GPIOB, GPIOB_DRIVE_ENC1A)
-#define LINE_DRIVE_ENC1B            PAL_LINE(GPIOB, GPIOB_DRIVE_ENC1B)
-#define LINE_COMPASS_SCL            PAL_LINE(GPIOB, GPIOB_COMPASS_SCL)
-#define LINE_COMPASS_SDA            PAL_LINE(GPIOB, GPIOB_COMPASS_SDA)
-#define LINE_IR_SCL                 PAL_LINE(GPIOB, GPIOB_IR_SCL)
-#define LINE_IR_SDA                 PAL_LINE(GPIOB, GPIOB_IR_SDA)
-#define LINE_IR_INT                 PAL_LINE(GPIOB, GPIOB_IR_INT)
-#define LINE_GYRO_DRDY              PAL_LINE(GPIOB, GPIOB_GYRO_DRDY)
-#define LINE_SYS_UART_UP            PAL_LINE(GPIOB, GPIOB_SYS_UART_UP)
-#define LINE_ACCEL_INT_N            PAL_LINE(GPIOB, GPIOB_ACCEL_INT_N)
-
-#define LINE_DRIVE_SENSE1           PAL_LINE(GPIOC, GPIOC_DRIVE_SENSE1)
-#define LINE_SYS_INT_N              PAL_LINE(GPIOC, GPIOC_SYS_INT_N)
-#define LINE_PATH_DCSTAT            PAL_LINE(GPIOC, GPIOC_PATH_DCSTAT)
-#define LINE_PATH_DCEN              PAL_LINE(GPIOC, GPIOC_PATH_DCEN)
-#define LINE_DRIVE_ENC2B            PAL_LINE(GPIOC, GPIOC_DRIVE_ENC2B)
-#define LINE_DRIVE_ENC2A            PAL_LINE(GPIOC, GPIOC_DRIVE_ENC2A)
-#define LINE_SYS_PD_N               PAL_LINE(GPIOC, GPIOC_SYS_PD_N)
-#define LINE_SYS_REG_EN             PAL_LINE(GPIOC, GPIOC_SYS_REG_EN)
-#define LINE_SYS_UART_RX            PAL_LINE(GPIOC, GPIOC_SYS_UART_RX)
-#define LINE_SYS_UART_TX            PAL_LINE(GPIOC, GPIOC_SYS_UART_TX)
-#define LINE_ACCEL_SS_N             PAL_LINE(GPIOC, GPIOC_ACCEL_SS_N)
-#define LINE_GYRO_SS_N              PAL_LINE(GPIOC, GPIOC_GYRO_SS_N)
-
-#define LINE_OSC_IN                 PAL_LINE(GPIOD, GPIOD_OSC_IN)
-#define LINE_OSC_OUT                PAL_LINE(GPIOD, GPIOD_OSC_OUT)
-#define LINE_SYS_WARMRST_N          PAL_LINE(GPIOD, GPIOD_SYS_WARMRST_N)
-
-/*
- * I/O ports initial setup, this configuration is established soon after reset
- * in the initialization code.
- * Please refer to the STM32 Reference Manual for details.
- */
-#define PIN_MODE_INPUT              0U
-#define PIN_MODE_OUTPUT_2M          2U
-#define PIN_MODE_OUTPUT_10M         1U
-#define PIN_MODE_OUTPUT_50M         3U
-#define PIN_CNF_INPUT_ANALOG        0U
-#define PIN_CNF_INPUT_FLOATING      1U
-#define PIN_CNF_INPUT_PULLX         2U
-#define PIN_CNF_OUTPUT_PUSHPULL     0U
-#define PIN_CNF_OUTPUT_OPENDRAIN    1U
-#define PIN_CNF_ALTERNATE_PUSHPULL  2U
-#define PIN_CNF_ALTERNATE_OPENDRAIN 3U
-#define PIN_CR(pin, mode, cnf)      (((mode) | ((cnf) << 2U)) << (((pin) % 8U) * 4U))
-#define PIN_ODR_LOW(n)              (0U << (n))
-#define PIN_ODR_HIGH(n)             (1U << (n))
-
-/*
- * GPIOA setup:
- *
- * PA0  - WKUP                      (input floating)
- * PA1  - LED                       (output opendrain high 50MHz)
- * PA2  - DRIVE_PWM1A               (alternate pushpull 50MHz)
- * PA3  - DRIVE_PWM1B               (alternate pushpull 50MHz)
- * PA4  - PIN4                      (input floating)
- * PA5  - MOTION_SCLK               (alternate pushpull 50MHz)
- * PA6  - MOTION_MISO               (input pullup)
- * PA7  - MOTION_MOSI               (alternate pushpull 50MHz)
- * PA8  - PIN8                      (input floating)
- * PA9  - PROG_RX                   (alternate pushpull 50MHz)
- * PA10 - PROG_TX                   (input pullup)
- * PA11 - CAN_RX                    (input pullup)
- * PA12 - CAN_TX                    (input floating)
- * PA13 - SWDIO                     (input pullup)
- * PA14 - SWCLK                     (input pullup)
- * PA15 - DRIVE_PWM2B               (alternate pushpull 50MHz)
- */
-#define VAL_GPIOACRL                (PIN_CR(GPIOA_WKUP, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOA_LED, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |            \
-                                     PIN_CR(GPIOA_DRIVE_PWM1A, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |  \
-                                     PIN_CR(GPIOA_DRIVE_PWM1B, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |  \
-                                     PIN_CR(GPIOA_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOA_MOTION_SCLK, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |  \
-                                     PIN_CR(GPIOA_MOTION_MISO, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |              \
-                                     PIN_CR(GPIOA_MOTION_MOSI, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL))
-#define VAL_GPIOACRH                (PIN_CR(GPIOA_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOA_PROG_RX, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |      \
-                                     PIN_CR(GPIOA_PROG_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                  \
-                                     PIN_CR(GPIOA_CAN_RX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                   \
-                                     PIN_CR(GPIOA_CAN_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOA_SWDIO, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                    \
-                                     PIN_CR(GPIOA_SWCLK, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                    \
-                                     PIN_CR(GPIOA_DRIVE_PWM2B, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL))
-#define VAL_GPIOAODR                (PIN_ODR_HIGH(GPIOA_WKUP) |                                                    \
-                                     PIN_ODR_HIGH(GPIOA_LED) |                                                     \
-                                     PIN_ODR_HIGH(GPIOA_DRIVE_PWM1A) |                                             \
-                                     PIN_ODR_HIGH(GPIOA_DRIVE_PWM1B) |                                             \
-                                     PIN_ODR_LOW(GPIOA_PIN4) |                                                     \
-                                     PIN_ODR_HIGH(GPIOA_MOTION_SCLK) |                                             \
-                                     PIN_ODR_HIGH(GPIOA_MOTION_MISO) |                                             \
-                                     PIN_ODR_HIGH(GPIOA_MOTION_MOSI) |                                             \
-                                     PIN_ODR_LOW(GPIOA_PIN8) |                                                     \
-                                     PIN_ODR_HIGH(GPIOA_PROG_RX) |                                                 \
-                                     PIN_ODR_HIGH(GPIOA_PROG_TX) |                                                 \
-                                     PIN_ODR_HIGH(GPIOA_CAN_RX) |                                                  \
-                                     PIN_ODR_HIGH(GPIOA_CAN_TX) |                                                  \
-                                     PIN_ODR_HIGH(GPIOA_SWDIO) |                                                   \
-                                     PIN_ODR_HIGH(GPIOA_SWCLK) |                                                   \
-                                     PIN_ODR_HIGH(GPIOA_DRIVE_PWM2B))
-
-/*
- * GPIOB setup:
- *
- * PB0  - PIN0                      (input floating)
- * PB1  - DRIVE_SENSE2              (input analog)
- * PB2  - POWER_EN                  (output pushpull low 50MHz)
- * PB3  - DRIVE_PWM2A               (alternate pushpull 50MHz)
- * PB4  - PIN4                      (input floating)
- * PB5  - COMPASS_DRDY              (input pullup)
- * PB6  - DRIVE_ENC1A               (input floating)
- * PB7  - DRIVE_ENC1B               (input floating)
- * PB8  - COMPASS_SCL               (alternate opendrain 50MHz)
- * PB9  - COMPASS_SDA               (alternate opendrain 50MHz)
- * PB10 - IR_SCL                    (alternate opendrain 50MHz)
- * PB11 - IR_SDA                    (alternate opendrain 50MHz)
- * PB12 - IR_INT                    (input pullup)
- * PB13 - GYRO_DRDY                 (input pullup)
- * PB14 - SYS_UART_UP               (output opendrain high 50MHz)
- * PB15 - ACCEL_INT_N               (input pullup)
- */
-#define VAL_GPIOBCRL                (PIN_CR(GPIOB_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOB_DRIVE_SENSE2, PIN_MODE_INPUT, PIN_CNF_INPUT_ANALOG) |            \
-                                     PIN_CR(GPIOB_POWER_EN, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |        \
-                                     PIN_CR(GPIOB_DRIVE_PWM2A, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |  \
-                                     PIN_CR(GPIOB_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOB_COMPASS_DRDY, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |             \
-                                     PIN_CR(GPIOB_DRIVE_ENC1A, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
-                                     PIN_CR(GPIOB_DRIVE_ENC1B, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIOBCRH                (PIN_CR(GPIOB_COMPASS_SCL, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) | \
-                                     PIN_CR(GPIOB_COMPASS_SDA, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) | \
-                                     PIN_CR(GPIOB_IR_SCL, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) |      \
-                                     PIN_CR(GPIOB_IR_SDA, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) |      \
-                                     PIN_CR(GPIOB_IR_INT, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOB_GYRO_DRDY, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                \
-                                     PIN_CR(GPIOB_SYS_UART_UP, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |    \
-                                     PIN_CR(GPIOB_ACCEL_INT_N, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX))
-#define VAL_GPIOBODR                (PIN_ODR_LOW(GPIOB_PIN0) |                                                     \
-                                     PIN_ODR_HIGH(GPIOB_DRIVE_SENSE2) |                                            \
-                                     PIN_ODR_LOW(GPIOB_POWER_EN) |                                                 \
-                                     PIN_ODR_HIGH(GPIOB_DRIVE_PWM2A) |                                             \
-                                     PIN_ODR_LOW(GPIOB_PIN4) |                                                     \
-                                     PIN_ODR_HIGH(GPIOB_COMPASS_DRDY) |                                            \
-                                     PIN_ODR_HIGH(GPIOB_DRIVE_ENC1A) |                                             \
-                                     PIN_ODR_HIGH(GPIOB_DRIVE_ENC1B) |                                             \
-                                     PIN_ODR_HIGH(GPIOB_COMPASS_SCL) |                                             \
-                                     PIN_ODR_HIGH(GPIOB_COMPASS_SDA) |                                             \
-                                     PIN_ODR_HIGH(GPIOB_IR_SCL) |                                                  \
-                                     PIN_ODR_HIGH(GPIOB_IR_SDA) |                                                  \
-                                     PIN_ODR_HIGH(GPIOB_IR_INT) |                                                  \
-                                     PIN_ODR_HIGH(GPIOB_GYRO_DRDY) |                                               \
-                                     PIN_ODR_HIGH(GPIOB_SYS_UART_UP) |                                             \
-                                     PIN_ODR_HIGH(GPIOB_ACCEL_INT_N))
-
-/*
- * GPIOC setup:
- *
- * PC0  - DRIVE_SENSE1              (input analog)
- * PC1  - SYS_INT_N                 (output opendrain low 50MHz)
- * PC2  - PIN2                      (input floating)
- * PC3  - PATH_DCSTAT               (input floating)
- * PC4  - PIN4                      (input floating)
- * PC5  - PATH_DCEN                 (output pushpull low 50MHz)
- * PC6  - DRIVE_ENC2B               (input floating)
- * PC7  - DRIVE_ENC2A               (input floating)
- * PC8  - SYS_PD_N                  (output opendrain high 50MHz)
- * PC9  - SYS_REG_EN                (input floating)
- * PC10 - SYS_UART_RX               (input floating)
- * PC11 - SYS_UART_TX               (input floating)
- * PC12 - PIN12                     (input pullup)
- * PC13 - ACCEL_SS_N                (output pushpull high 50MHz)
- * PC14 - GYRO_SS_N                 (output pushpull high 50MHz)
- * PC15 - PIN15                     (input floating)
- */
-#define VAL_GPIOCCRL                (PIN_CR(GPIOC_DRIVE_SENSE1, PIN_MODE_INPUT, PIN_CNF_INPUT_ANALOG) |            \
-                                     PIN_CR(GPIOC_SYS_INT_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |           \
-                                     PIN_CR(GPIOC_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOC_PATH_DCSTAT, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
-                                     PIN_CR(GPIOC_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOC_PATH_DCEN, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |       \
-                                     PIN_CR(GPIOC_DRIVE_ENC2B, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
-                                     PIN_CR(GPIOC_DRIVE_ENC2A, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIOCCRH                (PIN_CR(GPIOC_SYS_PD_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |       \
-                                     PIN_CR(GPIOC_SYS_REG_EN, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |            \
-                                     PIN_CR(GPIOC_SYS_UART_RX, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
-                                     PIN_CR(GPIOC_SYS_UART_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |           \
-                                     PIN_CR(GPIOC_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOC_ACCEL_SS_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |      \
-                                     PIN_CR(GPIOC_GYRO_SS_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |       \
-                                     PIN_CR(GPIOC_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIOCODR                (PIN_ODR_HIGH(GPIOC_DRIVE_SENSE1) |                                            \
-                                     PIN_ODR_LOW(GPIOC_SYS_INT_N) |                                                \
-                                     PIN_ODR_LOW(GPIOC_PIN2) |                                                     \
-                                     PIN_ODR_HIGH(GPIOC_PATH_DCSTAT) |                                             \
-                                     PIN_ODR_LOW(GPIOC_PIN4) |                                                     \
-                                     PIN_ODR_LOW(GPIOC_PATH_DCEN) |                                                \
-                                     PIN_ODR_HIGH(GPIOC_DRIVE_ENC2B) |                                             \
-                                     PIN_ODR_HIGH(GPIOC_DRIVE_ENC2A) |                                             \
-                                     PIN_ODR_HIGH(GPIOC_SYS_PD_N) |                                                \
-                                     PIN_ODR_HIGH(GPIOC_SYS_REG_EN) |                                              \
-                                     PIN_ODR_HIGH(GPIOC_SYS_UART_RX) |                                             \
-                                     PIN_ODR_HIGH(GPIOC_SYS_UART_TX) |                                             \
-                                     PIN_ODR_LOW(GPIOC_PIN12) |                                                    \
-                                     PIN_ODR_HIGH(GPIOC_ACCEL_SS_N) |                                              \
-                                     PIN_ODR_HIGH(GPIOC_GYRO_SS_N) |                                               \
-                                     PIN_ODR_LOW(GPIOC_PIN15))
-
-/*
- * GPIOD setup:
- *
- * PD0  - OSC_IN                    (input floating)
- * PD1  - OSC_OUT                   (input floating)
- * PD2  - SYS_WARMRST_N             (output opendrain high 50MHz)
- * PD3  - PIN3                      (input floating)
- * PD4  - PIN4                      (input floating)
- * PD5  - PIN5                      (input floating)
- * PD6  - PIN6                      (input floating)
- * PD7  - PIN7                      (input floating)
- * PD8  - PIN8                      (input floating)
- * PD9  - PIN9                      (input floating)
- * PD10 - PIN10                     (input floating)
- * PD11 - PIN11                     (input floating)
- * PD12 - PIN12                     (input floating)
- * PD13 - PIN13                     (input floating)
- * PD14 - PIN14                     (input floating)
- * PD15 - PIN15                     (input floating)
- */
-#define VAL_GPIODCRL                (PIN_CR(GPIOD_OSC_IN, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOD_OSC_OUT, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
-                                     PIN_CR(GPIOD_SYS_WARMRST_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |  \
-                                     PIN_CR(GPIOD_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOD_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOD_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOD_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOD_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIODCRH                (PIN_CR(GPIOD_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOD_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOD_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOD_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOD_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOD_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOD_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOD_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIODODR                (PIN_ODR_HIGH(GPIOD_OSC_IN) |                                                  \
-                                     PIN_ODR_HIGH(GPIOD_OSC_OUT) |                                                 \
-                                     PIN_ODR_HIGH(GPIOD_SYS_WARMRST_N) |                                           \
-                                     PIN_ODR_LOW(GPIOD_PIN3) |                                                     \
-                                     PIN_ODR_LOW(GPIOD_PIN4) |                                                     \
-                                     PIN_ODR_LOW(GPIOD_PIN5) |                                                     \
-                                     PIN_ODR_LOW(GPIOD_PIN6) |                                                     \
-                                     PIN_ODR_LOW(GPIOD_PIN7) |                                                     \
-                                     PIN_ODR_LOW(GPIOD_PIN8) |                                                     \
-                                     PIN_ODR_LOW(GPIOD_PIN9) |                                                     \
-                                     PIN_ODR_LOW(GPIOD_PIN10) |                                                    \
-                                     PIN_ODR_LOW(GPIOD_PIN11) |                                                    \
-                                     PIN_ODR_LOW(GPIOD_PIN12) |                                                    \
-                                     PIN_ODR_LOW(GPIOD_PIN13) |                                                    \
-                                     PIN_ODR_LOW(GPIOD_PIN14) |                                                    \
-                                     PIN_ODR_LOW(GPIOD_PIN15))
-
-/*
- * GPIOE setup:
- *
- * PE0  - PIN0                      (input floating)
- * PE1  - PIN1                      (input floating)
- * PE2  - PIN2                      (input floating)
- * PE3  - PIN3                      (input floating)
- * PE4  - PIN4                      (input floating)
- * PE5  - PIN5                      (input floating)
- * PE6  - PIN6                      (input floating)
- * PE7  - PIN7                      (input floating)
- * PE8  - PIN8                      (input floating)
- * PE9  - PIN9                      (input floating)
- * PE10 - PIN10                     (input floating)
- * PE11 - PIN11                     (input floating)
- * PE12 - PIN12                     (input floating)
- * PE13 - PIN13                     (input floating)
- * PE14 - PIN14                     (input floating)
- * PE15 - PIN15                     (input floating)
- */
-#define VAL_GPIOECRL                (PIN_CR(GPIOE_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOE_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOE_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOE_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOE_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOE_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOE_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOE_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIOECRH                (PIN_CR(GPIOE_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOE_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOE_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOE_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOE_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOE_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOE_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOE_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIOEODR                (PIN_ODR_LOW(GPIOE_PIN0) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN1) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN2) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN3) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN4) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN5) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN6) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN7) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN8) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN9) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN10) |                                                    \
-                                     PIN_ODR_LOW(GPIOE_PIN11) |                                                    \
-                                     PIN_ODR_LOW(GPIOE_PIN12) |                                                    \
-                                     PIN_ODR_LOW(GPIOE_PIN13) |                                                    \
-                                     PIN_ODR_LOW(GPIOE_PIN14) |                                                    \
-                                     PIN_ODR_LOW(GPIOE_PIN15))
-
-/*
- * GPIOF setup:
- *
- * PF0  - PIN0                      (input floating)
- * PF1  - PIN1                      (input floating)
- * PF2  - PIN2                      (input floating)
- * PF3  - PIN3                      (input floating)
- * PF4  - PIN4                      (input floating)
- * PF5  - PIN5                      (input floating)
- * PF6  - PIN6                      (input floating)
- * PF7  - PIN7                      (input floating)
- * PF8  - PIN8                      (input floating)
- * PF9  - PIN9                      (input floating)
- * PF10 - PIN10                     (input floating)
- * PF11 - PIN11                     (input floating)
- * PF12 - PIN12                     (input floating)
- * PF13 - PIN13                     (input floating)
- * PF14 - PIN14                     (input floating)
- * PF15 - PIN15                     (input floating)
- */
-#define VAL_GPIOFCRL                (PIN_CR(GPIOF_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOF_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOF_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOF_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOF_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOF_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOF_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOF_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIOFCRH                (PIN_CR(GPIOF_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOF_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOF_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOF_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOF_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOF_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOF_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOF_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIOFODR                (PIN_ODR_LOW(GPIOF_PIN0) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN1) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN2) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN3) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN4) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN5) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN6) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN7) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN8) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN9) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN10) |                                                    \
-                                     PIN_ODR_LOW(GPIOF_PIN11) |                                                    \
-                                     PIN_ODR_LOW(GPIOF_PIN12) |                                                    \
-                                     PIN_ODR_LOW(GPIOF_PIN13) |                                                    \
-                                     PIN_ODR_LOW(GPIOF_PIN14) |                                                    \
-                                     PIN_ODR_LOW(GPIOF_PIN15))
-
-/*
- * GPIOG setup:
- *
- * PG0  - PIN0                      (input floating)
- * PG1  - PIN1                      (input floating)
- * PG2  - PIN2                      (input floating)
- * PG3  - PIN3                      (input floating)
- * PG4  - PIN4                      (input floating)
- * PG5  - PIN5                      (input floating)
- * PG6  - PIN6                      (input floating)
- * PG7  - PIN7                      (input floating)
- * PG8  - PIN8                      (input floating)
- * PG9  - PIN9                      (input floating)
- * PG10 - PIN10                     (input floating)
- * PG11 - PIN11                     (input floating)
- * PG12 - PIN12                     (input floating)
- * PG13 - PIN13                     (input floating)
- * PG14 - PIN14                     (input floating)
- * PG15 - PIN15                     (input floating)
- */
-#define VAL_GPIOGCRL                (PIN_CR(GPIOG_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOG_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOG_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOG_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOG_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOG_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOG_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOG_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIOGCRH                (PIN_CR(GPIOG_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOG_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOG_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOG_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOG_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOG_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOG_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOG_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIOGODR                (PIN_ODR_LOW(GPIOG_PIN0) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN1) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN2) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN3) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN4) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN5) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN6) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN7) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN8) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN9) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN10) |                                                    \
-                                     PIN_ODR_LOW(GPIOG_PIN11) |                                                    \
-                                     PIN_ODR_LOW(GPIOG_PIN12) |                                                    \
-                                     PIN_ODR_LOW(GPIOG_PIN13) |                                                    \
-                                     PIN_ODR_LOW(GPIOG_PIN14) |                                                    \
-                                     PIN_ODR_LOW(GPIOG_PIN15))
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
-  void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */
diff --git a/os/modules/DiWheelDrive_1-1/board.mk b/os/modules/DiWheelDrive_1-1/board.mk
deleted file mode 100644
index 7a12204..0000000
--- a/os/modules/DiWheelDrive_1-1/board.mk
+++ /dev/null
@@ -1,36 +0,0 @@
-################################################################################
-# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
-# (AMiRo) platform.                                                            #
-# Copyright (C) 2016..2018  Thomas Schöpping et al.                            #
-#                                                                              #
-# This program is free software: you can redistribute it and/or modify         #
-# it under the terms of the GNU General Public License as published by         #
-# the Free Software Foundation, either version 3 of the License, or            #
-# (at your option) any later version.                                          #
-#                                                                              #
-# This program is distributed in the hope that it will be useful,              #
-# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
-# GNU General Public License for more details.                                 #
-#                                                                              #
-# You should have received a copy of the GNU General Public License            #
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
-#                                                                              #
-# This research/work was supported by the Cluster of Excellence Cognitive      #
-# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
-# funded by the German Research Foundation (DFG).                              #
-################################################################################
-
-
-
-# absolute path to this directory
-BOARD_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
-
-# include paths
-BOARDINC = $(BOARD_DIR)
-
-# C source files
-BOARDSRC = $(BOARD_DIR)board.c
-
-# linker path
-BOARDLD = $(AMIROOS)/hal/ports
diff --git a/os/modules/DiWheelDrive_1-1/chconf.h b/os/modules/DiWheelDrive_1-1/chconf.h
deleted file mode 100644
index e6d26b4..0000000
--- a/os/modules/DiWheelDrive_1-1/chconf.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file    os/modules/DiWheelDrive/chconf.h
- * @brief   ChibiOS Configuration file for the DiWheelDrive v1.1 module.
- * @details Contains the application specific kernel settings.
- *
- * @addtogroup config
- * @details Kernel related settings and hooks.
- * @{
- */
-
-#ifndef _CHCONF_H_
-#define _CHCONF_H_
-
-#include <aosconf.h>
-
-/*===========================================================================*/
-/**
- * @name System timers settings
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System time counter resolution.
- * @note    Allowed values are 16 or 32 bits.
- */
-#define CH_CFG_ST_RESOLUTION                16
-
-/**
- * @brief   System tick frequency.
- * @details Frequency of the system timer that drives the system ticks. This
- *          setting also defines the system tick time unit.
- */
-#if (AMIROOS_CFG_TESTS_ENABLE != true) || defined(__DOXYGEN__)
-#define CH_CFG_ST_FREQUENCY                 1000000UL
-#else
-#define CH_CFG_ST_FREQUENCY                 100000UL
-#endif
-
-/**
- * @brief   Time delta constant for the tick-less mode.
- * @note    If this value is zero then the system uses the classic
- *          periodic tick. This value represents the minimum number
- *          of ticks that is safe to specify in a timeout directive.
- *          The value one is not valid, timeouts are rounded up to
- *          this value.
- */
-#if (AMIROOS_CFG_TESTS_ENABLE != true) || defined(__DOXYGEN__)
-#define CH_CFG_ST_TIMEDELTA                 10
-#else
-#define CH_CFG_ST_TIMEDELTA                 2
-#endif
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Port specific settings
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   NVIC VTOR initialization offset.
- * @details On initialization, the code at this address in the flash memory will be executed.
- */
-#define CORTEX_VTOR_INIT 0x00006000U
-
-/** @} */
-
-#include <aos_chconf.h>
-
-#endif  /* _CHCONF_H_ */
-
-/** @} */
diff --git a/os/modules/DiWheelDrive_1-1/halconf.h b/os/modules/DiWheelDrive_1-1/halconf.h
deleted file mode 100644
index 2308fb7..0000000
--- a/os/modules/DiWheelDrive_1-1/halconf.h
+++ /dev/null
@@ -1,388 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file    os/modules/DiWheelDrive/halconf.h
- * @brief   HAL configuration header for the DiWheelDrive v1.1 module.
- * @details HAL configuration file, this file allows to enable or disable the
- *          various device drivers from your application. You may also use
- *          this file in order to override the device drivers default settings.
- *
- * @addtogroup HAL_CONF
- * @{
- */
-
-#ifndef _HALCONF_H_
-#define _HALCONF_H_
-
-/**
- * @brief   Enables the PAL subsystem.
- */
-#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
-#define HAL_USE_PAL                 TRUE
-#endif
-
-/**
- * @brief   Enables the ADC subsystem.
- */
-#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
-#define HAL_USE_ADC                 FALSE
-#endif
-
-/**
- * @brief   Enables the CAN subsystem.
- */
-#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
-#define HAL_USE_CAN                 TRUE
-#endif
-
-/**
- * @brief   Enables the DAC subsystem.
- */
-#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
-#define HAL_USE_DAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the EXT subsystem.
- */
-#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
-#define HAL_USE_EXT                 TRUE
-#endif
-
-/**
- * @brief   Enables the GPT subsystem.
- */
-#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
-#define HAL_USE_GPT                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2C subsystem.
- */
-#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
-#define HAL_USE_I2C                 TRUE
-#endif
-
-/**
- * @brief   Enables the I2S subsystem.
- */
-#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
-#define HAL_USE_I2S                 FALSE
-#endif
-
-/**
- * @brief   Enables the ICU subsystem.
- */
-#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
-#define HAL_USE_ICU                 FALSE
-#endif
-
-/**
- * @brief   Enables the MAC subsystem.
- */
-#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
-#define HAL_USE_MAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the MMC_SPI subsystem.
- */
-#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_MMC_SPI             FALSE
-#endif
-
-/**
- * @brief   Enables the PWM subsystem.
- */
-#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
-#define HAL_USE_PWM                 TRUE
-#endif
-
-/**
- * @brief   Enables the RTC subsystem.
- */
-#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
-#define HAL_USE_RTC                 TRUE
-#endif
-
-/**
- * @brief   Enables the SDC subsystem.
- */
-#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
-#define HAL_USE_SDC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL subsystem.
- */
-#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL              TRUE
-#endif
-
-/**
- * @brief   Enables the SERIAL over USB subsystem.
- */
-#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL_USB          FALSE
-#endif
-
-/**
- * @brief   Enables the SPI subsystem.
- */
-#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_SPI                 TRUE
-#endif
-
-/**
- * @brief   Enables the UART subsystem.
- */
-#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
-#define HAL_USE_UART                FALSE
-#endif
-
-/**
- * @brief   Enables the USB subsystem.
- */
-#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
-#define HAL_USE_USB                 FALSE
-#endif
-
-/**
- * @brief   Enables the WDG subsystem.
- */
-#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
-#define HAL_USE_WDG                 FALSE
-#endif
-
-/**
- * @brief   Enables the QEI subsystem.
- */
-#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__)
-#define HAL_USE_QEI                 TRUE
-#endif
-
-/*===========================================================================*/
-/* ADC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
-#define ADC_USE_WAIT                FALSE
-#endif
-
-/**
- * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define ADC_USE_MUTUAL_EXCLUSION    FALSE
-#endif
-
-/*===========================================================================*/
-/* CAN driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Sleep mode related APIs inclusion switch.
- */
-#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
-#define CAN_USE_SLEEP_MODE          FALSE
-#endif
-
-/*===========================================================================*/
-/* I2C driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables the mutual exclusion APIs on the I2C bus.
- */
-#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define I2C_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* MAC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
-#define MAC_USE_ZERO_COPY           FALSE
-#endif
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
-#define MAC_USE_EVENTS              FALSE
-#endif
-
-/*===========================================================================*/
-/* MMC_SPI driver related settings.                                          */
-/*===========================================================================*/
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- *          This option is recommended also if the SPI driver does not
- *          use a DMA channel and heavily loads the CPU.
- */
-#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
-#define MMC_NICE_WAITING            FALSE
-#endif
-
-/*===========================================================================*/
-/* SDC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Number of initialization attempts before rejecting the card.
- * @note    Attempts are performed at 10mS intervals.
- */
-#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
-#define SDC_INIT_RETRY              100
-#endif
-
-/**
- * @brief   Include support for MMC cards.
- * @note    MMC support is not yet implemented so this option must be kept
- *          at @p FALSE.
- */
-#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
-#define SDC_MMC_SUPPORT             FALSE
-#endif
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- */
-#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
-#define SDC_NICE_WAITING            FALSE
-#endif
-
-/*===========================================================================*/
-/* SERIAL driver related settings.                                           */
-/*===========================================================================*/
-
-/**
- * @brief   Default bit rate.
- * @details Configuration parameter, this is the baud rate selected for the
- *          default configuration.
- */
-#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
-#define SERIAL_DEFAULT_BITRATE      115200
-#endif
-
-/**
- * @brief   Serial buffers size.
- * @details Configuration parameter, you can change the depth of the queue
- *          buffers depending on the requirements of your application.
- * @note    The default is 16 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_BUFFERS_SIZE         16
-#endif
-
-/*===========================================================================*/
-/* SERIAL_USB driver related setting.                                        */
-/*===========================================================================*/
-
-/**
- * @brief   Serial over USB buffers size.
- * @details Configuration parameter, the buffer size must be a multiple of
- *          the USB data endpoint maximum packet size.
- * @note    The default is 256 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_USB_BUFFERS_SIZE     256
-#endif
-
-/**
- * @brief   Serial over USB number of buffers.
- * @note    The default is 2 buffers.
- */
-#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
-#define SERIAL_USB_BUFFERS_NUMBER   2
-#endif
-
-/*===========================================================================*/
-/* SPI driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
-#define SPI_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define SPI_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* UART driver related settings.                                             */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
-#define UART_USE_WAIT               FALSE
-#endif
-
-/**
- * @brief   Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define UART_USE_MUTUAL_EXCLUSION   FALSE
-#endif
-
-/*===========================================================================*/
-/* USB driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
-#define USB_USE_WAIT                FALSE
-#endif
-
-#endif /* _HALCONF_H_ */
-
-/** @} */
diff --git a/os/modules/DiWheelDrive_1-1/mcuconf.h b/os/modules/DiWheelDrive_1-1/mcuconf.h
deleted file mode 100644
index 272beb0..0000000
--- a/os/modules/DiWheelDrive_1-1/mcuconf.h
+++ /dev/null
@@ -1,227 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#ifndef _MCUCONF_H_
-#define _MCUCONF_H_
-
-#define STM32F103_MCUCONF
-
-/*
- * STM32F103 drivers configuration.
- * The following settings override the default settings present in
- * the various device driver implementation headers.
- * Note that the settings for each driver only have effect if the whole
- * driver is enabled in halconf.h.
- *
- * IRQ priorities:
- * 15...0       Lowest...Highest.
- *
- * DMA priorities:
- * 0...3        Lowest...Highest.
- */
-
-/*
- * HAL driver system settings.
- */
-#define STM32_NO_INIT                       FALSE
-#define STM32_HSI_ENABLED                   TRUE
-#define STM32_LSI_ENABLED                   FALSE
-#define STM32_HSE_ENABLED                   TRUE
-#define STM32_LSE_ENABLED                   FALSE
-#define STM32_SW                            STM32_SW_PLL
-#define STM32_PLLSRC                        STM32_PLLSRC_HSE
-#define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
-#define STM32_PLLMUL_VALUE                  9
-#define STM32_HPRE                          STM32_HPRE_DIV1
-#define STM32_PPRE1                         STM32_PPRE1_DIV2
-#define STM32_PPRE2                         STM32_PPRE2_DIV2
-#define STM32_ADCPRE                        STM32_ADCPRE_DIV4
-#define STM32_USB_CLOCK_REQUIRED            TRUE
-#define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
-#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
-#define STM32_PVD_ENABLE                    FALSE
-#define STM32_PLS                           STM32_PLS_LEV0
-
-/*
- * ADC driver system settings.
- */
-#define STM32_ADC_USE_ADC1                  FALSE
-#define STM32_ADC_ADC1_DMA_PRIORITY         2
-#define STM32_ADC_ADC1_IRQ_PRIORITY         6
-
-/*
- * CAN driver system settings.
- */
-#define STM32_CAN_USE_CAN1                  TRUE
-#define STM32_CAN_CAN1_IRQ_PRIORITY         11
-
-/*
- * EXT driver system settings.
- */
-#define STM32_EXT_EXTI0_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI1_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI2_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI3_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI4_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
-#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
-#define STM32_EXT_EXTI16_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI17_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI18_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI19_IRQ_PRIORITY       6
-
-/*
- * GPT driver system settings.
- */
-#define STM32_GPT_USE_TIM1                  FALSE
-#define STM32_GPT_USE_TIM2                  FALSE
-#define STM32_GPT_USE_TIM3                  FALSE
-#define STM32_GPT_USE_TIM4                  FALSE
-#define STM32_GPT_USE_TIM5                  FALSE
-#define STM32_GPT_USE_TIM8                  FALSE
-#define STM32_GPT_TIM1_IRQ_PRIORITY         7
-#define STM32_GPT_TIM2_IRQ_PRIORITY         7
-#define STM32_GPT_TIM3_IRQ_PRIORITY         7
-#define STM32_GPT_TIM4_IRQ_PRIORITY         7
-#define STM32_GPT_TIM5_IRQ_PRIORITY         7
-#define STM32_GPT_TIM8_IRQ_PRIORITY         7
-
-/*
- * I2C driver system settings.
- */
-#define STM32_I2C_USE_I2C1                  TRUE
-#define STM32_I2C_USE_I2C2                  TRUE
-#define STM32_I2C_BUSY_TIMEOUT              50
-#define STM32_I2C_I2C1_IRQ_PRIORITY         5
-#define STM32_I2C_I2C2_IRQ_PRIORITY         5
-#define STM32_I2C_I2C1_DMA_PRIORITY         3
-#define STM32_I2C_I2C2_DMA_PRIORITY         3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
-#define STM32_I2C_USE_DMA                   FALSE
-
-/*
- * ICU driver system settings.
- */
-#define STM32_ICU_USE_TIM1                  FALSE
-#define STM32_ICU_USE_TIM2                  FALSE
-#define STM32_ICU_USE_TIM3                  FALSE
-#define STM32_ICU_USE_TIM4                  FALSE
-#define STM32_ICU_USE_TIM5                  FALSE
-#define STM32_ICU_USE_TIM8                  FALSE
-#define STM32_ICU_TIM1_IRQ_PRIORITY         7
-#define STM32_ICU_TIM2_IRQ_PRIORITY         7
-#define STM32_ICU_TIM3_IRQ_PRIORITY         7
-#define STM32_ICU_TIM4_IRQ_PRIORITY         7
-#define STM32_ICU_TIM5_IRQ_PRIORITY         7
-#define STM32_ICU_TIM8_IRQ_PRIORITY         7
-
-/*
- * PWM driver system settings.
- */
-#define STM32_PWM_USE_ADVANCED              FALSE
-#define STM32_PWM_USE_TIM1                  FALSE
-#define STM32_PWM_USE_TIM2                  TRUE
-#define STM32_PWM_USE_TIM3                  FALSE
-#define STM32_PWM_USE_TIM4                  FALSE
-#define STM32_PWM_USE_TIM5                  FALSE
-#define STM32_PWM_USE_TIM8                  FALSE
-#define STM32_PWM_TIM1_IRQ_PRIORITY         7
-#define STM32_PWM_TIM2_IRQ_PRIORITY         7
-#define STM32_PWM_TIM3_IRQ_PRIORITY         7
-#define STM32_PWM_TIM4_IRQ_PRIORITY         7
-#define STM32_PWM_TIM5_IRQ_PRIORITY         7
-#define STM32_PWM_TIM8_IRQ_PRIORITY         7
-
-/*
- * RTC driver system settings.
- */
-#define STM32_RTC_IRQ_PRIORITY              15
-
-/*
- * SERIAL driver system settings.
- */
-#define STM32_SERIAL_USE_USART1             TRUE
-#define STM32_SERIAL_USE_USART2             FALSE
-#define STM32_SERIAL_USE_USART3             FALSE
-#define STM32_SERIAL_USE_UART4              FALSE
-#define STM32_SERIAL_USE_UART5              FALSE
-#define STM32_SERIAL_USART1_PRIORITY        12
-#define STM32_SERIAL_USART2_PRIORITY        12
-#define STM32_SERIAL_USART3_PRIORITY        12
-#define STM32_SERIAL_UART4_PRIORITY         12
-#define STM32_SERIAL_UART5_PRIORITY         12
-
-/*
- * SPI driver system settings.
- */
-#define STM32_SPI_USE_SPI1                  TRUE
-#define STM32_SPI_USE_SPI2                  FALSE
-#define STM32_SPI_USE_SPI3                  FALSE
-#define STM32_SPI_SPI1_DMA_PRIORITY         1
-#define STM32_SPI_SPI2_DMA_PRIORITY         1
-#define STM32_SPI_SPI3_DMA_PRIORITY         1
-#define STM32_SPI_SPI1_IRQ_PRIORITY         10
-#define STM32_SPI_SPI2_IRQ_PRIORITY         10
-#define STM32_SPI_SPI3_IRQ_PRIORITY         10
-#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
-
-/*
- * ST driver system settings.
- */
-#define STM32_ST_IRQ_PRIORITY               8
-#define STM32_ST_USE_TIMER                  5
-
-/*
- * UART driver system settings.
- */
-#define STM32_UART_USE_USART1               FALSE
-#define STM32_UART_USE_USART2               FALSE
-#define STM32_UART_USE_USART3               FALSE
-#define STM32_UART_USART1_IRQ_PRIORITY      12
-#define STM32_UART_USART2_IRQ_PRIORITY      12
-#define STM32_UART_USART3_IRQ_PRIORITY      12
-#define STM32_UART_USART1_DMA_PRIORITY      0
-#define STM32_UART_USART2_DMA_PRIORITY      0
-#define STM32_UART_USART3_DMA_PRIORITY      0
-#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
-
-/*
- * USB driver system settings.
- */
-#define STM32_USB_USE_USB1                  FALSE
-#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE
-#define STM32_USB_USB1_HP_IRQ_PRIORITY      13
-#define STM32_USB_USB1_LP_IRQ_PRIORITY      14
-
-/*
- * WDG driver system settings.
- */
-#define STM32_WDG_USE_IWDG                  FALSE
-
-/*
- * QEI driver system settings.
- */
-#define STM32_QEI_USE_TIM1                  FALSE
-#define STM32_QEI_USE_TIM2                  FALSE
-#define STM32_QEI_USE_TIM3                  TRUE
-#define STM32_QEI_USE_TIM4                  TRUE
-#define STM32_QEI_USE_TIM5                  FALSE
-#define STM32_QEI_USE_TIM8                  FALSE
-
-#endif /* _MCUCONF_H_ */
diff --git a/os/modules/DiWheelDrive_1-1/module.c b/os/modules/DiWheelDrive_1-1/module.c
deleted file mode 100644
index 989186d..0000000
--- a/os/modules/DiWheelDrive_1-1/module.c
+++ /dev/null
@@ -1,778 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#include "module.h"
-
-/*===========================================================================*/
-/**
- * @name Module specific functions
- * @{
- */
-/*===========================================================================*/
-#include <amiroos.h>
-
-/**
- * @brief   Interrupt service routine callback for I/O interrupt signals.
- *
- * @param   extp      EXT driver to handle the ISR.
- * @param   channel   Channel on which the interrupt was encountered.
- */
-static void _moduleIsrCallback(EXTDriver* extp, expchannel_t channel) {
-  (void)extp;
-
-  chSysLockFromISR();
-  chEvtBroadcastFlagsI(&aos.events.io.source, (1 << channel));
-  chSysUnlockFromISR();
-
-  return;
-}
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name ChibiOS/HAL configuration
- * @{
- */
-/*===========================================================================*/
-
-CANConfig moduleHalCanConfig = {
-  /* mcr  */ CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
-  /* btr  */ CAN_BTR_SJW(1) | CAN_BTR_TS2(2) | CAN_BTR_TS1(13) | CAN_BTR_BRP(1),
-};
-
-EXTConfig moduleHalExtConfig = {
-  /* channel configrations */ {
-    /* channel  0 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel  1 */ { // SYS_INT_N/SYS_SYNC_N: automatic interrupt on event
-      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel  2 */ { // SYS_WARMRST_N: automatic interrupt when activated
-      /* mode     */ EXT_MODE_GPIOD | EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel  3 */ { // PATH_DCSTAT: must be enabled explicitely when charging is in progress to detect unexpected voltage drop
-      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_FALLING_EDGE,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel  4 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel  5 */ { // COMPASS_DRDY: must be enabled explicitely
-      /* mode     */ EXT_MODE_GPIOB | APAL2CH_EDGE(HMC5883L_LLD_INT_EDGE),
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel  6 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel  7 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel  8 */ { // SYS_PD_N: automatic interrupt when activated
-      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel  9 */ { // SYS_REG_EN: automatic interrupt when activated
-      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel 10 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel 11 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel 12 */ { // IR_INT: must be enabled explicitely
-      /* mode     */ EXT_MODE_GPIOB | APAL2CH_EDGE(VCNL4020_LLD_INT_EDGE),
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel 13 */ { // GYRO_DRDY: must be enabled explicitely
-      /* mode     */ EXT_MODE_GPIOB | APAL2CH_EDGE(L3G4200D_LLD_INT_EDGE),
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel 14 */ { // SYS_UART_UP: automatic interrupt on event
-      /* mode     */ EXT_MODE_GPIOB | EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel 15 */ { // ACCEL_INT_N: must be enabled explicitely
-      /* mode     */ EXT_MODE_GPIOB | APAL2CH_EDGE(LIS331DLH_LLD_INT_EDGE),
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel 16 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel 17 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel 18 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-  },
-};
-
-I2CConfig moduleHalI2cCompassConfig = {
-  /* I²C mode   */ OPMODE_I2C,
-  /* frequency  */ 400000,
-  /* duty cycle */ FAST_DUTY_CYCLE_2,
-};
-
-I2CConfig moduleHalI2cProxEepromPwrmtrConfig = {
-  /* I²C mode   */ OPMODE_I2C,
-  /* frequency  */ 400000,
-  /* duty cycle */ FAST_DUTY_CYCLE_2,
-};
-
-PWMConfig moduleHalPwmDriveConfig = {
-  /* frequency              */ 7200000,
-  /* period                 */ 360,
-  /* callback               */ NULL,
-  /* channel configurations */ {
-    /* channel 0              */ {
-      /* mode                   */ PWM_OUTPUT_ACTIVE_HIGH,
-      /* callback               */ NULL
-    },
-    /* channel 1              */ {
-      /* mode                   */ PWM_OUTPUT_ACTIVE_HIGH,
-      /* callback               */ NULL
-    },
-    /* channel 2              */ {
-      /* mode                   */ PWM_OUTPUT_ACTIVE_HIGH,
-      /* callback               */ NULL
-    },
-    /* channel 3              */ {
-      /* mode                   */ PWM_OUTPUT_ACTIVE_HIGH,
-      /* callback               */ NULL
-    },
-  },
-  /* TIM CR2 register       */ 0,
-#if STM32_PWM_USE_ADVANCED
-  /* TIM BDTR register      */ 0,
-#endif
-  /* TIM DIER register      */ 0
-};
-
-QEIConfig moduleHalQeiConfig = {
-  /* mode           */ QEI_COUNT_BOTH,
-  /* channel config */ {
-    /* channel 0 */ {
-      /* input mode */ QEI_INPUT_NONINVERTED,
-    },
-    /* channel 1 */ {
-      /* input mode */ QEI_INPUT_NONINVERTED,
-    },
-  },
-  /* encoder range  */  0x10000u,
-};
-
-SerialConfig moduleHalProgIfConfig = {
-  /* bit rate */ 115200,
-  /* CR1      */ 0,
-  /* CR1      */ 0,
-  /* CR1      */ 0,
-};
-
-SPIConfig moduleHalSpiAccelerometerConfig = {
-  /* callback function pointer    */ NULL,
-  /* chip select line port        */ GPIOC,
-  /* chip select line pad number  */ GPIOC_ACCEL_SS_N,
-  /* CR1                          */ SPI_CR1_BR_0,
-  /* CR2                          */ SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN,
-};
-
-SPIConfig moduleHalSpiGyroscopeConfig = {
-  /* callback function pointer    */ NULL,
-  /* chip select line port        */ GPIOC,
-  /* chip select line pad number  */ GPIOC_GYRO_SS_N,
-  /* CR1                          */ SPI_CR1_BR_0,
-  /* CR2                          */ SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN,
-};
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name GPIO definitions
- * @{
- */
-/*===========================================================================*/
-
-apalGpio_t moduleGpioLed = {
-  /* port */ GPIOA,
-  /* pad  */ GPIOA_LED,
-};
-
-apalGpio_t moduleGpioPowerEn = {
-  /* port */GPIOB,
-  /* pad  */  GPIOB_POWER_EN,
-};
-
-apalGpio_t moduleGpioCompassDrdy = {
-  /* port */ GPIOB,
-  /* pad  */ GPIOB_COMPASS_DRDY,
-};
-
- apalGpio_t moduleGpioIrInt = {
-  /* port */ GPIOB,
-  /* pad  */ GPIOB_IR_INT,
-};
-
-apalGpio_t moduleGpioGyroDrdy = {
-  /* port */ GPIOB,
-  /* pad  */ GPIOB_GYRO_DRDY,
-};
-
-apalGpio_t moduleGpioSysUartUp = {
-  /* port */ GPIOB,
-  /* pad  */ GPIOB_SYS_UART_UP,
-};
-
-apalGpio_t moduleGpioAccelInt = {
-  /* port */ GPIOB,
-  /* pad  */ GPIOB_ACCEL_INT_N,
-};
-
-apalGpio_t moduleGpioSysSync = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_SYS_INT_N,
-};
-
-apalGpio_t moduleGpioPathDcStat = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_PATH_DCSTAT,
-};
-
-apalGpio_t moduleGpioPathDcEn = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_PATH_DCEN,
-};
-
-apalGpio_t moduleGpioSysPd = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_SYS_PD_N,
-};
-
-apalGpio_t moduleGpioSysRegEn = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_SYS_REG_EN,
-};
-
-apalGpio_t moduleGpioSysWarmrst = {
-  /* port */ GPIOD,
-  /* pad  */ GPIOD_SYS_WARMRST_N,
-};
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name AMiRo-OS core configurations
- * @{
- */
-/*===========================================================================*/
-
-apalControlGpio_t moduleSsspPd = {
-  /* GPIO */ &moduleGpioSysPd,
-  /* meta */ {
-    /* active state */ APAL_GPIO_ACTIVE_LOW,
-    /* edge         */ APAL_GPIO_EDGE_FALLING,
-    /* direction    */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
-  },
-};
-
-apalControlGpio_t moduleSsspSync = {
-  /* GPIO */ &moduleGpioSysSync,
-  /* meta */ {
-    /* active state */ APAL_GPIO_ACTIVE_LOW,
-    /* edge         */ APAL_GPIO_EDGE_FALLING,
-    /* direction    */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
-  },
-};
-
-const char* moduleShellPrompt = "DiWheelDrive";
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Low-level drivers
- * @{
- */
-/*===========================================================================*/
-
-A3906Driver moduleLldMotors = {
-  /* power enable GPIO  */ {
-    /* GPIO */& moduleGpioPowerEn,
-    /* meta */ {
-      /* active state */ APAL_GPIO_ACTIVE_HIGH,
-      /* edge         */ APAL_GPIO_EDGE_NONE,
-      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
-    },
-  },
-};
-
-AT24C01BNDriver moduleLldEeprom = {
-  /* I2C driver   */ &MODULE_HAL_I2C_PROX_EEPROM_PWRMTR,
-  /* I²C address  */ AT24C01BN_LLD_I2C_ADDR_FIXED,
-};
-
-HMC5883LDriver moduleLldCompass = {
-  /* I²C Driver */ &MODULE_HAL_I2C_COMPASS,
-};
-
-INA219Driver moduleLldPowerMonitorVdd = {
-  /* I2C Driver       */ &MODULE_HAL_I2C_PROX_EEPROM_PWRMTR,
-  /* I²C address      */ INA219_LLD_I2C_ADDR_FIXED,
-  /* current LSB (uA) */ 0x00u,
-  /* configuration    */ NULL,
-};
-
-L3G4200DDriver moduleLldGyroscope = {
-  /* SPI Driver */ &MODULE_HAL_SPI_MOTION,
-};
-
-LEDDriver moduleLldStatusLed = {
-  /* LED enable Gpio */ {
-    /* GPIO       */ &moduleGpioLed,
-    /* GPIO meta  */ {
-      /* active state */ APAL_GPIO_ACTIVE_LOW,
-      /* edge         */ APAL_GPIO_EDGE_NONE,
-      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
-    },
-  },
-};
-
-LIS331DLHDriver moduleLldAccelerometer = {
-  /* SPI Driver */ &MODULE_HAL_SPI_MOTION,
-};
-
-LTC4412Driver moduleLldPowerPathController = {
-  /* Control GPIO */ {
-    /* GPIO       */ &moduleGpioPathDcEn,
-    /* GPIO meta  */ {
-      /* active state */ APAL_GPIO_ACTIVE_HIGH,
-      /* edge         */ APAL_GPIO_EDGE_NONE,
-      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
-    },
-  },
-  /* Status GPIO */ {
-    /* GPIO       */ &moduleGpioPathDcStat,
-    /* GPIO meta  */ {
-      /* active state */ APAL_GPIO_ACTIVE_HIGH,
-      /* edge         */ APAL_GPIO_EDGE_NONE,
-      /* direction    */ APAL_GPIO_DIRECTION_INPUT,
-    },
-  },
-};
-
-PCA9544ADriver moduleLldI2cMultiplexer = {
-  /* I²C driver   */ &MODULE_HAL_I2C_PROX_EEPROM_PWRMTR,
-  /* I²C address  */ PCA9544A_LLD_I2C_ADDR_FIXED | PCA9544A_LLD_I2C_ADDR_A0 | PCA9544A_LLD_I2C_ADDR_A1 | PCA9544A_LLD_I2C_ADDR_A2,
-};
-
-TPS62113Driver moduleLldStepDownConverterVdrive = {
-  /* Power enable Gpio */ {
-    /* GPIO       */ &moduleGpioPowerEn,
-    /* GPIO meta  */ {
-      /* 'power on' state */ APAL_GPIO_ACTIVE_HIGH,
-      /* edge             */ APAL_GPIO_EDGE_NONE,
-      /* direction        */ APAL_GPIO_DIRECTION_OUTPUT,
-    },
-  },
-};
-
-VCNL4020Driver moduleLldProximity = {
-  /* I²C Driver */ &MODULE_HAL_I2C_PROX_EEPROM_PWRMTR,
-};
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Unit tests (UT)
- * @{
- */
-/*===========================================================================*/
-#if (AMIROOS_CFG_TESTS_ENABLE == true) || defined(__DOXYGEN__)
-#include <string.h>
-#include <chprintf.h>
-
-/* A3906 (motor driver) */
-static int _utShellCmdCb_AlldA3906(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  (void)argc;
-  (void)argv;
-  aosUtRun(stream, &moduleUtAlldA3906, NULL);
-  return AOS_OK;
-}
-static ut_a3906data_t _utA3906Data = {
-  /* driver           */ &moduleLldMotors,
-  /* PWM information  */ {
-    /* driver   */ &MODULE_HAL_PWM_DRIVE,
-    /* channels */ {
-      /* left wheel forward   */ MODULE_HAL_PWM_DRIVE_CHANNEL_LEFT_FORWARD,
-      /* left wheel backward  */ MODULE_HAL_PWM_DRIVE_CHANNEL_LEFT_BACKWARD,
-      /* right wheel forward  */ MODULE_HAL_PWM_DRIVE_CHANNEL_RIGHT_FORWARD,
-      /* right wheel backward */ MODULE_HAL_PWM_DRIVE_CHANNEL_RIGHT_BACKWARD,
-    },
-  },
-  /* QEI information  */ {
-    /* left wheel               */ &MODULE_HAL_QEI_LEFT_WHEEL,
-    /* right wheel              */ &MODULE_HAL_QEI_RIGHT_WHEEL,
-    /* increment per revolution */ MODULE_HAL_QEI_INCREMENTS_PER_REVOLUTION,
-  },
-  /* Wheel diameter   */ 0.05571f,
-  /* timeout          */ 10* MICROSECONDS_PER_SECOND,
-};
-aos_unittest_t moduleUtAlldA3906  = {
-  /* name           */ "A3906",
-  /* info           */ "motor driver",
-  /* test function  */ utAlldA3906Func,
-  /* shell command  */ {
-    /* name     */ "unittest:MotorDriver",
-    /* callback */ _utShellCmdCb_AlldA3906,
-    /* next     */ NULL,
-  },
-  /* data           */ &_utA3906Data,
-};
-
-/* AT24C01BN (EEPROM) */
-static int _utShellCmdCb_AlldAt24c01bn(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  (void)argc;
-  (void)argv;
-  aosUtRun(stream, &moduleUtAlldAt24c01bn, NULL);
-  return AOS_OK;
-}
-static ut_at24c01bndata_t _utAt24c01bnData = {
-  /* driver   */ &moduleLldEeprom,
-  /* timeout  */ MICROSECONDS_PER_SECOND,
-};
-aos_unittest_t moduleUtAlldAt24c01bn = {
-  /* name           */ "AT24C01BN-SH-B",
-  /* info           */ "1kbit EEPROM",
-  /* test function  */ utAlldAt24c01bnFunc,
-  /* shell command  */ {
-    /* name     */ "unittest:EEPROM",
-    /* callback */ _utShellCmdCb_AlldAt24c01bn,
-    /* next     */ NULL,
-  },
-  /* data           */ &_utAt24c01bnData,
-};
-
-/* HMC5883L (compass) */
-static int _utShellCmdCb_AlldHmc5883l(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  (void)argc;
-  (void)argv;
-  extChannelEnable(&MODULE_HAL_EXT, MODULE_GPIO_EXTCHANNEL_COMPASSDRDY);
-  aosUtRun(stream, &moduleUtAlldHmc5883l, NULL);
-  return AOS_OK;
-}
-static ut_hmc5883ldata_t _utHmc5883lData = {
-  /* HMC driver   */ &moduleLldCompass,
-  /* event source */ &aos.events.io.source,
-  /* event flags  */ (1 << MODULE_GPIO_EXTCHANNEL_COMPASSDRDY),
-  /* timeout      */ MICROSECONDS_PER_SECOND,
-};
-aos_unittest_t moduleUtAlldHmc5883l = {
-  /* name           */ "HMC5883L",
-  /* info           */ "compass",
-  /* test function  */ utAlldHmc5883lFunc,
-  /* shell command  */ {
-    /* name     */ "unittest:Compass",
-    /* callback */ _utShellCmdCb_AlldHmc5883l,
-    /* next     */ NULL,
-  },
-  /* data           */ &_utHmc5883lData,
-};
-
-/* INA219 (power monitor) */
-static int _utShellCmdCb_AlldIna219(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  (void)argc;
-  (void)argv;
-  aosUtRun(stream, &moduleUtAlldIna219, "VDD (3.3V)");
-  return AOS_OK;
-}
-static ut_ina219data_t _utIna219Data = {
-  /* driver           */ &moduleLldPowerMonitorVdd,
-  /* expected voltage */ 3.3f,
-  /* tolerance        */ 0.05f,
-  /* timeout */ MICROSECONDS_PER_SECOND,
-};
-aos_unittest_t moduleUtAlldIna219 = {
-  /* name           */ "INA219",
-  /* info           */ "power monitor",
-  /* test function  */ utAlldIna219Func,
-  /* shell command  */ {
-    /* name     */ "unittest:PowerMonitor",
-    /* callback */ _utShellCmdCb_AlldIna219,
-    /* next     */ NULL,
-  },
-  /* data           */ &_utIna219Data,
-};
-
-/* L3G4200D (gyroscope) */
-static int _utShellCmdCb_AlldL3g4200d(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  (void)argc;
-  (void)argv;
-  extChannelEnable(&MODULE_HAL_EXT, MODULE_GPIO_EXTCHANNEL_GYRODRDY);
-  spiStart(((ut_l3g4200ddata_t*)moduleUtAlldL3g4200d.data)->l3gd->spid, ((ut_l3g4200ddata_t*)moduleUtAlldL3g4200d.data)->spiconf);
-  aosUtRun(stream, &moduleUtAlldL3g4200d, NULL);
-  spiStop(((ut_l3g4200ddata_t*)moduleUtAlldL3g4200d.data)->l3gd->spid);
-  return AOS_OK;
-}
-static ut_l3g4200ddata_t _utL3g4200dData = {
-  /* driver            */ &moduleLldGyroscope,
-  /* SPI configuration */ &moduleHalSpiGyroscopeConfig,
-  /* event source */ &aos.events.io.source,
-  /* event flags  */ (1 << MODULE_GPIO_EXTCHANNEL_GYRODRDY),
-};
-aos_unittest_t moduleUtAlldL3g4200d = {
-  /* name           */ "L3G4200D",
-  /* info           */ "Gyroscope",
-  /* test function  */ utAlldL3g4200dFunc,
-  /* shell command  */ {
-    /* name     */ "unittest:Gyroscope",
-    /* callback */ _utShellCmdCb_AlldL3g4200d,
-    /* next     */ NULL,
-  },
-  /* data           */ &_utL3g4200dData,
-};
-
-/* Status LED */
-static int _utShellCmdCb_AlldLed(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  (void)argc;
-  (void)argv;
-  aosUtRun(stream, &moduleUtAlldLed, NULL);
-  return AOS_OK;
-}
-aos_unittest_t moduleUtAlldLed = {
-  /* name           */ "LED",
-  /* info           */ NULL,
-  /* test function  */ utAlldLedFunc,
-  /* shell command  */ {
-    /* name     */ "unittest:StatusLED",
-    /* callback */ _utShellCmdCb_AlldLed,
-    /* next     */ NULL,
-  },
-  /* data           */ &moduleLldStatusLed,
-};
-
-/* LIS331DLH (accelerometer) */
-static int _utShellCmdCb_AlldLis331dlh(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  (void)argc;
-  (void)argv;
-  extChannelEnable(&MODULE_HAL_EXT, MODULE_GPIO_EXTCHANNEL_ACCELINT);
-  spiStart(((ut_lis331dlhdata_t*)moduleUtAlldLis331dlh.data)->lisd->spid, ((ut_lis331dlhdata_t*)moduleUtAlldLis331dlh.data)->spiconf);
-  aosUtRun(stream, &moduleUtAlldLis331dlh, NULL);
-  spiStop(((ut_lis331dlhdata_t*)moduleUtAlldLis331dlh.data)->lisd->spid);
-  return AOS_OK;
-}
-static ut_lis331dlhdata_t _utLis331dlhData = {
-  /* driver            */ &moduleLldAccelerometer,
-  /* SPI configuration */ &moduleHalSpiAccelerometerConfig,
-  /* event source */ &aos.events.io.source,
-  /* event flags  */ (1 << MODULE_GPIO_EXTCHANNEL_ACCELINT),
-};
-aos_unittest_t moduleUtAlldLis331dlh = {
-  /* name           */ "LIS331DLH",
-  /* info           */ "Accelerometer",
-  /* test function  */ utAlldLis331dlhFunc,
-  /* shell command  */ {
-    /* name     */ "unittest:Accelerometer",
-    /* callback */ _utShellCmdCb_AlldLis331dlh,
-    /* next     */ NULL,
-  },
-  /* data           */ &_utLis331dlhData,
-};
-
-/* LTC4412 (power path controller) */
-static int _utShellCmdCb_AlldLtc4412(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  (void)argc;
-  (void)argv;
-  aosUtRun(stream, &moduleUtAlldLtc4412, NULL);
-  return AOS_OK;
-}
-aos_unittest_t moduleUtAlldLtc4412 = {
-  /* name           */ "LTC4412",
-  /* info           */ "Power path controller",
-  /* test function  */ utAlldLtc4412Func,
-  /* shell command  */ {
-    /* name     */ "unittest:PowerPathController",
-    /* callback */ _utShellCmdCb_AlldLtc4412,
-    /* next     */ NULL,
-  },
-  /* data           */ &moduleLldPowerPathController,
-};
-
-/* PCA9544A (I2C multiplexer) */
-static int _utShellCmdCb_AlldPca9544a(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  (void)argc;
-  (void)argv;
-  aosUtRun(stream, &moduleUtAlldPca9544a, NULL);
-  return AOS_OK;
-}
-static ut_pca9544adata_t _utPca9544aData = {
-  /* driver  */ &moduleLldI2cMultiplexer,
-  /* timeout */ MICROSECONDS_PER_SECOND,
-};
-aos_unittest_t moduleUtAlldPca9544a = {
-  /* name           */ "PCA9544A",
-  /* info           */ "I2C multiplexer",
-  /* test function  */ utAlldPca9544aFunc,
-  /* shell command  */ {
-    /* name     */ "unittest:I2CMultiplexer",
-    /* callback */ _utShellCmdCb_AlldPca9544a,
-    /* next     */ NULL,
-  },
-  /* data           */ &_utPca9544aData,
-};
-
-/* TPS62113 (step-down converter) */
-static int _utShellCmdCb_AlldTps62113(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  (void)argc;
-  (void)argv;
-  aosUtRun(stream, &moduleUtAlldTps62113, NULL);
-  return AOS_OK;
-}
-aos_unittest_t moduleUtAlldTps62113 = {
-  /* name           */ "TPS62113",
-  /* info           */ "Step down converter",
-  /* test function  */ utAlldTps62113Func,
-  /* shell command  */ {
-    /* name     */ "unittest:StepDownConverter",
-    /* callback */ _utShellCmdCb_AlldTps62113,
-    /* next     */ NULL,
-  },
-  /* data           */ &moduleLldStepDownConverterVdrive,
-};
-
-/* VCNL4020 (proximity sensor) */
-static void _utAlldVcnl4020_disableInterrupt(VCNL4020Driver* vcnl)
-{
-  uint8_t intstatus;
-  vcnl4020_lld_writereg(vcnl, VCNL4020_LLD_REGADDR_INTCTRL, 0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-  vcnl4020_lld_readreg(vcnl, VCNL4020_LLD_REGADDR_INTSTATUS, &intstatus, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-  if (intstatus) {
-    vcnl4020_lld_writereg(vcnl, VCNL4020_LLD_REGADDR_INTSTATUS, intstatus, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-  }
-  return;
-}
-static int _utShellCmdCb_AlldVcnl4020(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  enum {
-    UNKNOWN,
-    FL, FR, WL, WR,
-  } sensor = UNKNOWN;
-  // evaluate arguments
-  if (argc == 2) {
-    if (strcmp(argv[1], "--frontleft") == 0 || strcmp(argv[1], "-fl") == 0) {
-      sensor = FL;
-    } else if (strcmp(argv[1], "--frontright") == 0 || strcmp(argv[1], "-fr") == 0) {
-      sensor = FR;
-    } else if (strcmp(argv[1], "--wheelleft") == 0 || strcmp(argv[1], "-wl") == 0) {
-      sensor = WL;
-    } else if (strcmp(argv[1], "--wheelright") == 0 || strcmp(argv[1], "-wr") == 0) {
-      sensor = WR;
-    }
-  }
-  if (sensor != UNKNOWN) {
-    pca9544a_lld_setchannel(&moduleLldI2cMultiplexer, PCA9544A_LLD_CH0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
-    pca9544a_lld_setchannel(&moduleLldI2cMultiplexer, PCA9544A_LLD_CH1, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
-    pca9544a_lld_setchannel(&moduleLldI2cMultiplexer, PCA9544A_LLD_CH2, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
-    pca9544a_lld_setchannel(&moduleLldI2cMultiplexer, PCA9544A_LLD_CH3, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
-    extChannelEnable(&MODULE_HAL_EXT, MODULE_GPIO_EXTCHANNEL_IRINT);
-    switch (sensor) {
-      case FL:
-        pca9544a_lld_setchannel(&moduleLldI2cMultiplexer, PCA9544A_LLD_CH3, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-        aosUtRun(stream, &moduleUtAlldVcnl4020, "front left snesor");
-        break;
-      case FR:
-        pca9544a_lld_setchannel(&moduleLldI2cMultiplexer, PCA9544A_LLD_CH0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-        aosUtRun(stream, &moduleUtAlldVcnl4020, "front right sensor");
-        break;
-      case WL:
-        pca9544a_lld_setchannel(&moduleLldI2cMultiplexer, PCA9544A_LLD_CH2, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-        aosUtRun(stream, &moduleUtAlldVcnl4020, "left wheel sensor");
-        break;
-      case WR:
-        pca9544a_lld_setchannel(&moduleLldI2cMultiplexer, PCA9544A_LLD_CH1, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-        aosUtRun(stream, &moduleUtAlldVcnl4020, "right wheel sensor");
-        break;
-      default:
-        break;
-    }
-    return AOS_OK;
-  }
-  // print help
-  chprintf(stream, "Usage: %s OPTION\n", argv[0]);
-  chprintf(stream, "Options:\n");
-  chprintf(stream, "  --frontleft, -fl\n");
-  chprintf(stream, "    Test front left proximity sensor.\n");
-  chprintf(stream, "  --frontrigt, -fr\n");
-  chprintf(stream, "    Test front right proximity sensor.\n");
-  chprintf(stream, "  --wheelleft, -wl\n");
-  chprintf(stream, "    Test left wheel proximity sensor.\n");
-  chprintf(stream, "  --wheelright, -wr\n");
-  chprintf(stream, "    Test right wheel proximity sensor.\n");
-  return AOS_INVALID_ARGUMENTS;
-}
-static ut_vcnl4020data_t _utVcnl4020Data = {
-  /* driver       */ &moduleLldProximity,
-  /* timeout      */ MICROSECONDS_PER_SECOND,
-  /* event source */ &aos.events.io.source,
-  /* event flags  */ (1 << MODULE_GPIO_EXTCHANNEL_IRINT),
-};
-aos_unittest_t moduleUtAlldVcnl4020 = {
-  /* name           */ "VCNL4020",
-  /* info           */ "proximity sensor",
-  /* test function  */ utAlldVcnl4020Func,
-  /* shell command  */ {
-    /* name     */ "unittest:Proximity",
-    /* callback */ _utShellCmdCb_AlldVcnl4020,
-    /* next     */ NULL,
-  },
-  /* data           */ &_utVcnl4020Data,
-};
-
-#endif /* AMIROOS_CFG_TESTS_ENABLE == true */
-
-/** @} */
diff --git a/os/modules/DiWheelDrive_1-1/module.h b/os/modules/DiWheelDrive_1-1/module.h
deleted file mode 100644
index a4a0e7b..0000000
--- a/os/modules/DiWheelDrive_1-1/module.h
+++ /dev/null
@@ -1,587 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#ifndef _AMIROOS_MODULE_H_
-#define _AMIROOS_MODULE_H_
-
-/*===========================================================================*/
-/**
- * @name Module specific functions
- * @{
- */
-/*===========================================================================*/
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name ChibiOS/HAL configuration
- * @{
- */
-/*===========================================================================*/
-#include <hal.h>
-#include <hal_qei.h>
-
-/**
- * @brief   CAN driver to use.
- */
-#define MODULE_HAL_CAN                          CAND1
-
-/**
- * @brief   Configuration for the CAN driver.
- */
-extern CANConfig moduleHalCanConfig;
-
-/**
- * @brief   Interrupt driver to use.
- */
-#define MODULE_HAL_EXT                          EXTD1
-
-/**
- * @brief   Interrupt driver configuration.
- */
-extern EXTConfig moduleHalExtConfig;
-
-/**
- * @brief   I2C driver to access the compass.
- */
-#define MODULE_HAL_I2C_COMPASS                  I2CD1
-
-/**
- * @brief   Configuration for the compass I2C driver.
- */
-extern I2CConfig moduleHalI2cCompassConfig;
-
-/**
- * @brief   I2C driver to access multiplexer, proximity sensors, EEPROM and power monitor.
- */
-#define MODULE_HAL_I2C_PROX_EEPROM_PWRMTR       I2CD2
-
-/**
- * @brief   Configuration for the multiplexer, proximity, EEPROM and power monitor I2C driver.
- */
-extern I2CConfig moduleHalI2cProxEepromPwrmtrConfig;
-
-/**
- * @brief   PWM driver to use.
- */
-#define MODULE_HAL_PWM_DRIVE                    PWMD2
-
-/**
- * @brief   Configuration for the PWM driver.
- */
-extern PWMConfig moduleHalPwmDriveConfig;
-
-/**
- * @brief   Drive PWM channel for the left wheel forward direction.
- */
-#define MODULE_HAL_PWM_DRIVE_CHANNEL_LEFT_FORWARD     0
-
-/**
- * @brief   Drive PWM channel for the left wheel backward direction.
- */
-#define MODULE_HAL_PWM_DRIVE_CHANNEL_LEFT_BACKWARD    1
-
-/**
- * @brief   Drive PWM channel for the right wheel forward direction.
- */
-#define MODULE_HAL_PWM_DRIVE_CHANNEL_RIGHT_FORWARD    2
-
-/**
- * @brief   Drive PWM channel for the right wheel backward direction.
- */
-#define MODULE_HAL_PWM_DRIVE_CHANNEL_RIGHT_BACKWARD   3
-
-/**
- * @brief   Quadrature encooder for the left wheel.
- */
-#define MODULE_HAL_QEI_LEFT_WHEEL               QEID3
-
-/**
- * @brief   Quadrature encooder for the right wheel.
- */
-#define MODULE_HAL_QEI_RIGHT_WHEEL              QEID4
-
-/**
- * @brief   Configuration for both quadrature encoders.
- */
-extern QEIConfig moduleHalQeiConfig;
-
-/**
- * @brief   QEI increments per wheel revolution.
- * @details 2 signal edges per pulse * 2 signals * 16 pulses per motor revolution * 22:1 gearbox
- */
-#define MODULE_HAL_QEI_INCREMENTS_PER_REVOLUTION  (apalQEICount_t)(2 * 2 * 16 * 22)
-
-/**
- * @brief   Serial driver of the programmer interface.
- */
-#define MODULE_HAL_PROGIF                       SD1
-
-/**
- * @brief   Configuration for the programmer serial interface driver.
- */
-extern SerialConfig moduleHalProgIfConfig;
-
-/**
- * @brief   SPI interface driver for the motion sensors (gyroscope and accelerometer).
- */
-#define MODULE_HAL_SPI_MOTION                   SPID1
-
-/**
- * @brief   Configuration for the motion sensor SPI interface  driver to communicate with the accelerometer.
- */
-extern SPIConfig moduleHalSpiAccelerometerConfig;
-
-/**
- * @brief   Configuration for the motion sensor SPI interface  driver to communicate with the gyroscope.
- */
-extern SPIConfig moduleHalSpiGyroscopeConfig;
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name GPIO definitions
- * @{
- */
-/*===========================================================================*/
-#include <amiro-lld.h>
-
-/**
- * @brief   Interrupt channel for the SYS_SYNC signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_SYSSYNC          ((expchannel_t)1)
-
-/**
- * @brief   Interrupt channel for the SYS_WARMRST signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_SYSWARMRST       ((expchannel_t)2)
-
-/**
- * @brief   Interrupt channel for the PATH_DCSTAT signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_PATHDCSTAT       ((expchannel_t)3)
-
-/**
- * @brief   Interrupt channel for the COMPASS_DRDY signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_COMPASSDRDY      ((expchannel_t)5)
-
-/**
- * @brief   Interrupt channel for the SYS_PD signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_SYSPD            ((expchannel_t)7)
-
-/**
- * @brief   Interrupt channel for the SYS_REG_EN signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_SYSREGEN         ((expchannel_t)8)
-
-/**
- * @brief   Interrupt channel for the IR_INT signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_IRINT            ((expchannel_t)12)
-
-/**
- * @brief   Interrupt channel for the GYRO_DRDY signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_GYRODRDY         ((expchannel_t)13)
-
-/**
- * @brief   Interrupt channel for the SYS_UART_UP signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_SYSUARTUP        ((expchannel_t)14)
-
-/**
- * @brief   Interrupt channel for the ACCEL_INT signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_ACCELINT         ((expchannel_t)15)
-
-/**
- * @brief   LED output signal GPIO.
- */
-extern apalGpio_t moduleGpioLed;
-
-/**
- * @brief   POWER_EN output signal GPIO.
- */
-extern apalGpio_t moduleGpioPowerEn;
-
-/**
- * @brief   COMPASS_DRDY input signal GPIO.
- */
-extern apalGpio_t moduleGpioCompassDrdy;
-
-/**
- * @brief   IR_INT input signal GPIO.
- */
-extern apalGpio_t moduleGpioIrInt;
-
-/**
- * @brief   GYRO_DRDY input signal GPIO.
- */
-extern apalGpio_t moduleGpioGyroDrdy;
-
-/**
- * @brief   SYS_UART_UP bidirectional signal GPIO.
- */
-extern apalGpio_t moduleGpioSysUartUp;
-
-/**
- * @brief   ACCEL_INT input signal GPIO.
- */
-extern apalGpio_t moduleGpioAccelInt;
-
-/**
- * @brief   SYS_SNYC bidirectional signal GPIO.
- */
-extern apalGpio_t moduleGpioSysSync;
-
-/**
- * @brief   PATH_DCSTAT input signal GPIO.
- */
-extern apalGpio_t moduleGpioPathDcStat;
-
-/**
- * @brief   PATH_DCEN output signal GPIO.
- */
-extern apalGpio_t moduleGpioPathDcEn;
-
-/**
- * @brief   SYS_PD bidirectional signal GPIO.
- */
-extern apalGpio_t moduleGpioSysPd;
-
-/**
- * @brief   SYS_REG_EN input signal GPIO.
- */
-extern apalGpio_t moduleGpioSysRegEn;
-
-/**
- * @brief   SYS_WARMRST bidirectional signal GPIO.
- */
-extern apalGpio_t moduleGpioSysWarmrst;
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name AMiRo-OS core configurations
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Event flag to be set on a SYS_SYNC interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_SYSSYNC          ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_SYSSYNC))
-
-/**
- * @brief   Event flag to be set on a SYS_WARMRST interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_SYSWARMRST       ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_SYSWARMRST))
-
-/**
- * @brief   Event flag to be set on a PATH_DCSTAT interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_PATHDCSTAT       ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_PATHDCSTAT))
-
-/**
- * @brief   Event flag to be set on a COMPASS_DRDY interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_COMPASSDRDY      ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_COMPASSDRDY))
-
-/**
- * @brief   Event flag to be set on a SYS_PD interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_SYSPD            ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_SYSPD))
-
-/**
- * @brief   Event flag to be set on a SYS_REG_EN interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_SYSREGEN         ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_SYSREGEN))
-
-/**
- * @brief   Event flag to be set on a IR_INT interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_IRINT            ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_IRINT))
-
-/**
- * @brief   Event flag to be set on a GYRO_DRDY interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_GYRODRDY         ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_GYRODRDY))
-
-/**
- * @brief   Event flag to be set on a SYS_UART_UP interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_SYSUARTUP        ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_SYSUARTUP))
-
-/**
- * @brief   Event flag to be set on a ACCEL_INT interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_ACCELINT         ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_ACCELINT))
-
-/**
- * @brief   PD signal for SSSP.
- */
-extern apalControlGpio_t moduleSsspPd;
-
-/**
- * @brief   SYNC signal for SSSP.
- */
-extern apalControlGpio_t moduleSsspSync;
-
-/**
- * @brief   Shell prompt text.
- */
-extern const char* moduleShellPrompt;
-
-/**
- * @brief   Additional HAL initialization hook.
- */
-#define MODULE_INIT_HAL_EXTRA() {                                             \
-  qeiInit();                                                                  \
-}
-
-/**
- * @brief   Unit test initialization hook.
- */
-#define MODULE_INIT_TESTS() {                                                 \
-  /* add unit-test shell commands */                                          \
-  aosShellAddCommand(aos.shell, &moduleUtAlldA3906.shellcmd);                 \
-  aosShellAddCommand(aos.shell, &moduleUtAlldAt24c01bn.shellcmd);             \
-  aosShellAddCommand(aos.shell, &moduleUtAlldHmc5883l.shellcmd);              \
-  aosShellAddCommand(aos.shell, &moduleUtAlldIna219.shellcmd);                \
-  aosShellAddCommand(aos.shell, &moduleUtAlldL3g4200d.shellcmd);              \
-  aosShellAddCommand(aos.shell, &moduleUtAlldLed.shellcmd);                   \
-  aosShellAddCommand(aos.shell, &moduleUtAlldLis331dlh.shellcmd);             \
-  aosShellAddCommand(aos.shell, &moduleUtAlldLtc4412.shellcmd);               \
-  aosShellAddCommand(aos.shell, &moduleUtAlldPca9544a.shellcmd);              \
-  aosShellAddCommand(aos.shell, &moduleUtAlldTps62113.shellcmd);              \
-  aosShellAddCommand(aos.shell, &moduleUtAlldVcnl4020.shellcmd);              \
-}
-
-/**
- * @brief   Periphery communication interfaces initialization hook.
- */
-#define MODULE_INIT_PERIPHERY_COMM() {                                        \
-  /* serial driver */                                                         \
-  sdStart(&MODULE_HAL_PROGIF, &moduleHalProgIfConfig);                        \
-  /* I2C */                                                                   \
-  moduleHalI2cCompassConfig.clock_speed = (HMC5883L_LLD_I2C_MAXFREQUENCY < moduleHalI2cCompassConfig.clock_speed) ? HMC5883L_LLD_I2C_MAXFREQUENCY : moduleHalI2cCompassConfig.clock_speed;  \
-  moduleHalI2cCompassConfig.duty_cycle = (moduleHalI2cCompassConfig.clock_speed <= 100000) ? STD_DUTY_CYCLE : FAST_DUTY_CYCLE_2;  \
-  i2cStart(&MODULE_HAL_I2C_COMPASS, &moduleHalI2cCompassConfig);              \
-  moduleHalI2cProxEepromPwrmtrConfig.clock_speed = (PCA9544A_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxEepromPwrmtrConfig.clock_speed) ? PCA9544A_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxEepromPwrmtrConfig.clock_speed; \
-  moduleHalI2cProxEepromPwrmtrConfig.clock_speed = (VCNL4020_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxEepromPwrmtrConfig.clock_speed) ? VCNL4020_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxEepromPwrmtrConfig.clock_speed; \
-  moduleHalI2cProxEepromPwrmtrConfig.clock_speed = (AT24C01BN_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxEepromPwrmtrConfig.clock_speed) ? AT24C01BN_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxEepromPwrmtrConfig.clock_speed; \
-  moduleHalI2cProxEepromPwrmtrConfig.clock_speed = (INA219_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxEepromPwrmtrConfig.clock_speed) ? INA219_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxEepromPwrmtrConfig.clock_speed; \
-  moduleHalI2cProxEepromPwrmtrConfig.duty_cycle = (moduleHalI2cProxEepromPwrmtrConfig.clock_speed <= 100000) ? STD_DUTY_CYCLE : FAST_DUTY_CYCLE_2;  \
-  i2cStart(&MODULE_HAL_I2C_PROX_EEPROM_PWRMTR, &moduleHalI2cProxEepromPwrmtrConfig);  \
-  /* SPI is shared between accelerometer and gyroscope and needs to be restarted for each transmission */ \
-  /* PWM */                                                                   \
-  pwmStart(&MODULE_HAL_PWM_DRIVE, &moduleHalPwmDriveConfig);                  \
-  /* QEI */                                                                   \
-  qeiStart(&MODULE_HAL_QEI_LEFT_WHEEL, &moduleHalQeiConfig);                  \
-  qeiStart(&MODULE_HAL_QEI_RIGHT_WHEEL, &moduleHalQeiConfig);                 \
-  qeiEnable(&MODULE_HAL_QEI_LEFT_WHEEL);                                      \
-  qeiEnable(&MODULE_HAL_QEI_RIGHT_WHEEL);                                     \
-}
-
-/**
- * @brief   Hook to handle IO events during SSSP startup synchronization.
- */
-#define MODULE_SSP_STARTUP_OUTRO_IO_EVENT(mask, flags) {                      \
-  /* ignore all events */                                                     \
-  (void)mask;                                                                 \
-  (void)flags;                                                                \
-}
-
-/**
- * @brief   Periphery communication interface deinitialization hook.
- */
-#define MODULE_SHUTDOWN_PERIPHERY_COMM() {                                    \
-  /* PWM */                                                                   \
-  pwmStop(&MODULE_HAL_PWM_DRIVE);                                             \
-  /* QEI */                                                                   \
-  qeiDisable(&MODULE_HAL_QEI_LEFT_WHEEL);                                     \
-  qeiDisable(&MODULE_HAL_QEI_RIGHT_WHEEL);                                    \
-  qeiStop(&MODULE_HAL_QEI_LEFT_WHEEL);                                        \
-  qeiStop(&MODULE_HAL_QEI_RIGHT_WHEEL);                                       \
-  /* I2C */                                                                   \
-  i2cStop(&MODULE_HAL_I2C_COMPASS);                                           \
-  i2cStop(&MODULE_HAL_I2C_PROX_EEPROM_PWRMTR);                                \
-  /* don't stop the serial driver so messages can still be printed */         \
-}
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Low-level drivers
- * @{
- */
-/*===========================================================================*/
-#include <alld_a3906.h>
-#include <alld_at24c01bn-sh-b.h>
-#include <alld_hmc5883l.h>
-#include <alld_ina219.h>
-#include <alld_l3g4200d.h>
-#include <alld_led.h>
-#include <alld_lis331dlh.h>
-#include <alld_ltc4412.h>
-#include <alld_pca9544a.h>
-#include <alld_tps62113.h>
-#include <alld_vcnl4020.h>
-
-/**
- * @brief   Motor driver.
- */
-extern A3906Driver moduleLldMotors;
-
-/**
- * @brief   EEPROM driver.
- */
-extern AT24C01BNDriver moduleLldEeprom;
-
-/**
- * @brief   Compass driver.
- */
-extern HMC5883LDriver moduleLldCompass;
-
-/**
- * @brief   Power monitor (VDD) driver.
- */
-extern INA219Driver moduleLldPowerMonitorVdd;
-
-/**
- * @brief   Gyroscope driver.
- */
-extern L3G4200DDriver moduleLldGyroscope;
-
-/**
- * @brief   Status LED driver.
- */
-extern LEDDriver moduleLldStatusLed;
-
-/**
- * @brief   Accelerometer driver.
- */
-extern LIS331DLHDriver moduleLldAccelerometer;
-
-/**
- * @brief   Power path controler (charging pins) driver.
- */
-extern LTC4412Driver moduleLldPowerPathController;
-
-/**
- * @brief   I2C multiplexer driver.
- */
-extern PCA9544ADriver moduleLldI2cMultiplexer;
-
-/**
- * @brief   Step down converter (VDRIVE) driver.
- */
-extern TPS62113Driver moduleLldStepDownConverterVdrive;
-
-/**
- * @brief   Proximity sensor driver.
- */
-extern VCNL4020Driver moduleLldProximity;
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Unit tests (UT)
- * @{
- */
-/*===========================================================================*/
-#if (AMIROOS_CFG_TESTS_ENABLE == true) || defined(__DOXYGEN__)
-#include <ut_alld_a3906.h>
-#include <ut_alld_at24c01bn-sh-b.h>
-#include <ut_alld_hmc5883l.h>
-#include <ut_alld_ina219.h>
-#include <ut_alld_l3g4200d.h>
-#include <ut_alld_led.h>
-#include <ut_alld_lis331dlh.h>
-#include <ut_alld_ltc4412.h>
-#include <ut_alld_pca9544a.h>
-#include <ut_alld_tps62113.h>
-#include <ut_alld_vcnl4020.h>
-
-/**
- * @brief   A3906 (motor driver) unit test object.
- */
-extern aos_unittest_t moduleUtAlldA3906;
-
-/**
- * @brief   AT24C01BN-SH-B (EEPROM) unit test object.
- */
-extern aos_unittest_t moduleUtAlldAt24c01bn;
-
-/**
- * @brief   HMC5883L (compass) unit test object.
- */
-extern aos_unittest_t moduleUtAlldHmc5883l;
-
-/**
- * @brief   INA219 (power monitor) unit test object.
- */
-extern aos_unittest_t moduleUtAlldIna219;
-
-/**
- * @brief   L3G4200D (gyroscope) unit test object.
- */
-extern aos_unittest_t moduleUtAlldL3g4200d;
-
-/**
- * @brief   Status LED unit test object.
- */
-extern aos_unittest_t moduleUtAlldLed;
-
-/**
- * @brief   LIS331DLH (accelerometer) unit test object.
- */
-extern aos_unittest_t moduleUtAlldLis331dlh;
-
-/**
- * @brief   LTC4412 (power path controller) unit test object.
- */
-extern aos_unittest_t moduleUtAlldLtc4412;
-
-/**
- * @brief   PCA9544A (I2C multiplexer) unit test object.
- */
-extern aos_unittest_t moduleUtAlldPca9544a;
-
-/**
- * @brief   TPS62113 (step-down converter) unit test object.
- */
-extern aos_unittest_t moduleUtAlldTps62113;
-
-/**
- * @brief   VCNL4020 (proximity sensor) unit test object.
- */
-extern aos_unittest_t moduleUtAlldVcnl4020;
-
-#endif /* AMIROOS_CFG_TESTS_ENABLE == true */
-
-/** @} */
-
-#endif /* _AMIROOS_MODULE_H_ */
diff --git a/os/modules/LightRing_1-0/Makefile b/os/modules/LightRing_1-0/Makefile
deleted file mode 100644
index f178bf0..0000000
--- a/os/modules/LightRing_1-0/Makefile
+++ /dev/null
@@ -1,303 +0,0 @@
-################################################################################
-# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
-# (AMiRo) platform.                                                            #
-# Copyright (C) 2016..2018  Thomas Schöpping et al.                            #
-#                                                                              #
-# This program is free software: you can redistribute it and/or modify         #
-# it under the terms of the GNU General Public License as published by         #
-# the Free Software Foundation, either version 3 of the License, or            #
-# (at your option) any later version.                                          #
-#                                                                              #
-# This program is distributed in the hope that it will be useful,              #
-# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
-# GNU General Public License for more details.                                 #
-#                                                                              #
-# You should have received a copy of the GNU General Public License            #
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
-#                                                                              #
-# This research/work was supported by the Cluster of Excellence Cognitive      #
-# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
-# funded by the German Research Foundation (DFG).                              #
-################################################################################
-
-
-
-################################################################################
-# Build global options                                                         #
-# NOTE: Can be overridden externally.                                          #
-#                                                                              #
-
-# Compiler options here.
-ifeq ($(USE_OPT),)
-  USE_OPT = -O2 -fomit-frame-pointer -falign-functions=16 -fstack-usage
-endif
-
-# C specific options here (added to USE_OPT).
-ifeq ($(USE_COPT),)
-  USE_COPT = -std=c11
-endif
-
-# C++ specific options here (added to USE_OPT).
-ifeq ($(USE_CPPOPT),)
-  USE_CPPOPT = -fno-rtti -std=c++17
-endif
-
-# Enable this if you want the linker to remove unused code and data
-ifeq ($(USE_LINK_GC),)
-  USE_LINK_GC = yes
-endif
-
-# Linker extra options here.
-ifeq ($(USE_LDOPT),)
-  USE_LDOPT =
-endif
-
-# Enable this if you want link time optimizations (LTO)
-ifeq ($(USE_LTO),)
-  USE_LTO = yes
-endif
-
-# If enabled, this option allows to compile the application in THUMB mode.
-ifeq ($(USE_THUMB),)
-  USE_THUMB = yes
-endif
-
-# Enable this if you want to see the full log while compiling.
-ifeq ($(USE_VERBOSE_COMPILE),)
-  USE_VERBOSE_COMPILE = no
-endif
-
-# If enabled, this option makes the build process faster by not compiling
-# modules not used in the current configuration.
-ifeq ($(USE_SMART_BUILD),)
-  USE_SMART_BUILD = no
-endif
-
-#                                                                              #
-# Build global options                                                         #
-################################################################################
-
-################################################################################
-# Architecture or project specific options                                     #
-#                                                                              #
-
-# Stack size to be allocated to the Cortex-M process stack. This stack is
-# the stack used by the main() thread.
-ifeq ($(USE_PROCESS_STACKSIZE),)
-  USE_PROCESS_STACKSIZE = 0x400
-endif
-
-# Stack size to the allocated to the Cortex-M main/exceptions stack. This
-# stack is used for processing interrupts and exceptions.
-ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
-  USE_EXCEPTIONS_STACKSIZE = 0x400
-endif
-
-# Enables the use of FPU on Cortex-M4.
-# Possible selections are:
-#   no     - no FPU is used (probably equals 'soft')
-#   soft   - does not use the FPU, thus all floating point operations are emulated
-#   softfp - uses the FPU, but uses the integer registers only
-#   hard   - uses the FPU and passes data via the FPU registers
-ifeq ($(USE_FPU),)
-  USE_FPU = no
-endif
-
-#                                                                              #
-# Architecture or project specific options                                     #
-################################################################################
-
-################################################################################
-# Project, sources and paths                                                   #
-#                                                                              #
-
-# Define project name here
-PROJECT := $(patsubst $(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))..)/%,%,$(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))))
-
-# Imported source files and paths
-include ../../../kernel/kernel.mk
-CHIBIOS := $(AMIROOS_KERNEL)
-AMIROOS = ../..
-# Startup files
-include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f1xx.mk
-# HAL-OSAL files
-include $(CHIBIOS)/os/hal/hal.mk
-include $(AMIROOS)/hal/hal.mk
-include $(CHIBIOS)/os/hal/ports/STM32/STM32F1xx/platform.mk
-include $(AMIROOS)/hal/ports/STM32/platform.mk
-include ./board.mk
-include $(CHIBIOS)/os/hal/osal/rt/osal.mk
-# RTOS files
-include $(CHIBIOS)/os/rt/rt.mk
-include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
-# Other files (optional).
-include $(CHIBIOS)/test/rt/test.mk
-# AMiRo-BLT files
-include ../../../bootloader/bootloader.mk
-# AMiRo-LLD files
-include ../../../periphery-lld/periphery-lld.mk
-# AMiRo-OS files
-include $(AMIROOS)/modules/modules.mk
-include $(AMIROOS)/core/core.mk
-include $(AMIROOS)/unittests/unittests.mk
-
-# Define linker script file here
-LDSCRIPT= $(BOARDLD)/STM32F103xE.ld
-
-# C sources that can be compiled in ARM or THUMB mode depending on the global
-# setting.
-CSRC = $(STARTUPSRC) \
-       $(KERNSRC) \
-       $(PORTSRC) \
-       $(OSALSRC) \
-       $(HALSRC) \
-       $(PLATFORMSRC) \
-       $(BOARDSRC) \
-       $(MODULESCSRC) \
-       $(TESTSRC) \
-       $(PERIPHERYLLDCSRC) \
-       $(AMIROOSCORECSRC) \
-       $(UNITTESTSCSRC) \
-       $(CHIBIOS)/os/various/evtimer.c \
-       $(CHIBIOS)/os/various/syscalls.c \
-       $(CHIBIOS)/os/hal/lib/streams/chprintf.c \
-       module.c \
-       $(APPSCSRC)
-
-# C++ sources that can be compiled in ARM or THUMB mode depending on the global
-# setting.
-CPPSRC = $(AMIROOSCORECPPSRC) \
-         $(APPSCPPSRC)
-
-# C sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-ACSRC = $(APPSACSRC)
-
-# C++ sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-ACPPSRC = $(APPSACPPSRC)
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-TCSRC = $(APPSTCSRC)
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-TCPPSRC = $(APPSTCPPSRC)
-
-# List ASM source files here
-ASMSRC = $(APPSASMSRC)
-ASMXSRC = $(STARTUPASM) \
-          $(PORTASM) \
-          $(OSALASM) \
-          $(APPSASMXSRC)
-
-INCDIR = $(CHIBIOS)/os/license \
-         $(STARTUPINC) \
-         $(KERNINC) \
-         $(PORTINC) \
-         $(OSALINC) \
-         $(HALINC) \
-         $(PLATFORMINC) \
-         $(BOARDINC) \
-         $(MODULESINC) \
-         $(TESTINC) \
-         $(BOOTLOADERINC) \
-         $(CHIBIOS)/os/hal/lib/streams \
-         $(CHIBIOS)/os/various \
-         $(PERIPHERYLLDINC) \
-         $(AMIROOS) \
-         $(AMIROOSCOREINC) \
-         $(UNITTESTSINC) \
-         $(APPSINC)
-
-#                                                                              #
-# Project, sources and paths                                                   #
-################################################################################
-
-################################################################################
-# Compiler settings                                                            #
-# NOTE: Some can be overridden externally.                                     #
-#                                                                              #
-
-MCU  = cortex-m3
-
-#TRGT = arm-elf-
-TRGT = arm-none-eabi-
-CC   = $(TRGT)gcc
-CPPC = $(TRGT)g++
-# Enable loading with g++ only if you need C++ runtime support.
-# NOTE: You can use C++ even without C++ support if you are careful. C++
-#       runtime support makes code size explode.
-LD   = $(TRGT)gcc
-#LD   = $(TRGT)g++
-CP   = $(TRGT)objcopy
-AS   = $(TRGT)gcc -x assembler-with-cpp
-AR   = $(TRGT)ar
-OD   = $(TRGT)objdump
-SZ   = $(TRGT)size
-HEX  = $(CP) -O ihex
-BIN  = $(CP) -O binary
-SREC = $(CP) -O srec --srec-len=248
-
-# ARM-specific options here
-ifeq ($(AOPT),)
-  AOPT =
-endif
-
-# THUMB-specific options here
-ifeq ($(TOPT),)
-  TOPT = -mthumb -DTHUMB
-endif
-
-# Define C warning options here
-ifeq ($(CWARN),)
-  CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
-endif
-
-# Define C++ warning options here
-ifeq ($(CPPWARN),)
-  CPPWARN = -Wall -Wextra -Wundef
-endif
-
-#                                                                              #
-# Compiler settings                                                            #
-################################################################################
-
-################################################################################
-# Start of user section                                                        #
-#                                                                              #
-
-# List all user C define here, like -D_DEBUG=1
-UDEFS +=
-
-# Define ASM defines here
-UADEFS +=
-
-# List all user directories here
-UINCDIR +=
-
-# List the user directory to look for the libraries here
-ULIBDIR +=
-
-# List all user libraries here
-ULIBS +=
-
-#                                                                              #
-# End of user defines                                                          #
-################################################################################
-
-# allow for custom build directory
-ifneq ($(BUILDDIR),)
-  BUILDDIR := $(BUILDDIR)/$(PROJECT)
-endif
-
-RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
-include $(RULESPATH)/rules.mk
-
-include $(AMIROOS)/modules/flash.mk
diff --git a/os/modules/LightRing_1-0/alldconf.h b/os/modules/LightRing_1-0/alldconf.h
deleted file mode 100644
index d3445af..0000000
--- a/os/modules/LightRing_1-0/alldconf.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#ifndef _ALLDCONF_H_
-#define _ALLDCONF_H_
-
-/*
- * compatibility guards
- */
-#define _AMIRO_LLD_CFG_
-#define AMIRO_LLD_CFG_VERSION_MAJOR         1
-#define AMIRO_LLD_CFG_VERSION_MINOR         0
-
-/**
- * @brief   Enable flag for the AT24C01BN-SH-B EEPROM.
- */
-#define AMIROLLD_CFG_USE_AT24C01BN
-
-/**
- * @brief   Enable flag for the TLC5947 LED driver.
- */
-#define AMIROLLD_CFG_USE_TLC5947
-
-/**
- * @brief   Enable flag for the TPS2051BDBV power switch.
- */
-#define AMIROLLD_CFG_USE_TPS2051BDBV
-
-#endif /* _ALLDCONF_H_ */
diff --git a/os/modules/LightRing_1-0/aosconf.h b/os/modules/LightRing_1-0/aosconf.h
deleted file mode 100644
index 1685b67..0000000
--- a/os/modules/LightRing_1-0/aosconf.h
+++ /dev/null
@@ -1,161 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#ifndef _AOSCONF_H_
-#define _AOSCONF_H_
-
-/*
- * compatibility guards
- */
-#define _AMIRO_OS_CFG_
-#define _AMIRO_OS_CFG_VERSION_MAJOR_            2
-#define _AMIRO_OS_CFG_VERSION_MINOR_            0
-
-#include <stdbool.h>
-
-/*===========================================================================*/
-/**
- * @name Kernel parameters and options
- * @{
- */
-/*===========================================================================*/
-
-/*
- * Include an external configuration file to override the following default settings only if required.
- */
-#if defined(AMIRO_APPS) && (AMIRO_APPS == true)
-  #include <osconf.h>
-#endif
-
-/**
- * @brief   Flag to set the module as SSSP master.
- */
-#if !defined(OS_CFG_SSSP_MASTER)
-  #define AMIROOS_CFG_SSSP_MASTER               false
-#else
-  #define AMIROOS_CFG_SSSP_MASTER               OS_CFG_SSSP_MASTER
-#endif
-
-/**
- * @brief   Time boundary for robot wide clock synchronization in microseconds.
- * @details Whenever the SSSP S (snychronization) signal gets logically deactivated,
- *          All modules need to align their local uptime to the nearest multiple of this value.
- */
-#if !defined(OS_CFG_SSSP_SYSSYNCPERIOD)
-  #define AMIROOS_CFG_SSSP_SYSSYNCPERIOD        1000000
-#else
-  #define AMIROOS_CFG_SSSP_SYSSYNCPERIOD        OS_CFG_SSSP_SYSSYNCPERIOD
-#endif
-
-/**
- * @brief   Flag to enable/disable debug API.
- */
-#if !defined(OS_CFG_DBG)
-  #define AMIROOS_CFG_DBG                       true
-#else
-  #define AMIROOS_CFG_DBG                       OS_CFG_DBG
-#endif
-
-/**
- * @brief   Flag to enable/disable unit tests.
- */
-#if !defined(OS_CFG_TESTS_ENABLE)
-  #define AMIROOS_CFG_TESTS_ENABLE              true
-#else
-  #define AMIROOS_CFG_TESTS_ENABLE              OS_CFG_TESTS_ENABLE
-#endif
-
-/**
- * @brief   Flag to enable/disable profiling API.
- */
-#if !defined(OS_CFG_PROFILE)
-  #define AMIROOS_CFG_PROFILE                   true
-#else
-  #define AMIROOS_CFG_PROFILE                   OS_CFG_PROFILE
-#endif
-
-/**
- * @brief   Timeout value when waiting for events in the main loop in microseconds.
- * @details A value of 0 deactivates the timeout.
- */
-#if !defined(OS_CFG_MAIN_LOOP_TIMEOUT)
-  #define AMIROOS_CFG_MAIN_LOOP_TIMEOUT         0
-#else
-  #define AMIROOS_CFG_MAIN_LOOP_TIMEOUT         OS_CFG_MAIN_LOOP_TIMEOUT
-#endif
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name System shell options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Shell enable flag.
- */
-#if (AMIROOS_CFG_TESTS_ENABLE == false) && !defined(OS_CFG_SHELL_ENABLE)
-  #define AMIROOS_CFG_SHELL_ENABLE              true
-#elif (AMIROOS_CFG_TESTS_ENABLE == true)
-  #define AMIROOS_CFG_SHELL_ENABLE              true
-#else
-  #define AMIROOS_CFG_SHELL_ENABLE              OS_CFG_SHELL_ENABLE
-#endif
-
-/**
- * @brief   Shell thread stack size.
- */
-#if !defined(OS_CFG_SHELL_STACKSIZE)
-  #define AMIROOS_CFG_SHELL_STACKSIZE           1024
-#else
-  #define AMIROOS_CFG_SHELL_STACKSIZE           OS_CFG_SHELL_STACKSIZE
-#endif
-
-/**
- * @brief   Shell thread priority.
- */
-#if !defined(OS_CFG_SHELL_THREADPRIO)
-  #define AMIROOS_CFG_SHELL_THREADPRIO          THD_NORMALPRIO_MIN
-#else
-  #define AMIROOS_CFG_SHELL_THREADPRIO          OS_CFG_SHELL_THREADPRIO
-#endif
-
-/**
- * @brief   Shell maximum input line length.
- */
-#if !defined(OS_CFG_SHELL_LINEWIDTH)
-  #define AMIROOS_CFG_SHELL_LINEWIDTH           64
-#else
-  #define AMIROOS_CFG_SHELL_LINEWIDTH           OS_CFG_SHELL_LINEWIDTH
-#endif
-
-/**
- * @brief   Shell maximum number of arguments.
- */
-#if !defined(OS_CFG_SHELL_MAXARGS)
-  #define AMIROOS_CFG_SHELL_MAXARGS             4
-#else
-  #define AMIROOS_CFG_SHELL_MAXARGS             OS_CFG_SHELL_MAXARGS
-#endif
-
-/** @} */
-
-#endif /* _AOSCONF_H_ */
-
diff --git a/os/modules/LightRing_1-0/board.c b/os/modules/LightRing_1-0/board.c
deleted file mode 100644
index 1880ef6..0000000
--- a/os/modules/LightRing_1-0/board.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#include <hal.h>
-
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-/**
- * @brief   PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- *          This variable is used by the HAL when initializing the PAL driver.
- */
-const PALConfig pal_default_config = {
-#if STM32_HAS_GPIOA
-  {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
-#endif
-#if STM32_HAS_GPIOB
-  {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
-#endif
-#if STM32_HAS_GPIOC
-  {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
-#endif
-#if STM32_HAS_GPIOD
-  {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
-#endif
-#if STM32_HAS_GPIOE
-  {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
-#endif
-#if STM32_HAS_GPIOF
-  {VAL_GPIOFODR, VAL_GPIOFCRL, VAL_GPIOFCRH},
-#endif
-#if STM32_HAS_GPIOG
-  {VAL_GPIOGODR, VAL_GPIOGCRL, VAL_GPIOGCRH},
-#endif
-};
-#endif
-
-/**
- * @brief   Early initialization code.
- * @details This initialization must be performed just after stack setup
- *          and before any other initialization.
- */
-void __early_init(void) {
-
-  stm32_clock_init();
-}
-
-/**
- * @brief   Board-specific initialization code.
- * @todo    Add your board-specific code, if any.
- */
-void boardInit(void) {
-  /*
-   * Several I/O pins are re-mapped:
-   *   JTAG disabled and SWD enabled
-   */
-  AFIO->MAPR = AFIO_MAPR_SWJ_CFG_JTAGDISABLE |
-               AFIO_MAPR_USART3_REMAP_PARTIALREMAP;
-}
diff --git a/os/modules/LightRing_1-0/board.h b/os/modules/LightRing_1-0/board.h
deleted file mode 100644
index df514ca..0000000
--- a/os/modules/LightRing_1-0/board.h
+++ /dev/null
@@ -1,613 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for AMiRo LightRing v1.0 board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_LIGHTRING
-#define BOARD_NAME              "AMiRo LightRing"
-#define BOARD_VERSION           "1.0"
-
-/*
- * Board oscillators-related settings.
- * NOTE: LSE not fitted.
- */
-#if !defined(STM32_LSECLK)
-#define STM32_LSECLK                0U
-#endif
-
-#if !defined(STM32_HSECLK)
-#define STM32_HSECLK                8000000U
-#endif
-
-/*
- * Board voltages.
- * Required for performance limits calculation.
- */
-#define STM32_VDD                   330U
-
-/*
- * MCU type as defined in the ST header.
- */
-#define STM32F103xE
-
-/*
- * IO pins assignments.
- */
-#define GPIOA_PIN0                  0U
-#define GPIOA_PIN1                  1U
-#define GPIOA_LASER_RX              2U
-#define GPIOA_LASER_TX              3U
-#define GPIOA_LIGHT_BLANK           4U
-#define GPIOA_LIGHT_SCLK            5U
-#define GPIOA_PIN6                  6U
-#define GPIOA_LIGHT_MOSI            7U
-#define GPIOA_PIN8                  8U
-#define GPIOA_PROG_RX               9U
-#define GPIOA_PROG_TX               10U
-#define GPIOA_CAN_RX                11U
-#define GPIOA_CAN_TX                12U
-#define GPIOA_SWDIO                 13U
-#define GPIOA_SWCLK                 14U
-#define GPIOA_PIN15                 15U
-
-#define GPIOB_PIN0                  0U
-#define GPIOB_PIN1                  1U
-#define GPIOB_LASER_EN              2U
-#define GPIOB_PIN3                  3U
-#define GPIOB_PIN4                  4U
-#define GPIOB_LASER_OC_N            5U
-#define GPIOB_SYS_UART_DN           6U
-#define GPIOB_PIN7                  7U
-#define GPIOB_WL_GDO2               8U
-#define GPIOB_WL_GDO0               9U
-#define GPIOB_MEM_SCL               10U
-#define GPIOB_MEM_SDA               11U
-#define GPIOB_WL_SS_N               12U
-#define GPIOB_WL_SCLK               13U
-#define GPIOB_WL_MISO               14U
-#define GPIOB_WL_MOSI               15U
-
-#define GPIOC_PIN0                  0U
-#define GPIOC_PIN1                  1U
-#define GPIOC_PIN2                  2U
-#define GPIOC_PIN3                  3U
-#define GPIOC_LIGHT_XLAT            4U
-#define GPIOC_PIN5                  5U
-#define GPIOC_PIN6                  6U
-#define GPIOC_PIN7                  7U
-#define GPIOC_PIN8                  8U
-#define GPIOC_PIN9                  9U
-#define GPIOC_SYS_UART_RX           10U
-#define GPIOC_SYS_UART_TX           11U
-#define GPIOC_PIN12                 12U
-#define GPIOC_PIN13                 13U
-#define GPIOC_SYS_PD_N              14U
-#define GPIOC_PIN15                 15U
-
-#define GPIOD_OSC_IN                0U
-#define GPIOD_OSC_OUT               1U
-#define GPIOD_SYS_INT_N             2U
-#define GPIOD_PIN3                  3U
-#define GPIOD_PIN4                  4U
-#define GPIOD_PIN5                  5U
-#define GPIOD_PIN6                  6U
-#define GPIOD_PIN7                  7U
-#define GPIOD_PIN8                  8U
-#define GPIOD_PIN9                  9U
-#define GPIOD_PIN10                 10U
-#define GPIOD_PIN11                 11U
-#define GPIOD_PIN12                 12U
-#define GPIOD_PIN13                 13U
-#define GPIOD_PIN14                 14U
-#define GPIOD_PIN15                 15U
-
-#define GPIOE_PIN0                  0U
-#define GPIOE_PIN1                  1U
-#define GPIOE_PIN2                  2U
-#define GPIOE_PIN3                  3U
-#define GPIOE_PIN4                  4U
-#define GPIOE_PIN5                  5U
-#define GPIOE_PIN6                  6U
-#define GPIOE_PIN7                  7U
-#define GPIOE_PIN8                  8U
-#define GPIOE_PIN9                  9U
-#define GPIOE_PIN10                 10U
-#define GPIOE_PIN11                 11U
-#define GPIOE_PIN12                 12U
-#define GPIOE_PIN13                 13U
-#define GPIOE_PIN14                 14U
-#define GPIOE_PIN15                 15U
-
-#define GPIOF_PIN0                  0U
-#define GPIOF_PIN1                  1U
-#define GPIOF_PIN2                  2U
-#define GPIOF_PIN3                  3U
-#define GPIOF_PIN4                  4U
-#define GPIOF_PIN5                  5U
-#define GPIOF_PIN6                  6U
-#define GPIOF_PIN7                  7U
-#define GPIOF_PIN8                  8U
-#define GPIOF_PIN9                  9U
-#define GPIOF_PIN10                 10U
-#define GPIOF_PIN11                 11U
-#define GPIOF_PIN12                 12U
-#define GPIOF_PIN13                 13U
-#define GPIOF_PIN14                 14U
-#define GPIOF_PIN15                 15U
-
-#define GPIOG_PIN0                  0U
-#define GPIOG_PIN1                  1U
-#define GPIOG_PIN2                  2U
-#define GPIOG_PIN3                  3U
-#define GPIOG_PIN4                  4U
-#define GPIOG_PIN5                  5U
-#define GPIOG_PIN6                  6U
-#define GPIOG_PIN7                  7U
-#define GPIOG_PIN8                  8U
-#define GPIOG_PIN9                  9U
-#define GPIOG_PIN10                 10U
-#define GPIOG_PIN11                 11U
-#define GPIOG_PIN12                 12U
-#define GPIOG_PIN13                 13U
-#define GPIOG_PIN14                 14U
-#define GPIOG_PIN15                 15U
-
-/*
- * IO lines assignments.
- */
-#define LINE_LASER_RX               PAL_LINE(GPIOA, GPIOA_LASER_RX)
-#define LINE_LASER_TX               PAL_LINE(GPIOA, GPIOA_LASER_TX)
-#define LINE_LIGHT_BLANK            PAL_LINE(GPIOA, GPIOA_LIGHT_BLANK)
-#define LINE_LIGHT_SCLK             PAL_LINE(GPIOA, GPIOA_LIGHT_SCLK)
-#define LINE_LIGHT_MOSI             PAL_LINE(GPIOA, GPIOA_LIGHT_MOSI)
-#define LINE_PROG_RX                PAL_LINE(GPIOA, GPIOA_PROG_RX)
-#define LINE_PROG_TX                PAL_LINE(GPIOA, GPIOA_PROG_TX)
-#define LINE_CAN_RX                 PAL_LINE(GPIOA, GPIOA_CAN_RX)
-#define LINE_CAN_TX                 PAL_LINE(GPIOA, GPIOA_CAN_TX)
-#define LINE_SWDIO                  PAL_LINE(GPIOA, GPIOA_SWDIO)
-#define LINE_SWCLK                  PAL_LINE(GPIOA, GPIOA_SWCLK)
-
-#define LINE_LASER_EN               PAL_LINE(GPIOB, GPIOB_LASER_EN)
-#define LINE_LASER_OC_N             PAL_LINE(GPIOB, GPIOB_LASER_OC_N)
-#define LINE_SYS_UART_DN            PAL_LINE(GPIOB, GPIOB_SYS_UART_DN)
-#define LINE_WL_GDO2                PAL_LINE(GPIOB, GPIOB_WL_GDO2)
-#define LINE_WL_GDO0                PAL_LINE(GPIOB, GPIOB_WL_GDO0)
-#define LINE_MEM_SCL                PAL_LINE(GPIOB, GPIOB_MEM_SCL)
-#define LINE_MEM_SDA                PAL_LINE(GPIOB, GPIOB_MEM_SDA)
-#define LINE_WL_SS_N                PAL_LINE(GPIOB, GPIOB_WL_SS_N)
-#define LINE_WL_SCLK                PAL_LINE(GPIOB, GPIOB_WL_SCLK)
-#define LINE_WL_MISO                PAL_LINE(GPIOB, GPIOB_WL_MISO)
-#define LINE_WL_MOSI                PAL_LINE(GPIOB, GPIOB_WL_MOSI)
-
-#define LINE_LIGHT_XLAT             PAL_LINE(GPIOC, GPIOC_LIGHT_XLAT)
-#define LINE_SYS_UART_RX            PAL_LINE(GPIOC, GPIOC_SYS_UART_RX)
-#define LINE_SYS_UART_TX            PAL_LINE(GPIOC, GPIOC_SYS_UART_TX)
-#define LINE_SYS_PD_N               PAL_LINE(GPIOC, GPIOC_SYS_PD_N)
-
-#define LINE_SYS_INT_N              PAL_LINE(GPIOD, GPIOD_SYS_INT_N)
-
-/*
- * I/O ports initial setup, this configuration is established soon after reset
- * in the initialization code.
- * Please refer to the STM32 Reference Manual for details.
- */
-#define PIN_MODE_INPUT              0U
-#define PIN_MODE_OUTPUT_2M          2U
-#define PIN_MODE_OUTPUT_10M         1U
-#define PIN_MODE_OUTPUT_50M         3U
-#define PIN_CNF_INPUT_ANALOG        0U
-#define PIN_CNF_INPUT_FLOATING      1U
-#define PIN_CNF_INPUT_PULLX         2U
-#define PIN_CNF_OUTPUT_PUSHPULL     0U
-#define PIN_CNF_OUTPUT_OPENDRAIN    1U
-#define PIN_CNF_ALTERNATE_PUSHPULL  2U
-#define PIN_CNF_ALTERNATE_OPENDRAIN 3U
-#define PIN_CR(pin, mode, cnf)      (((mode) | ((cnf) << 2U)) << (((pin) % 8U) * 4U))
-#define PIN_ODR_LOW(n)              (0U << (n))
-#define PIN_ODR_HIGH(n)             (1U << (n))
-
-/*
- * GPIOA setup:
- *
- * PA0  - PIN0                      (input floating)
- * PA1  - PIN1                      (input floating)
- * PA2  - LASER_RX                  (alternate pushpull high 50MHz)
- * PA3  - LASER_TX                  (input pullup)
- * PA4  - LIGHT_BLANK               (output pushpull high 50MHz)
- * PA5  - LIGHT_SCLK                (alternate pushpull 50MHz)
- * PA6  - PIN6                      (input foating)
- * PA7  - LIGHT_MOSI                (alternate pushpull 50MHz)
- * PA8  - PIN8                      (input floating)
- * PA9  - PROG_RX                   (alternate pushpull 50MHz)
- * PA10 - PROG_TX                   (input pullup)
- * PA11 - CAN_RX                    (input floating)
- * PA12 - CAN_TX                    (alternate pushpull 50MHz)
- * PA13 - SWDIO                     (input pullup)
- * PA14 - SWCLK                     (input pullup)
- * PA15 - PIN15                     (input floating)
- */
-#define VAL_GPIOACRL                (PIN_CR(GPIOA_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOA_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOA_LASER_RX, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |   \
-                                     PIN_CR(GPIOA_LASER_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |               \
-                                     PIN_CR(GPIOA_LIGHT_BLANK, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |   \
-                                     PIN_CR(GPIOA_LIGHT_SCLK, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) | \
-                                     PIN_CR(GPIOA_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOA_LIGHT_MOSI, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL))
-#define VAL_GPIOACRH                (PIN_CR(GPIOA_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOA_PROG_RX, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |    \
-                                     PIN_CR(GPIOA_PROG_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                \
-                                     PIN_CR(GPIOA_CAN_RX, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |              \
-                                     PIN_CR(GPIOA_CAN_TX, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |     \
-                                     PIN_CR(GPIOA_SWDIO, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                  \
-                                     PIN_CR(GPIOA_SWCLK, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                  \
-                                     PIN_CR(GPIOA_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIOAODR                (PIN_ODR_LOW(GPIOA_PIN0) |                                                   \
-                                     PIN_ODR_LOW(GPIOA_PIN1) |                                                   \
-                                     PIN_ODR_HIGH(GPIOA_LASER_RX) |                                              \
-                                     PIN_ODR_HIGH(GPIOA_LASER_TX) |                                              \
-                                     PIN_ODR_HIGH(GPIOA_LIGHT_BLANK) |                                           \
-                                     PIN_ODR_HIGH(GPIOA_LIGHT_SCLK) |                                            \
-                                     PIN_ODR_LOW(GPIOA_PIN6) |                                                   \
-                                     PIN_ODR_HIGH(GPIOA_LIGHT_MOSI) |                                            \
-                                     PIN_ODR_LOW(GPIOA_PIN8) |                                                   \
-                                     PIN_ODR_HIGH(GPIOA_PROG_RX) |                                               \
-                                     PIN_ODR_HIGH(GPIOA_PROG_TX) |                                               \
-                                     PIN_ODR_HIGH(GPIOA_CAN_RX) |                                                \
-                                     PIN_ODR_HIGH(GPIOA_CAN_TX) |                                                \
-                                     PIN_ODR_HIGH(GPIOA_SWDIO) |                                                 \
-                                     PIN_ODR_HIGH(GPIOA_SWCLK) |                                                 \
-                                     PIN_ODR_LOW(GPIOA_PIN15))
-
-/*
- * GPIOB setup:
- *
- * PB0  - PIN0                      (input floating)
- * PB1  - PIN1                      (input floating)
- * PB2  - LASER_EN                  (output pushpull low 50MHz)
- * PB3  - PIN3                      (input floating)
- * PB4  - PIN4                      (input floating)
- * PB5  - LASER_OC_N                (input floating)
- * PB6  - SYS_UART_DN               (output opendrain high 50MHz)
- * PB7  - PIN7                      (input foating)
- * PB8  - WL_GDO2                   (input pullup)
- * PB9  - WL_GDO0                   (input pullup)
- * PB10 - MEM_SCL                   (alternate opendrain 50MHz)
- * PB11 - MEM_SDA                   (alternate opendrain 50MHz)
- * PB12 - WL_SS_N                   (output pushpull high 50MHz)
- * PB13 - WL_SCLK                   (alternate pushpull 50MHz)
- * PB14 - WL_MISO                   (input pullup)
- * PB15 - WL_MOSI                   (alternate pushpull 50MHz)
- */
-#define VAL_GPIOBCRL                (PIN_CR(GPIOB_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOB_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOB_LASER_EN, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |      \
-                                     PIN_CR(GPIOB_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOB_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOB_LASER_OC_N, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |          \
-                                     PIN_CR(GPIOB_SYS_UART_DN, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |  \
-                                     PIN_CR(GPIOB_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIOBCRH                (PIN_CR(GPIOB_WL_GDO2, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                \
-                                     PIN_CR(GPIOB_WL_GDO0, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                \
-                                     PIN_CR(GPIOB_MEM_SCL, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) |   \
-                                     PIN_CR(GPIOB_MEM_SDA, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_OPENDRAIN) |   \
-                                     PIN_CR(GPIOB_WL_SS_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_PUSHPULL) |       \
-                                     PIN_CR(GPIOB_WL_SCLK, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL) |    \
-                                     PIN_CR(GPIOB_WL_MISO, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |                \
-                                     PIN_CR(GPIOB_WL_MOSI, PIN_MODE_OUTPUT_50M, PIN_CNF_ALTERNATE_PUSHPULL))
-#define VAL_GPIOBODR                (PIN_ODR_LOW(GPIOB_PIN0) |                                                   \
-                                     PIN_ODR_LOW(GPIOB_PIN1) |                                                   \
-                                     PIN_ODR_LOW(GPIOB_LASER_EN) |                                               \
-                                     PIN_ODR_LOW(GPIOB_PIN3) |                                                   \
-                                     PIN_ODR_LOW(GPIOB_PIN4) |                                                   \
-                                     PIN_ODR_HIGH(GPIOB_LASER_OC_N) |                                            \
-                                     PIN_ODR_HIGH(GPIOB_SYS_UART_DN) |                                           \
-                                     PIN_ODR_LOW(GPIOB_PIN7) |                                                   \
-                                     PIN_ODR_HIGH(GPIOB_WL_GDO2) |                                               \
-                                     PIN_ODR_HIGH(GPIOB_WL_GDO0) |                                               \
-                                     PIN_ODR_HIGH(GPIOB_MEM_SCL) |                                               \
-                                     PIN_ODR_HIGH(GPIOB_MEM_SDA) |                                               \
-                                     PIN_ODR_HIGH(GPIOB_WL_SS_N) |                                               \
-                                     PIN_ODR_HIGH(GPIOB_WL_SCLK) |                                               \
-                                     PIN_ODR_HIGH(GPIOB_WL_MISO) |                                               \
-                                     PIN_ODR_HIGH(GPIOB_WL_MOSI))
-
-/*
- * GPIOC setup:
- *
- * PC0  - PIN0                      (input floating)
- * PC1  - PIN1                      (input floating)
- * PC2  - PIN2                      (input floating)
- * PC3  - PIN3                      (input floating)
- * PC4  - LIGHT_XLAT                (output pushpull high 10MHz)
- * PC5  - PIN5                      (input floating)
- * PC6  - PIN6                      (input floating)
- * PC7  - PIN7                      (input floating)
- * PC8  - PIN8                      (input floating)
- * PC9  - PIN9                      (input floating)
- * PC10 - SYS_UART_RX               (input pullup)
- * PC11 - SYS_UART_TX               (input pullup)
- * PC12 - PIN12                     (input floating)
- * PC13 - PIN13                     (input floating)
- * PC14 - SYS_PD_N                  (output opendrain high 50MHz)
- * PC15 - PIN15                     (input floating)
- */
-#define VAL_GPIOCCRL                (PIN_CR(GPIOC_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOC_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOC_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOC_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOC_LIGHT_XLAT, PIN_MODE_OUTPUT_10M, PIN_CNF_OUTPUT_PUSHPULL) |    \
-                                     PIN_CR(GPIOC_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOC_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOC_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIOCCRH                (PIN_CR(GPIOC_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOC_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOC_SYS_UART_RX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |            \
-                                     PIN_CR(GPIOC_SYS_UART_TX, PIN_MODE_INPUT, PIN_CNF_INPUT_PULLX) |            \
-                                     PIN_CR(GPIOC_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
-                                     PIN_CR(GPIOC_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
-                                     PIN_CR(GPIOC_SYS_PD_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |     \
-                                     PIN_CR(GPIOC_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIOCODR                (PIN_ODR_LOW(GPIOC_PIN0) |                                                   \
-                                     PIN_ODR_LOW(GPIOC_PIN1) |                                                   \
-                                     PIN_ODR_LOW(GPIOC_PIN2) |                                                   \
-                                     PIN_ODR_LOW(GPIOC_PIN3) |                                                   \
-                                     PIN_ODR_LOW(GPIOC_LIGHT_XLAT) |                                             \
-                                     PIN_ODR_LOW(GPIOC_PIN5) |                                                   \
-                                     PIN_ODR_LOW(GPIOC_PIN6) |                                                   \
-                                     PIN_ODR_LOW(GPIOC_PIN7) |                                                   \
-                                     PIN_ODR_LOW(GPIOC_PIN8) |                                                   \
-                                     PIN_ODR_LOW(GPIOC_PIN9) |                                                   \
-                                     PIN_ODR_HIGH(GPIOC_SYS_UART_RX) |                                           \
-                                     PIN_ODR_HIGH(GPIOC_SYS_UART_TX) |                                           \
-                                     PIN_ODR_LOW(GPIOC_PIN12) |                                                  \
-                                     PIN_ODR_LOW(GPIOC_PIN13) |                                                  \
-                                     PIN_ODR_HIGH(GPIOC_SYS_PD_N) |                                              \
-                                     PIN_ODR_LOW(GPIOC_PIN15))
-
-/*
- * GPIOD setup:
- *
- * PD0  - OSC_IN                    (input floating)
- * PD1  - OSC_OUT                   (input floating)
- * PD2  - SYS_INT_N                 (output opendrain low 50MHz)
- * PD3  - PIN3                      (input floating)
- * PD4  - PIN4                      (input floating)
- * PD5  - PIN5                      (input floating)
- * PD6  - PIN6                      (input floating)
- * PD7  - PIN7                      (input floating)
- * PD8  - PIN8                      (input floating)
- * PD9  - PIN9                      (input floating)
- * PD10 - PIN10                     (input floating)
- * PD11 - PIN11                     (input floating)
- * PD12 - PIN12                     (input floating)
- * PD13 - PIN13                     (input floating)
- * PD14 - PIN14                     (input floating)
- * PD15 - PIN15                     (input floating)
- */
-#define VAL_GPIODCRL                (PIN_CR(GPIOD_OSC_IN, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |              \
-                                     PIN_CR(GPIOD_OSC_OUT, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |             \
-                                     PIN_CR(GPIOD_SYS_INT_N, PIN_MODE_OUTPUT_50M, PIN_CNF_OUTPUT_OPENDRAIN) |    \
-                                     PIN_CR(GPIOD_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOD_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOD_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOD_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOD_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIODCRH                (PIN_CR(GPIOD_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOD_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                \
-                                     PIN_CR(GPIOD_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
-                                     PIN_CR(GPIOD_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
-                                     PIN_CR(GPIOD_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
-                                     PIN_CR(GPIOD_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
-                                     PIN_CR(GPIOD_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |               \
-                                     PIN_CR(GPIOD_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIODODR                (PIN_ODR_HIGH(GPIOD_OSC_IN) |                                                \
-                                     PIN_ODR_HIGH(GPIOD_OSC_OUT) |                                               \
-                                     PIN_ODR_LOW(GPIOD_SYS_INT_N) |                                             \
-                                     PIN_ODR_LOW(GPIOD_PIN3) |                                                   \
-                                     PIN_ODR_LOW(GPIOD_PIN4) |                                                   \
-                                     PIN_ODR_LOW(GPIOD_PIN5) |                                                   \
-                                     PIN_ODR_LOW(GPIOD_PIN6) |                                                   \
-                                     PIN_ODR_LOW(GPIOD_PIN7) |                                                   \
-                                     PIN_ODR_LOW(GPIOD_PIN8) |                                                   \
-                                     PIN_ODR_LOW(GPIOD_PIN9) |                                                   \
-                                     PIN_ODR_LOW(GPIOD_PIN10) |                                                  \
-                                     PIN_ODR_LOW(GPIOD_PIN11) |                                                  \
-                                     PIN_ODR_LOW(GPIOD_PIN12) |                                                  \
-                                     PIN_ODR_LOW(GPIOD_PIN13) |                                                  \
-                                     PIN_ODR_LOW(GPIOD_PIN14) |                                                  \
-                                     PIN_ODR_LOW(GPIOD_PIN15))
-
-/*
- * GPIOE setup:
- *
- * PE0  - PIN0                      (input floating)
- * PE1  - PIN1                      (input floating)
- * PE2  - PIN2                      (input floating)
- * PE3  - PIN3                      (input floating)
- * PE4  - PIN4                      (input floating)
- * PE5  - PIN5                      (input floating)
- * PE6  - PIN6                      (input floating)
- * PE7  - PIN7                      (input floating)
- * PE8  - PIN8                      (input floating)
- * PE9  - PIN9                      (input floating)
- * PE10 - PIN10                     (input floating)
- * PE11 - PIN11                     (input floating)
- * PE12 - PIN12                     (input floating)
- * PE13 - PIN13                     (input floating)
- * PE14 - PIN14                     (input floating)
- * PE15 - PIN15                     (input floating)
- */
-#define VAL_GPIOECRL                (PIN_CR(GPIOE_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOE_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOE_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOE_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOE_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOE_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOE_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOE_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIOECRH                (PIN_CR(GPIOE_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOE_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOE_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOE_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOE_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOE_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOE_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOE_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIOEODR                (PIN_ODR_LOW(GPIOE_PIN0) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN1) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN2) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN3) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN4) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN5) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN6) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN7) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN8) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN9) |                                                     \
-                                     PIN_ODR_LOW(GPIOE_PIN10) |                                                    \
-                                     PIN_ODR_LOW(GPIOE_PIN11) |                                                    \
-                                     PIN_ODR_LOW(GPIOE_PIN12) |                                                    \
-                                     PIN_ODR_LOW(GPIOE_PIN13) |                                                    \
-                                     PIN_ODR_LOW(GPIOE_PIN14) |                                                    \
-                                     PIN_ODR_LOW(GPIOE_PIN15))
-
-/*
- * GPIOF setup:
- *
- * PF0  - PIN0                      (input floating)
- * PF1  - PIN1                      (input floating)
- * PF2  - PIN2                      (input floating)
- * PF3  - PIN3                      (input floating)
- * PF4  - PIN4                      (input floating)
- * PF5  - PIN5                      (input floating)
- * PF6  - PIN6                      (input floating)
- * PF7  - PIN7                      (input floating)
- * PF8  - PIN8                      (input floating)
- * PF9  - PIN9                      (input floating)
- * PF10 - PIN10                     (input floating)
- * PF11 - PIN11                     (input floating)
- * PF12 - PIN12                     (input floating)
- * PF13 - PIN13                     (input floating)
- * PF14 - PIN14                     (input floating)
- * PF15 - PIN15                     (input floating)
- */
-#define VAL_GPIOFCRL                (PIN_CR(GPIOF_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOF_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOF_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOF_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOF_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOF_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOF_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOF_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIOFCRH                (PIN_CR(GPIOF_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOF_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOF_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOF_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOF_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOF_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOF_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOF_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIOFODR                (PIN_ODR_LOW(GPIOF_PIN0) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN1) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN2) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN3) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN4) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN5) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN6) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN7) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN8) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN9) |                                                     \
-                                     PIN_ODR_LOW(GPIOF_PIN10) |                                                    \
-                                     PIN_ODR_LOW(GPIOF_PIN11) |                                                    \
-                                     PIN_ODR_LOW(GPIOF_PIN12) |                                                    \
-                                     PIN_ODR_LOW(GPIOF_PIN13) |                                                    \
-                                     PIN_ODR_LOW(GPIOF_PIN14) |                                                    \
-                                     PIN_ODR_LOW(GPIOF_PIN15))
-
-/*
- * GPIOG setup:
- *
- * PG0  - PIN0                      (input floating)
- * PG1  - PIN1                      (input floating)
- * PG2  - PIN2                      (input floating)
- * PG3  - PIN3                      (input floating)
- * PG4  - PIN4                      (input floating)
- * PG5  - PIN5                      (input floating)
- * PG6  - PIN6                      (input floating)
- * PG7  - PIN7                      (input floating)
- * PG8  - PIN8                      (input floating)
- * PG9  - PIN9                      (input floating)
- * PG10 - PIN10                     (input floating)
- * PG11 - PIN11                     (input floating)
- * PG12 - PIN12                     (input floating)
- * PG13 - PIN13                     (input floating)
- * PG14 - PIN14                     (input floating)
- * PG15 - PIN15                     (input floating)
- */
-#define VAL_GPIOGCRL                (PIN_CR(GPIOG_PIN0, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOG_PIN1, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOG_PIN2, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOG_PIN3, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOG_PIN4, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOG_PIN5, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOG_PIN6, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOG_PIN7, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIOGCRH                (PIN_CR(GPIOG_PIN8, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOG_PIN9, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                  \
-                                     PIN_CR(GPIOG_PIN10, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOG_PIN11, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOG_PIN12, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOG_PIN13, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOG_PIN14, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING) |                 \
-                                     PIN_CR(GPIOG_PIN15, PIN_MODE_INPUT, PIN_CNF_INPUT_FLOATING))
-#define VAL_GPIOGODR                (PIN_ODR_LOW(GPIOG_PIN0) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN1) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN2) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN3) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN4) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN5) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN6) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN7) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN8) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN9) |                                                     \
-                                     PIN_ODR_LOW(GPIOG_PIN10) |                                                    \
-                                     PIN_ODR_LOW(GPIOG_PIN11) |                                                    \
-                                     PIN_ODR_LOW(GPIOG_PIN12) |                                                    \
-                                     PIN_ODR_LOW(GPIOG_PIN13) |                                                    \
-                                     PIN_ODR_LOW(GPIOG_PIN14) |                                                    \
-                                     PIN_ODR_LOW(GPIOG_PIN15))
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
-  void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */
diff --git a/os/modules/LightRing_1-0/board.mk b/os/modules/LightRing_1-0/board.mk
deleted file mode 100644
index 7a12204..0000000
--- a/os/modules/LightRing_1-0/board.mk
+++ /dev/null
@@ -1,36 +0,0 @@
-################################################################################
-# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
-# (AMiRo) platform.                                                            #
-# Copyright (C) 2016..2018  Thomas Schöpping et al.                            #
-#                                                                              #
-# This program is free software: you can redistribute it and/or modify         #
-# it under the terms of the GNU General Public License as published by         #
-# the Free Software Foundation, either version 3 of the License, or            #
-# (at your option) any later version.                                          #
-#                                                                              #
-# This program is distributed in the hope that it will be useful,              #
-# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
-# GNU General Public License for more details.                                 #
-#                                                                              #
-# You should have received a copy of the GNU General Public License            #
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
-#                                                                              #
-# This research/work was supported by the Cluster of Excellence Cognitive      #
-# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
-# funded by the German Research Foundation (DFG).                              #
-################################################################################
-
-
-
-# absolute path to this directory
-BOARD_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
-
-# include paths
-BOARDINC = $(BOARD_DIR)
-
-# C source files
-BOARDSRC = $(BOARD_DIR)board.c
-
-# linker path
-BOARDLD = $(AMIROOS)/hal/ports
diff --git a/os/modules/LightRing_1-0/chconf.h b/os/modules/LightRing_1-0/chconf.h
deleted file mode 100644
index c679bee..0000000
--- a/os/modules/LightRing_1-0/chconf.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file    os/modules/LightRing/chconf.h
- * @brief   ChibiOS Configuration file for the LightRing v1.0 module.
- * @details Contains the application specific kernel settings.
- *
- * @addtogroup config
- * @details Kernel related settings and hooks.
- * @{
- */
-
-#ifndef _CHCONF_H_
-#define _CHCONF_H_
-
-#include <aosconf.h>
-
-/*===========================================================================*/
-/**
- * @name System timers settings
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System time counter resolution.
- * @note    Allowed values are 16 or 32 bits.
- */
-#define CH_CFG_ST_RESOLUTION                16
-
-/**
- * @brief   System tick frequency.
- * @details Frequency of the system timer that drives the system ticks. This
- *          setting also defines the system tick time unit.
- */
-#if (AMIROOS_CFG_TESTS_ENABLE != true) || defined(__DOXYGEN__)
-#define CH_CFG_ST_FREQUENCY                 1000000UL
-#else
-#define CH_CFG_ST_FREQUENCY                 100000UL
-#endif
-
-/**
- * @brief   Time delta constant for the tick-less mode.
- * @note    If this value is zero then the system uses the classic
- *          periodic tick. This value represents the minimum number
- *          of ticks that is safe to specify in a timeout directive.
- *          The value one is not valid, timeouts are rounded up to
- *          this value.
- */
-#if (AMIROOS_CFG_TESTS_ENABLE != true) || defined(__DOXYGEN__)
-#define CH_CFG_ST_TIMEDELTA                 10
-#else
-#define CH_CFG_ST_TIMEDELTA                 2
-#endif
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Port specific settings
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   NVIC VTOR initialization offset.
- * @details On initialization, the code at this address in the flash memory will be executed.
- */
-#define CORTEX_VTOR_INIT 0x00006000U
-
-/** @} */
-
-#include <aos_chconf.h>
-
-#endif  /* _CHCONF_H_ */
-
-/** @} */
diff --git a/os/modules/LightRing_1-0/halconf.h b/os/modules/LightRing_1-0/halconf.h
deleted file mode 100644
index 5e21005..0000000
--- a/os/modules/LightRing_1-0/halconf.h
+++ /dev/null
@@ -1,388 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file    os/modules/LightRing/halconf.h
- * @brief   HAL configuration header for the LightRing v1.0 module.
- * @details HAL configuration file, this file allows to enable or disable the
- *          various device drivers from your application. You may also use
- *          this file in order to override the device drivers default settings.
- *
- * @addtogroup HAL_CONF
- * @{
- */
-
-#ifndef _HALCONF_H_
-#define _HALCONF_H_
-
-/**
- * @brief   Enables the PAL subsystem.
- */
-#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
-#define HAL_USE_PAL                 TRUE
-#endif
-
-/**
- * @brief   Enables the ADC subsystem.
- */
-#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
-#define HAL_USE_ADC                 FALSE
-#endif
-
-/**
- * @brief   Enables the CAN subsystem.
- */
-#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
-#define HAL_USE_CAN                 TRUE
-#endif
-
-/**
- * @brief   Enables the DAC subsystem.
- */
-#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
-#define HAL_USE_DAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the EXT subsystem.
- */
-#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
-#define HAL_USE_EXT                 TRUE
-#endif
-
-/**
- * @brief   Enables the GPT subsystem.
- */
-#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
-#define HAL_USE_GPT                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2C subsystem.
- */
-#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
-#define HAL_USE_I2C                 TRUE
-#endif
-
-/**
- * @brief   Enables the I2S subsystem.
- */
-#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
-#define HAL_USE_I2S                 FALSE
-#endif
-
-/**
- * @brief   Enables the ICU subsystem.
- */
-#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
-#define HAL_USE_ICU                 FALSE
-#endif
-
-/**
- * @brief   Enables the MAC subsystem.
- */
-#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
-#define HAL_USE_MAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the MMC_SPI subsystem.
- */
-#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_MMC_SPI             FALSE
-#endif
-
-/**
- * @brief   Enables the PWM subsystem.
- */
-#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
-#define HAL_USE_PWM                 FALSE
-#endif
-
-/**
- * @brief   Enables the RTC subsystem.
- */
-#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
-#define HAL_USE_RTC                 TRUE
-#endif
-
-/**
- * @brief   Enables the SDC subsystem.
- */
-#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
-#define HAL_USE_SDC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL subsystem.
- */
-#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL              TRUE
-#endif
-
-/**
- * @brief   Enables the SERIAL over USB subsystem.
- */
-#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL_USB          FALSE
-#endif
-
-/**
- * @brief   Enables the SPI subsystem.
- */
-#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_SPI                 TRUE
-#endif
-
-/**
- * @brief   Enables the UART subsystem.
- */
-#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
-#define HAL_USE_UART                FALSE
-#endif
-
-/**
- * @brief   Enables the USB subsystem.
- */
-#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
-#define HAL_USE_USB                 FALSE
-#endif
-
-/**
- * @brief   Enables the WDG subsystem.
- */
-#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
-#define HAL_USE_WDG                 FALSE
-#endif
-
-/**
- * @brief   Enables the QEI subsystem.
- */
-#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__)
-#define HAL_USE_QEI                 FALSE
-#endif
-
-/*===========================================================================*/
-/* ADC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
-#define ADC_USE_WAIT                FALSE
-#endif
-
-/**
- * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define ADC_USE_MUTUAL_EXCLUSION    FALSE
-#endif
-
-/*===========================================================================*/
-/* CAN driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Sleep mode related APIs inclusion switch.
- */
-#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
-#define CAN_USE_SLEEP_MODE          FALSE
-#endif
-
-/*===========================================================================*/
-/* I2C driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables the mutual exclusion APIs on the I2C bus.
- */
-#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define I2C_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* MAC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
-#define MAC_USE_ZERO_COPY           FALSE
-#endif
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
-#define MAC_USE_EVENTS              FALSE
-#endif
-
-/*===========================================================================*/
-/* MMC_SPI driver related settings.                                          */
-/*===========================================================================*/
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- *          This option is recommended also if the SPI driver does not
- *          use a DMA channel and heavily loads the CPU.
- */
-#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
-#define MMC_NICE_WAITING            FALSE
-#endif
-
-/*===========================================================================*/
-/* SDC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Number of initialization attempts before rejecting the card.
- * @note    Attempts are performed at 10mS intervals.
- */
-#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
-#define SDC_INIT_RETRY              100
-#endif
-
-/**
- * @brief   Include support for MMC cards.
- * @note    MMC support is not yet implemented so this option must be kept
- *          at @p FALSE.
- */
-#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
-#define SDC_MMC_SUPPORT             FALSE
-#endif
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- */
-#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
-#define SDC_NICE_WAITING            FALSE
-#endif
-
-/*===========================================================================*/
-/* SERIAL driver related settings.                                           */
-/*===========================================================================*/
-
-/**
- * @brief   Default bit rate.
- * @details Configuration parameter, this is the baud rate selected for the
- *          default configuration.
- */
-#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
-#define SERIAL_DEFAULT_BITRATE      115200
-#endif
-
-/**
- * @brief   Serial buffers size.
- * @details Configuration parameter, you can change the depth of the queue
- *          buffers depending on the requirements of your application.
- * @note    The default is 16 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_BUFFERS_SIZE         16
-#endif
-
-/*===========================================================================*/
-/* SERIAL_USB driver related setting.                                        */
-/*===========================================================================*/
-
-/**
- * @brief   Serial over USB buffers size.
- * @details Configuration parameter, the buffer size must be a multiple of
- *          the USB data endpoint maximum packet size.
- * @note    The default is 256 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_USB_BUFFERS_SIZE     256
-#endif
-
-/**
- * @brief   Serial over USB number of buffers.
- * @note    The default is 2 buffers.
- */
-#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
-#define SERIAL_USB_BUFFERS_NUMBER   2
-#endif
-
-/*===========================================================================*/
-/* SPI driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
-#define SPI_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define SPI_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* UART driver related settings.                                             */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
-#define UART_USE_WAIT               FALSE
-#endif
-
-/**
- * @brief   Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define UART_USE_MUTUAL_EXCLUSION   FALSE
-#endif
-
-/*===========================================================================*/
-/* USB driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
-#define USB_USE_WAIT                FALSE
-#endif
-
-#endif /* _HALCONF_H_ */
-
-/** @} */
diff --git a/os/modules/LightRing_1-0/mcuconf.h b/os/modules/LightRing_1-0/mcuconf.h
deleted file mode 100644
index 6381f70..0000000
--- a/os/modules/LightRing_1-0/mcuconf.h
+++ /dev/null
@@ -1,227 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#ifndef _MCUCONF_H_
-#define _MCUCONF_H_
-
-#define STM32F103_MCUCONF
-
-/*
- * STM32F103 drivers configuration.
- * The following settings override the default settings present in
- * the various device driver implementation headers.
- * Note that the settings for each driver only have effect if the whole
- * driver is enabled in halconf.h.
- *
- * IRQ priorities:
- * 15...0       Lowest...Highest.
- *
- * DMA priorities:
- * 0...3        Lowest...Highest.
- */
-
-/*
- * HAL driver system settings.
- */
-#define STM32_NO_INIT                       FALSE
-#define STM32_HSI_ENABLED                   TRUE
-#define STM32_LSI_ENABLED                   FALSE
-#define STM32_HSE_ENABLED                   TRUE
-#define STM32_LSE_ENABLED                   FALSE
-#define STM32_SW                            STM32_SW_PLL
-#define STM32_PLLSRC                        STM32_PLLSRC_HSE
-#define STM32_PLLXTPRE                      STM32_PLLXTPRE_DIV1
-#define STM32_PLLMUL_VALUE                  9
-#define STM32_HPRE                          STM32_HPRE_DIV1
-#define STM32_PPRE1                         STM32_PPRE1_DIV2
-#define STM32_PPRE2                         STM32_PPRE2_DIV2
-#define STM32_ADCPRE                        STM32_ADCPRE_DIV4
-#define STM32_USB_CLOCK_REQUIRED            TRUE
-#define STM32_USBPRE                        STM32_USBPRE_DIV1P5
-#define STM32_MCOSEL                        STM32_MCOSEL_NOCLOCK
-#define STM32_RTCSEL                        STM32_RTCSEL_HSEDIV
-#define STM32_PVD_ENABLE                    FALSE
-#define STM32_PLS                           STM32_PLS_LEV0
-
-/*
- * ADC driver system settings.
- */
-#define STM32_ADC_USE_ADC1                  FALSE
-#define STM32_ADC_ADC1_DMA_PRIORITY         2
-#define STM32_ADC_ADC1_IRQ_PRIORITY         6
-
-/*
- * CAN driver system settings.
- */
-#define STM32_CAN_USE_CAN1                  TRUE
-#define STM32_CAN_CAN1_IRQ_PRIORITY         11
-
-/*
- * EXT driver system settings.
- */
-#define STM32_EXT_EXTI0_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI1_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI2_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI3_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI4_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
-#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
-#define STM32_EXT_EXTI16_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI17_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI18_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI19_IRQ_PRIORITY       6
-
-/*
- * GPT driver system settings.
- */
-#define STM32_GPT_USE_TIM1                  TRUE
-#define STM32_GPT_USE_TIM2                  FALSE
-#define STM32_GPT_USE_TIM3                  FALSE
-#define STM32_GPT_USE_TIM4                  FALSE
-#define STM32_GPT_USE_TIM5                  FALSE
-#define STM32_GPT_USE_TIM8                  FALSE
-#define STM32_GPT_TIM1_IRQ_PRIORITY         7
-#define STM32_GPT_TIM2_IRQ_PRIORITY         7
-#define STM32_GPT_TIM3_IRQ_PRIORITY         7
-#define STM32_GPT_TIM4_IRQ_PRIORITY         7
-#define STM32_GPT_TIM5_IRQ_PRIORITY         7
-#define STM32_GPT_TIM8_IRQ_PRIORITY         7
-
-/*
- * I2C driver system settings.
- */
-#define STM32_I2C_USE_I2C1                  FALSE
-#define STM32_I2C_USE_I2C2                  TRUE
-#define STM32_I2C_BUSY_TIMEOUT              50
-#define STM32_I2C_I2C1_IRQ_PRIORITY         5
-#define STM32_I2C_I2C2_IRQ_PRIORITY         5
-#define STM32_I2C_I2C1_DMA_PRIORITY         3
-#define STM32_I2C_I2C2_DMA_PRIORITY         3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
-#define STM32_I2C_USE_DMA                   FALSE
-
-/*
- * ICU driver system settings.
- */
-#define STM32_ICU_USE_TIM1                  FALSE
-#define STM32_ICU_USE_TIM2                  FALSE
-#define STM32_ICU_USE_TIM3                  FALSE
-#define STM32_ICU_USE_TIM4                  FALSE
-#define STM32_ICU_USE_TIM5                  FALSE
-#define STM32_ICU_USE_TIM8                  FALSE
-#define STM32_ICU_TIM1_IRQ_PRIORITY         7
-#define STM32_ICU_TIM2_IRQ_PRIORITY         7
-#define STM32_ICU_TIM3_IRQ_PRIORITY         7
-#define STM32_ICU_TIM4_IRQ_PRIORITY         7
-#define STM32_ICU_TIM5_IRQ_PRIORITY         7
-#define STM32_ICU_TIM8_IRQ_PRIORITY         7
-
-/*
- * PWM driver system settings.
- */
-#define STM32_PWM_USE_ADVANCED              FALSE
-#define STM32_PWM_USE_TIM1                  FALSE
-#define STM32_PWM_USE_TIM2                  FALSE
-#define STM32_PWM_USE_TIM3                  FALSE
-#define STM32_PWM_USE_TIM4                  FALSE
-#define STM32_PWM_USE_TIM5                  FALSE
-#define STM32_PWM_USE_TIM8                  FALSE
-#define STM32_PWM_TIM1_IRQ_PRIORITY         7
-#define STM32_PWM_TIM2_IRQ_PRIORITY         7
-#define STM32_PWM_TIM3_IRQ_PRIORITY         7
-#define STM32_PWM_TIM4_IRQ_PRIORITY         7
-#define STM32_PWM_TIM5_IRQ_PRIORITY         7
-#define STM32_PWM_TIM8_IRQ_PRIORITY         7
-
-/*
- * RTC driver system settings.
- */
-#define STM32_RTC_IRQ_PRIORITY              15
-
-/*
- * SERIAL driver system settings.
- */
-#define STM32_SERIAL_USE_USART1             TRUE
-#define STM32_SERIAL_USE_USART2             TRUE
-#define STM32_SERIAL_USE_USART3             FALSE
-#define STM32_SERIAL_USE_UART4              FALSE
-#define STM32_SERIAL_USE_UART5              FALSE
-#define STM32_SERIAL_USART1_PRIORITY        12
-#define STM32_SERIAL_USART2_PRIORITY        12
-#define STM32_SERIAL_USART3_PRIORITY        12
-#define STM32_SERIAL_UART4_PRIORITY         12
-#define STM32_SERIAL_UART5_PRIORITY         12
-
-/*
- * SPI driver system settings.
- */
-#define STM32_SPI_USE_SPI1                  TRUE
-#define STM32_SPI_USE_SPI2                  TRUE
-#define STM32_SPI_USE_SPI3                  FALSE
-#define STM32_SPI_SPI1_DMA_PRIORITY         1
-#define STM32_SPI_SPI2_DMA_PRIORITY         1
-#define STM32_SPI_SPI3_DMA_PRIORITY         1
-#define STM32_SPI_SPI1_IRQ_PRIORITY         10
-#define STM32_SPI_SPI2_IRQ_PRIORITY         10
-#define STM32_SPI_SPI3_IRQ_PRIORITY         10
-#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
-
-/*
- * ST driver system settings.
- */
-#define STM32_ST_IRQ_PRIORITY               8
-#define STM32_ST_USE_TIMER                  2
-
-/*
- * UART driver system settings.
- */
-#define STM32_UART_USE_USART1               FALSE
-#define STM32_UART_USE_USART2               FALSE
-#define STM32_UART_USE_USART3               FALSE
-#define STM32_UART_USART1_IRQ_PRIORITY      12
-#define STM32_UART_USART2_IRQ_PRIORITY      12
-#define STM32_UART_USART3_IRQ_PRIORITY      12
-#define STM32_UART_USART1_DMA_PRIORITY      0
-#define STM32_UART_USART2_DMA_PRIORITY      0
-#define STM32_UART_USART3_DMA_PRIORITY      0
-#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
-
-/*
- * USB driver system settings.
- */
-#define STM32_USB_USE_USB1                  FALSE
-#define STM32_USB_LOW_POWER_ON_SUSPEND      FALSE
-#define STM32_USB_USB1_HP_IRQ_PRIORITY      13
-#define STM32_USB_USB1_LP_IRQ_PRIORITY      14
-
-/*
- * WDG driver system settings.
- */
-#define STM32_WDG_USE_IWDG                  FALSE
-
-/*
- * QEI driver system settings.
- */
-#define STM32_QEI_USE_TIM1                  FALSE
-#define STM32_QEI_USE_TIM2                  FALSE
-#define STM32_QEI_USE_TIM3                  FALSE
-#define STM32_QEI_USE_TIM4                  FALSE
-#define STM32_QEI_USE_TIM5                  FALSE
-#define STM32_QEI_USE_TIM8                  FALSE
-
-#endif /* _MCUCONF_H_ */
diff --git a/os/modules/LightRing_1-0/module.c b/os/modules/LightRing_1-0/module.c
deleted file mode 100644
index e27dda3..0000000
--- a/os/modules/LightRing_1-0/module.c
+++ /dev/null
@@ -1,371 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#include "module.h"
-
-/*===========================================================================*/
-/**
- * @name Module specific functions
- * @{
- */
-/*===========================================================================*/
-#include <amiroos.h>
-
-/**
- * @brief   Interrupt service routine callback for I/O interrupt signals.
- *
- * @param   extp      EXT driver to handle the ISR.
- * @param   channel   Channel on which the interrupt was encountered.
- */
-static void _moduleIsrCallback(EXTDriver* extp, expchannel_t channel) {
-  (void)extp;
-
-  chSysLockFromISR();
-  chEvtBroadcastFlagsI(&aos.events.io.source, (1 << channel));
-  chSysUnlockFromISR();
-
-  return;
-}
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name ChibiOS/HAL configuration
- * @{
- */
-/*===========================================================================*/
-
-CANConfig moduleHalCanConfig = {
-  /* mcr  */ CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
-  /* btr  */ CAN_BTR_SJW(1) | CAN_BTR_TS2(2) | CAN_BTR_TS1(13) | CAN_BTR_BRP(1),
-};
-
-EXTConfig moduleHalExtConfig = {
-  /* channel configrations */ {
-    /* channel  0 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel  1 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel  2 */ { // SYS_SYNC_N: automatic interrupt on event
-      /* mode     */ EXT_MODE_GPIOD | EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
-      /* callback */ _moduleIsrCallback
-    },
-    /* channel  3 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel  4 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel  5 */ { // LASER_OC_N: must be enabled explicitely
-      /* mode     */ EXT_MODE_GPIOB | EXT_CH_MODE_FALLING_EDGE,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel  6 */ { // SYS_UART_DN: automatic interrupt on event
-      /* mode     */ EXT_MODE_GPIOB | EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel  7 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel  8 */ { // WL_GDO0: must be enabled explicitely
-      /* mode     */ EXT_MODE_GPIOB | EXT_CH_MODE_BOTH_EDGES,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel  9 */ { // WL_GDO2: must be enabled explicitely
-      /* mode     */ EXT_MODE_GPIOB | EXT_CH_MODE_BOTH_EDGES,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel 10 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel 11 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel 12 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel 13 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel 14 */ { // SYS_PD_N: automatic interrupt when activated
-      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART,
-      /* callback */ _moduleIsrCallback
-    },
-    /* channel 15 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel 16 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel 17 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel 18 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-  }
-};
-
-I2CConfig moduleHalI2cEepromConfig = {
-  /* I²C mode   */ OPMODE_I2C,
-  /* frequency  */ 400000, // TODO: replace with some macro (-> ChibiOS/HAL)
-  /* duty cycle */ FAST_DUTY_CYCLE_2,
-};
-
-SerialConfig moduleHalProgIfConfig = {
-  /* bit rate */ 115200,
-  /* CR1      */ 0,
-  /* CR1      */ 0,
-  /* CR1      */ 0,
-};
-
-SPIConfig moduleHalSpiLightConfig = {
-  /* callback function pointer   */ NULL,
-  /* chip select line port       */ GPIOC,
-  /* chip select line pad number */ GPIOC_LIGHT_XLAT,
-  /* CR1                         */ SPI_CR1_BR_0 | SPI_CR1_BR_1,
-  /* CR2                         */ SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN,
-};
-
-/*===========================================================================*/
-/**
- * @name GPIO definitions
- * @{
- */
-/*===========================================================================*/
-
-apalGpio_t moduleGpioLightBlank = {
-  /* port */ GPIOA,
-  /* pad  */ GPIOA_LIGHT_BLANK,
-};
-
-apalGpio_t moduleGpioLaserEn = {
-  /* port */ GPIOB,
-  /* pad  */ GPIOB_LASER_EN,
-};
-
-apalGpio_t moduleGpioLaserOc = {
-  /* port */ GPIOB,
-  /* pad  */ GPIOB_LASER_OC_N,
-};
-
-apalGpio_t moduleGpioSysUartDn = {
-  /* port */ GPIOB,
-  /* pad  */ GPIOB_SYS_UART_DN,
-};
-
-apalGpio_t moduleGpioWlGdo2 = {
-  /* port */ GPIOB,
-  /* pad  */ GPIOB_WL_GDO2,
-};
-
-apalGpio_t moduleGpioWlGdo0= {
-  /* port */ GPIOB,
-  /* pad  */ GPIOB_WL_GDO0,
-};
-
-apalGpio_t moduleGpioLightXlat = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_LIGHT_XLAT,
-};
-
-apalGpio_t moduleGpioSysPd = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_SYS_PD_N,
-};
-
-apalGpio_t moduleGpioSysSync = {
-  /* port */ GPIOD,
-  /* pad  */ GPIOD_SYS_INT_N,
-};
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name AMiRo-OS core configurations
- * @{
- */
-/*===========================================================================*/
-
-apalControlGpio_t moduleSsspPd = {
-  /* GPIO */ &moduleGpioSysPd,
-  /* meta */ {
-    /* active state */ APAL_GPIO_ACTIVE_LOW,
-    /* edge         */ APAL_GPIO_EDGE_FALLING,
-    /* direction    */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
-  },
-};
-
-apalControlGpio_t moduleSsspSync = {
-  /* GPIO */ &moduleGpioSysSync,
-  /* meta */ {
-    /* active state */ APAL_GPIO_ACTIVE_LOW,
-    /* edge         */ APAL_GPIO_EDGE_FALLING,
-    /* direction    */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
-  },
-};
-
-const char* moduleShellPrompt = "LightRing";
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Low-level drivers
- * @{
- */
-/*===========================================================================*/
-
-AT24C01BNDriver moduleLldEeprom = {
-  /* I2C driver   */ &MODULE_HAL_I2C_EEPROM,
-  /* I2C address  */ 0x00u,
-};
-
-TLC5947Driver moduleLldLedPwm = {
-  /* SPI driver         */ &MODULE_HAL_SPI_LIGHT,
-  /* BLANK signal GPIO  */ {
-    /* GPIO */ &moduleGpioLightBlank,
-    /* meta */ {
-      /* active state */ TLC5947_LLD_BLANK_ACTIVE_STATE,
-      /* edge         */ APAL_GPIO_EDGE_NONE,
-      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
-    },
-  },
-  /* XLAT signal GPIO   */ {
-    /* GPIO */ &moduleGpioLightXlat,
-    /* meta */ {
-      /* active state */ TLC5947_LLD_XLAT_ACTIVE_STATE,
-      /* edge         */ APAL_GPIO_EDGE_NONE,
-      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
-    },
-  },
-};
-
-TPS2051BDriver moduleLldPowerSwitchLaser = {
-  /* laser enable gpio */ {
-    /* GPIO */ &moduleGpioLaserEn,
-    /* meta */ {
-      /* active state */ APAL_GPIO_ACTIVE_HIGH,
-      /* edge         */ APAL_GPIO_EDGE_NONE,
-      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
-    },
-  },
-  /* laser overcurrent gpio */ {
-    /* GPIO         */ &moduleGpioLaserOc,
-    /* meta */ {
-      /* active state */ APAL_GPIO_ACTIVE_LOW,
-      /* edge         */ APAL_GPIO_EDGE_NONE,
-      /* direction    */ APAL_GPIO_DIRECTION_INPUT,
-    },
-  },
-};
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Unit tests (UT)
- * @{
- */
-/*===========================================================================*/
-#if (AMIROOS_CFG_TESTS_ENABLE == true) || defined(__DOXYGEN__)
-
-/* EEPROM (AT24C01BN) */
-static int _utShellCmdCb_AlldAt24c01bn(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  (void)argc;
-  (void)argv;
-  aosUtRun(stream, &moduleUtAlldAt24c01bn, NULL);
-  return AOS_OK;
-}
-static ut_at24c01bndata_t _utAt24c01bnData = {
-  /* driver   */ &moduleLldEeprom,
-  /* timeout  */ MICROSECONDS_PER_SECOND,
-};
-aos_unittest_t moduleUtAlldAt24c01bn = {
-  /* name           */ "AT24C01BN-SH-B",
-  /* info           */ "1kbit EEPROM",
-  /* test function  */ utAlldAt24c01bnFunc,
-  /* shell command  */ {
-    /* name     */ "unittest:EEPROM",
-    /* callback */ _utShellCmdCb_AlldAt24c01bn,
-    /* next     */ NULL,
-  },
-  /* data           */ &_utAt24c01bnData,
-};
-
-/* LED PWM driver (TLD5947) */
-static int _utShellCmdCb_Tlc5947(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  (void)argc;
-  (void)argv;
-  aosUtRun(stream, &moduleUtAlldTlc5947, NULL);
-  return AOS_OK;
-}
-aos_unittest_t moduleUtAlldTlc5947 = {
-  /* info           */ "TLC5947",
-  /* name           */ "LED PWM driver",
-  /* test function  */ utAlldTlc5947Func,
-  /* shell command  */ {
-    /* name     */ "unittest:Lights",
-    /* callback */ _utShellCmdCb_Tlc5947,
-    /* next     */ NULL,
-  },
-  /* data           */ &moduleLldLedPwm,
-};
-
-/* power switch (Laser) */
-static int _utShellCmdCb_Tps2051bdbv(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  (void)argc;
-  (void)argv;
-  aosUtRun(stream,&moduleUtAlldTps2051bdbv, NULL);
-  return AOS_OK;
-}
-aos_unittest_t moduleUtAlldTps2051bdbv = {
-  /* info           */ "TPS2051BDBV",
-  /* name           */ "current-limited power switch",
-  /* test function  */ utAlldTps2051bdbvFunc,
-  /* shell command  */ {
-    /* name     */ "unittest:PowerSwitch",
-    /* callback */ _utShellCmdCb_Tps2051bdbv,
-    /* next     */ NULL,
-  },
-  /* data           */ &moduleLldPowerSwitchLaser,
-};
-
-#endif /* AMIROOS_CFG_TESTS_ENABLE == true */
-
-/** @} */
diff --git a/os/modules/LightRing_1-0/module.h b/os/modules/LightRing_1-0/module.h
deleted file mode 100644
index 5e06d5d..0000000
--- a/os/modules/LightRing_1-0/module.h
+++ /dev/null
@@ -1,331 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#ifndef _AMIROOS_MODULE_H_
-#define _AMIROOS_MODULE_H_
-
-/*===========================================================================*/
-/**
- * @name Module specific functions
- * @{
- */
-/*===========================================================================*/
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name ChibiOS/HAL configuration
- * @{
- */
-/*===========================================================================*/
-#include <hal.h>
-
-/**
- * @brief   CAN driver to use.
- */
-#define MODULE_HAL_CAN                          CAND1
-
-/**
- * @brief   Configuration for the CAN driver.
- */
-extern CANConfig moduleHalCanConfig;
-
-/**
- * @brief   Interrupt driver to use.
- */
-#define MODULE_HAL_EXT                          EXTD1
-
-/**
- * @brief   Interrupt driver configuration.
- */
-extern EXTConfig moduleHalExtConfig;
-
-/**
- * @brief   I2C driver to access the EEPROM.
- */
-#define MODULE_HAL_I2C_EEPROM                   I2CD2
-
-/**
- * @brief   Configuration for the EEPROM I2C driver.
- */
-extern I2CConfig moduleHalI2cEepromConfig;
-
-/**
- * @brief   Serial driver of the programmer interface.
- */
-#define MODULE_HAL_PROGIF                       SD1
-
-/**
- * @brief   Configuration for the programmer serial interface driver.
- */
-extern SerialConfig moduleHalProgIfConfig;
-
-/**
- * @brief   SPI interface driver for the motion sensors (gyroscope and accelerometer).
- */
-#define MODULE_HAL_SPI_LIGHT                    SPID1
-
-/**
- * @brief   Configuration for the SPI interface driver to communicate with the LED driver.
- */
-extern SPIConfig moduleHalSpiLightConfig;
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name GPIO definitions
- * @{
- */
-/*===========================================================================*/
-#include <amiro-lld.h>
-
-/**
- * @brief   Interrupt channel for the SYS_SYNC signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_SYSSYNC          ((expchannel_t)2)
-
-/**
- * @brief   Interrupt channel for the LASER_OC signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_LASEROC          ((expchannel_t)5)
-
-/**
- * @brief   Interrupt channel for the SYS_UART_DN signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_SYSUARTDN        ((expchannel_t)6)
-
-/**
- * @brief   Interrupt channel for the WL_GDO2 signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_WLGDO2           ((expchannel_t)8)
-
-/**
- * @brief   Interrupt channel for the WL_GDO0 signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_WLGDO0           ((expchannel_t)9)
-
-/**
- * @brief   Interrupt channel for the SYS_PD signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_SYSPD            ((expchannel_t)14)
-
-/**
- * @brief   LIGHT_BANK output signal GPIO.
- */
-extern apalGpio_t moduleGpioLightBlank;
-
-/**
- * @brief   LASER_EN output signal GPIO.
- */
-extern apalGpio_t moduleGpioLaserEn;
-
-/**
- * @brief   LASER_OC input signal GPIO.
- */
-extern apalGpio_t moduleGpioLaserOc;
-
-/**
- * @brief   SYS_UART_DN bidirectional signal GPIO.
- */
-extern apalGpio_t moduleGpioSysUartDn;
-
-/**
- * @brief   WL_GDO2 input signal GPIO.
- */
-extern apalGpio_t moduleGpioWlGdo2;
-
-/**
- * @brief   WL_GDO0 input signal GPIO.
- */
-extern apalGpio_t moduleGpioWlGdo0;
-
-/**
- * @brief   LIGHT_XLAT output signal GPIO.
- */
-extern apalGpio_t moduleGpioLightXlat;
-
-/**
- * @brief   SYS_PD bidirectional signal GPIO.
- */
-extern apalGpio_t moduleGpioSysPd;
-
-/**
- * @brief   SYS_SYNC bidirectional signal GPIO.
- */
-extern apalGpio_t moduleGpioSysSync;
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name AMiRo-OS core configurations
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Event flag to be set on a LASER_OC interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_LASEROC          ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_LASEROC))
-
-/**
- * @brief   Event flag to be set on a SYS_UART_DN interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_SYSUARTDN        ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_SYSUARTDN))
-
-/**
- * @brief   Event flag to be set on a WL_GDO2 interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_WLGDO2           ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_WLGDO2))
-
-/**
- * @brief   Event flag to be set on a WL_GDO0 interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_WLGDO0           ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_WLGDO0))
-
-/**
- * @brief   Event flag to be set on a SYS_PD interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_SYSPD            ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_SYSPD))
-
-/**
- * @brief   Event flag to be set on a SYS_SYNC interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_SYSSYNC          ((eventflags_t)(1 << MODULE_GPIO_EXTCHANNEL_SYSSYNC))
-
-/**
- * @brief   PD signal for SSSP.
- */
-extern apalControlGpio_t moduleSsspPd;
-
-/**
- * @brief   SYNC signal for SSSP.
- */
-extern apalControlGpio_t moduleSsspSync;
-
-/**
- * @brief   Shell prompt text.
- */
-extern const char* moduleShellPrompt;
-
-/**
- * @brief   Unit test initialization hook.
- */
-#define MODULE_INIT_TESTS() {                                                 \
-  /* add unit-test shell commands */                                          \
-  aosShellAddCommand(aos.shell, &moduleUtAlldAt24c01bn.shellcmd);             \
-  aosShellAddCommand(aos.shell, &moduleUtAlldTlc5947.shellcmd);               \
-  aosShellAddCommand(aos.shell, &moduleUtAlldTps2051bdbv.shellcmd);           \
-}
-
-/**
- * @brief   Periphery communication interfaces initialization hook.
- */
-#define MODULE_INIT_PERIPHERY_COMM() {                                        \
-  /* serial driver */                                                         \
-  sdStart(&MODULE_HAL_PROGIF, &moduleHalProgIfConfig);                        \
-  /* I2C */                                                                   \
-  moduleHalI2cEepromConfig.clock_speed = (AT24C01BN_LLD_I2C_MAXFREQUENCY < moduleHalI2cEepromConfig.clock_speed) ? AT24C01BN_LLD_I2C_MAXFREQUENCY : moduleHalI2cEepromConfig.clock_speed; \
-  moduleHalI2cEepromConfig.duty_cycle = (moduleHalI2cEepromConfig.clock_speed <= 100000) ? STD_DUTY_CYCLE : FAST_DUTY_CYCLE_2;  \
-  i2cStart(&MODULE_HAL_I2C_EEPROM, &moduleHalI2cEepromConfig);                \
-  /* SPI */                                                                   \
-  spiStart(&MODULE_HAL_SPI_LIGHT, &moduleHalSpiLightConfig);                  \
-}
-
-/**
- * @brief   Hook to handle IO events during SSSP startup synchronization.
- */
-#define MODULE_SSP_STARTUP_OUTRO_IO_EVENT(mask, flags) {                      \
-  /* ignore all events */                                                     \
-  (void)mask;                                                                 \
-  (void)flags;                                                                \
-}
-
-/**
- * @brief   Periphery communication interface deinitialization hook.
- */
-#define MODULE_SHUTDOWN_PERIPHERY_COMM() {                                    \
-  /* SPI */                                                                   \
-  spiStop(&MODULE_HAL_SPI_LIGHT);                                             \
-  /* I2C */                                                                   \
-  i2cStop(&MODULE_HAL_I2C_EEPROM);                                            \
-  /* don't stop the serial driver so messages can still be printed */         \
-}
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Low-level drivers
- * @{
- */
-/*===========================================================================*/
-#include <alld_at24c01bn-sh-b.h>
-#include <alld_tlc5947.h>
-#include <alld_tps2051bdbv.h>
-
-/**
- * @brief   EEPROM driver.
- */
-extern AT24C01BNDriver moduleLldEeprom;
-
-/**
- * @brief   LED PWM driver.
- */
-extern TLC5947Driver moduleLldLedPwm;
-
-/**
- * @brief   Power switch driver for the laser supply power.
- */
-extern TPS2051BDriver moduleLldPowerSwitchLaser;
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Unit tests (UT)
- * @{
- */
-/*===========================================================================*/
-#if (AMIROOS_CFG_TESTS_ENABLE == true) || defined(__DOXYGEN__)
-#include <ut_alld_at24c01bn-sh-b.h>
-#include <ut_alld_tlc5947.h>
-#include <ut_alld_tps2051bdbv.h>
-
-/**
- * @brief   EEPROM unit test object.
- */
-extern aos_unittest_t moduleUtAlldAt24c01bn;
-
-/**
- * @brief   LED PWM driver unit test object.
- */
-extern aos_unittest_t moduleUtAlldTlc5947;
-
-/**
- * @brief   Current-limited power switch (Laser output)
- */
-extern aos_unittest_t moduleUtAlldTps2051bdbv;
-
-#endif /* AMIROOS_CFG_TESTS_ENABLE == true */
-
-/** @} */
-
-#endif /* _AMIROOS_MODULE_H_ */
diff --git a/os/modules/Makefile b/os/modules/Makefile
deleted file mode 100644
index 99be89b..0000000
--- a/os/modules/Makefile
+++ /dev/null
@@ -1,47 +0,0 @@
-################################################################################
-# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
-# (AMiRo) platform.                                                            #
-# Copyright (C) 2016..2018  Thomas Schöpping et al.                            #
-#                                                                              #
-# This program is free software: you can redistribute it and/or modify         #
-# it under the terms of the GNU General Public License as published by         #
-# the Free Software Foundation, either version 3 of the License, or            #
-# (at your option) any later version.                                          #
-#                                                                              #
-# This program is distributed in the hope that it will be useful,              #
-# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
-# GNU General Public License for more details.                                 #
-#                                                                              #
-# You should have received a copy of the GNU General Public License            #
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
-#                                                                              #
-# This research/work was supported by the Cluster of Excellence Cognitive      #
-# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
-# funded by the German Research Foundation (DFG).                              #
-################################################################################
-
-
-
-include $(dir $(lastword $(MAKEFILE_LIST)))modules.mk
-
-ifneq ($(BUILDDIR),)
-  export BUILDDIR
-endif
-
-CLEANTRGS = $(MODULES:%=clean_%)
-FLASHTRGS = $(MODULES:%=flash_%)
-
-.PHONY: all $(MODULES) flash $(FLASHTRGS) clean $(CLEANTRGS)
-
-all: $(MODULES)
-$(MODULES):
-	$(MAKE) -C $(MODULES_DIR)$@
-
-flash: $(FLASHTRGS)
-$(FLASHTRGS):
-	$(MAKE) -C $(MODULES_DIR)$(@:flash_%=%) flash
-
-clean: $(CLEANTRGS)
-$(CLEANTRGS):
-	$(MAKE) -C $(MODULES_DIR)$(@:clean_%=%) clean
diff --git a/os/modules/PowerManagement_1-1/Makefile b/os/modules/PowerManagement_1-1/Makefile
deleted file mode 100644
index ebd5442..0000000
--- a/os/modules/PowerManagement_1-1/Makefile
+++ /dev/null
@@ -1,303 +0,0 @@
-################################################################################
-# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
-# (AMiRo) platform.                                                            #
-# Copyright (C) 2016..2018  Thomas Schöpping et al.                            #
-#                                                                              #
-# This program is free software: you can redistribute it and/or modify         #
-# it under the terms of the GNU General Public License as published by         #
-# the Free Software Foundation, either version 3 of the License, or            #
-# (at your option) any later version.                                          #
-#                                                                              #
-# This program is distributed in the hope that it will be useful,              #
-# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
-# GNU General Public License for more details.                                 #
-#                                                                              #
-# You should have received a copy of the GNU General Public License            #
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
-#                                                                              #
-# This research/work was supported by the Cluster of Excellence Cognitive      #
-# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
-# funded by the German Research Foundation (DFG).                              #
-################################################################################
-
-
-
-################################################################################
-# Build global options                                                         #
-# NOTE: Can be overridden externally.                                          #
-#                                                                              #
-
-# Compiler options here.
-ifeq ($(USE_OPT),)
-  USE_OPT = -O2 -fomit-frame-pointer -falign-functions=16 -fstack-usage
-endif
-
-# C specific options here (added to USE_OPT).
-ifeq ($(USE_COPT),)
-  USE_COPT = -std=c11
-endif
-
-# C++ specific options here (added to USE_OPT).
-ifeq ($(USE_CPPOPT),)
-  USE_CPPOPT = -fno-rtti -std=c++17
-endif
-
-# Enable this if you want the linker to remove unused code and data
-ifeq ($(USE_LINK_GC),)
-  USE_LINK_GC = yes
-endif
-
-# Linker extra options here.
-ifeq ($(USE_LDOPT),)
-  USE_LDOPT =
-endif
-
-# Enable this if you want link time optimizations (LTO)
-ifeq ($(USE_LTO),)
-  USE_LTO = yes
-endif
-
-# If enabled, this option allows to compile the application in THUMB mode.
-ifeq ($(USE_THUMB),)
-  USE_THUMB = yes
-endif
-
-# Enable this if you want to see the full log while compiling.
-ifeq ($(USE_VERBOSE_COMPILE),)
-  USE_VERBOSE_COMPILE = no
-endif
-
-# If enabled, this option makes the build process faster by not compiling
-# modules not used in the current configuration.
-ifeq ($(USE_SMART_BUILD),)
-  USE_SMART_BUILD = no
-endif
-
-#                                                                              #
-# Build global options                                                         #
-################################################################################
-
-################################################################################
-# Architecture or project specific options                                     #
-#                                                                              #
-
-# Stack size to be allocated to the Cortex-M process stack. This stack is
-# the stack used by the main() thread.
-ifeq ($(USE_PROCESS_STACKSIZE),)
-  USE_PROCESS_STACKSIZE = 0x400
-endif
-
-# Stack size to the allocated to the Cortex-M main/exceptions stack. This
-# stack is used for processing interrupts and exceptions.
-ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
-  USE_EXCEPTIONS_STACKSIZE = 0x400
-endif
-
-# Enables the use of FPU on Cortex-M4.
-# Possible selections are:
-#   no     - no FPU is used (probably equals 'soft')
-#   soft   - does not use the FPU, thus all floating point operations are emulated
-#   softfp - uses the FPU, but uses the integer registers only
-#   hard   - uses the FPU and passes data via the FPU registers
-ifeq ($(USE_FPU),)
-  USE_FPU = softfp
-endif
-
-#                                                                              #
-# Architecture or project specific options                                     #
-################################################################################
-
-################################################################################
-# Project, sources and paths                                                   #
-#                                                                              #
-
-# Define project name here
-PROJECT := $(patsubst $(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))..)/%,%,$(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))))
-
-# Imported source files and paths
-include ../../../kernel/kernel.mk
-CHIBIOS := $(AMIROOS_KERNEL)
-AMIROOS = ../..
-# Startup files
-include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk
-# HAL-OSAL files
-include $(CHIBIOS)/os/hal/hal.mk
-include $(AMIROOS)/hal/hal.mk
-include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk
-include $(AMIROOS)/hal/ports/STM32/platform.mk
-include ./board.mk
-include $(CHIBIOS)/os/hal/osal/rt/osal.mk
-# RTOS files
-include $(CHIBIOS)/os/rt/rt.mk
-include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
-# Other files (optional).
-include $(CHIBIOS)/test/rt/test.mk
-# AMiRo-BLT files
-include ../../../bootloader/bootloader.mk
-# AMiRo-LLD files
-include ../../../periphery-lld/periphery-lld.mk
-# AMiRo-OS files
-include $(AMIROOS)/modules/modules.mk
-include $(AMIROOS)/core/core.mk
-include $(AMIROOS)/unittests/unittests.mk
-
-# Define linker script file here
-LDSCRIPT= $(BOARDLD)/STM32F405xG.ld
-
-# C sources that can be compiled in ARM or THUMB mode depending on the global
-# setting.
-CSRC = $(STARTUPSRC) \
-       $(KERNSRC) \
-       $(PORTSRC) \
-       $(OSALSRC) \
-       $(HALSRC) \
-       $(PLATFORMSRC) \
-       $(BOARDSRC) \
-       $(MODULESCSRC) \
-       $(TESTSRC) \
-       $(PERIPHERYLLDCSRC) \
-       $(AMIROOSCORECSRC) \
-       $(UNITTESTSCSRC) \
-       $(CHIBIOS)/os/various/evtimer.c \
-       $(CHIBIOS)/os/various/syscalls.c \
-       $(CHIBIOS)/os/hal/lib/streams/chprintf.c \
-       module.c \
-       $(APPSCSRC)
-
-# C++ sources that can be compiled in ARM or THUMB mode depending on the global
-# setting.
-CPPSRC = $(AMIROOSCORECPPSRC) \
-         $(APPSCPPSRC)
-
-# C sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-ACSRC = $(APPSACSRC)
-
-# C++ sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-ACPPSRC = $(APPSACPPSRC)
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-TCSRC = $(APPSTCSRC)
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-TCPPSRC = $(APPSTCPPSRC)
-
-# List ASM source files here
-ASMSRC = $(APPSASMSRC)
-ASMXSRC = $(STARTUPASM) \
-          $(PORTASM) \
-          $(OSALASM) \
-          $(APPSASMXSRC)
-
-INCDIR = $(CHIBIOS)/os/license \
-         $(STARTUPINC) \
-         $(KERNINC) \
-         $(PORTINC) \
-         $(OSALINC) \
-         $(HALINC) \
-         $(PLATFORMINC) \
-         $(BOARDINC) \
-         $(MODULESINC) \
-         $(TESTINC) \
-         $(BOOTLOADERINC) \
-         $(CHIBIOS)/os/hal/lib/streams \
-         $(CHIBIOS)/os/various \
-         $(PERIPHERYLLDINC) \
-         $(AMIROOS) \
-         $(AMIROOSCOREINC) \
-         $(UNITTESTSINC) \
-         $(APPSINC)
-
-#                                                                              #
-# Project, sources and paths                                                   #
-################################################################################
-
-################################################################################
-# Compiler settings                                                            #
-# NOTE: Some can be overridden externally.                                     #
-#                                                                              #
-
-MCU  = cortex-m4
-
-#TRGT = arm-elf-
-TRGT = arm-none-eabi-
-CC   = $(TRGT)gcc
-CPPC = $(TRGT)g++
-# Enable loading with g++ only if you need C++ runtime support.
-# NOTE: You can use C++ even without C++ support if you are careful. C++
-#       runtime support makes code size explode.
-LD   = $(TRGT)gcc
-#LD   = $(TRGT)g++
-CP   = $(TRGT)objcopy
-AS   = $(TRGT)gcc -x assembler-with-cpp
-AR   = $(TRGT)ar
-OD   = $(TRGT)objdump
-SZ   = $(TRGT)size
-HEX  = $(CP) -O ihex
-BIN  = $(CP) -O binary
-SREC = $(CP) -O srec --srec-len=248
-
-# ARM-specific options here
-ifeq ($(AOPT),)
-  AOPT =
-endif
-
-# THUMB-specific options here
-ifeq ($(TOPT),)
-  TOPT = -mthumb -DTHUMB
-endif
-
-# Define C warning options here
-ifeq ($(CWARN),)
-  CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
-endif
-
-# Define C++ warning options here
-ifeq ($(CPPWARN),)
-  CPPWARN = -Wall -Wextra -Wundef
-endif
-
-#                                                                              #
-# Compiler settings                                                            #
-################################################################################
-
-################################################################################
-# Start of user section                                                        #
-#                                                                              #
-
-# List all user C define here, like -D_DEBUG=1
-UDEFS +=
-
-# Define ASM defines here
-UADEFS +=
-
-# List all user directories here
-UINCDIR +=
-
-# List the user directory to look for the libraries here
-ULIBDIR +=
-
-# List all user libraries here
-ULIBS +=
-
-#                                                                              #
-# End of user defines                                                          #
-################################################################################
-
-# allow for custom build directory
-ifneq ($(BUILDDIR),)
-  BUILDDIR := $(BUILDDIR)/$(PROJECT)
-endif
-
-RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
-include $(RULESPATH)/rules.mk
-
-include $(AMIROOS)/modules/flash.mk
diff --git a/os/modules/PowerManagement_1-1/alldconf.h b/os/modules/PowerManagement_1-1/alldconf.h
deleted file mode 100644
index 14572d2..0000000
--- a/os/modules/PowerManagement_1-1/alldconf.h
+++ /dev/null
@@ -1,84 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#ifndef _ALLDCONF_H_
-#define _ALLDCONF_H_
-
-/*
- * compatibility guards
- */
-#define _AMIRO_LLD_CFG_
-#define AMIRO_LLD_CFG_VERSION_MAJOR         1
-#define AMIRO_LLD_CFG_VERSION_MINOR         0
-
-/**
- * @brief   Enable flag for the AT24C01BN-SH-B EEPROM.
- */
-#define AMIROLLD_CFG_USE_AT24C01BN
-
-/**
- * @brief   Enable flag for the BQ24103A charger.
- */
-#define AMIROLLD_CFG_USE_BQ24103A
-
-/**
- * @brief   Enable flag for the BQ27500 fuel gauge.
- */
-#define AMIROLLD_CFG_USE_BQ27500
-
-/**
- * @brief   Enable flag for the INA219 power monitor.
- */
-#define AMIROLLD_CFG_USE_INA219
-
-/**
- * @brief   Enable flag for the status LED.
- */
-#define AMIROLLD_CFG_USE_LED
-
-/**
- * @brief   Enable flag for the MPR121 touch sensor.
- */
-#define AMIROLLD_CFG_USE_MPR121
-
-/**
- * @brief   Enable flag for the PCA9544A I2C multiplexer.
- */
-#define AMIROLLD_CFG_USE_PCA9544A
-
-/**
- * @brief   Enable flag for the PKLCS1212E4001 buzzer.
- */
-#define AMIROLLD_CFG_USE_PKLCS1212E4001
-
-/**
- * @brief   Enable flag for the TPS2051BDBV power switch.
- */
-#define AMIROLLD_CFG_USE_TPS2051BDBV
-
-/**
- * @brief   Enable flag for the TPS62113 step-down converter.
- */
-#define AMIROLLD_CFG_USE_TPS62113
-
-/**
- * @brief   Enable flag for the VCNL4020 proximity sensor.
- */
-#define AMIROLLD_CFG_USE_VCNL4020
-
-#endif /* _ALLDCONF_H_ */
diff --git a/os/modules/PowerManagement_1-1/aosconf.h b/os/modules/PowerManagement_1-1/aosconf.h
deleted file mode 100644
index c0dc96d..0000000
--- a/os/modules/PowerManagement_1-1/aosconf.h
+++ /dev/null
@@ -1,161 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#ifndef _AOSCONF_H_
-#define _AOSCONF_H_
-
-/*
- * compatibility guards
- */
-#define _AMIRO_OS_CFG_
-#define _AMIRO_OS_CFG_VERSION_MAJOR_            2
-#define _AMIRO_OS_CFG_VERSION_MINOR_            0
-
-#include <stdbool.h>
-
-/*===========================================================================*/
-/**
- * @name Kernel parameters and options
- * @{
- */
-/*===========================================================================*/
-
-/*
- * Include an external configuration file to override the following default settings only if required.
- */
-#if defined(AMIRO_APPS) && (AMIRO_APPS == true)
-  #include <osconf.h>
-#endif
-
-/**
- * @brief   Flag to set the module as SSSP master.
- */
-#if !defined(OS_CFG_SSSP_MASTER)
-  #define AMIROOS_CFG_SSSP_MASTER               true
-#else
-  #define AMIROOS_CFG_SSSP_MASTER               OS_CFG_SSSP_MASTER
-#endif
-
-/**
- * @brief   Time boundary for robot wide clock synchronization in microseconds.
- * @details Whenever the SSSP S (snychronization) signal gets logically deactivated,
- *          All modules need to align their local uptime to the nearest multiple of this value.
- */
-#if !defined(OS_CFG_SSSP_SYSSYNCPERIOD)
-  #define AMIROOS_CFG_SSSP_SYSSYNCPERIOD        1000000
-#else
-  #define AMIROOS_CFG_SSSP_SYSSYNCPERIOD        OS_CFG_SSSP_SYSSYNCPERIOD
-#endif
-
-/**
- * @brief   Flag to enable/disable debug API.
- */
-#if !defined(OS_CFG_DBG)
-  #define AMIROOS_CFG_DBG                       true
-#else
-  #define AMIROOS_CFG_DBG                       OS_CFG_DBG
-#endif
-
-/**
- * @brief   Flag to enable/disable unit tests.
- */
-#if !defined(OS_CFG_TESTS_ENABLE)
-  #define AMIROOS_CFG_TESTS_ENABLE              true
-#else
-  #define AMIROOS_CFG_TESTS_ENABLE              OS_CFG_TESTS_ENABLE
-#endif
-
-/**
- * @brief   Flag to enable/disable profiling API.
- */
-#if !defined(OS_CFG_PROFILE)
-  #define AMIROOS_CFG_PROFILE                   true
-#else
-  #define AMIROOS_CFG_PROFILE                   OS_CFG_PROFILE
-#endif
-
-/**
- * @brief   Timeout value when waiting for events in the main loop in microseconds.
- * @details A value of 0 deactivates the timeout.
- */
-#if !defined(OS_CFG_MAIN_LOOP_TIMEOUT)
-  #define AMIROOS_CFG_MAIN_LOOP_TIMEOUT         0
-#else
-  #define AMIROOS_CFG_MAIN_LOOP_TIMEOUT         OS_CFG_MAIN_LOOP_TIMEOUT
-#endif
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name System shell options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Shell enable flag.
- */
-#if (AMIROOS_CFG_TESTS_ENABLE == false) && !defined(OS_CFG_SHELL_ENABLE)
-  #define AMIROOS_CFG_SHELL_ENABLE              true
-#elif (AMIROOS_CFG_TESTS_ENABLE == true)
-  #define AMIROOS_CFG_SHELL_ENABLE              true
-#else
-  #define AMIROOS_CFG_SHELL_ENABLE              OS_CFG_SHELL_ENABLE
-#endif
-
-/**
- * @brief   Shell thread stack size.
- */
-#if !defined(OS_CFG_SHELL_STACKSIZE)
-  #define AMIROOS_CFG_SHELL_STACKSIZE           1024
-#else
-  #define AMIROOS_CFG_SHELL_STACKSIZE           OS_CFG_SHELL_STACKSIZE
-#endif
-
-/**
- * @brief   Shell thread priority.
- */
-#if !defined(OS_CFG_SHELL_THREADPRIO)
-  #define AMIROOS_CFG_SHELL_THREADPRIO          THD_NORMALPRIO_MIN
-#else
-  #define AMIROOS_CFG_SHELL_THREADPRIO          OS_CFG_SHELL_THREADPRIO
-#endif
-
-/**
- * @brief   Shell maximum input line length.
- */
-#if !defined(OS_CFG_SHELL_LINEWIDTH)
-  #define AMIROOS_CFG_SHELL_LINEWIDTH           64
-#else
-  #define AMIROOS_CFG_SHELL_LINEWIDTH           OS_CFG_SHELL_LINEWIDTH
-#endif
-
-/**
- * @brief   Shell maximum number of arguments.
- */
-#if !defined(OS_CFG_SHELL_MAXARGS)
-  #define AMIROOS_CFG_SHELL_MAXARGS             4
-#else
-  #define AMIROOS_CFG_SHELL_MAXARGS             OS_CFG_SHELL_MAXARGS
-#endif
-
-/** @} */
-
-#endif /* _AOSCONF_H_ */
-
diff --git a/os/modules/PowerManagement_1-1/board.c b/os/modules/PowerManagement_1-1/board.c
deleted file mode 100644
index 7e6ad50..0000000
--- a/os/modules/PowerManagement_1-1/board.c
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#include <hal.h>
-
-#if HAL_USE_PAL || defined(__DOXYGEN__)
-/**
- * @brief   PAL setup.
- * @details Digital I/O ports static configuration as defined in @p board.h.
- *          This variable is used by the HAL when initializing the PAL driver.
- */
-const PALConfig pal_default_config = {
-#if STM32_HAS_GPIOA
-  {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
-   VAL_GPIOA_ODR,   VAL_GPIOA_AFRL,   VAL_GPIOA_AFRH},
-#endif
-#if STM32_HAS_GPIOB
-  {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
-   VAL_GPIOB_ODR,   VAL_GPIOB_AFRL,   VAL_GPIOB_AFRH},
-#endif
-#if STM32_HAS_GPIOC
-  {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
-   VAL_GPIOC_ODR,   VAL_GPIOC_AFRL,   VAL_GPIOC_AFRH},
-#endif
-#if STM32_HAS_GPIOD
-  {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
-   VAL_GPIOD_ODR,   VAL_GPIOD_AFRL,   VAL_GPIOD_AFRH},
-#endif
-#if STM32_HAS_GPIOE
-  {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
-   VAL_GPIOE_ODR,   VAL_GPIOE_AFRL,   VAL_GPIOE_AFRH},
-#endif
-#if STM32_HAS_GPIOF
-  {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
-   VAL_GPIOF_ODR,   VAL_GPIOF_AFRL,   VAL_GPIOF_AFRH},
-#endif
-#if STM32_HAS_GPIOG
-  {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
-   VAL_GPIOG_ODR,   VAL_GPIOG_AFRL,   VAL_GPIOG_AFRH},
-#endif
-#if STM32_HAS_GPIOH
-  {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
-   VAL_GPIOH_ODR,   VAL_GPIOH_AFRL,   VAL_GPIOH_AFRH},
-#endif
-#if STM32_HAS_GPIOI
-  {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
-   VAL_GPIOI_ODR,   VAL_GPIOI_AFRL,   VAL_GPIOI_AFRH}
-#endif
-};
-#endif
-
-/**
- * @brief   Early initialization code.
- * @details This initialization must be performed just after stack setup
- *          and before any other initialization.
- */
-void __early_init(void) {
-
-  stm32_clock_init();
-}
-
-/**
- * @brief   Board-specific initialization code.
- * @todo    Add your board-specific code, if any.
- */
-void boardInit(void) {
-}
diff --git a/os/modules/PowerManagement_1-1/board.h b/os/modules/PowerManagement_1-1/board.h
deleted file mode 100644
index af5f788..0000000
--- a/os/modules/PowerManagement_1-1/board.h
+++ /dev/null
@@ -1,1374 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * Setup for AMiRo PowerManagement v1.1 board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_POWERMANAGEMENT
-#define BOARD_NAME                      "AMiRo PowerManagement"
-#define BOARD_VERSION                   "1.1"
-
-/*
- * Board oscillators-related settings.
- * NOTE: LSE not fitted.
- */
-#if !defined(STM32_LSECLK)
-#define STM32_LSECLK                    0U
-#endif
-
-#if !defined(STM32_HSECLK)
-#define STM32_HSECLK                    8000000U
-#endif
-
-/*
- * Board voltages.
- * Required for performance limits calculation.
- */
-#define STM32_VDD                       330U
-
-/*
- * MCU type as defined in the ST header.
- */
-#define STM32F405xx
-
-/*
- * STM32F4 alternate function definitions
- */
-#define STM32F4xx_AF_system             0U
-#define STM32F4xx_AF_TIM1to2            1U
-#define STM32F4xx_AF_TIM3to5            2U
-#define STM32F4xx_AF_TIM8to11           3U
-#define STM32F4xx_AF_I2C1to3            4U
-#define STM32F4xx_AF_SPI1to2            5U
-#define STM32F4xx_AF_SPI3               6U
-#define STM32F4xx_AF_USART1to3          7U
-#define STM32F4xx_AF_USART4to6          8U
-#define STM32F4xx_AF_CAN1to2_TIM12to14  9U
-#define STM32F4xx_AF_OTG_HSFS           10U
-#define STM32F4xx_AF_ETH                11U
-#define STM32F4xx_AF_FSMC_SDIO_OTGHS    12U
-#define STM32F4xx_AF_DCMI               13U
-#define STM32F4xx_AF_EVENTOUT           15U
-
-/*
- * IO pins assignments.
- */
-#define GPIOA_WKUP                      0U
-#define GPIOA_PIN1                      1U
-#define GPIOA_SYS_UART_TX               2U
-#define GPIOA_SYS_UART_RX               3U
-#define GPIOA_SYS_SPI_SS0_N             4U
-#define GPIOA_SYS_SPI_SCLK              5U
-#define GPIOA_SYS_SPI_MISO              6U
-#define GPIOA_SYS_SPI_MOSI              7U
-#define GPIOA_SYS_REG_EN                8U
-#define GPIOA_PROG_RX                   9U
-#define GPIOA_PROG_TX                   10U
-#define GPIOA_CAN_RX                    11U
-#define GPIOA_CAN_TX                    12U
-#define GPIOA_SWDIO                     13U
-#define GPIOA_SWCLK                     14U
-#define GPIOA_SYS_SPI_SS1_N             15U
-
-#define GPIOB_IR_INT1_N                 0U
-#define GPIOB_VSYS_SENSE                1U
-#define GPIOB_POWER_EN                  2U
-#define GPIOB_SYS_UART_DN               3U
-#define GPIOB_CHARGE_STAT2A             4U
-#define GPIOB_BUZZER                    5U
-#define GPIOB_GAUGE_BATLOW2             6U
-#define GPIOB_GAUGE_BATGD2_N            7U
-#define GPIOB_GAUGE_SCL2                8U
-#define GPIOB_GAUGE_SDA2                9U
-#define GPIOB_GAUGE_SCL1                10U
-#define GPIOB_GAUGE_SDA1                11U
-#define GPIOB_LED                       12U
-#define GPIOB_BT_RTS                    13U
-#define GPIOB_BT_CTS                    14U
-#define GPIOB_SYS_UART_UP               15U
-
-#define GPIOC_CHARGE_STAT1A             0U
-#define GPIOC_GAUGE_BATLOW1             1U
-#define GPIOC_GAUGE_BATGD1_N            2U
-#define GPIOC_CHARGE_EN1_N              3U
-#define GPIOC_IR_INT2_N                 4U
-#define GPIOC_TOUCH_INT_N               5U
-#define GPIOC_SYS_DONE                  6U
-#define GPIOC_SYS_PROG_N                7U
-#define GPIOC_PATH_DC                   8U
-#define GPIOC_SYS_SPI_DIR               9U
-#define GPIOC_BT_RX                     10U
-#define GPIOC_BT_TX                     11U
-#define GPIOC_SYS_INT_N                 12U
-#define GPIOC_SYS_PD_N                  13U
-#define GPIOC_SYS_WARMRST_N             14U
-#define GPIOC_BT_RST                    15U
-
-#define GPIOD_PIN0                      0U
-#define GPIOD_PIN1                      1U
-#define GPIOD_CHARGE_EN2_N              2U
-#define GPIOD_PIN3                      3U
-#define GPIOD_PIN4                      4U
-#define GPIOD_PIN5                      5U
-#define GPIOD_PIN6                      6U
-#define GPIOD_PIN7                      7U
-#define GPIOD_PIN8                      8U
-#define GPIOD_PIN9                      9U
-#define GPIOD_PIN10                     10U
-#define GPIOD_PIN11                     11U
-#define GPIOD_PIN12                     12U
-#define GPIOD_PIN13                     13U
-#define GPIOD_PIN14                     14U
-#define GPIOD_PIN15                     15U
-
-#define GPIOE_PIN0                      0U
-#define GPIOE_PIN1                      1U
-#define GPIOE_PIN2                      2U
-#define GPIOE_PIN3                      3U
-#define GPIOE_PIN4                      4U
-#define GPIOE_PIN5                      5U
-#define GPIOE_PIN6                      6U
-#define GPIOE_PIN7                      7U
-#define GPIOE_PIN8                      8U
-#define GPIOE_PIN9                      9U
-#define GPIOE_PIN10                     10U
-#define GPIOE_PIN11                     11U
-#define GPIOE_PIN12                     12U
-#define GPIOE_PIN13                     13U
-#define GPIOE_PIN14                     14U
-#define GPIOE_PIN15                     15U
-
-#define GPIOF_PIN0                      0U
-#define GPIOF_PIN1                      1U
-#define GPIOF_PIN2                      2U
-#define GPIOF_PIN3                      3U
-#define GPIOF_PIN4                      4U
-#define GPIOF_PIN5                      5U
-#define GPIOF_PIN6                      6U
-#define GPIOF_PIN7                      7U
-#define GPIOF_PIN8                      8U
-#define GPIOF_PIN9                      9U
-#define GPIOF_PIN10                     10U
-#define GPIOF_PIN11                     11U
-#define GPIOF_PIN12                     12U
-#define GPIOF_PIN13                     13U
-#define GPIOF_PIN14                     14U
-#define GPIOF_PIN15                     15U
-
-#define GPIOG_PIN0                      0U
-#define GPIOG_PIN1                      1U
-#define GPIOG_PIN2                      2U
-#define GPIOG_PIN3                      3U
-#define GPIOG_PIN4                      4U
-#define GPIOG_PIN5                      5U
-#define GPIOG_PIN6                      6U
-#define GPIOG_PIN7                      7U
-#define GPIOG_PIN8                      8U
-#define GPIOG_PIN9                      9U
-#define GPIOG_PIN10                     10U
-#define GPIOG_PIN11                     11U
-#define GPIOG_PIN12                     12U
-#define GPIOG_PIN13                     13U
-#define GPIOG_PIN14                     14U
-#define GPIOG_PIN15                     15U
-
-#define GPIOH_OSC_IN                    0U
-#define GPIOH_OSC_OUT                   1U
-#define GPIOH_PIN2                      2U
-#define GPIOH_PIN3                      3U
-#define GPIOH_PIN4                      4U
-#define GPIOH_PIN5                      5U
-#define GPIOH_PIN6                      6U
-#define GPIOH_PIN7                      7U
-#define GPIOH_PIN8                      8U
-#define GPIOH_PIN9                      9U
-#define GPIOH_PIN10                     10U
-#define GPIOH_PIN11                     11U
-#define GPIOH_PIN12                     12U
-#define GPIOH_PIN13                     13U
-#define GPIOH_PIN14                     14U
-#define GPIOH_PIN15                     15U
-
-#define GPIOI_PIN0                      0U
-#define GPIOI_PIN1                      1U
-#define GPIOI_PIN2                      2U
-#define GPIOI_PIN3                      3U
-#define GPIOI_PIN4                      4U
-#define GPIOI_PIN5                      5U
-#define GPIOI_PIN6                      6U
-#define GPIOI_PIN7                      7U
-#define GPIOI_PIN8                      8U
-#define GPIOI_PIN9                      9U
-#define GPIOI_PIN10                     10U
-#define GPIOI_PIN11                     11U
-#define GPIOI_PIN12                     12U
-#define GPIOI_PIN13                     13U
-#define GPIOI_PIN14                     14U
-#define GPIOI_PIN15                     15U
-
-/*
- * IO lines assignments.
- */
-#define LINE_WKUP                       PAL_LINE(GPIOA, GPIOA_WKUP)
-#define LINE_SYS_UART_TX                PAL_LINE(GPIOA, GPIOA_SYS_UART_TX)
-#define LINE_SYS_UART_RX                PAL_LINE(GPIOA, GPIOA_SYS_UART_RX)
-#define LINE_SYS_SPI_SS0_N              PAL_LINE(GPIOA, GPIOA_SYS_SPI_SS0_N)
-#define LINE_SYS_SPI_SCLK               PAL_LINE(GPIOA, GPIOA_SYS_SPI_SCLK)
-#define LINE_SYS_SPI_MISO               PAL_LINE(GPIOA, GPIOA_SYS_SPI_MISO)
-#define LINE_SYS_SPI_MOSI               PAL_LINE(GPIOA, GPIOA_SYS_SPI_MOSI)
-#define LINE_SYS_REG_EN                 PAL_LINE(GPIOA, GPIOA_SYS_REG_EN)
-#define LINE_PROG_RX                    PAL_LINE(GPIOA, GPIOA_PROG_RX)
-#define LINE_PROG_TX                    PAL_LINE(GPIOA, GPIOA_PROG_TX)
-#define LINE_CAN_RX                     PAL_LINE(GPIOA, GPIOA_CAN_RX)
-#define LINE_CAN_TX                     PAL_LINE(GPIOA, GPIOA_CAN_TX)
-#define LINE_SWDIO                      PAL_LINE(GPIOA, GPIOA_SWDIO)
-#define LINE_SWCLK                      PAL_LINE(GPIOA, GPIOA_SWCLK)
-#define LINE_SYS_SPI_SS1_N              PAL_LINE(GPIOA, GPIOA_SYS_SPI_SS1_N)
-
-#define LINE_IR_INT1_N                  PAL_LINE(GPIOB, GPIOB_IR_INT1_N)
-#define LINE_VSYS_SENSE                 PAL_LINE(GPIOB, GPIOB_VSYS_SENSE)
-#define LINE_POWER_EN                   PAL_LINE(GPIOB, GPIOB_POWER_EN)
-#define LINE_SYS_UART_DN                PAL_LINE(GPIOB, GPIOB_SYS_UART_DN)
-#define LINE_CHARGE_STAT2A              PAL_LINE(GPIOB, GPIOB_CHARGE_STAT2A)
-#define LINE_BUZZER                     PAL_LINE(GPIOB, GPIOB_BUZZER)
-#define LINE_GAUGE_BATLOW2              PAL_LINE(GPIOB, GPIOB_GAUGE_BATLOW2)
-#define LINE_GAUGE_BATGD2_N             PAL_LINE(GPIOB, GPIOB_GAUGE_BATGD2_N)
-#define LINE_GAUGE_SCL2                 PAL_LINE(GPIOB, GPIOB_GAUGE_SCL2)
-#define LINE_GAUGE_SDA2                 PAL_LINE(GPIOB, GPIOB_GAUGE_SDA2)
-#define LINE_GAUGE_SCL1                 PAL_LINE(GPIOB, GPIOB_GAUGE_SCL1)
-#define LINE_GAUGE_SDA1                 PAL_LINE(GPIOB, GPIOB_GAUGE_SDA1)
-#define LINE_LED                        PAL_LINE(GPIOB, GPIOB_LED)
-#define LINE_BT_RTS                     PAL_LINE(GPIOB, GPIOB_BT_RTS)
-#define LINE_BT_CTS                     PAL_LINE(GPIOB, GPIOB_BT_CTS)
-#define LINE_SYS_UART_UP                PAL_LINE(GPIOB, GPIOB_SYS_UART_UP)
-
-#define LINE_CHARGE_STAT1A              PAL_LINE(GPIOC, GPIOC_CHARGE_STAT1A)
-#define LINE_GAUGE_BATLOW1              PAL_LINE(GPIOC, GPIOC_GAUGE_BATLOW1)
-#define LINE_GAUGE_BATGD1_N             PAL_LINE(GPIOC, GPIOC_GAUGE_BATGD1_N)
-#define LINE_CHARGE_EN1_N               PAL_LINE(GPIOC, GPIOC_CHARGE_EN1_N)
-#define LINE_IR_INT2_N                  PAL_LINE(GPIOC, GPIOC_IR_INT2_N)
-#define LINE_TOUCH_INT_N                PAL_LINE(GPIOC, GPIOC_TOUCH_INT_N)
-#define LINE_SYS_DONE                   PAL_LINE(GPIOC, GPIOC_SYS_DONE)
-#define LINE_SYS_PROG_N                 PAL_LINE(GPIOC, GPIOC_SYS_PROG_N)
-#define LINE_PATH_DC                    PAL_LINE(GPIOC, GPIOC_PATH_DC)
-#define LINE_SYS_SPI_DIR                PAL_LINE(GPIOC, GPIOC_SYS_SPI_DIR)
-#define LINE_BT_RX                      PAL_LINE(GPIOC, GPIOC_BT_RX)
-#define LINE_BT_TX                      PAL_LINE(GPIOC, GPIOC_BT_TX)
-#define LINE_SYS_INT_N                  PAL_LINE(GPIOC, GPIOC_SYS_INT_N)
-#define LINE_SYS_PD_N                   PAL_LINE(GPIOC, GPIOC_SYS_PD_N)
-#define LINE_SYS_WARMRST_N              PAL_LINE(GPIOC, GPIOC_SYS_WARMRST_N)
-#define LINE_BT_RST                     PAL_LINE(GPIOC, GPIOC_BT_RST)
-
-#define LINE_CHARGE_EN2_N               PAL_LINE(GPIOD, GPIOD_CHARGE_EN2_N)
-
-#define LINE_OSC_IN                     PAL_LINE(GPIOH, 0U)
-#define LINE_OSC_OUT                    PAL_LINE(GPIOH, 1U)
-
-/*
- * I/O ports initial setup, this configuration is established soon after reset
- * in the initialization code.
- * Please refer to the STM32 Reference Manual for details.
- */
-#define PIN_MODE_INPUT(n)               (0U << ((n) * 2U))
-#define PIN_MODE_OUTPUT(n)              (1U << ((n) * 2U))
-#define PIN_MODE_ALTERNATE(n)           (2U << ((n) * 2U))
-#define PIN_MODE_ANALOG(n)              (3U << ((n) * 2U))
-#define PIN_ODR_LOW(n)                  (0U << (n))
-#define PIN_ODR_HIGH(n)                 (1U << (n))
-#define PIN_OTYPE_PUSHPULL(n)           (0U << (n))
-#define PIN_OTYPE_OPENDRAIN(n)          (1U << (n))
-#define PIN_OSPEED_LOW(n)               (0U << ((n) * 2U))
-#define PIN_OSPEED_MEDIUM(n)            (1U << ((n) * 2U))
-#define PIN_OSPEED_HIGH(n)              (2U << ((n) * 2U))
-#define PIN_OSPEED_VERYHIGH(n)          (3U << ((n) * 2U))
-#define PIN_PUPDR_FLOATING(n)           (0U << ((n) * 2U))
-#define PIN_PUPDR_PULLUP(n)             (1U << ((n) * 2U))
-#define PIN_PUPDR_PULLDOWN(n)           (2U << ((n) * 2U))
-#define PIN_AFIO_AF(n, v)               ((v) << (((n) % 8U) * 4U))
-
-/*
- * GPIOA setup:
- *
- * PA0  - WKUP                          (input floating)
- * PA1  - PIN1                          (input pullup)
- * PA2  - SYS_UART_TX                   (input floating)
- * PA3  - SYS_UART_RX                   (alternate 7 pushpull floating)
- * PA4  - SYS_SPI_SS0_N                 (input floating)
- * PA5  - SYS_SPI_SCLK                  (alternate 5 pushpull floating)
- * PA6  - SYS_SPI_MISO                  (alternate 5 pushpull floating)
- * PA7  - SYS_SPI_MOSI                  (alternate 5 pushpull floating)
- * PA8  - SYS_REG_EN                    (output pushpull high)
- * PA9  - PROG_RX                       (alternate 7 pushpull floating)
- * PA10 - PROG_TX                       (alternate 7 pushpull pullup)
- * PA11 - CAN_RX                        (alternate 9 pushpull floating)
- * PA12 - CAN_TX                        (input floating)
- * PA13 - SWDIO                         (alternate 0 pushpull floating)
- * PA14 - SWCLK                         (alternate 0 pushpull floating)
- * PA15 - SYS_SPI_SS1_N                 (input floating)
- */
-#define VAL_GPIOA_MODER                 (PIN_MODE_INPUT(GPIOA_WKUP) |                                 \
-                                         PIN_MODE_INPUT(GPIOA_PIN1) |                                 \
-                                         PIN_MODE_INPUT(GPIOA_SYS_UART_TX) |                          \
-                                         PIN_MODE_ALTERNATE(GPIOA_SYS_UART_RX) |                      \
-                                         PIN_MODE_INPUT(GPIOA_SYS_SPI_SS0_N) |                        \
-                                         PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_SCLK) |                     \
-                                         PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MISO) |                     \
-                                         PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MOSI) |                     \
-                                         PIN_MODE_OUTPUT(GPIOA_SYS_REG_EN) |                          \
-                                         PIN_MODE_ALTERNATE(GPIOA_PROG_RX) |                          \
-                                         PIN_MODE_ALTERNATE(GPIOA_PROG_TX) |                          \
-                                         PIN_MODE_ALTERNATE(GPIOA_CAN_RX) |                           \
-                                         PIN_MODE_INPUT(GPIOA_CAN_TX) |                               \
-                                         PIN_MODE_ALTERNATE(GPIOA_SWDIO) |                            \
-                                         PIN_MODE_ALTERNATE(GPIOA_SWCLK) |                            \
-                                         PIN_MODE_INPUT(GPIOA_SYS_SPI_SS1_N))
-#define VAL_GPIOA_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOA_WKUP) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOA_PIN1) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_UART_TX) |                      \
-                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_UART_RX) |                      \
-                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SS0_N) |                    \
-                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SCLK) |                     \
-                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_MISO) |                     \
-                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_MOSI) |                     \
-                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_REG_EN) |                       \
-                                         PIN_OTYPE_PUSHPULL(GPIOA_PROG_RX) |                          \
-                                         PIN_OTYPE_PUSHPULL(GPIOA_PROG_TX) |                          \
-                                         PIN_OTYPE_PUSHPULL(GPIOA_CAN_RX) |                           \
-                                         PIN_OTYPE_PUSHPULL(GPIOA_CAN_TX) |                           \
-                                         PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SS1_N))
-#define VAL_GPIOA_OSPEEDR               (PIN_OSPEED_VERYHIGH(GPIOA_WKUP) |                            \
-                                         PIN_OSPEED_VERYHIGH(GPIOA_PIN1) |                            \
-                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_UART_TX) |                     \
-                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_UART_RX) |                     \
-                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SS0_N) |                   \
-                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SCLK) |                    \
-                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_MISO) |                    \
-                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_MOSI) |                    \
-                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_REG_EN) |                      \
-                                         PIN_OSPEED_VERYHIGH(GPIOA_PROG_RX) |                         \
-                                         PIN_OSPEED_VERYHIGH(GPIOA_PROG_TX) |                         \
-                                         PIN_OSPEED_VERYHIGH(GPIOA_CAN_RX) |                          \
-                                         PIN_OSPEED_VERYHIGH(GPIOA_CAN_TX) |                          \
-                                         PIN_OSPEED_VERYHIGH(GPIOA_SWDIO) |                           \
-                                         PIN_OSPEED_VERYHIGH(GPIOA_SWCLK) |                           \
-                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SS1_N))
-#define VAL_GPIOA_PUPDR                 (PIN_PUPDR_FLOATING(GPIOA_WKUP) |                             \
-                                         PIN_PUPDR_PULLUP(GPIOA_PIN1) |                               \
-                                         PIN_PUPDR_FLOATING(GPIOA_SYS_UART_TX) |                      \
-                                         PIN_PUPDR_FLOATING(GPIOA_SYS_UART_RX) |                      \
-                                         PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SS0_N) |                    \
-                                         PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SCLK) |                     \
-                                         PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_MISO) |                     \
-                                         PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_MOSI) |                     \
-                                         PIN_PUPDR_FLOATING(GPIOA_SYS_REG_EN) |                       \
-                                         PIN_PUPDR_FLOATING(GPIOA_PROG_RX) |                          \
-                                         PIN_PUPDR_PULLUP(GPIOA_PROG_TX) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOA_CAN_RX) |                           \
-                                         PIN_PUPDR_FLOATING(GPIOA_CAN_TX) |                           \
-                                         PIN_PUPDR_FLOATING(GPIOA_SWDIO) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOA_SWCLK) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SS1_N))
-#define VAL_GPIOA_ODR                   (PIN_ODR_HIGH(GPIOA_WKUP) |                                   \
-                                         PIN_ODR_HIGH(GPIOA_PIN1) |                                   \
-                                         PIN_ODR_HIGH(GPIOA_SYS_UART_TX) |                            \
-                                         PIN_ODR_HIGH(GPIOA_SYS_UART_RX) |                            \
-                                         PIN_ODR_HIGH(GPIOA_SYS_SPI_SS0_N) |                          \
-                                         PIN_ODR_HIGH(GPIOA_SYS_SPI_SCLK) |                           \
-                                         PIN_ODR_HIGH(GPIOA_SYS_SPI_MISO) |                           \
-                                         PIN_ODR_HIGH(GPIOA_SYS_SPI_MOSI) |                           \
-                                         PIN_ODR_HIGH(GPIOA_SYS_REG_EN) |                             \
-                                         PIN_ODR_HIGH(GPIOA_PROG_RX) |                                \
-                                         PIN_ODR_HIGH(GPIOA_PROG_TX) |                                \
-                                         PIN_ODR_HIGH(GPIOA_CAN_RX) |                                 \
-                                         PIN_ODR_HIGH(GPIOA_CAN_TX) |                                 \
-                                         PIN_ODR_HIGH(GPIOA_SWDIO) |                                  \
-                                         PIN_ODR_HIGH(GPIOA_SWCLK) |                                  \
-                                         PIN_ODR_HIGH(GPIOA_SYS_SPI_SS1_N))
-#define VAL_GPIOA_AFRL                  (PIN_AFIO_AF(GPIOA_WKUP, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOA_PIN1, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOA_SYS_UART_TX, STM32F4xx_AF_USART1to3) |     \
-                                         PIN_AFIO_AF(GPIOA_SYS_UART_RX, STM32F4xx_AF_USART1to3) |     \
-                                         PIN_AFIO_AF(GPIOA_SYS_SPI_SS0_N, STM32F4xx_AF_system) |      \
-                                         PIN_AFIO_AF(GPIOA_SYS_SPI_SCLK, STM32F4xx_AF_SPI1to2) |      \
-                                         PIN_AFIO_AF(GPIOA_SYS_SPI_MISO, STM32F4xx_AF_SPI1to2) |      \
-                                         PIN_AFIO_AF(GPIOA_SYS_SPI_MOSI, STM32F4xx_AF_SPI1to2))
-#define VAL_GPIOA_AFRH                  (PIN_AFIO_AF(GPIOA_SYS_REG_EN, STM32F4xx_AF_system) |         \
-                                         PIN_AFIO_AF(GPIOA_PROG_RX, STM32F4xx_AF_USART1to3) |         \
-                                         PIN_AFIO_AF(GPIOA_PROG_TX, STM32F4xx_AF_USART1to3) |         \
-                                         PIN_AFIO_AF(GPIOA_CAN_RX, STM32F4xx_AF_CAN1to2_TIM12to14) |  \
-                                         PIN_AFIO_AF(GPIOA_CAN_TX, STM32F4xx_AF_CAN1to2_TIM12to14) |  \
-                                         PIN_AFIO_AF(GPIOA_SWDIO, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOA_SWCLK, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOA_SYS_SPI_SS1_N, STM32F4xx_AF_system))
-
-/*
- * GPIOB setup:
- *
- * PB0  - IR_INT1_N                     (input floating)
- * PB1  - VSYS_SENSE                    (analog)
- * PB2  - POWER_EN                      (output pushpull high)
- * PB3  - SYS_UART_DN                   (output opendrain high)
- * PB4  - CHARGE_STAT2A                 (inout floating)
- * PB5  - BUZZER                        (alternate 2 pushpull floating)
- * PB6  - GAUGE_BATLOW2                 (input floating)
- * PB7  - GAUGE_BATGD2_N                (input floating)
- * PB8  - GAUGE_SCL2                    (alternate 4 opendrain floating)
- * PB9  - GAUGE_SDA2                    (alternate 4 opendrain floating)
- * PB10 - GAUGE_SCL1                    (alternate 4 opendrain floating)
- * PB11 - GAUGE_SDA1                    (alternate 4 opendrain floating)
- * PB12 - LED                           (output opendrain high)
- * PB13 - BT_RTS                        (alternate 7 pushpull floating)
- * PB14 - BT_CTS                        (inout floating)
- * PB15 - SYS_UART_UP                   (output opendrain high)
- */
-#define VAL_GPIOB_MODER                 (PIN_MODE_INPUT(GPIOB_IR_INT1_N) |                            \
-                                         PIN_MODE_ANALOG(GPIOB_VSYS_SENSE) |                          \
-                                         PIN_MODE_OUTPUT(GPIOB_POWER_EN) |                            \
-                                         PIN_MODE_OUTPUT(GPIOB_SYS_UART_DN) |                         \
-                                         PIN_MODE_INPUT(GPIOB_CHARGE_STAT2A) |                        \
-                                         PIN_MODE_ALTERNATE(GPIOB_BUZZER) |                           \
-                                         PIN_MODE_INPUT(GPIOB_GAUGE_BATLOW2) |                        \
-                                         PIN_MODE_INPUT(GPIOB_GAUGE_BATGD2_N) |                       \
-                                         PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL2) |                       \
-                                         PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA2) |                       \
-                                         PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL1) |                       \
-                                         PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA1) |                       \
-                                         PIN_MODE_OUTPUT(GPIOB_LED) |                                 \
-                                         PIN_MODE_ALTERNATE(GPIOB_BT_RTS) |                           \
-                                         PIN_MODE_INPUT(GPIOB_BT_CTS) |                               \
-                                         PIN_MODE_OUTPUT(GPIOB_SYS_UART_UP))
-#define VAL_GPIOB_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOB_IR_INT1_N) |                        \
-                                         PIN_OTYPE_PUSHPULL(GPIOB_VSYS_SENSE) |                       \
-                                         PIN_OTYPE_PUSHPULL(GPIOB_POWER_EN) |                         \
-                                         PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_DN) |                     \
-                                         PIN_OTYPE_PUSHPULL(GPIOB_CHARGE_STAT2A) |                    \
-                                         PIN_OTYPE_PUSHPULL(GPIOB_BUZZER) |                           \
-                                         PIN_OTYPE_PUSHPULL(GPIOB_GAUGE_BATLOW2) |                    \
-                                         PIN_OTYPE_PUSHPULL(GPIOB_GAUGE_BATGD2_N) |                   \
-                                         PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL2) |                      \
-                                         PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA2) |                      \
-                                         PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL1) |                      \
-                                         PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA1) |                      \
-                                         PIN_OTYPE_OPENDRAIN(GPIOB_LED) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOB_BT_RTS) |                           \
-                                         PIN_OTYPE_PUSHPULL(GPIOB_BT_CTS) |                           \
-                                         PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_UP))
-#define VAL_GPIOB_OSPEEDR               (PIN_OSPEED_VERYHIGH(GPIOB_IR_INT1_N) |                       \
-                                         PIN_OSPEED_VERYHIGH(GPIOB_VSYS_SENSE) |                      \
-                                         PIN_OSPEED_VERYHIGH(GPIOB_POWER_EN) |                        \
-                                         PIN_OSPEED_VERYHIGH(GPIOB_SYS_UART_DN) |                     \
-                                         PIN_OSPEED_VERYHIGH(GPIOB_CHARGE_STAT2A) |                   \
-                                         PIN_OSPEED_VERYHIGH(GPIOB_BUZZER) |                          \
-                                         PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_BATLOW2) |                   \
-                                         PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_BATGD2_N) |                  \
-                                         PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SCL2) |                      \
-                                         PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SDA2) |                      \
-                                         PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SCL1) |                      \
-                                         PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SDA1) |                      \
-                                         PIN_OSPEED_VERYHIGH(GPIOB_LED) |                             \
-                                         PIN_OSPEED_VERYHIGH(GPIOB_BT_RTS) |                          \
-                                         PIN_OSPEED_VERYHIGH(GPIOB_BT_CTS) |                          \
-                                         PIN_OSPEED_VERYHIGH(GPIOB_SYS_UART_UP))
-#define VAL_GPIOB_PUPDR                 (PIN_PUPDR_FLOATING(GPIOB_IR_INT1_N) |                        \
-                                         PIN_PUPDR_FLOATING(GPIOB_VSYS_SENSE) |                       \
-                                         PIN_PUPDR_FLOATING(GPIOB_POWER_EN) |                         \
-                                         PIN_PUPDR_FLOATING(GPIOB_SYS_UART_DN) |                      \
-                                         PIN_PUPDR_FLOATING(GPIOB_CHARGE_STAT2A) |                    \
-                                         PIN_PUPDR_FLOATING(GPIOB_BUZZER) |                           \
-                                         PIN_PUPDR_FLOATING(GPIOB_GAUGE_BATLOW2) |                    \
-                                         PIN_PUPDR_FLOATING(GPIOB_GAUGE_BATGD2_N) |                   \
-                                         PIN_PUPDR_FLOATING(GPIOB_GAUGE_SCL2) |                       \
-                                         PIN_PUPDR_FLOATING(GPIOB_GAUGE_SDA2) |                       \
-                                         PIN_PUPDR_FLOATING(GPIOB_GAUGE_SCL1) |                       \
-                                         PIN_PUPDR_FLOATING(GPIOB_GAUGE_SDA1) |                       \
-                                         PIN_PUPDR_FLOATING(GPIOB_LED) |                              \
-                                         PIN_PUPDR_FLOATING(GPIOB_BT_RTS) |                           \
-                                         PIN_PUPDR_FLOATING(GPIOB_BT_CTS) |                           \
-                                         PIN_PUPDR_FLOATING(GPIOB_SYS_UART_UP))
-#define VAL_GPIOB_ODR                   (PIN_ODR_HIGH(GPIOB_IR_INT1_N) |                              \
-                                         PIN_ODR_HIGH(GPIOB_VSYS_SENSE) |                             \
-                                         PIN_ODR_HIGH(GPIOB_POWER_EN) |                               \
-                                         PIN_ODR_HIGH(GPIOB_SYS_UART_DN) |                            \
-                                         PIN_ODR_HIGH(GPIOB_CHARGE_STAT2A) |                          \
-                                         PIN_ODR_HIGH(GPIOB_BUZZER) |                                 \
-                                         PIN_ODR_HIGH(GPIOB_GAUGE_BATLOW2) |                          \
-                                         PIN_ODR_HIGH(GPIOB_GAUGE_BATGD2_N) |                         \
-                                         PIN_ODR_HIGH(GPIOB_GAUGE_SCL2) |                             \
-                                         PIN_ODR_HIGH(GPIOB_GAUGE_SDA2) |                             \
-                                         PIN_ODR_HIGH(GPIOB_GAUGE_SCL1) |                             \
-                                         PIN_ODR_HIGH(GPIOB_GAUGE_SDA1) |                             \
-                                         PIN_ODR_HIGH(GPIOB_LED) |                                    \
-                                         PIN_ODR_HIGH(GPIOB_BT_RTS) |                                 \
-                                         PIN_ODR_HIGH(GPIOB_BT_CTS) |                                 \
-                                         PIN_ODR_HIGH(GPIOB_SYS_UART_UP))
-#define VAL_GPIOB_AFRL                  (PIN_AFIO_AF(GPIOB_IR_INT1_N, STM32F4xx_AF_system) |          \
-                                         PIN_AFIO_AF(GPIOB_VSYS_SENSE, STM32F4xx_AF_system) |         \
-                                         PIN_AFIO_AF(GPIOB_POWER_EN, STM32F4xx_AF_system) |           \
-                                         PIN_AFIO_AF(GPIOB_SYS_UART_DN, STM32F4xx_AF_system) |        \
-                                         PIN_AFIO_AF(GPIOB_CHARGE_STAT2A, STM32F4xx_AF_system) |      \
-                                         PIN_AFIO_AF(GPIOB_BUZZER, STM32F4xx_AF_TIM3to5) |            \
-                                         PIN_AFIO_AF(GPIOB_GAUGE_BATLOW2, STM32F4xx_AF_system) |      \
-                                         PIN_AFIO_AF(GPIOB_GAUGE_BATGD2_N, STM32F4xx_AF_system))
-#define VAL_GPIOB_AFRH                  (PIN_AFIO_AF(GPIOB_GAUGE_SCL2, STM32F4xx_AF_I2C1to3) |        \
-                                         PIN_AFIO_AF(GPIOB_GAUGE_SDA2, STM32F4xx_AF_I2C1to3) |        \
-                                         PIN_AFIO_AF(GPIOB_GAUGE_SCL1, STM32F4xx_AF_I2C1to3) |        \
-                                         PIN_AFIO_AF(GPIOB_GAUGE_SDA1, STM32F4xx_AF_I2C1to3) |        \
-                                         PIN_AFIO_AF(GPIOB_LED, STM32F4xx_AF_system) |                \
-                                         PIN_AFIO_AF(GPIOB_BT_RTS, STM32F4xx_AF_USART1to3) |          \
-                                         PIN_AFIO_AF(GPIOB_BT_CTS, STM32F4xx_AF_USART1to3) |          \
-                                         PIN_AFIO_AF(GPIOB_SYS_UART_UP, STM32F4xx_AF_system))
-
-/*
- * GPIOC setup:
- *
- * PC0  - CHARGE_STAT1A                 (input floating)
- * PC1  - GAUGE_BATLOW1                 (input floating)
- * PC2  - GAUGE_BATGD1_N                (input floating)
- * PC3  - CHARGE_EN1_N                  (output opendrain high)
- * PC4  - IR_INT2_N                     (input floating)
- * PC5  - TOUCH_INT_N                   (input floating)
- * PC6  - SYS_DONE                      (input floating)
- * PC7  - SYS_PROG_N                    (output opendrain high)
- * PC8  - PATH_DC                       (input floating)
- * PC9  - SYS_SPI_DIR                   (output opendrain high)
- * PC10 - BT_RX                         (alternate 7 pushpull floating)
- * PC11 - BT_TX                         (alternate 7 pushpull floating)
- * PC12 - SYS_INT_N                     (output opendrain low)
- * PC13 - SYS_PD_N                      (output opendrain high)
- * PC14 - SYS_WARMRST_N                 (output opendrain high)
- * PC15 - BT_RST                        (output opendrain high)
- */
-#define VAL_GPIOC_MODER                 (PIN_MODE_INPUT(GPIOC_CHARGE_STAT1A) |                        \
-                                         PIN_MODE_INPUT(GPIOC_GAUGE_BATLOW1) |                        \
-                                         PIN_MODE_INPUT(GPIOC_GAUGE_BATGD1_N) |                       \
-                                         PIN_MODE_OUTPUT(GPIOC_CHARGE_EN1_N) |                        \
-                                         PIN_MODE_INPUT(GPIOC_IR_INT2_N) |                            \
-                                         PIN_MODE_INPUT(GPIOC_TOUCH_INT_N) |                          \
-                                         PIN_MODE_INPUT(GPIOC_SYS_DONE) |                             \
-                                         PIN_MODE_OUTPUT(GPIOC_SYS_PROG_N) |                          \
-                                         PIN_MODE_INPUT(GPIOC_PATH_DC) |                              \
-                                         PIN_MODE_OUTPUT(GPIOC_SYS_SPI_DIR) |                         \
-                                         PIN_MODE_ALTERNATE(GPIOC_BT_RX) |                            \
-                                         PIN_MODE_ALTERNATE(GPIOC_BT_TX) |                            \
-                                         PIN_MODE_OUTPUT(GPIOC_SYS_INT_N) |                           \
-                                         PIN_MODE_OUTPUT(GPIOC_SYS_PD_N) |                            \
-                                         PIN_MODE_OUTPUT(GPIOC_SYS_WARMRST_N) |                       \
-                                         PIN_MODE_OUTPUT(GPIOC_BT_RST))
-#define VAL_GPIOC_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOC_CHARGE_STAT1A) |                    \
-                                         PIN_OTYPE_PUSHPULL(GPIOC_GAUGE_BATLOW1) |                    \
-                                         PIN_OTYPE_PUSHPULL(GPIOC_GAUGE_BATGD1_N) |                   \
-                                         PIN_OTYPE_OPENDRAIN(GPIOC_CHARGE_EN1_N) |                    \
-                                         PIN_OTYPE_PUSHPULL(GPIOC_IR_INT2_N) |                        \
-                                         PIN_OTYPE_PUSHPULL(GPIOC_TOUCH_INT_N) |                      \
-                                         PIN_OTYPE_PUSHPULL(GPIOC_SYS_DONE) |                         \
-                                         PIN_OTYPE_OPENDRAIN(GPIOC_SYS_PROG_N) |                      \
-                                         PIN_OTYPE_PUSHPULL(GPIOC_PATH_DC) |                          \
-                                         PIN_OTYPE_OPENDRAIN(GPIOC_SYS_SPI_DIR) |                     \
-                                         PIN_OTYPE_PUSHPULL(GPIOC_BT_RX) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOC_BT_TX) |                            \
-                                         PIN_OTYPE_OPENDRAIN(GPIOC_SYS_INT_N) |                       \
-                                         PIN_OTYPE_OPENDRAIN(GPIOC_SYS_PD_N) |                        \
-                                         PIN_OTYPE_OPENDRAIN(GPIOC_SYS_WARMRST_N) |                   \
-                                         PIN_OTYPE_OPENDRAIN(GPIOC_BT_RST))
-#define VAL_GPIOC_OSPEEDR               (PIN_OSPEED_VERYHIGH(GPIOC_CHARGE_STAT1A) |                   \
-                                         PIN_OSPEED_VERYHIGH(GPIOC_GAUGE_BATLOW1) |                   \
-                                         PIN_OSPEED_VERYHIGH(GPIOC_GAUGE_BATGD1_N) |                  \
-                                         PIN_OSPEED_VERYHIGH(GPIOC_CHARGE_EN1_N) |                    \
-                                         PIN_OSPEED_VERYHIGH(GPIOC_IR_INT2_N) |                       \
-                                         PIN_OSPEED_VERYHIGH(GPIOC_TOUCH_INT_N) |                     \
-                                         PIN_OSPEED_VERYHIGH(GPIOC_SYS_DONE) |                        \
-                                         PIN_OSPEED_VERYHIGH(GPIOC_SYS_PROG_N) |                      \
-                                         PIN_OSPEED_VERYHIGH(GPIOC_PATH_DC) |                         \
-                                         PIN_OSPEED_VERYHIGH(GPIOC_SYS_SPI_DIR) |                     \
-                                         PIN_OSPEED_VERYHIGH(GPIOC_BT_RX) |                           \
-                                         PIN_OSPEED_VERYHIGH(GPIOC_BT_TX) |                           \
-                                         PIN_OSPEED_VERYHIGH(GPIOC_SYS_INT_N) |                       \
-                                         PIN_OSPEED_VERYHIGH(GPIOC_SYS_PD_N) |                        \
-                                         PIN_OSPEED_VERYHIGH(GPIOC_SYS_WARMRST_N) |                   \
-                                         PIN_OSPEED_VERYHIGH(GPIOC_BT_RST))
-#define VAL_GPIOC_PUPDR                 (PIN_PUPDR_FLOATING(GPIOC_CHARGE_STAT1A) |                    \
-                                         PIN_PUPDR_FLOATING(GPIOC_GAUGE_BATLOW1) |                    \
-                                         PIN_PUPDR_FLOATING(GPIOC_GAUGE_BATGD1_N) |                   \
-                                         PIN_PUPDR_FLOATING(GPIOC_CHARGE_EN1_N) |                     \
-                                         PIN_PUPDR_FLOATING(GPIOC_IR_INT2_N) |                        \
-                                         PIN_PUPDR_FLOATING(GPIOC_TOUCH_INT_N) |                      \
-                                         PIN_PUPDR_FLOATING(GPIOC_SYS_DONE) |                         \
-                                         PIN_PUPDR_FLOATING(GPIOC_SYS_PROG_N) |                       \
-                                         PIN_PUPDR_FLOATING(GPIOC_PATH_DC) |                          \
-                                         PIN_PUPDR_FLOATING(GPIOC_SYS_SPI_DIR) |                      \
-                                         PIN_PUPDR_FLOATING(GPIOC_BT_RX) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOC_BT_TX) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOC_SYS_INT_N) |                        \
-                                         PIN_PUPDR_FLOATING(GPIOC_SYS_PD_N) |                         \
-                                         PIN_PUPDR_FLOATING(GPIOC_SYS_WARMRST_N) |                    \
-                                         PIN_PUPDR_FLOATING(GPIOC_BT_RST))
-#define VAL_GPIOC_ODR                   (PIN_ODR_HIGH(GPIOC_CHARGE_STAT1A) |                          \
-                                         PIN_ODR_HIGH(GPIOC_GAUGE_BATLOW1) |                          \
-                                         PIN_ODR_HIGH(GPIOC_GAUGE_BATGD1_N) |                         \
-                                         PIN_ODR_HIGH(GPIOC_CHARGE_EN1_N) |                           \
-                                         PIN_ODR_HIGH(GPIOC_IR_INT2_N) |                              \
-                                         PIN_ODR_HIGH(GPIOC_TOUCH_INT_N) |                            \
-                                         PIN_ODR_HIGH(GPIOC_SYS_DONE) |                               \
-                                         PIN_ODR_HIGH(GPIOC_SYS_PROG_N) |                             \
-                                         PIN_ODR_LOW(GPIOC_PATH_DC) |                                 \
-                                         PIN_ODR_HIGH(GPIOC_SYS_SPI_DIR) |                            \
-                                         PIN_ODR_HIGH(GPIOC_BT_RX) |                                  \
-                                         PIN_ODR_HIGH(GPIOC_BT_TX) |                                  \
-                                         PIN_ODR_LOW(GPIOC_SYS_INT_N) |                               \
-                                         PIN_ODR_HIGH(GPIOC_SYS_PD_N) |                               \
-                                         PIN_ODR_HIGH(GPIOC_SYS_WARMRST_N) |                          \
-                                         PIN_ODR_HIGH(GPIOC_BT_RST))
-#define VAL_GPIOC_AFRL                  (PIN_AFIO_AF(GPIOC_CHARGE_STAT1A, STM32F4xx_AF_system) |      \
-                                         PIN_AFIO_AF(GPIOC_GAUGE_BATLOW1, STM32F4xx_AF_system) |      \
-                                         PIN_AFIO_AF(GPIOC_GAUGE_BATGD1_N, STM32F4xx_AF_system) |     \
-                                         PIN_AFIO_AF(GPIOC_CHARGE_EN1_N, STM32F4xx_AF_system) |       \
-                                         PIN_AFIO_AF(GPIOC_IR_INT2_N, STM32F4xx_AF_system) |          \
-                                         PIN_AFIO_AF(GPIOC_TOUCH_INT_N, STM32F4xx_AF_system) |        \
-                                         PIN_AFIO_AF(GPIOC_SYS_DONE, STM32F4xx_AF_system) |           \
-                                         PIN_AFIO_AF(GPIOC_SYS_PROG_N, STM32F4xx_AF_system))
-#define VAL_GPIOC_AFRH                  (PIN_AFIO_AF(GPIOC_PATH_DC, STM32F4xx_AF_system) |            \
-                                         PIN_AFIO_AF(GPIOC_SYS_SPI_DIR, STM32F4xx_AF_system) |        \
-                                         PIN_AFIO_AF(GPIOC_BT_RX, STM32F4xx_AF_USART1to3) |           \
-                                         PIN_AFIO_AF(GPIOC_BT_TX, STM32F4xx_AF_USART1to3) |           \
-                                         PIN_AFIO_AF(GPIOC_SYS_INT_N, STM32F4xx_AF_system) |          \
-                                         PIN_AFIO_AF(GPIOC_SYS_PD_N, STM32F4xx_AF_system) |           \
-                                         PIN_AFIO_AF(GPIOC_SYS_WARMRST_N, STM32F4xx_AF_system) |      \
-                                         PIN_AFIO_AF(GPIOC_BT_RST, STM32F4xx_AF_system))
-
-/*
- * GPIOD setup:
- *
- * PD0  - PIN0                          (input floating)
- * PD1  - PIN1                          (input floating)
- * PD2  - CHARGE_EN2_N                  (output opendrain high)
- * PD3  - PIN3                          (input floating)
- * PD4  - PIN4                          (input floating)
- * PD5  - PIN5                          (input floating)
- * PD6  - PIN6                          (input floating)
- * PD7  - PIN7                          (input floating)
- * PD8  - PIN8                          (input floating)
- * PD9  - PIN9                          (input floating)
- * PD10 - PIN10                         (input floating)
- * PD11 - PIN11                         (input floating)
- * PD12 - PIN12                         (input floating)
- * PD13 - PIN13                         (input floating)
- * PD14 - PIN14                         (input floating)
- * PD15 - PIN15                         (input floating)
- */
-#define VAL_GPIOD_MODER                 (PIN_MODE_INPUT(GPIOD_PIN0) |                                 \
-                                         PIN_MODE_INPUT(GPIOD_PIN1) |                                 \
-                                         PIN_MODE_OUTPUT(GPIOD_CHARGE_EN2_N) |                        \
-                                         PIN_MODE_INPUT(GPIOD_PIN3) |                                 \
-                                         PIN_MODE_INPUT(GPIOD_PIN4) |                                 \
-                                         PIN_MODE_INPUT(GPIOD_PIN5) |                                 \
-                                         PIN_MODE_INPUT(GPIOD_PIN6) |                                 \
-                                         PIN_MODE_INPUT(GPIOD_PIN7) |                                 \
-                                         PIN_MODE_INPUT(GPIOD_PIN8) |                                 \
-                                         PIN_MODE_INPUT(GPIOD_PIN9) |                                 \
-                                         PIN_MODE_INPUT(GPIOD_PIN10) |                                \
-                                         PIN_MODE_INPUT(GPIOD_PIN11) |                                \
-                                         PIN_MODE_INPUT(GPIOD_PIN12) |                                \
-                                         PIN_MODE_INPUT(GPIOD_PIN13) |                                \
-                                         PIN_MODE_INPUT(GPIOD_PIN14) |                                \
-                                         PIN_MODE_INPUT(GPIOD_PIN15))
-#define VAL_GPIOD_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN1) |                             \
-                                         PIN_OTYPE_OPENDRAIN(GPIOD_CHARGE_EN2_N) |                    \
-                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN3) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN4) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN5) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN6) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN7) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN8) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN9) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN10) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN11) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN12) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN13) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN14) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
-#define VAL_GPIOD_OSPEEDR               (PIN_OSPEED_VERYHIGH(GPIOD_PIN0) |                            \
-                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN1) |                            \
-                                         PIN_OSPEED_VERYHIGH(GPIOD_CHARGE_EN2_N) |                    \
-                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN3) |                            \
-                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN4) |                            \
-                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN5) |                            \
-                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN6) |                            \
-                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN7) |                            \
-                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN8) |                            \
-                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN9) |                            \
-                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN10) |                           \
-                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN11) |                           \
-                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN12) |                           \
-                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN13) |                           \
-                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN14) |                           \
-                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN15))
-#define VAL_GPIOD_PUPDR                 (PIN_PUPDR_PULLUP(GPIOD_PIN0) |                               \
-                                         PIN_PUPDR_PULLUP(GPIOD_PIN1) |                               \
-                                         PIN_PUPDR_FLOATING(GPIOD_CHARGE_EN2_N) |                     \
-                                         PIN_PUPDR_PULLUP(GPIOD_PIN3) |                               \
-                                         PIN_PUPDR_PULLUP(GPIOD_PIN4) |                               \
-                                         PIN_PUPDR_PULLUP(GPIOD_PIN5) |                               \
-                                         PIN_PUPDR_PULLUP(GPIOD_PIN6) |                               \
-                                         PIN_PUPDR_PULLUP(GPIOD_PIN7) |                               \
-                                         PIN_PUPDR_PULLUP(GPIOD_PIN8) |                               \
-                                         PIN_PUPDR_PULLUP(GPIOD_PIN9) |                               \
-                                         PIN_PUPDR_PULLUP(GPIOD_PIN10) |                              \
-                                         PIN_PUPDR_PULLUP(GPIOD_PIN11) |                              \
-                                         PIN_PUPDR_PULLUP(GPIOD_PIN12) |                              \
-                                         PIN_PUPDR_PULLUP(GPIOD_PIN13) |                              \
-                                         PIN_PUPDR_PULLUP(GPIOD_PIN14) |                              \
-                                         PIN_PUPDR_PULLUP(GPIOD_PIN15))
-#define VAL_GPIOD_ODR                   (PIN_ODR_HIGH(GPIOD_PIN0) |                                   \
-                                         PIN_ODR_HIGH(GPIOD_PIN1) |                                   \
-                                         PIN_ODR_HIGH(GPIOD_CHARGE_EN2_N) |                           \
-                                         PIN_ODR_HIGH(GPIOD_PIN3) |                                   \
-                                         PIN_ODR_HIGH(GPIOD_PIN4) |                                   \
-                                         PIN_ODR_HIGH(GPIOD_PIN5) |                                   \
-                                         PIN_ODR_HIGH(GPIOD_PIN6) |                                   \
-                                         PIN_ODR_HIGH(GPIOD_PIN7) |                                   \
-                                         PIN_ODR_HIGH(GPIOD_PIN8) |                                   \
-                                         PIN_ODR_HIGH(GPIOD_PIN9) |                                   \
-                                         PIN_ODR_HIGH(GPIOD_PIN10) |                                  \
-                                         PIN_ODR_HIGH(GPIOD_PIN11) |                                  \
-                                         PIN_ODR_HIGH(GPIOD_PIN12) |                                  \
-                                         PIN_ODR_HIGH(GPIOD_PIN13) |                                  \
-                                         PIN_ODR_HIGH(GPIOD_PIN14) |                                  \
-                                         PIN_ODR_HIGH(GPIOD_PIN15))
-#define VAL_GPIOD_AFRL                  (PIN_AFIO_AF(GPIOD_PIN0, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOD_PIN1, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOD_CHARGE_EN2_N, STM32F4xx_AF_system) |       \
-                                         PIN_AFIO_AF(GPIOD_PIN3, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOD_PIN4, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOD_PIN5, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOD_PIN6, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOD_PIN7, STM32F4xx_AF_system))
-#define VAL_GPIOD_AFRH                  (PIN_AFIO_AF(GPIOD_PIN8, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOD_PIN9, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOD_PIN10, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOD_PIN11, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOD_PIN12, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOD_PIN13, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOD_PIN14, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOD_PIN15, STM32F4xx_AF_system))
-
-/*
- * GPIOE setup:
- *
- * PE0  - PIN0                          (input floating)
- * PE1  - PIN1                          (input floating)
- * PE2  - PIN2                          (input floating)
- * PE3  - PIN3                          (input floating)
- * PE4  - PIN4                          (input floating)
- * PE5  - PIN5                          (input floating)
- * PE6  - PIN6                          (input floating)
- * PE7  - PIN7                          (input floating)
- * PE8  - PIN8                          (input floating)
- * PE9  - PIN9                          (input floating)
- * PE10 - PIN10                         (input floating)
- * PE11 - PIN11                         (input floating)
- * PE12 - PIN12                         (input floating)
- * PE13 - PIN13                         (input floating)
- * PE14 - PIN14                         (input floating)
- * PE15 - PIN15                         (input floating)
- */
-#define VAL_GPIOE_MODER                 (PIN_MODE_INPUT(GPIOE_PIN0) |                                 \
-                                         PIN_MODE_INPUT(GPIOE_PIN1) |                                 \
-                                         PIN_MODE_INPUT(GPIOE_PIN2) |                                 \
-                                         PIN_MODE_INPUT(GPIOE_PIN3) |                                 \
-                                         PIN_MODE_INPUT(GPIOE_PIN4) |                                 \
-                                         PIN_MODE_INPUT(GPIOE_PIN5) |                                 \
-                                         PIN_MODE_INPUT(GPIOE_PIN6) |                                 \
-                                         PIN_MODE_INPUT(GPIOE_PIN7) |                                 \
-                                         PIN_MODE_INPUT(GPIOE_PIN8) |                                 \
-                                         PIN_MODE_INPUT(GPIOE_PIN9) |                                 \
-                                         PIN_MODE_INPUT(GPIOE_PIN10) |                                \
-                                         PIN_MODE_INPUT(GPIOE_PIN11) |                                \
-                                         PIN_MODE_INPUT(GPIOE_PIN12) |                                \
-                                         PIN_MODE_INPUT(GPIOE_PIN13) |                                \
-                                         PIN_MODE_INPUT(GPIOE_PIN14) |                                \
-                                         PIN_MODE_INPUT(GPIOE_PIN15))
-#define VAL_GPIOE_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN1) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN2) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN3) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN4) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN5) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN6) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN7) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN8) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN9) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN10) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN11) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN12) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN13) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN14) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
-#define VAL_GPIOE_OSPEEDR               (PIN_OSPEED_LOW(GPIOE_PIN0) |                                 \
-                                         PIN_OSPEED_LOW(GPIOE_PIN1) |                                 \
-                                         PIN_OSPEED_LOW(GPIOE_PIN2) |                                 \
-                                         PIN_OSPEED_LOW(GPIOE_PIN3) |                                 \
-                                         PIN_OSPEED_LOW(GPIOE_PIN4) |                                 \
-                                         PIN_OSPEED_LOW(GPIOE_PIN5) |                                 \
-                                         PIN_OSPEED_LOW(GPIOE_PIN6) |                                 \
-                                         PIN_OSPEED_LOW(GPIOE_PIN7) |                                 \
-                                         PIN_OSPEED_LOW(GPIOE_PIN8) |                                 \
-                                         PIN_OSPEED_LOW(GPIOE_PIN9) |                                 \
-                                         PIN_OSPEED_LOW(GPIOE_PIN10) |                                \
-                                         PIN_OSPEED_LOW(GPIOE_PIN11) |                                \
-                                         PIN_OSPEED_LOW(GPIOE_PIN12) |                                \
-                                         PIN_OSPEED_LOW(GPIOE_PIN13) |                                \
-                                         PIN_OSPEED_LOW(GPIOE_PIN14) |                                \
-                                         PIN_OSPEED_LOW(GPIOE_PIN15))
-#define VAL_GPIOE_PUPDR                 (PIN_PUPDR_FLOATING(GPIOE_PIN0) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOE_PIN1) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOE_PIN2) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOE_PIN3) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOE_PIN4) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOE_PIN5) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOE_PIN6) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOE_PIN7) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOE_PIN8) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOE_PIN9) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOE_PIN10) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOE_PIN11) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOE_PIN12) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOE_PIN13) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOE_PIN14) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOE_PIN15))
-#define VAL_GPIOE_ODR                   (PIN_ODR_LOW(GPIOE_PIN0) |                                    \
-                                         PIN_ODR_LOW(GPIOE_PIN1) |                                    \
-                                         PIN_ODR_LOW(GPIOE_PIN2) |                                    \
-                                         PIN_ODR_LOW(GPIOE_PIN3) |                                    \
-                                         PIN_ODR_LOW(GPIOE_PIN4) |                                    \
-                                         PIN_ODR_LOW(GPIOE_PIN5) |                                    \
-                                         PIN_ODR_LOW(GPIOE_PIN6) |                                    \
-                                         PIN_ODR_LOW(GPIOE_PIN7) |                                    \
-                                         PIN_ODR_LOW(GPIOE_PIN8) |                                    \
-                                         PIN_ODR_LOW(GPIOE_PIN9) |                                    \
-                                         PIN_ODR_LOW(GPIOE_PIN10) |                                   \
-                                         PIN_ODR_LOW(GPIOE_PIN11) |                                   \
-                                         PIN_ODR_LOW(GPIOE_PIN12) |                                   \
-                                         PIN_ODR_LOW(GPIOE_PIN13) |                                   \
-                                         PIN_ODR_LOW(GPIOE_PIN14) |                                   \
-                                         PIN_ODR_LOW(GPIOE_PIN15))
-#define VAL_GPIOE_AFRL                  (PIN_AFIO_AF(GPIOE_PIN0, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOE_PIN1, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOE_PIN2, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOE_PIN3, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOE_PIN4, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOE_PIN5, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOE_PIN6, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOE_PIN7, STM32F4xx_AF_system))
-#define VAL_GPIOE_AFRH                  (PIN_AFIO_AF(GPIOE_PIN8, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOE_PIN9, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOE_PIN10, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOE_PIN11, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOE_PIN12, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOE_PIN13, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOE_PIN14, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOE_PIN15, STM32F4xx_AF_system))
-
-/*
- * GPIOF setup:
- *
- * PF0  - PIN0                          (input floating)
- * PF1  - PIN1                          (input floating)
- * PF2  - PIN2                          (input floating)
- * PF3  - PIN3                          (input floating)
- * PF4  - PIN4                          (input floating)
- * PF5  - PIN5                          (input floating)
- * PF6  - PIN6                          (input floating)
- * PF7  - PIN7                          (input floating)
- * PF8  - PIN8                          (input floating)
- * PF9  - PIN9                          (input floating)
- * PF10 - PIN10                         (input floating)
- * PF11 - PIN11                         (input floating)
- * PF12 - PIN12                         (input floating)
- * PF13 - PIN13                         (input floating)
- * PF14 - PIN14                         (input floating)
- * PF15 - PIN15                         (input floating)
- */
-#define VAL_GPIOF_MODER                 (PIN_MODE_INPUT(GPIOF_PIN0) |                                 \
-                                         PIN_MODE_INPUT(GPIOF_PIN1) |                                 \
-                                         PIN_MODE_INPUT(GPIOF_PIN2) |                                 \
-                                         PIN_MODE_INPUT(GPIOF_PIN3) |                                 \
-                                         PIN_MODE_INPUT(GPIOF_PIN4) |                                 \
-                                         PIN_MODE_INPUT(GPIOF_PIN5) |                                 \
-                                         PIN_MODE_INPUT(GPIOF_PIN6) |                                 \
-                                         PIN_MODE_INPUT(GPIOF_PIN7) |                                 \
-                                         PIN_MODE_INPUT(GPIOF_PIN8) |                                 \
-                                         PIN_MODE_INPUT(GPIOF_PIN9) |                                 \
-                                         PIN_MODE_INPUT(GPIOF_PIN10) |                                \
-                                         PIN_MODE_INPUT(GPIOF_PIN11) |                                \
-                                         PIN_MODE_INPUT(GPIOF_PIN12) |                                \
-                                         PIN_MODE_INPUT(GPIOF_PIN13) |                                \
-                                         PIN_MODE_INPUT(GPIOF_PIN14) |                                \
-                                         PIN_MODE_INPUT(GPIOF_PIN15))
-#define VAL_GPIOF_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN1) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN2) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN3) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN4) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN5) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN6) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN7) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN8) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN9) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN10) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN11) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN12) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN13) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN14) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
-#define VAL_GPIOF_OSPEEDR               (PIN_OSPEED_LOW(GPIOF_PIN0) |                                 \
-                                         PIN_OSPEED_LOW(GPIOF_PIN1) |                                 \
-                                         PIN_OSPEED_LOW(GPIOF_PIN2) |                                 \
-                                         PIN_OSPEED_LOW(GPIOF_PIN3) |                                 \
-                                         PIN_OSPEED_LOW(GPIOF_PIN4) |                                 \
-                                         PIN_OSPEED_LOW(GPIOF_PIN5) |                                 \
-                                         PIN_OSPEED_LOW(GPIOF_PIN6) |                                 \
-                                         PIN_OSPEED_LOW(GPIOF_PIN7) |                                 \
-                                         PIN_OSPEED_LOW(GPIOF_PIN8) |                                 \
-                                         PIN_OSPEED_LOW(GPIOF_PIN9) |                                 \
-                                         PIN_OSPEED_LOW(GPIOF_PIN10) |                                \
-                                         PIN_OSPEED_LOW(GPIOF_PIN11) |                                \
-                                         PIN_OSPEED_LOW(GPIOF_PIN12) |                                \
-                                         PIN_OSPEED_LOW(GPIOF_PIN13) |                                \
-                                         PIN_OSPEED_LOW(GPIOF_PIN14) |                                \
-                                         PIN_OSPEED_LOW(GPIOF_PIN15))
-#define VAL_GPIOF_PUPDR                 (PIN_PUPDR_FLOATING(GPIOF_PIN0) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOF_PIN1) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOF_PIN2) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOF_PIN3) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOF_PIN4) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOF_PIN5) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOF_PIN6) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOF_PIN7) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOF_PIN8) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOF_PIN9) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOF_PIN10) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOF_PIN11) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOF_PIN12) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOF_PIN13) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOF_PIN14) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOF_PIN15))
-#define VAL_GPIOF_ODR                   (PIN_ODR_LOW(GPIOF_PIN0) |                                    \
-                                         PIN_ODR_LOW(GPIOF_PIN1) |                                    \
-                                         PIN_ODR_LOW(GPIOF_PIN2) |                                    \
-                                         PIN_ODR_LOW(GPIOF_PIN3) |                                    \
-                                         PIN_ODR_LOW(GPIOF_PIN4) |                                    \
-                                         PIN_ODR_LOW(GPIOF_PIN5) |                                    \
-                                         PIN_ODR_LOW(GPIOF_PIN6) |                                    \
-                                         PIN_ODR_LOW(GPIOF_PIN7) |                                    \
-                                         PIN_ODR_LOW(GPIOF_PIN8) |                                    \
-                                         PIN_ODR_LOW(GPIOF_PIN9) |                                    \
-                                         PIN_ODR_LOW(GPIOF_PIN10) |                                   \
-                                         PIN_ODR_LOW(GPIOF_PIN11) |                                   \
-                                         PIN_ODR_LOW(GPIOF_PIN12) |                                   \
-                                         PIN_ODR_LOW(GPIOF_PIN13) |                                   \
-                                         PIN_ODR_LOW(GPIOF_PIN14) |                                   \
-                                         PIN_ODR_LOW(GPIOF_PIN15))
-#define VAL_GPIOF_AFRL                  (PIN_AFIO_AF(GPIOF_PIN0, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOF_PIN1, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOF_PIN2, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOF_PIN3, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOF_PIN4, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOF_PIN5, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOF_PIN6, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOF_PIN7, STM32F4xx_AF_system))
-#define VAL_GPIOF_AFRH                  (PIN_AFIO_AF(GPIOF_PIN8, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOF_PIN9, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOF_PIN10, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOF_PIN11, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOF_PIN12, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOF_PIN13, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOF_PIN14, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOF_PIN15, STM32F4xx_AF_system))
-
-/*
- * GPIOG setup:
- *
- * PG0  - PIN0                          (input floating)
- * PG1  - PIN1                          (input floating)
- * PG2  - PIN2                          (input floating)
- * PG3  - PIN3                          (input floating)
- * PG4  - PIN4                          (input floating)
- * PG5  - PIN5                          (input floating)
- * PG6  - PIN6                          (input floating)
- * PG7  - PIN7                          (input floating)
- * PG8  - PIN8                          (input floating)
- * PG9  - PIN9                          (input floating)
- * PG10 - PIN10                         (input floating)
- * PG11 - PIN11                         (input floating)
- * PG12 - PIN12                         (input floating)
- * PG13 - PIN13                         (input floating)
- * PG14 - PIN14                         (input floating)
- * PG15 - PIN15                         (input floating)
- */
-#define VAL_GPIOG_MODER                 (PIN_MODE_INPUT(GPIOG_PIN0) |                                 \
-                                         PIN_MODE_INPUT(GPIOG_PIN1) |                                 \
-                                         PIN_MODE_INPUT(GPIOG_PIN2) |                                 \
-                                         PIN_MODE_INPUT(GPIOG_PIN3) |                                 \
-                                         PIN_MODE_INPUT(GPIOG_PIN4) |                                 \
-                                         PIN_MODE_INPUT(GPIOG_PIN5) |                                 \
-                                         PIN_MODE_INPUT(GPIOG_PIN6) |                                 \
-                                         PIN_MODE_INPUT(GPIOG_PIN7) |                                 \
-                                         PIN_MODE_INPUT(GPIOG_PIN8) |                                 \
-                                         PIN_MODE_INPUT(GPIOG_PIN9) |                                 \
-                                         PIN_MODE_INPUT(GPIOG_PIN10) |                                \
-                                         PIN_MODE_INPUT(GPIOG_PIN11) |                                \
-                                         PIN_MODE_INPUT(GPIOG_PIN12) |                                \
-                                         PIN_MODE_INPUT(GPIOG_PIN13) |                                \
-                                         PIN_MODE_INPUT(GPIOG_PIN14) |                                \
-                                         PIN_MODE_INPUT(GPIOG_PIN15))
-#define VAL_GPIOG_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN1) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN2) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN3) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN4) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN5) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN6) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN7) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN8) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN9) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN10) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN11) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN12) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN13) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN14) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
-#define VAL_GPIOG_OSPEEDR               (PIN_OSPEED_LOW(GPIOG_PIN0) |                                 \
-                                         PIN_OSPEED_LOW(GPIOG_PIN1) |                                 \
-                                         PIN_OSPEED_LOW(GPIOG_PIN2) |                                 \
-                                         PIN_OSPEED_LOW(GPIOG_PIN3) |                                 \
-                                         PIN_OSPEED_LOW(GPIOG_PIN4) |                                 \
-                                         PIN_OSPEED_LOW(GPIOG_PIN5) |                                 \
-                                         PIN_OSPEED_LOW(GPIOG_PIN6) |                                 \
-                                         PIN_OSPEED_LOW(GPIOG_PIN7) |                                 \
-                                         PIN_OSPEED_LOW(GPIOG_PIN8) |                                 \
-                                         PIN_OSPEED_LOW(GPIOG_PIN9) |                                 \
-                                         PIN_OSPEED_LOW(GPIOG_PIN10) |                                \
-                                         PIN_OSPEED_LOW(GPIOG_PIN11) |                                \
-                                         PIN_OSPEED_LOW(GPIOG_PIN12) |                                \
-                                         PIN_OSPEED_LOW(GPIOG_PIN13) |                                \
-                                         PIN_OSPEED_LOW(GPIOG_PIN14) |                                \
-                                         PIN_OSPEED_LOW(GPIOG_PIN15))
-#define VAL_GPIOG_PUPDR                 (PIN_PUPDR_FLOATING(GPIOG_PIN0) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOG_PIN1) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOG_PIN2) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOG_PIN3) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOG_PIN4) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOG_PIN5) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOG_PIN6) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOG_PIN7) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOG_PIN8) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOG_PIN9) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOG_PIN10) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOG_PIN11) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOG_PIN12) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOG_PIN13) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOG_PIN14) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOG_PIN15))
-#define VAL_GPIOG_ODR                   (PIN_ODR_LOW(GPIOG_PIN0) |                                    \
-                                         PIN_ODR_LOW(GPIOG_PIN1) |                                    \
-                                         PIN_ODR_LOW(GPIOG_PIN2) |                                    \
-                                         PIN_ODR_LOW(GPIOG_PIN3) |                                    \
-                                         PIN_ODR_LOW(GPIOG_PIN4) |                                    \
-                                         PIN_ODR_LOW(GPIOG_PIN5) |                                    \
-                                         PIN_ODR_LOW(GPIOG_PIN6) |                                    \
-                                         PIN_ODR_LOW(GPIOG_PIN7) |                                    \
-                                         PIN_ODR_LOW(GPIOG_PIN8) |                                    \
-                                         PIN_ODR_LOW(GPIOG_PIN9) |                                    \
-                                         PIN_ODR_LOW(GPIOG_PIN10) |                                   \
-                                         PIN_ODR_LOW(GPIOG_PIN11) |                                   \
-                                         PIN_ODR_LOW(GPIOG_PIN12) |                                   \
-                                         PIN_ODR_LOW(GPIOG_PIN13) |                                   \
-                                         PIN_ODR_LOW(GPIOG_PIN14) |                                   \
-                                         PIN_ODR_LOW(GPIOG_PIN15))
-#define VAL_GPIOG_AFRL                  (PIN_AFIO_AF(GPIOG_PIN0, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOG_PIN1, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOG_PIN2, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOG_PIN3, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOG_PIN4, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOG_PIN5, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOG_PIN6, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOG_PIN7, STM32F4xx_AF_system))
-#define VAL_GPIOG_AFRH                  (PIN_AFIO_AF(GPIOG_PIN8, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOG_PIN9, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOG_PIN10, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOG_PIN11, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOG_PIN12, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOG_PIN13, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOG_PIN14, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOG_PIN15, STM32F4xx_AF_system))
-
-/*
- * GPIOH setup:
- *
- * PH0  - OSC_IN                        (input floating)
- * PH1  - OSC_OUT                       (input floating)
- * PH2  - PIN2                          (input floating)
- * PH3  - PIN3                          (input floating)
- * PH4  - PIN4                          (input floating)
- * PH5  - PIN5                          (input floating)
- * PH6  - PIN6                          (input floating)
- * PH7  - PIN7                          (input floating)
- * PH8  - PIN8                          (input floating)
- * PH9  - PIN9                          (input floating)
- * PH10 - PIN10                         (input floating)
- * PH11 - PIN11                         (input floating)
- * PH12 - PIN12                         (input floating)
- * PH13 - PIN13                         (input floating)
- * PH14 - PIN14                         (input floating)
- * PH15 - PIN15                         (input floating)
- */
-#define VAL_GPIOH_MODER                 (PIN_MODE_INPUT(GPIOH_OSC_IN) |                               \
-                                         PIN_MODE_INPUT(GPIOH_OSC_OUT) |                              \
-                                         PIN_MODE_INPUT(GPIOH_PIN2) |                                 \
-                                         PIN_MODE_INPUT(GPIOH_PIN3) |                                 \
-                                         PIN_MODE_INPUT(GPIOH_PIN4) |                                 \
-                                         PIN_MODE_INPUT(GPIOH_PIN5) |                                 \
-                                         PIN_MODE_INPUT(GPIOH_PIN6) |                                 \
-                                         PIN_MODE_INPUT(GPIOH_PIN7) |                                 \
-                                         PIN_MODE_INPUT(GPIOH_PIN8) |                                 \
-                                         PIN_MODE_INPUT(GPIOH_PIN9) |                                 \
-                                         PIN_MODE_INPUT(GPIOH_PIN10) |                                \
-                                         PIN_MODE_INPUT(GPIOH_PIN11) |                                \
-                                         PIN_MODE_INPUT(GPIOH_PIN12) |                                \
-                                         PIN_MODE_INPUT(GPIOH_PIN13) |                                \
-                                         PIN_MODE_INPUT(GPIOH_PIN14) |                                \
-                                         PIN_MODE_INPUT(GPIOH_PIN15))
-#define VAL_GPIOH_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) |                           \
-                                         PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) |                          \
-                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN2) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN3) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN4) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN5) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN6) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN7) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN8) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN9) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN10) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN11) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN12) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN13) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN14) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN15))
-#define VAL_GPIOH_OSPEEDR               (PIN_OSPEED_VERYHIGH(GPIOH_OSC_IN) |                          \
-                                         PIN_OSPEED_VERYHIGH(GPIOH_OSC_OUT) |                         \
-                                         PIN_OSPEED_LOW(GPIOH_PIN2) |                                 \
-                                         PIN_OSPEED_LOW(GPIOH_PIN3) |                                 \
-                                         PIN_OSPEED_LOW(GPIOH_PIN4) |                                 \
-                                         PIN_OSPEED_LOW(GPIOH_PIN5) |                                 \
-                                         PIN_OSPEED_LOW(GPIOH_PIN6) |                                 \
-                                         PIN_OSPEED_LOW(GPIOH_PIN7) |                                 \
-                                         PIN_OSPEED_LOW(GPIOH_PIN8) |                                 \
-                                         PIN_OSPEED_LOW(GPIOH_PIN9) |                                 \
-                                         PIN_OSPEED_LOW(GPIOH_PIN10) |                                \
-                                         PIN_OSPEED_LOW(GPIOH_PIN11) |                                \
-                                         PIN_OSPEED_LOW(GPIOH_PIN12) |                                \
-                                         PIN_OSPEED_LOW(GPIOH_PIN13) |                                \
-                                         PIN_OSPEED_LOW(GPIOH_PIN14) |                                \
-                                         PIN_OSPEED_LOW(GPIOH_PIN15))
-#define VAL_GPIOH_PUPDR                 (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) |                           \
-                                         PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) |                          \
-                                         PIN_PUPDR_FLOATING(GPIOH_PIN2) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOH_PIN3) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOH_PIN4) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOH_PIN5) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOH_PIN6) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOH_PIN7) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOH_PIN8) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOH_PIN9) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOH_PIN10) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOH_PIN11) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOH_PIN12) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOH_PIN13) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOH_PIN14) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOH_PIN15))
-#define VAL_GPIOH_ODR                   (PIN_ODR_HIGH(GPIOH_OSC_IN) |                                 \
-                                         PIN_ODR_HIGH(GPIOH_OSC_OUT) |                                \
-                                         PIN_ODR_HIGH(GPIOH_PIN2) |                                   \
-                                         PIN_ODR_HIGH(GPIOH_PIN3) |                                   \
-                                         PIN_ODR_HIGH(GPIOH_PIN4) |                                   \
-                                         PIN_ODR_HIGH(GPIOH_PIN5) |                                   \
-                                         PIN_ODR_HIGH(GPIOH_PIN6) |                                   \
-                                         PIN_ODR_HIGH(GPIOH_PIN7) |                                   \
-                                         PIN_ODR_HIGH(GPIOH_PIN8) |                                   \
-                                         PIN_ODR_HIGH(GPIOH_PIN9) |                                   \
-                                         PIN_ODR_HIGH(GPIOH_PIN10) |                                  \
-                                         PIN_ODR_HIGH(GPIOH_PIN11) |                                  \
-                                         PIN_ODR_HIGH(GPIOH_PIN12) |                                  \
-                                         PIN_ODR_HIGH(GPIOH_PIN13) |                                  \
-                                         PIN_ODR_HIGH(GPIOH_PIN14) |                                  \
-                                         PIN_ODR_HIGH(GPIOH_PIN15))
-#define VAL_GPIOH_AFRL                  (PIN_AFIO_AF(GPIOH_OSC_IN, STM32F4xx_AF_system) |             \
-                                         PIN_AFIO_AF(GPIOH_OSC_OUT, STM32F4xx_AF_system) |            \
-                                         PIN_AFIO_AF(GPIOH_PIN2, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOH_PIN3, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOH_PIN4, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOH_PIN5, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOH_PIN6, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOH_PIN7, STM32F4xx_AF_system))
-#define VAL_GPIOH_AFRH                  (PIN_AFIO_AF(GPIOH_PIN8, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOH_PIN9, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOH_PIN10, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOH_PIN11, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOH_PIN12, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOH_PIN13, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOH_PIN14, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOH_PIN15, STM32F4xx_AF_system))
-
-/*
- * GPIOI setup:
- *
- * PI0  - PIN0                          (input floating)
- * PI1  - PIN1                          (input floating)
- * PI2  - PIN2                          (input floating)
- * PI3  - PIN3                          (input floating)
- * PI4  - PIN4                          (input floating)
- * PI5  - PIN5                          (input floating)
- * PI6  - PIN6                          (input floating)
- * PI7  - PIN7                          (input floating)
- * PI8  - PIN8                          (input floating)
- * PI9  - PIN9                          (input floating)
- * PI10 - PIN10                         (input floating)
- * PI11 - PIN11                         (input floating)
- * PI12 - PIN12                         (input floating)
- * PI13 - PIN13                         (input floating)
- * PI14 - PIN14                         (input floating)
- * PI15 - PIN15                         (input floating)
- */
-#define VAL_GPIOI_MODER                 (PIN_MODE_INPUT(GPIOI_PIN0) |                                 \
-                                         PIN_MODE_INPUT(GPIOI_PIN1) |                                 \
-                                         PIN_MODE_INPUT(GPIOI_PIN2) |                                 \
-                                         PIN_MODE_INPUT(GPIOI_PIN3) |                                 \
-                                         PIN_MODE_INPUT(GPIOI_PIN4) |                                 \
-                                         PIN_MODE_INPUT(GPIOI_PIN5) |                                 \
-                                         PIN_MODE_INPUT(GPIOI_PIN6) |                                 \
-                                         PIN_MODE_INPUT(GPIOI_PIN7) |                                 \
-                                         PIN_MODE_INPUT(GPIOI_PIN8) |                                 \
-                                         PIN_MODE_INPUT(GPIOI_PIN9) |                                 \
-                                         PIN_MODE_INPUT(GPIOI_PIN10) |                                \
-                                         PIN_MODE_INPUT(GPIOI_PIN11) |                                \
-                                         PIN_MODE_INPUT(GPIOI_PIN12) |                                \
-                                         PIN_MODE_INPUT(GPIOI_PIN13) |                                \
-                                         PIN_MODE_INPUT(GPIOI_PIN14) |                                \
-                                         PIN_MODE_INPUT(GPIOI_PIN15))
-#define VAL_GPIOI_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN1) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN2) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN3) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN4) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN5) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN6) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN7) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN8) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN9) |                             \
-                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN10) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN11) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN12) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN13) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN14) |                            \
-                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN15))
-#define VAL_GPIOI_OSPEEDR               (PIN_OSPEED_LOW(GPIOI_PIN0) |                                 \
-                                         PIN_OSPEED_LOW(GPIOI_PIN1) |                                 \
-                                         PIN_OSPEED_LOW(GPIOI_PIN2) |                                 \
-                                         PIN_OSPEED_LOW(GPIOI_PIN3) |                                 \
-                                         PIN_OSPEED_LOW(GPIOI_PIN4) |                                 \
-                                         PIN_OSPEED_LOW(GPIOI_PIN5) |                                 \
-                                         PIN_OSPEED_LOW(GPIOI_PIN6) |                                 \
-                                         PIN_OSPEED_LOW(GPIOI_PIN7) |                                 \
-                                         PIN_OSPEED_LOW(GPIOI_PIN8) |                                 \
-                                         PIN_OSPEED_LOW(GPIOI_PIN9) |                                 \
-                                         PIN_OSPEED_LOW(GPIOI_PIN10) |                                \
-                                         PIN_OSPEED_LOW(GPIOI_PIN11) |                                \
-                                         PIN_OSPEED_LOW(GPIOI_PIN12) |                                \
-                                         PIN_OSPEED_LOW(GPIOI_PIN13) |                                \
-                                         PIN_OSPEED_LOW(GPIOI_PIN14) |                                \
-                                         PIN_OSPEED_LOW(GPIOI_PIN15))
-#define VAL_GPIOI_PUPDR                 (PIN_PUPDR_FLOATING(GPIOI_PIN0) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOI_PIN1) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOI_PIN2) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOI_PIN3) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOI_PIN4) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOI_PIN5) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOI_PIN6) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOI_PIN7) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOI_PIN8) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOI_PIN9) |                             \
-                                         PIN_PUPDR_FLOATING(GPIOI_PIN10) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOI_PIN11) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOI_PIN12) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOI_PIN13) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOI_PIN14) |                            \
-                                         PIN_PUPDR_FLOATING(GPIOI_PIN15))
-#define VAL_GPIOI_ODR                   (PIN_ODR_LOW(GPIOI_PIN0) |                                    \
-                                         PIN_ODR_LOW(GPIOI_PIN1) |                                    \
-                                         PIN_ODR_LOW(GPIOI_PIN2) |                                    \
-                                         PIN_ODR_LOW(GPIOI_PIN3) |                                    \
-                                         PIN_ODR_LOW(GPIOI_PIN4) |                                    \
-                                         PIN_ODR_LOW(GPIOI_PIN5) |                                    \
-                                         PIN_ODR_LOW(GPIOI_PIN6) |                                    \
-                                         PIN_ODR_LOW(GPIOI_PIN7) |                                    \
-                                         PIN_ODR_LOW(GPIOI_PIN8) |                                    \
-                                         PIN_ODR_LOW(GPIOI_PIN9) |                                    \
-                                         PIN_ODR_LOW(GPIOI_PIN10) |                                   \
-                                         PIN_ODR_LOW(GPIOI_PIN11) |                                   \
-                                         PIN_ODR_LOW(GPIOI_PIN12) |                                   \
-                                         PIN_ODR_LOW(GPIOI_PIN13) |                                   \
-                                         PIN_ODR_LOW(GPIOI_PIN14) |                                   \
-                                         PIN_ODR_LOW(GPIOI_PIN15))
-#define VAL_GPIOI_AFRL                  (PIN_AFIO_AF(GPIOI_PIN0, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOI_PIN1, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOI_PIN2, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOI_PIN3, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOI_PIN4, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOI_PIN5, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOI_PIN6, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOI_PIN7, STM32F4xx_AF_system))
-#define VAL_GPIOI_AFRH                  (PIN_AFIO_AF(GPIOI_PIN8, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOI_PIN9, STM32F4xx_AF_system) |               \
-                                         PIN_AFIO_AF(GPIOI_PIN10, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOI_PIN11, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOI_PIN12, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOI_PIN13, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOI_PIN14, STM32F4xx_AF_system) |              \
-                                         PIN_AFIO_AF(GPIOI_PIN15, STM32F4xx_AF_system))
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
-  void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* _BOARD_H_ */
diff --git a/os/modules/PowerManagement_1-1/board.mk b/os/modules/PowerManagement_1-1/board.mk
deleted file mode 100644
index 7a12204..0000000
--- a/os/modules/PowerManagement_1-1/board.mk
+++ /dev/null
@@ -1,36 +0,0 @@
-################################################################################
-# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
-# (AMiRo) platform.                                                            #
-# Copyright (C) 2016..2018  Thomas Schöpping et al.                            #
-#                                                                              #
-# This program is free software: you can redistribute it and/or modify         #
-# it under the terms of the GNU General Public License as published by         #
-# the Free Software Foundation, either version 3 of the License, or            #
-# (at your option) any later version.                                          #
-#                                                                              #
-# This program is distributed in the hope that it will be useful,              #
-# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
-# GNU General Public License for more details.                                 #
-#                                                                              #
-# You should have received a copy of the GNU General Public License            #
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
-#                                                                              #
-# This research/work was supported by the Cluster of Excellence Cognitive      #
-# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
-# funded by the German Research Foundation (DFG).                              #
-################################################################################
-
-
-
-# absolute path to this directory
-BOARD_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
-
-# include paths
-BOARDINC = $(BOARD_DIR)
-
-# C source files
-BOARDSRC = $(BOARD_DIR)board.c
-
-# linker path
-BOARDLD = $(AMIROOS)/hal/ports
diff --git a/os/modules/PowerManagement_1-1/chconf.h b/os/modules/PowerManagement_1-1/chconf.h
deleted file mode 100644
index 7ee734c..0000000
--- a/os/modules/PowerManagement_1-1/chconf.h
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file    os/modules/PowerManagement/chconf.h
- * @brief   ChibiOS Configuration file for the PowerManagement v1.1 module.
- * @details Contains the application specific kernel settings.
- *
- * @addtogroup config
- * @details Kernel related settings and hooks.
- * @{
- */
-
-#ifndef _CHCONF_H_
-#define _CHCONF_H_
-
-#include <aosconf.h>
-
-/*===========================================================================*/
-/**
- * @name System timers settings
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   System time counter resolution.
- * @note    Allowed values are 16 or 32 bits.
- */
-#define CH_CFG_ST_RESOLUTION                32
-
-/**
- * @brief   System tick frequency.
- * @details Frequency of the system timer that drives the system ticks. This
- *          setting also defines the system tick time unit.
- */
-#define CH_CFG_ST_FREQUENCY                 1000000UL
-
-/**
- * @brief   Time delta constant for the tick-less mode.
- * @note    If this value is zero then the system uses the classic
- *          periodic tick. This value represents the minimum number
- *          of ticks that is safe to specify in a timeout directive.
- *          The value one is not valid, timeouts are rounded up to
- *          this value.
- */
-#define CH_CFG_ST_TIMEDELTA                 10
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Port specific settings
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   NVIC VTOR initialization offset.
- * @details On initialization, the code at this address in the flash memory will be executed.
- */
-#define CORTEX_VTOR_INIT 0x00008000U
-
-/** @} */
-
-#include <aos_chconf.h>
-
-#endif  /* _CHCONF_H_ */
-
-/** @} */
diff --git a/os/modules/PowerManagement_1-1/halconf.h b/os/modules/PowerManagement_1-1/halconf.h
deleted file mode 100644
index b97e72b..0000000
--- a/os/modules/PowerManagement_1-1/halconf.h
+++ /dev/null
@@ -1,388 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file    os/modules/PowerManagement/halconf.h
- * @brief   HAL configuration header for the PowerManagement v1.1 module.
- * @details HAL configuration file, this file allows to enable or disable the
- *          various device drivers from your application. You may also use
- *          this file in order to override the device drivers default settings.
- *
- * @addtogroup HAL_CONF
- * @{
- */
-
-#ifndef _HALCONF_H_
-#define _HALCONF_H_
-
-/**
- * @brief   Enables the PAL subsystem.
- */
-#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
-#define HAL_USE_PAL                 TRUE
-#endif
-
-/**
- * @brief   Enables the ADC subsystem.
- */
-#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
-#define HAL_USE_ADC                 TRUE
-#endif
-
-/**
- * @brief   Enables the CAN subsystem.
- */
-#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
-#define HAL_USE_CAN                 TRUE
-#endif
-
-/**
- * @brief   Enables the DAC subsystem.
- */
-#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
-#define HAL_USE_DAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the EXT subsystem.
- */
-#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
-#define HAL_USE_EXT                 TRUE
-#endif
-
-/**
- * @brief   Enables the GPT subsystem.
- */
-#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
-#define HAL_USE_GPT                 FALSE
-#endif
-
-/**
- * @brief   Enables the I2C subsystem.
- */
-#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
-#define HAL_USE_I2C                 TRUE
-#endif
-
-/**
- * @brief   Enables the I2S subsystem.
- */
-#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
-#define HAL_USE_I2S                 FALSE
-#endif
-
-/**
- * @brief   Enables the ICU subsystem.
- */
-#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
-#define HAL_USE_ICU                 FALSE
-#endif
-
-/**
- * @brief   Enables the MAC subsystem.
- */
-#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
-#define HAL_USE_MAC                 FALSE
-#endif
-
-/**
- * @brief   Enables the MMC_SPI subsystem.
- */
-#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_MMC_SPI             FALSE
-#endif
-
-/**
- * @brief   Enables the PWM subsystem.
- */
-#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
-#define HAL_USE_PWM                 TRUE
-#endif
-
-/**
- * @brief   Enables the RTC subsystem.
- */
-#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
-#define HAL_USE_RTC                 TRUE
-#endif
-
-/**
- * @brief   Enables the SDC subsystem.
- */
-#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
-#define HAL_USE_SDC                 FALSE
-#endif
-
-/**
- * @brief   Enables the SERIAL subsystem.
- */
-#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL              TRUE
-#endif
-
-/**
- * @brief   Enables the SERIAL over USB subsystem.
- */
-#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL_USB          FALSE
-#endif
-
-/**
- * @brief   Enables the SPI subsystem.
- */
-#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_SPI                 TRUE
-#endif
-
-/**
- * @brief   Enables the UART subsystem.
- */
-#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
-#define HAL_USE_UART                FALSE
-#endif
-
-/**
- * @brief   Enables the USB subsystem.
- */
-#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
-#define HAL_USE_USB                 FALSE
-#endif
-
-/**
- * @brief   Enables the WDG subsystem.
- */
-#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
-#define HAL_USE_WDG                 FALSE
-#endif
-
-/**
- * @brief   Enables the QEI subsystem.
- */
-#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__)
-#define HAL_USE_QEI                 FALSE
-#endif
-
-/*===========================================================================*/
-/* ADC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
-#define ADC_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define ADC_USE_MUTUAL_EXCLUSION    FALSE
-#endif
-
-/*===========================================================================*/
-/* CAN driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Sleep mode related APIs inclusion switch.
- */
-#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
-#define CAN_USE_SLEEP_MODE          FALSE
-#endif
-
-/*===========================================================================*/
-/* I2C driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables the mutual exclusion APIs on the I2C bus.
- */
-#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define I2C_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* MAC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
-#define MAC_USE_ZERO_COPY           FALSE
-#endif
-
-/**
- * @brief   Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
-#define MAC_USE_EVENTS              FALSE
-#endif
-
-/*===========================================================================*/
-/* MMC_SPI driver related settings.                                          */
-/*===========================================================================*/
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- *          This option is recommended also if the SPI driver does not
- *          use a DMA channel and heavily loads the CPU.
- */
-#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
-#define MMC_NICE_WAITING            FALSE
-#endif
-
-/*===========================================================================*/
-/* SDC driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Number of initialization attempts before rejecting the card.
- * @note    Attempts are performed at 10mS intervals.
- */
-#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
-#define SDC_INIT_RETRY              100
-#endif
-
-/**
- * @brief   Include support for MMC cards.
- * @note    MMC support is not yet implemented so this option must be kept
- *          at @p FALSE.
- */
-#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
-#define SDC_MMC_SUPPORT             FALSE
-#endif
-
-/**
- * @brief   Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- *          routines releasing some extra CPU time for the threads with
- *          lower priority, this may slow down the driver a bit however.
- */
-#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
-#define SDC_NICE_WAITING            FALSE
-#endif
-
-/*===========================================================================*/
-/* SERIAL driver related settings.                                           */
-/*===========================================================================*/
-
-/**
- * @brief   Default bit rate.
- * @details Configuration parameter, this is the baud rate selected for the
- *          default configuration.
- */
-#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
-#define SERIAL_DEFAULT_BITRATE      115200
-#endif
-
-/**
- * @brief   Serial buffers size.
- * @details Configuration parameter, you can change the depth of the queue
- *          buffers depending on the requirements of your application.
- * @note    The default is 16 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_BUFFERS_SIZE         16
-#endif
-
-/*===========================================================================*/
-/* SERIAL_USB driver related setting.                                        */
-/*===========================================================================*/
-
-/**
- * @brief   Serial over USB buffers size.
- * @details Configuration parameter, the buffer size must be a multiple of
- *          the USB data endpoint maximum packet size.
- * @note    The default is 256 bytes for both the transmission and receive
- *          buffers.
- */
-#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_USB_BUFFERS_SIZE     256
-#endif
-
-/**
- * @brief   Serial over USB number of buffers.
- * @note    The default is 2 buffers.
- */
-#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
-#define SERIAL_USB_BUFFERS_NUMBER   2
-#endif
-
-/*===========================================================================*/
-/* SPI driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
-#define SPI_USE_WAIT                TRUE
-#endif
-
-/**
- * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define SPI_USE_MUTUAL_EXCLUSION    TRUE
-#endif
-
-/*===========================================================================*/
-/* UART driver related settings.                                             */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
-#define UART_USE_WAIT               FALSE
-#endif
-
-/**
- * @brief   Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define UART_USE_MUTUAL_EXCLUSION   FALSE
-#endif
-
-/*===========================================================================*/
-/* USB driver related settings.                                              */
-/*===========================================================================*/
-
-/**
- * @brief   Enables synchronous APIs.
- * @note    Disabling this option saves both code and data space.
- */
-#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
-#define USB_USE_WAIT                FALSE
-#endif
-
-#endif /* _HALCONF_H_ */
-
-/** @} */
diff --git a/os/modules/PowerManagement_1-1/mcuconf.h b/os/modules/PowerManagement_1-1/mcuconf.h
deleted file mode 100644
index fd198b9..0000000
--- a/os/modules/PowerManagement_1-1/mcuconf.h
+++ /dev/null
@@ -1,362 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#ifndef _MCUCONF_H_
-#define _MCUCONF_H_
-
-#define STM32F4xx_MCUCONF
-
-/*
- * Some old revisions of F4x MCU randomly chrashes with certain compiler options enabled.
- * This flag makes the kernel dynamically detect the MCUs ID code and CPU ID and react accordingly.
- * (see ChibiOS kernel: os/hal/ports/STM32/STM32F4xx/hal_lld.c)
- */
-#define STM32_USE_REVISION_A_FIX
-
-/*
- * STM32F4xx drivers configuration.
- * The following settings override the default settings present in
- * the various device driver implementation headers.
- * Note that the settings for each driver only have effect if the whole
- * driver is enabled in halconf.h.
- *
- * IRQ priorities:
- * 15...0       Lowest...Highest.
- *
- * DMA priorities:
- * 0...3        Lowest...Highest.
- */
-
-/*
- * HAL driver system settings.
- */
-#define STM32_NO_INIT                       FALSE
-#define STM32_HSI_ENABLED                   TRUE
-#define STM32_LSI_ENABLED                   TRUE
-#define STM32_HSE_ENABLED                   TRUE
-#define STM32_LSE_ENABLED                   FALSE
-#define STM32_CLOCK48_REQUIRED              TRUE
-#define STM32_SW                            STM32_SW_PLL
-#define STM32_PLLSRC                        STM32_PLLSRC_HSE
-#define STM32_PLLM_VALUE                    8
-#define STM32_PLLN_VALUE                    336
-#define STM32_PLLP_VALUE                    2
-#define STM32_PLLQ_VALUE                    7
-#define STM32_HPRE                          STM32_HPRE_DIV1
-#define STM32_PPRE1                         STM32_PPRE1_DIV4
-#define STM32_PPRE2                         STM32_PPRE2_DIV2
-#define STM32_RTCSEL                        STM32_RTCSEL_LSI
-#define STM32_RTCPRE_VALUE                  8
-#define STM32_MCO1SEL                       STM32_MCO1SEL_HSI
-#define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1
-#define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK
-#define STM32_MCO2PRE                       STM32_MCO2PRE_DIV5
-#define STM32_I2SSRC                        STM32_I2SSRC_CKIN
-#define STM32_PLLI2SN_VALUE                 192
-#define STM32_PLLI2SR_VALUE                 5
-#define STM32_PVD_ENABLE                    FALSE
-#define STM32_PLS                           STM32_PLS_LEV0
-#define STM32_BKPRAM_ENABLE                 FALSE
-
-/*
- * ADC driver system settings.
- */
-#define STM32_ADC_ADCPRE                    ADC_CCR_ADCPRE_DIV4
-#define STM32_ADC_USE_ADC1                  TRUE
-#define STM32_ADC_USE_ADC2                  FALSE
-#define STM32_ADC_USE_ADC3                  FALSE
-#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(2, 4)
-#define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(2, 2)
-#define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(2, 1)
-#define STM32_ADC_ADC1_DMA_PRIORITY         2
-#define STM32_ADC_ADC2_DMA_PRIORITY         2
-#define STM32_ADC_ADC3_DMA_PRIORITY         2
-#define STM32_ADC_IRQ_PRIORITY              6
-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6
-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6
-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6
-
-/*
- * CAN driver system settings.
- */
-#define STM32_CAN_USE_CAN1                  TRUE
-#define STM32_CAN_USE_CAN2                  FALSE
-#define STM32_CAN_CAN1_IRQ_PRIORITY         11
-#define STM32_CAN_CAN2_IRQ_PRIORITY         11
-
-/*
- * DAC driver system settings.
- */
-#define STM32_DAC_DUAL_MODE                 FALSE
-#define STM32_DAC_USE_DAC1_CH1              FALSE
-#define STM32_DAC_USE_DAC1_CH2              FALSE
-#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY     10
-#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY     10
-#define STM32_DAC_DAC1_CH1_DMA_PRIORITY     2
-#define STM32_DAC_DAC1_CH2_DMA_PRIORITY     2
-#define STM32_DAC_DAC1_CH1_DMA_STREAM       STM32_DMA_STREAM_ID(1, 5)
-#define STM32_DAC_DAC1_CH2_DMA_STREAM       STM32_DMA_STREAM_ID(1, 6)
-
-/*
- * EXT driver system settings.
- */
-#define STM32_EXT_EXTI0_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI1_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI2_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI3_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI4_IRQ_PRIORITY        6
-#define STM32_EXT_EXTI5_9_IRQ_PRIORITY      6
-#define STM32_EXT_EXTI10_15_IRQ_PRIORITY    6
-#define STM32_EXT_EXTI16_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI17_IRQ_PRIORITY       15
-#define STM32_EXT_EXTI18_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI19_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI20_IRQ_PRIORITY       6
-#define STM32_EXT_EXTI21_IRQ_PRIORITY       15
-#define STM32_EXT_EXTI22_IRQ_PRIORITY       15
-
-/*
- * GPT driver system settings.
- */
-#define STM32_GPT_USE_TIM1                  FALSE
-#define STM32_GPT_USE_TIM2                  FALSE
-#define STM32_GPT_USE_TIM3                  FALSE
-#define STM32_GPT_USE_TIM4                  FALSE
-#define STM32_GPT_USE_TIM5                  FALSE
-#define STM32_GPT_USE_TIM6                  FALSE
-#define STM32_GPT_USE_TIM7                  FALSE
-#define STM32_GPT_USE_TIM8                  FALSE
-#define STM32_GPT_USE_TIM9                  FALSE
-#define STM32_GPT_USE_TIM11                 FALSE
-#define STM32_GPT_USE_TIM12                 FALSE
-#define STM32_GPT_USE_TIM14                 FALSE
-#define STM32_GPT_TIM1_IRQ_PRIORITY         7
-#define STM32_GPT_TIM2_IRQ_PRIORITY         7
-#define STM32_GPT_TIM3_IRQ_PRIORITY         7
-#define STM32_GPT_TIM4_IRQ_PRIORITY         7
-#define STM32_GPT_TIM5_IRQ_PRIORITY         7
-#define STM32_GPT_TIM6_IRQ_PRIORITY         7
-#define STM32_GPT_TIM7_IRQ_PRIORITY         7
-#define STM32_GPT_TIM8_IRQ_PRIORITY         7
-#define STM32_GPT_TIM9_IRQ_PRIORITY         7
-#define STM32_GPT_TIM11_IRQ_PRIORITY        7
-#define STM32_GPT_TIM12_IRQ_PRIORITY        7
-#define STM32_GPT_TIM14_IRQ_PRIORITY        7
-
-/*
- * I2C driver system settings.
- */
-#define STM32_I2C_USE_I2C1                  TRUE
-#define STM32_I2C_USE_I2C2                  TRUE
-#define STM32_I2C_USE_I2C3                  FALSE
-#define STM32_I2C_BUSY_TIMEOUT              50
-#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)
-#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)
-#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)
-#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)
-#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)
-#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
-#define STM32_I2C_I2C1_IRQ_PRIORITY         5
-#define STM32_I2C_I2C2_IRQ_PRIORITY         5
-#define STM32_I2C_I2C3_IRQ_PRIORITY         5
-#define STM32_I2C_I2C1_DMA_PRIORITY         3
-#define STM32_I2C_I2C2_DMA_PRIORITY         3
-#define STM32_I2C_I2C3_DMA_PRIORITY         3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
-#define STM32_I2C_USE_DMA                   TRUE
-
-/*
- * I2S driver system settings.
- */
-#define STM32_I2S_USE_SPI2                  FALSE
-#define STM32_I2S_USE_SPI3                  FALSE
-#define STM32_I2S_SPI2_IRQ_PRIORITY         10
-#define STM32_I2S_SPI3_IRQ_PRIORITY         10
-#define STM32_I2S_SPI2_DMA_PRIORITY         1
-#define STM32_I2S_SPI3_DMA_PRIORITY         1
-#define STM32_I2S_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)
-#define STM32_I2S_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
-#define STM32_I2S_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)
-#define STM32_I2S_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)
-#define STM32_I2S_DMA_ERROR_HOOK(i2sp)      osalSysHalt("DMA failure")
-
-/*
- * ICU driver system settings.
- */
-#define STM32_ICU_USE_TIM1                  FALSE
-#define STM32_ICU_USE_TIM2                  FALSE
-#define STM32_ICU_USE_TIM3                  FALSE
-#define STM32_ICU_USE_TIM4                  FALSE
-#define STM32_ICU_USE_TIM5                  FALSE
-#define STM32_ICU_USE_TIM8                  FALSE
-#define STM32_ICU_USE_TIM9                  FALSE
-#define STM32_ICU_TIM1_IRQ_PRIORITY         7
-#define STM32_ICU_TIM2_IRQ_PRIORITY         7
-#define STM32_ICU_TIM3_IRQ_PRIORITY         7
-#define STM32_ICU_TIM4_IRQ_PRIORITY         7
-#define STM32_ICU_TIM5_IRQ_PRIORITY         7
-#define STM32_ICU_TIM8_IRQ_PRIORITY         7
-#define STM32_ICU_TIM9_IRQ_PRIORITY         7
-
-/*
- * MAC driver system settings.
- */
-#define STM32_MAC_TRANSMIT_BUFFERS          2
-#define STM32_MAC_RECEIVE_BUFFERS           4
-#define STM32_MAC_BUFFERS_SIZE              1522
-#define STM32_MAC_PHY_TIMEOUT               100
-#define STM32_MAC_ETH1_CHANGE_PHY_STATE     TRUE
-#define STM32_MAC_ETH1_IRQ_PRIORITY         13
-#define STM32_MAC_IP_CHECKSUM_OFFLOAD       0
-
-/*
- * PWM driver system settings.
- */
-#define STM32_PWM_USE_ADVANCED              FALSE
-#define STM32_PWM_USE_TIM1                  FALSE
-#define STM32_PWM_USE_TIM2                  FALSE
-#define STM32_PWM_USE_TIM3                  TRUE
-#define STM32_PWM_USE_TIM4                  FALSE
-#define STM32_PWM_USE_TIM5                  FALSE
-#define STM32_PWM_USE_TIM8                  FALSE
-#define STM32_PWM_USE_TIM9                  FALSE
-#define STM32_PWM_TIM1_IRQ_PRIORITY         7
-#define STM32_PWM_TIM2_IRQ_PRIORITY         7
-#define STM32_PWM_TIM3_IRQ_PRIORITY         7
-#define STM32_PWM_TIM4_IRQ_PRIORITY         7
-#define STM32_PWM_TIM5_IRQ_PRIORITY         7
-#define STM32_PWM_TIM8_IRQ_PRIORITY         7
-#define STM32_PWM_TIM9_IRQ_PRIORITY         7
-
-/*
- * SDC driver system settings.
- */
-#define STM32_SDC_SDIO_DMA_PRIORITY         3
-#define STM32_SDC_SDIO_IRQ_PRIORITY         9
-#define STM32_SDC_WRITE_TIMEOUT_MS          250
-#define STM32_SDC_READ_TIMEOUT_MS           25
-#define STM32_SDC_CLOCK_ACTIVATION_DELAY    10
-#define STM32_SDC_SDIO_UNALIGNED_SUPPORT    TRUE
-#define STM32_SDC_SDIO_DMA_STREAM           STM32_DMA_STREAM_ID(2, 3)
-
-/*
- * SERIAL driver system settings.
- */
-#define STM32_SERIAL_USE_USART1             TRUE
-#define STM32_SERIAL_USE_USART2             FALSE
-#define STM32_SERIAL_USE_USART3             FALSE
-#define STM32_SERIAL_USE_UART4              FALSE
-#define STM32_SERIAL_USE_UART5              FALSE
-#define STM32_SERIAL_USE_USART6             FALSE
-#define STM32_SERIAL_USART1_PRIORITY        12
-#define STM32_SERIAL_USART2_PRIORITY        12
-#define STM32_SERIAL_USART3_PRIORITY        12
-#define STM32_SERIAL_UART4_PRIORITY         12
-#define STM32_SERIAL_UART5_PRIORITY         12
-#define STM32_SERIAL_USART6_PRIORITY        12
-
-/*
- * SPI driver system settings.
- */
-#define STM32_SPI_USE_SPI1                  TRUE
-#define STM32_SPI_USE_SPI2                  FALSE
-#define STM32_SPI_USE_SPI3                  FALSE
-#define STM32_SPI_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 0)
-#define STM32_SPI_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 3)
-#define STM32_SPI_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)
-#define STM32_SPI_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
-#define STM32_SPI_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)
-#define STM32_SPI_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)
-#define STM32_SPI_SPI1_DMA_PRIORITY         1
-#define STM32_SPI_SPI2_DMA_PRIORITY         1
-#define STM32_SPI_SPI3_DMA_PRIORITY         1
-#define STM32_SPI_SPI1_IRQ_PRIORITY         10
-#define STM32_SPI_SPI2_IRQ_PRIORITY         10
-#define STM32_SPI_SPI3_IRQ_PRIORITY         10
-#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
-
-/*
- * ST driver system settings.
- */
-#define STM32_ST_IRQ_PRIORITY               8
-#define STM32_ST_USE_TIMER                  2
-
-/*
- * UART driver system settings.
- */
-#define STM32_UART_USE_USART1               FALSE
-#define STM32_UART_USE_USART2               TRUE
-#define STM32_UART_USE_USART3               TRUE
-#define STM32_UART_USE_UART4                FALSE
-#define STM32_UART_USE_UART5                FALSE
-#define STM32_UART_USE_USART6               FALSE
-#define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 5)
-#define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)
-#define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 5)
-#define STM32_UART_USART2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6)
-#define STM32_UART_USART3_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 1)
-#define STM32_UART_USART3_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 3)
-#define STM32_UART_UART4_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 2)
-#define STM32_UART_UART4_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 4)
-#define STM32_UART_UART5_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 0)
-#define STM32_UART_UART5_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 7)
-#define STM32_UART_USART6_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 2)
-#define STM32_UART_USART6_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)
-#define STM32_UART_USART1_IRQ_PRIORITY      12
-#define STM32_UART_USART2_IRQ_PRIORITY      12
-#define STM32_UART_USART3_IRQ_PRIORITY      12
-#define STM32_UART_UART4_IRQ_PRIORITY       12
-#define STM32_UART_UART5_IRQ_PRIORITY       12
-#define STM32_UART_USART6_IRQ_PRIORITY      12
-#define STM32_UART_USART1_DMA_PRIORITY      0
-#define STM32_UART_USART2_DMA_PRIORITY      0
-#define STM32_UART_USART3_DMA_PRIORITY      0
-#define STM32_UART_UART4_DMA_PRIORITY       0
-#define STM32_UART_UART5_DMA_PRIORITY       0
-#define STM32_UART_USART6_DMA_PRIORITY      0
-#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
-
-/*
- * USB driver system settings.
- */
-#define STM32_USB_USE_OTG1                  FALSE
-#define STM32_USB_USE_OTG2                  FALSE
-#define STM32_USB_OTG1_IRQ_PRIORITY         14
-#define STM32_USB_OTG2_IRQ_PRIORITY         14
-#define STM32_USB_OTG1_RX_FIFO_SIZE         512
-#define STM32_USB_OTG2_RX_FIFO_SIZE         1024
-#define STM32_USB_OTG_THREAD_PRIO           LOWPRIO
-#define STM32_USB_OTG_THREAD_STACK_SIZE     128
-#define STM32_USB_OTGFIFO_FILL_BASEPRI      0
-
-/*
- * WDG driver system settings.
- */
-#define STM32_WDG_USE_IWDG                  FALSE
-
-/*
- * QEI driver system settings.
- */
-#define STM32_QEI_USE_TIM1                  FALSE
-#define STM32_QEI_USE_TIM2                  FALSE
-#define STM32_QEI_USE_TIM3                  FALSE
-#define STM32_QEI_USE_TIM4                  FALSE
-#define STM32_QEI_USE_TIM5                  FALSE
-#define STM32_QEI_USE_TIM8                  FALSE
-
-#endif /* _MCUCONF_H_ */
diff --git a/os/modules/PowerManagement_1-1/module.c b/os/modules/PowerManagement_1-1/module.c
deleted file mode 100644
index 94feab6..0000000
--- a/os/modules/PowerManagement_1-1/module.c
+++ /dev/null
@@ -1,1139 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#include "module.h"
-
-/*===========================================================================*/
-/**
- * @name Module specific functions
- * @{
- */
-/*===========================================================================*/
-#include <amiroos.h>
-
-/**
- * @brief   Interrupt service routine callback for I/O interrupt signals.
- *
- * @param   extp      EXT driver to handle the ISR.
- * @param   channel   Channel on which the interrupt was encountered.
- */
-static void _moduleIsrCallback(EXTDriver* extp, expchannel_t channel) {
-  (void)extp;
-
-  chSysLockFromISR();
-  chEvtBroadcastFlagsI(&aos.events.io.source, (1 << channel));
-  chSysUnlockFromISR();
-
-  return;
-}
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name ChibiOS/HAL configuration
- * @{
- */
-/*===========================================================================*/
-
-ADCConversionGroup moduleHalAdcVsysConversionGroup = {
-  /* buffer type        */ true,
-  /* number of channels */ 1,
-  /* callback function  */ NULL,
-  /* error callback     */ NULL,
-  /* CR1                */ ADC_CR1_AWDEN | ADC_CR1_AWDIE,
-  /* CR2                */ ADC_CR2_SWSTART | ADC_CR2_CONT,
-  /* SMPR1              */ 0,
-  /* SMPR2              */ ADC_SMPR2_SMP_AN9(ADC_SAMPLE_480),
-  /* HTR                */ ADC_HTR_HT,
-  /* LTR                */ 0,
-  /* SQR1               */ ADC_SQR1_NUM_CH(1),
-  /* SQR2               */ 0,
-  /* SQR3               */ ADC_SQR3_SQ1_N(ADC_CHANNEL_IN9),
-};
-
-CANConfig moduleHalCanConfig = {
-  /* mcr  */ CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
-  /* btr  */ CAN_BTR_SJW(1) | CAN_BTR_TS2(2) | CAN_BTR_TS1(13) | CAN_BTR_BRP(1),
-};
-
-EXTConfig moduleHalExtConfig = {
-  /* channel configrations */ {
-    /* channel  0 */ { // IR_INT1_N: must be enabled explicitely
-      /* mode     */ EXT_MODE_GPIOB | APAL2CH_EDGE(VCNL4020_LLD_INT_EDGE),
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel  1 */ { // GAUGE_BATLOW1: must be enabled explicitely
-      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_RISING_EDGE,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel  2 */ { // GAUGE_BATDG1_N: must be enabled expliciety
-      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_RISING_EDGE,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel  3 */ { // SYS_UART_DN: automatic interrupt on event
-      /* mode     */ EXT_MODE_GPIOB | EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel  4 */ { // IR_INT2_N: must be enabled explicitely
-      /* mode     */ EXT_MODE_GPIOC | APAL2CH_EDGE(VCNL4020_LLD_INT_EDGE),
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel  5 */ { // TOUCH_INT: must be enabled explicitely
-      /* mode     */ EXT_MODE_GPIOC | APAL2CH_EDGE(MPR121_LLD_INT_EDGE),
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel  6 */ { // GAUGE_BATLOW2: must be enabled explicitely
-      /* mode     */ EXT_MODE_GPIOB | EXT_CH_MODE_RISING_EDGE,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel  7 */ { // GAUGE_BATDG2_N: must be enabled expliciety
-      /* mode     */ EXT_MODE_GPIOB | EXT_CH_MODE_RISING_EDGE,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel  8 */ { // PATH_DC: must be enabled explicitely
-      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_BOTH_EDGES,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel  9 */ { // SYS_SPI_DIR: must be enabled explicitely
-      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_BOTH_EDGES,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel 10 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel 11 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel 12 */ { // SYS_SYNC_N: automatic interrupt on event
-      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel 13 */ { // SYS_PD_N: automatic interrupt when activated
-      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel 14 */ { // SYS_WARMRST_N: automatic interrupt when activated
-      /* mode     */ EXT_MODE_GPIOC | EXT_CH_MODE_FALLING_EDGE | EXT_CH_MODE_AUTOSTART,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel 15 */ { // SYS_UART_UP: automatic interrupt on event
-      /* mode     */ EXT_MODE_GPIOB| EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART,
-      /* callback */ _moduleIsrCallback,
-    },
-    /* channel 16 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel 17 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel 18 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel 19 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel 20 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel 21 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-    /* channel 22 */ {
-      /* mode     */ EXT_CH_MODE_DISABLED,
-      /* callback */ NULL,
-    },
-  },
-};
-
-I2CConfig moduleHalI2cProxPm18Pm33GaugeRearConfig = {
-  /* I²C mode   */ OPMODE_I2C,
-  /* frequency  */ 400000, // TODO: replace with some macro (-> ChibiOS/HAL)
-  /* duty cycle */ FAST_DUTY_CYCLE_2,
-};
-
-I2CConfig moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig = {
-  /* I²C mode   */ OPMODE_I2C,
-  /* frequency  */ 400000, // TODO: replace with some macro (-> ChibiOS/HAL)
-  /* duty cycle */ FAST_DUTY_CYCLE_2,
-};
-
-PWMConfig moduleHalPwmBuzzerConfig = {
-  /* frequency              */ 1000000,
-  /* period                 */ 0,
-  /* callback               */ NULL,
-  /* channel configurations */ {
-    /* channel 0              */ {
-      /* mode                   */ PWM_OUTPUT_DISABLED,
-      /* callback               */ NULL
-    },
-    /* channel 1              */ {
-      /* mode                   */ PWM_OUTPUT_ACTIVE_HIGH,
-      /* callback               */ NULL
-    },
-    /* channel 2              */ {
-      /* mode                   */ PWM_OUTPUT_DISABLED,
-      /* callback               */ NULL
-    },
-    /* channel 3              */ {
-      /* mode                   */ PWM_OUTPUT_DISABLED,
-      /* callback               */ NULL
-    },
-  },
-  /* TIM CR2 register       */ 0,
-#if STM32_PWM_USE_ADVANCED
-  /* TIM BDTR register      */ 0,
-#endif
-  /* TIM DIER register      */ 0,
-};
-
-SerialConfig moduleHalProgIfConfig = {
-  /* bit rate */ 115200,
-  /* CR1      */ 0,
-  /* CR1      */ 0,
-  /* CR1      */ 0,
-};
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name GPIO definitions
- * @{
- */
-/*===========================================================================*/
-
-apalGpio_t moduleGpioSysRegEn = {
-  /* port */ GPIOA,
-  /* pad  */ GPIOA_SYS_REG_EN,
-};
-
-apalGpio_t moduleGpioIrInt1 = {
-  /* port */ GPIOB,
-  /* pad  */ GPIOB_IR_INT1_N,
-};
-
-apalGpio_t moduleGpioPowerEn = {
-  /* port */ GPIOB,
-  /* pad  */ GPIOB_POWER_EN,
-};
-
-apalGpio_t moduleGpioSysUartDn = {
-  /* port */ GPIOB,
-  /* pad  */ GPIOB_SYS_UART_DN,
-};
-
-apalGpio_t moduleGpioChargeStat2A = {
-  /* port */ GPIOB,
-  /* pad  */ GPIOB_CHARGE_STAT2A,
-};
-
-apalGpio_t moduleGpioGaugeBatLow2 = {
-  /* port */ GPIOB,
-  /* pad  */ GPIOB_GAUGE_BATLOW2,
-};
-
-apalGpio_t moduleGpioGaugeBatGd2 = {
-  /* port */ GPIOB,
-  /* pad  */ GPIOB_GAUGE_BATGD2_N,
-};
-
-apalGpio_t moduleGpioLed = {
-  /* port */ GPIOB,
-  /* pad  */ GPIOB_LED,
-};
-
-apalGpio_t moduleGpioSysUartUp = {
-  /* port */ GPIOB,
-  /* pad  */ GPIOB_SYS_UART_UP,
-};
-
-apalGpio_t moduleGpioChargeStat1A = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_CHARGE_STAT1A,
-};
-
-apalGpio_t moduleGpioGaugeBatLow1 = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_GAUGE_BATLOW1,
-};
-
-apalGpio_t moduleGpioGaugeBatGd1 = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_GAUGE_BATGD1_N,
-};
-
-apalGpio_t moduleGpioChargeEn1 = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_CHARGE_EN1_N,
-};
-
-apalGpio_t moduleGpioIrInt2 = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_IR_INT2_N,
-};
-
-apalGpio_t moduleGpioTouchInt = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_TOUCH_INT_N,
-};
-
-apalGpio_t moduleGpioSysDone = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_SYS_DONE,
-};
-
-apalGpio_t moduleGpioSysProg = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_SYS_PROG_N,
-};
-
-apalGpio_t moduleGpioPathDc = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_PATH_DC,
-};
-
-apalGpio_t moduleGpioSysSpiDir = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_SYS_SPI_DIR,
-};
-
-apalGpio_t moduleGpioSysSync = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_SYS_INT_N,
-};
-
-apalGpio_t moduleGpioSysPd = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_SYS_PD_N,
-};
-
-apalGpio_t moduleGpioSysWarmrst = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_SYS_WARMRST_N,
-};
-
-apalGpio_t moduleGpioBtRst = {
-  /* port */ GPIOC,
-  /* pad  */ GPIOC_BT_RST,
-};
-
-apalGpio_t moduleGpioChargeEn2 = {
-  /* port */ GPIOD,
-  /* pad  */ GPIOD_CHARGE_EN2_N,
-};
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name AMiRo-OS core configurations
- * @{
- */
-/*===========================================================================*/
-
-apalControlGpio_t moduleSsspPd = {
-  /* GPIO */ &moduleGpioSysPd,
-  /* meta */ {
-    /* active state */ APAL_GPIO_ACTIVE_LOW,
-    /* edge         */ APAL_GPIO_EDGE_FALLING,
-    /* direction    */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
-  },
-};
-
-apalControlGpio_t moduleSsspSync = {
-  /* GPIO */ &moduleGpioSysSync,
-  /* meta */ {
-    /* active state */ APAL_GPIO_ACTIVE_LOW,
-    /* edge         */ APAL_GPIO_EDGE_FALLING,
-    /* direction    */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
-  },
-};
-
-const char* moduleShellPrompt = "PowerManagement";
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Low-level drivers
- * @{
- */
-/*===========================================================================*/
-
-AT24C01BNDriver moduleLldEeprom = {
-  /* I2C driver   */ &MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT,
-  /* I2C address  */ AT24C01BN_LLD_I2C_ADDR_FIXED,
-};
-
-BQ24103ADriver moduleLldBatteryChargerFront = {
-  /* charge enable GPIO */ {
-    /* GPIO */ &moduleGpioChargeEn1,
-    /* meta */ {
-      /* active state */ APAL_GPIO_ACTIVE_LOW,
-      /* edge         */ APAL_GPIO_EDGE_NONE,
-      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
-    },
-  },
-  /* charge status GPIO */ {
-    /* GPIO */ &moduleGpioChargeStat1A,
-    /* meta */ {
-      /* active state */ APAL_GPIO_ACTIVE_LOW,
-      /* edge         */ APAL_GPIO_EDGE_NONE,
-      /* direction    */ APAL_GPIO_DIRECTION_INPUT,
-    },
-  },
-};
-
-BQ24103ADriver moduleLldBatteryChargerRear = {
-  /* charge enable GPIO */ {
-    /* GPIO */ &moduleGpioChargeEn2,
-    /* meta */ {
-      /* active state */ APAL_GPIO_ACTIVE_LOW,
-      /* edge         */ APAL_GPIO_EDGE_NONE,
-      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
-    },
-  },
-  /* charge status GPIO */ {
-    /* GPIO */ &moduleGpioChargeStat2A,
-    /* meta */ {
-      /* active state */ APAL_GPIO_ACTIVE_LOW,
-      /* edge         */ APAL_GPIO_EDGE_NONE,
-      /* direction    */ APAL_GPIO_DIRECTION_INPUT,
-    },
-  },
-};
-
-BQ27500Driver moduleLldFuelGaugeFront = {
-  /* I2C driver       */ &MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT,
-  /* battery low GPIO */ {
-    /* GPIO */ &moduleGpioGaugeBatLow1,
-    /* meta */ {
-      /* active state */ APAL_GPIO_ACTIVE_HIGH,
-      /* edge         */ APAL_GPIO_EDGE_NONE,
-      /* direction    */ APAL_GPIO_DIRECTION_INPUT,
-    },
-  },
-  /* battery good GPIO */ {
-    /* GPIO */ &moduleGpioGaugeBatGd1,
-    /* meta */ {
-      /* active state */ APAL_GPIO_ACTIVE_LOW,
-      /* edge         */ APAL_GPIO_EDGE_NONE,
-      /* direction    */ APAL_GPIO_DIRECTION_INPUT,
-    },
-  },
-};
-
-BQ27500Driver moduleLldFuelGaugeRear = {
-  /* I2C driver       */ &MODULE_HAL_I2C_PROX_PM18_PM33_GAUGEREAR,
-  /* battery low GPIO */ {
-    /* GPIO */ &moduleGpioGaugeBatLow2,
-    /* meta */ {
-      /* active state */ APAL_GPIO_ACTIVE_HIGH,
-      /* edge         */ APAL_GPIO_EDGE_NONE,
-      /* direction    */ APAL_GPIO_DIRECTION_INPUT,
-    },
-  },
-  /* battery good GPIO */ {
-    /* GPIO */ &moduleGpioGaugeBatGd2,
-    /* meta */ {
-      /* active state */ APAL_GPIO_ACTIVE_LOW,
-      /* edge         */ APAL_GPIO_EDGE_NONE,
-      /* direction    */ APAL_GPIO_DIRECTION_INPUT,
-    },
-  },
-};
-
-INA219Driver moduleLldPowerMonitorVdd = {
-  /* I2C Driver       */ &MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT,
-  /* I²C address      */ INA219_LLD_I2C_ADDR_A0 | INA219_LLD_I2C_ADDR_A1,
-  /* current LSB (uA) */ 0x00u,
-  /* configuration    */ NULL,
-};
-
-INA219Driver moduleLldPowerMonitorVio18 = {
-  /* I2C Driver       */ &MODULE_HAL_I2C_PROX_PM18_PM33_GAUGEREAR,
-  /* I²C address      */ INA219_LLD_I2C_ADDR_A1,
-  /* current LSB (uA) */ 0x00u,
-  /* configuration    */ NULL,
-};
-
-INA219Driver moduleLldPowerMonitorVio33 = {
-  /* I2C Driver       */ &MODULE_HAL_I2C_PROX_PM18_PM33_GAUGEREAR,
-  /* I²C address      */ INA219_LLD_I2C_ADDR_FIXED,
-  /* current LSB (uA) */ 0x00u,
-  /* configuration    */ NULL,
-};
-
-INA219Driver moduleLldPowerMonitorVsys42 = {
-  /* I2C Driver       */ &MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT,
-  /* I²C address      */ INA219_LLD_I2C_ADDR_FIXED,
-  /* current LSB (uA) */ 0x00u,
-  /* configuration    */ NULL,
-};
-
-INA219Driver moduleLldPowerMonitorVio50 = {
-  /* I2C Driver       */ &MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT,
-  /* I²C address      */ INA219_LLD_I2C_ADDR_A1,
-  /* current LSB (uA) */ 0x00u,
-  /* configuration    */ NULL,
-};
-
-LEDDriver moduleLldStatusLed = {
-  /* LED GPIO */ {
-    /* GPIO */ &moduleGpioLed,
-    /* meta */ {
-      /* active state */ APAL_GPIO_ACTIVE_LOW,
-      /* edge         */ APAL_GPIO_EDGE_NONE,
-      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
-    },
-  },
-};
-
-MPR121Driver moduleLldTouch = {
-  /* I²C Driver */ &MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT,
-};
-
-PCA9544ADriver moduleLldI2cMultiplexer1 = {
-  /* I²C driver   */ &MODULE_HAL_I2C_PROX_PM18_PM33_GAUGEREAR,
-  /* I²C address  */ PCA9544A_LLD_I2C_ADDR_A0 | PCA9544A_LLD_I2C_ADDR_A1 | PCA9544A_LLD_I2C_ADDR_A2,
-};
-
-PCA9544ADriver moduleLldI2cMultiplexer2 = {
-  /* I²C driver   */ &MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT,
-  /* I²C address  */ PCA9544A_LLD_I2C_ADDR_A0 | PCA9544A_LLD_I2C_ADDR_A1 | PCA9544A_LLD_I2C_ADDR_A2,
-};
-
-TPS62113Driver moduleLldStepDownConverter = {
-  /* Power enable GPIO */ {
-    /* GPIO       */ &moduleGpioPowerEn,
-    /* GPIO meta  */ {
-      /* active state */ APAL_GPIO_ACTIVE_HIGH,
-      /* egde         */ APAL_GPIO_EDGE_NONE,
-      /* direction    */ APAL_GPIO_DIRECTION_OUTPUT,
-    },
-  },
-};
-
-VCNL4020Driver moduleLldProximity1 = {
-  /* I²C Driver */ &MODULE_HAL_I2C_PROX_PM18_PM33_GAUGEREAR,
-};
-
-VCNL4020Driver moduleLldProximity2 = {
-  /* I²C Driver */ &MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT,
-};
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Unit tests (UT)
- * @{
- */
-/*===========================================================================*/
-#if (AMIROOS_CFG_TESTS_ENABLE == true) || defined(__DOXYGEN__)
-#include <string.h>
-
-/* ADC  */
-static int _utShellCmdCb_Adc(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  (void)argc;
-  (void)argv;
-  aosUtRun(stream, &moduleUtAdcVsys, NULL);
-  return AOS_OK;
-}
-static ut_adcdata_t _utAdcVsysData = {
-  /* driver               */ &MODULE_HAL_ADC_VSYS,
-  /* ADC conversion group */ &moduleHalAdcVsysConversionGroup,
-};
-aos_unittest_t moduleUtAdcVsys = {
-  /* name           */ "ADC",
-  /* info           */ "VSYS",
-  /* test function  */ utAdcFunc,
-  /* shell command  */ {
-    /* name     */ "unittest:ADC",
-    /* callback */ _utShellCmdCb_Adc,
-    /* next     */ NULL,
-  },
-  /* data           */ &_utAdcVsysData,
-};
-
-/* AT24C01BN-SH-B (EEPROM) */
-static int _utShellCmdCb_AlldAt24c01bn(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  (void)argc;
-  (void)argv;
-  aosUtRun(stream, &moduleUtAlldAt24c01bn, NULL);
-  return AOS_OK;
-}
-static ut_at24c01bndata_t _utAlldAt24c01bnData = {
-  /* driver   */ &moduleLldEeprom,
-  /* timeout  */ MICROSECONDS_PER_SECOND,
-};
-aos_unittest_t moduleUtAlldAt24c01bn = {
-  /* name           */ "AT24C01BN-SH-B",
-  /* info           */ "1kbit EEPROM",
-  /* test function  */ utAlldAt24c01bnFunc,
-  /* shell command  */ {
-    /* name     */ "unittest:EEPROM",
-    /* callback */ _utShellCmdCb_AlldAt24c01bn,
-    /* next     */ NULL,
-  },
-  /* data           */ &_utAlldAt24c01bnData,
-};
-
-/* BQ24103A (battery charger) */
-static int _utShellCmdCb_AlldBq24103a(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  // local variables
-  bool print_help = false;
-
-  // evaluate argument
-  if (argc == 2) {
-    if (strcmp(argv[1], "-f") == 0 || strcmp(argv[1], "--front") == 0) {
-      moduleUtAlldBq24103a.data = &moduleLldBatteryChargerFront;
-      aosUtRun(stream, &moduleUtAlldBq24103a, "front battery");
-      moduleUtAlldBq24103a.data = NULL;
-    }
-    else if (strcmp(argv[1], "-r") == 0 || strcmp(argv[1], "--rear") == 0) {
-      moduleUtAlldBq24103a.data = &moduleLldBatteryChargerRear;
-      aosUtRun(stream, &moduleUtAlldBq24103a, "rear battery");
-      moduleUtAlldBq24103a.data = NULL;
-    }
-    else {
-      print_help = true;
-    }
-  } else {
-    print_help = true;
-  }
-
-  // print help or just return
-  if (print_help) {
-    chprintf(stream, "Usage: %s OPTION\n", argv[0]);
-    chprintf(stream, "Options:\n");
-    chprintf(stream, "  --front, -f\n");
-    chprintf(stream, "    Test the front battery charger.\n");
-    chprintf(stream, "  --rear, -r\n");
-    chprintf(stream, "    Test the rear battery charger.\n");
-    return AOS_INVALID_ARGUMENTS;
-  } else {
-    return AOS_OK;
-  }
-}
-aos_unittest_t moduleUtAlldBq24103a = {
-  /* name           */ "BQ24103A",
-  /* info           */ "battery charger",
-  /* test function  */ utAlldBq24103aFunc,
-  /* shell command  */ {
-    /* name     */ "unittest:BatteryCharger",
-    /* callback */ _utShellCmdCb_AlldBq24103a,
-    /* next     */ NULL,
-  },
-  /* data           */ NULL,
-};
-
-/* BQ27500 (fuel gauge) */
-static int _utShellCmdCb_AlldBq27500(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  // evaluate arguments
-  if (argc == 2) {
-    if (strcmp(argv[1], "-f") == 0 || strcmp(argv[1], "--front") == 0) {
-      ((ut_bq27500data_t*)moduleUtAlldBq27500.data)->driver = &moduleLldFuelGaugeFront;
-      aosUtRun(stream, &moduleUtAlldBq27500, "front battery");
-      ((ut_bq27500data_t*)moduleUtAlldBq27500.data)->driver = NULL;
-      return AOS_OK;
-    }
-    else if (strcmp(argv[1], "-r") == 0 || strcmp(argv[1], "--rear") == 0) {
-      ((ut_bq27500data_t*)moduleUtAlldBq27500.data)->driver = &moduleLldFuelGaugeRear;
-      aosUtRun(stream, &moduleUtAlldBq27500, "rear battery");
-      ((ut_bq27500data_t*)moduleUtAlldBq27500.data)->driver = NULL;
-      return AOS_OK;
-    }
-  }
-  // print help
-  chprintf(stream, "Usage: %s OPTION\n", argv[0]);
-  chprintf(stream, "Options:\n");
-  chprintf(stream, "  --front, -f\n");
-  chprintf(stream, "    Test the front battery fuel gauge.\n");
-  chprintf(stream, "  --rear, -r\n");
-  chprintf(stream, "    Test the rear battery fuel gauge.\n");
-  return AOS_INVALID_ARGUMENTS;
-}
-static ut_bq27500data_t _utAlldBq27500Data = {
-  /* driver   */ NULL,
-  /* timeout  */ MICROSECONDS_PER_SECOND,
-};
-aos_unittest_t moduleUtAlldBq27500 = {
-  /* name           */ "BQ27500",
-  /* info           */ "fuel gauge",
-  /* test function  */ utAlldBq27500Func,
-  /* shell command  */ {
-    /* name     */ "unittest:FuelGauge",
-    /* callback */ _utShellCmdCb_AlldBq27500,
-    /* next     */ NULL,
-  },
-  /* data           */ &_utAlldBq27500Data,
-};
-
-/* BQ27500 (fuel gauge) in combination with BQ24103A (battery charger) */
-static int _utShellCmdCb_AlldBq27500Bq24103a(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  // evaluate arguments
-  if (argc == 2) {
-    if (strcmp(argv[1], "-f") == 0 || strcmp(argv[1], "--front") == 0) {
-      ((ut_bq27500bq24103adata_t*)moduleUtAlldBq27500Bq24103a.data)->bq27500 = &moduleLldFuelGaugeFront;
-      ((ut_bq27500bq24103adata_t*)moduleUtAlldBq27500Bq24103a.data)->bq24103a = &moduleLldBatteryChargerFront;
-      aosUtRun(stream, &moduleUtAlldBq27500Bq24103a, "front battery");
-      ((ut_bq27500bq24103adata_t*)moduleUtAlldBq27500Bq24103a.data)->bq27500 = NULL;
-      ((ut_bq27500bq24103adata_t*)moduleUtAlldBq27500Bq24103a.data)->bq24103a = NULL;
-      return AOS_OK;
-    }
-    else if (strcmp(argv[1], "-r") == 0 || strcmp(argv[1], "--rear") == 0) {
-      ((ut_bq27500bq24103adata_t*)moduleUtAlldBq27500Bq24103a.data)->bq27500 = &moduleLldFuelGaugeRear;
-      ((ut_bq27500bq24103adata_t*)moduleUtAlldBq27500Bq24103a.data)->bq24103a = &moduleLldBatteryChargerRear;
-      aosUtRun(stream, &moduleUtAlldBq27500Bq24103a, "rear battery");
-      ((ut_bq27500bq24103adata_t*)moduleUtAlldBq27500Bq24103a.data)->bq27500 = NULL;
-      ((ut_bq27500bq24103adata_t*)moduleUtAlldBq27500Bq24103a.data)->bq24103a = NULL;
-      return AOS_OK;
-    }
-  }
-  // print help
-  chprintf(stream, "Usage: %s OPTION\n", argv[0]);
-  chprintf(stream, "Options:\n");
-  chprintf(stream, "  --front, -f\n");
-  chprintf(stream, "    Test the front battery fuel gauge and charger.\n");
-  chprintf(stream, "  --rear, -r\n");
-  chprintf(stream, "    Test the rear battery fuel gauge and charger.\n");
-  return AOS_INVALID_ARGUMENTS;
-}
-static ut_bq27500bq24103adata_t _utAlldBq27500Bq24103aData= {
-  /* BQ27500 driver   */ NULL,
-  /* BQ23203A driver  */ NULL,
-  /* timeout          */ MICROSECONDS_PER_SECOND,
-};
-aos_unittest_t moduleUtAlldBq27500Bq24103a = {
-  /* name           */ "BQ27500 & BQ24103A",
-  /* info           */ "fuel gauge & battery charger",
-  /* test function  */ utAlldBq27500Bq24103aFunc,
-  /* shell command  */ {
-    /* name     */ "unittest:FuelGauge&BatteryCharger",
-    /* callback */ _utShellCmdCb_AlldBq27500Bq24103a,
-    /* next     */ NULL,
-  },
-  /* data           */ &_utAlldBq27500Bq24103aData,
-};
-
-/* INA219 (power monitor) */
-static int _utShellCmdCb_AlldIna219(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  // evaluate arguments
-  if (argc == 2) {
-    if (strcmp(argv[1], "VDD") == 0) {
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = &moduleLldPowerMonitorVdd;
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 3.3f;
-      aosUtRun(stream, &moduleUtAlldIna219, "VDD (3.3V)");
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = NULL;
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 0.0f;
-      return AOS_OK;
-    }
-    else if (strcmp(argv[1], "VIO1.8") == 0) {
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = &moduleLldPowerMonitorVio18;
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 1.8f;
-      aosUtRun(stream, &moduleUtAlldIna219, "VIO (1.8V)");
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = NULL;
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 0.0f;
-      return AOS_OK;
-    }
-    else if (strcmp(argv[1], "VIO3.3") == 0) {
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = &moduleLldPowerMonitorVio33;
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 3.3f;
-      aosUtRun(stream, &moduleUtAlldIna219, "VIO (3.3V)");
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = NULL;
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 0.0f;
-      return AOS_OK;
-    }
-    else if (strcmp(argv[1], "VSYS4.2") == 0) {
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = &moduleLldPowerMonitorVsys42;
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 4.2f;
-      aosUtRun(stream, &moduleUtAlldIna219, "VSYS (4.2V)");
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = NULL;
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 0.0f;
-      return AOS_OK;
-    }
-    else if (strcmp(argv[1], "VIO5.0") == 0) {
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = &moduleLldPowerMonitorVio50;
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 5.0f;
-      aosUtRun(stream, &moduleUtAlldIna219, "VIO (5.0V)");
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = NULL;
-      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 0.0f;
-      return AOS_OK;
-    }
-  }
-  // print help
-  chprintf(stream, "Usage: %s OPTION\n", argv[0]);
-  chprintf(stream, "Options:\n");
-  chprintf(stream, "  VDD\n");
-  chprintf(stream, "    Test VDD (3.3V) power monitor.\n");
-  chprintf(stream, "  VIO1.8\n");
-  chprintf(stream, "    Test VIO 1.8V power monitor.\n");
-  chprintf(stream, "  VIO3.3\n");
-  chprintf(stream, "    Test VIO 3.3V power monitor.\n");
-  chprintf(stream, "  VSYS4.2\n");
-  chprintf(stream, "    Test VSYS 4.2V power monitor.\n");
-  chprintf(stream, "  VIO5.0\n");
-  chprintf(stream, "    Test VIO 5.0V power monitor.\n");
-  return AOS_INVALID_ARGUMENTS;
-}
-static ut_ina219data_t _utAlldIna219Data = {
-  /* driver           */ NULL,
-  /* expected voltage */ 0.0f,
-  /* tolerance        */ 0.05f,
-  /* timeout          */ MICROSECONDS_PER_SECOND,
-};
-aos_unittest_t moduleUtAlldIna219 = {
-  /* name           */ "INA219",
-  /* info           */ "power monitor",
-  /* test function  */ utAlldIna219Func,
-  /* shell command  */ {
-    /* name     */ "unittest:PowerMonitor",
-    /* callback */ _utShellCmdCb_AlldIna219,
-    /* next     */ NULL,
-  },
-  /* data           */ &_utAlldIna219Data,
-};
-
-/* Status LED */
-static int _utShellCmdCb_AlldLed(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  (void)argc;
-  (void)argv;
-  aosUtRun(stream, &moduleUtAlldLed, NULL);
-  return AOS_OK;
-}
-aos_unittest_t moduleUtAlldLed = {
-  /* name           */ "LED",
-  /* info           */ NULL,
-  /* test function  */ utAlldLedFunc,
-  /* shell command  */ {
-    /* name     */ "unittest:StatusLED",
-    /* callback */ _utShellCmdCb_AlldLed,
-    /* next     */ NULL,
-  },
-  /* data           */ &moduleLldStatusLed,
-};
-
-/* MPR121 (touch sensor) */
-static int _utShellCmdCb_AlldMpr121(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  (void)argc;
-  (void)argv;
-  extChannelEnable(&MODULE_HAL_EXT, MODULE_GPIO_EXTCHANNEL_TOUCHINT);
-  aosUtRun(stream, &moduleUtAlldMpr121, NULL);
-  return AOS_OK;
-}
-static ut_mpr121data_t _utAlldMpr121Data= {
-  /* MPR121 driver  */ &moduleLldTouch,
-  /* timeout        */ MICROSECONDS_PER_SECOND,
-  /* event source   */ &aos.events.io.source,
-  /* event flags    */ (1 << MODULE_GPIO_EXTCHANNEL_TOUCHINT),
-};
-aos_unittest_t moduleUtAlldMpr121 = {
-  /* name           */ "MPR121",
-  /* info           */ "touch sensor",
-  /* test function  */ utAlldMpr121Func,
-  /* shell command  */ {
-    /* name     */ "unittest:Touch",
-    /* callback */ _utShellCmdCb_AlldMpr121,
-    /* next     */ NULL,
-  },
-  /* data           */ &_utAlldMpr121Data,
-};
-
-/* PCA9544A (I2C multiplexer) */
-static int _utShellCmdCb_AlldPca5944a(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  // evaluate arguments
-  if (argc == 2) {
-    if (strcmp(argv[1], "#1") == 0) {
-      ((ut_pca9544adata_t*)moduleUtAlldPca9544a.data)->driver = &moduleLldI2cMultiplexer1;
-      aosUtRun(stream, &moduleUtAlldPca9544a, "I2C bus #1");
-      ((ut_pca9544adata_t*)moduleUtAlldPca9544a.data)->driver = NULL;
-      return AOS_OK;
-    }
-    else if (strcmp(argv[1], "#2") == 0) {
-      ((ut_pca9544adata_t*)moduleUtAlldPca9544a.data)->driver = &moduleLldI2cMultiplexer2;
-      aosUtRun(stream, &moduleUtAlldPca9544a, "I2C bus #2");
-      ((ut_pca9544adata_t*)moduleUtAlldPca9544a.data)->driver = NULL;
-      return AOS_OK;
-    }
-  }
-  // print help
-  chprintf(stream, "Usage: %s OPTION\n", argv[0]);
-  chprintf(stream, "Options:\n");
-  chprintf(stream, "  #1\n");
-  chprintf(stream, "    Test the multiplexer on the I2C bus #1.\n");
-  chprintf(stream, "  #2\n");
-  chprintf(stream, "    Test the multiplexer on the I2C bus #2.\n");
-  return AOS_INVALID_ARGUMENTS;
-}
-static ut_pca9544adata_t _utAlldPca9544aData = {
-  /* driver   */ NULL,
-  /* timeout  */ MICROSECONDS_PER_SECOND,
-};
-aos_unittest_t moduleUtAlldPca9544a = {
-  /* name           */ "PCA9544A",
-  /* info           */ "I2C multiplexer",
-  /* test function  */ utAlldPca9544aFunc,
-  /* shell command  */ {
-    /* name     */ "unittest:I2CMultiplexer",
-    /* callback */ _utShellCmdCb_AlldPca5944a,
-    /* next     */ NULL,
-  },
-  /* data           */ &_utAlldPca9544aData,
-};
-
-/* PKLCS1212E4001 (buzzer) */
-static int _utShellCmdCb_AlldPklcs1212e4001(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  (void)argc;
-  (void)argv;
-  aosUtRun(stream, &moduleUtAlldPklcs1212e4001, NULL);
-  return AOS_OK;
-}
-static ut_pklcs1212e4001_t _utAlldPklcs1212e4001Data = {
-  /* PWM driver   */ &MODULE_HAL_PWM_BUZZER,
-  /* PWM channel  */ MODULE_HAL_PWM_BUZZER_CHANNEL
-};
-aos_unittest_t moduleUtAlldPklcs1212e4001 = {
-  /* name           */ "PKLCS1212E4001",
-  /* info           */ "buzzer",
-  /* test function  */ utAlldPklcs1212e4001Func,
-  /* shell command  */ {
-    /* name     */ "unittest:Buzzer",
-    /* callback */ _utShellCmdCb_AlldPklcs1212e4001,
-    /* next     */ NULL,
-  },
-  /* data           */ &_utAlldPklcs1212e4001Data,
-};
-
-/* TPS62113 (stop-down converter) */
-static int _utShellCmdCb_AlldTps62113(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  // Although there are four TPS62113 on the PCB, they all share the same input signal.
-  // A sa result, no additional shell arguments need to be evaluated.
-  (void)argc;
-  (void)argv;
-  aosUtRun(stream, &moduleUtAlldTps62113, NULL);
-  return AOS_OK;
-}
-aos_unittest_t moduleUtAlldTps62113 = {
-  /* name           */ "TPS62113",
-  /* info           */ "step-down converter",
-  /* test function  */ utAlldTps62113Func,
-  /* shell command  */ {
-    /* name     */ "unittest:StepDownConverter",
-    /* callback */ _utShellCmdCb_AlldTps62113,
-    /* next     */ NULL,
-  },
-  /* data           */ &moduleLldStepDownConverter,
-};
-
-/* TPS62113 (step-donw converter) in combination with INA219 (power monitor) */
-static int _utShellCmdCb_AlldTps62113Ina219(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  (void)argc;
-  (void)argv;
-  aosUtRun(stream, &moduleUtAlldTps62113Ina219, "VSYS (4.2V)");
-  return AOS_OK;
-}
-ut_tps62113ina219data_t _utAlldTps62113Ina219Data = {
-  /* TPS62113 */ &moduleLldStepDownConverter,
-  /* INA219   */ &moduleLldPowerMonitorVsys42,
-  /* timeout  */ MICROSECONDS_PER_SECOND,
-};
-aos_unittest_t moduleUtAlldTps62113Ina219 = {
-  /* name           */ "TPS62113 & INA219",
-  /* info           */ "step-down converter & power monitor",
-  /* test function  */ utAlldTps62113Ina219Func,
-  /* shell command  */ {
-    /* name     */ "unittest:StepDownConverter&PowerMonitor",
-    /* callback */ _utShellCmdCb_AlldTps62113Ina219,
-    /* next     */ NULL,
-  },
-  /* data           */ &_utAlldTps62113Ina219Data,
-};
-
-/* VCNL4020 (proximity sensor) */
-static void _utAlldVcnl4020_disableInterrupt(VCNL4020Driver* vcnl)
-{
-  uint8_t intstatus;
-  vcnl4020_lld_writereg(vcnl, VCNL4020_LLD_REGADDR_INTCTRL, 0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-  vcnl4020_lld_readreg(vcnl, VCNL4020_LLD_REGADDR_INTSTATUS, &intstatus, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-  if (intstatus) {
-    vcnl4020_lld_writereg(vcnl, VCNL4020_LLD_REGADDR_INTSTATUS, intstatus, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-  }
-  return;
-}
-static int _utShellCmdCb_AlldVcnl4020(BaseSequentialStream* stream, int argc, char* argv[])
-{
-  enum {
-    UNKNOWN,
-    NNE, ENE, ESE, SSE, SSW,WSW,WNW, NNW,
-  } sensor = UNKNOWN;
-  // evaluate arguments
-  if (argc == 2) {
-    if (strcmp(argv[1], "-nne") == 0) {
-      sensor = NNE;
-    } else if (strcmp(argv[1], "-ene") == 0) {
-      sensor = ENE;
-    } else if (strcmp(argv[1], "-ese") == 0) {
-      sensor = ESE;
-    } else if (strcmp(argv[1], "-sse") == 0) {
-      sensor = SSE;
-    } else if (strcmp(argv[1], "-ssw") == 0) {
-      sensor = SSW;
-    } else if (strcmp(argv[1], "-wsw") == 0) {
-      sensor = WSW;
-    } else if (strcmp(argv[1], "-wnw") == 0) {
-      sensor = WNW;
-    } else if (strcmp(argv[1], "-nnw") == 0) {
-      sensor = NNW;
-    }
-  }
-  if (sensor != UNKNOWN) {
-    PCA9544ADriver* mux = NULL;
-    switch (sensor) {
-      case SSE:
-      case SSW:
-      case WSW:
-      case WNW:
-        mux = &moduleLldI2cMultiplexer1;
-        ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld = &moduleLldProximity1;
-        ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->evtflags = (1 << MODULE_GPIO_EXTCHANNEL_IRINT2);
-        extChannelEnable(&MODULE_HAL_EXT, MODULE_GPIO_EXTCHANNEL_IRINT2);
-        break;
-      case NNW:
-      case NNE:
-      case ENE:
-      case ESE:
-        mux = &moduleLldI2cMultiplexer2;
-        ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld = &moduleLldProximity2;
-        ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->evtflags = (1 << MODULE_GPIO_EXTCHANNEL_IRINT1);
-        extChannelEnable(&MODULE_HAL_EXT, MODULE_GPIO_EXTCHANNEL_IRINT1);
-        break;
-      default:
-        break;
-    }
-    pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
-    pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH1, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
-    pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH2, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
-    pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH3, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
-    switch (sensor) {
-      case NNE:
-        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH1, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-        aosUtRun(stream, &moduleUtAlldVcnl4020, "north-northeast sensor");
-        break;
-      case ENE:
-        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH3, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-        aosUtRun(stream, &moduleUtAlldVcnl4020, "east-northeast sensor");
-        break;
-      case ESE:
-        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH2, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-        aosUtRun(stream, &moduleUtAlldVcnl4020, "north-southeast sensor");
-        break;
-      case SSE:
-        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-        aosUtRun(stream, &moduleUtAlldVcnl4020, "south-southeast sensor");
-        break;
-      case SSW:
-        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH1, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-        aosUtRun(stream, &moduleUtAlldVcnl4020, "south-southwest sensor");
-        break;
-      case WSW:
-        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH3, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-        aosUtRun(stream, &moduleUtAlldVcnl4020, "west-southwest sensor");
-        break;
-      case WNW:
-        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH2, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-        aosUtRun(stream, &moduleUtAlldVcnl4020, "west-northwest sensor");
-        break;
-      case NNW:
-        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
-        aosUtRun(stream, &moduleUtAlldVcnl4020, "north-northwest sensor");
-        break;
-      default:
-        break;
-    }
-    ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld = NULL;
-    ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->evtflags = 0;
-    return AOS_OK;
-  }
-  // print help
-  chprintf(stream, "Usage: %s OPTION\n", argv[0]);
-  chprintf(stream, "Options:\n");
-  chprintf(stream, "  -nne\n");
-  chprintf(stream, "    Test north-northeast sensor.\n");
-  chprintf(stream, "  -ene\n");
-  chprintf(stream, "    Test east-northeast sensor.\n");
-  chprintf(stream, "  -ese\n");
-  chprintf(stream, "    Test east-southeast sensor.\n");
-  chprintf(stream, "  -sse\n");
-  chprintf(stream, "    Test south-southeast sensor.\n");
-  chprintf(stream, "  -ssw\n");
-  chprintf(stream, "    Test south-southwest sensor.\n");
-  chprintf(stream, "  -wsw\n");
-  chprintf(stream, "    Test west-southwest sensor.\n");
-  chprintf(stream, "  -wnw\n");
-  chprintf(stream, "    Test west-northwest sensor.\n");
-  chprintf(stream, "  -nnw\n");
-  chprintf(stream, "    Test north-northwest sensor.\n");
-  return AOS_INVALID_ARGUMENTS;
-}
-static ut_vcnl4020data_t _utAlldVcnl4020Data = {
-  /* driver       */ NULL,
-  /* timeout      */ MICROSECONDS_PER_SECOND,
-  /* event source */ &aos.events.io.source,
-  /* event flags  */ 0,
-};
-aos_unittest_t moduleUtAlldVcnl4020 = {
-  /* name           */ "VCNL4020",
-  /* info           */ "proximity sensor",
-  /* test function  */ utAlldVcnl4020Func,
-  /* shell command  */ {
-    /* name     */ "unittest:Proximity",
-    /* callback */ _utShellCmdCb_AlldVcnl4020,
-    /* next     */ NULL,
-  },
-  /* data           */ &_utAlldVcnl4020Data,
-};
-
-#endif /* AMIROOS_CFG_TESTS_ENABLE == true */
-
-/** @} */
diff --git a/os/modules/PowerManagement_1-1/module.h b/os/modules/PowerManagement_1-1/module.h
deleted file mode 100644
index edd1dc2..0000000
--- a/os/modules/PowerManagement_1-1/module.h
+++ /dev/null
@@ -1,706 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-#ifndef _AMIROOS_MODULE_H_
-#define _AMIROOS_MODULE_H_
-
-/*===========================================================================*/
-/**
- * @name Module specific functions
- * @{
- */
-/*===========================================================================*/
-
-/*
- * @brief Makro to store data in the core coupled memory (ccm).
- *        Example:
- *        int compute_buffer[128] CCM_RAM;
- *
- * @note The ccm is not connected to any bus system.
- */
-#define CCM_RAM                                 __attribute__((section(".ram4"), aligned(4)))
-
-/*
- * @brief Makro to store data in the ethernet memory (eth).
- *        Example:
- *        int dma_buffer[128] ETH_RAM;
- *
- * @note The eth is a dedicated memory block with its own DMA controller.
- */
-#define ETH_RAM                                 __attribute__((section(".ram2"), aligned(4)))
-
-/*
- * @brief Makro to store data in the backup memory (bckp).
- *        Example:
- *        int backup_buffer[128] BCKP_RAM;
- *
- * @note The eth is a dedicated memory block with its own DMA controller.
- */
-#define BCKP_RAM                                __attribute__((section(".ram5"), aligned(4)))
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name ChibiOS/HAL configuration
- * @{
- */
-/*===========================================================================*/
-#include <hal.h>
-
-/**
- * @brief   ADC driver for reading the system voltage.
- */
-#define MODULE_HAL_ADC_VSYS                     ADCD1
-
-/**
- * @brief   Configuration for the ADC.
- */
-extern ADCConversionGroup moduleHalAdcVsysConversionGroup;
-
-/**
- * @brief   CAN driver to use.
- */
-#define MODULE_HAL_CAN                          CAND1
-
-/**
- * @brief   Configuration for the CAN driver.
- */
-extern CANConfig moduleHalCanConfig;
-
-/**
- * @brief   Interrupt driver to use.
- */
-#define MODULE_HAL_EXT                          EXTD1
-
-/**
- * @brief   Interrupt driver configuration.
- */
-extern EXTConfig moduleHalExtConfig;
-
-/**
- * @brief   I2C driver to access multiplexer, proximity sensors 1 to 4, power monitors for VIO1.8 and VIO 3.3, and fuel gauge (rear battery).
- */
-#define MODULE_HAL_I2C_PROX_PM18_PM33_GAUGEREAR I2CD1
-
-/**
- * @brief   Configuration for the multiplexer, proximity sensors 1 to 4, power monitors for VIO1.8 and VIO 3.3, and fuel gauge (rear battery) I2C driver.
- */
-extern I2CConfig moduleHalI2cProxPm18Pm33GaugeRearConfig;
-
-/**
- * @brief   I2C driver to access multiplexer, proximity sensors 5 to 8, power monitors for VSYS4.2, VIO 5.0 and VDD, EEPROM, touch sensor, and fuel gauge (front battery).
- */
-#define MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT I2CD2
-
-/**
- * @brief   Configuration for the multiplexer, proximity sensors 1 to 4, power monitors for VIO1.8 and VIO 3.3, and fuel gauge (rear battery) I2C driver.
- */
-extern I2CConfig moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig;
-
-/**
- * @brief   PWM driver for the buzzer.
- */
-#define MODULE_HAL_PWM_BUZZER                   PWMD3
-
-/**
- * @brief   Configuration of the PWM driver.
- */
-extern PWMConfig moduleHalPwmBuzzerConfig;
-
-/**
- * @brief   PWM channeö for the buzzer.
- */
-#define MODULE_HAL_PWM_BUZZER_CHANNEL           1
-
-/**
- * @brief   Serial driver of the programmer interface.
- */
-#define MODULE_HAL_PROGIF                       SD1
-
-/**
- * @brief   Configuration for the programmer serial interface driver.
- */
-extern SerialConfig moduleHalProgIfConfig;
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name GPIO definitions
- * @{
- */
-/*===========================================================================*/
-#include <amiro-lld.h>
-
-/**
- * @brief   Interrupt channel for the IR_INT1 and CHARGE_STAT1A signals.
- */
-#define MODULE_GPIO_EXTCHANNEL_IRINT1           ((expchannel_t)0)
-
-/**
- * @brief   Interrupt channel for the GAUGE_BATLOW1 signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_GAUGEBATLOW1     ((expchannel_t)1)
-
-/**
- * @brief   Interrupt channel for the GAUGE_BATGD1 signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_GAUGEBATGD1      ((expchannel_t)2)
-
-/**
- * @brief   Interrupt channel for the SYS_UART_DN signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_SYSUARTDN        ((expchannel_t)3)
-
-/**
- * @brief   Interrupt channel for the IR_INT2 and CHARGE_STAT2A signals.
- */
-#define MODULE_GPIO_EXTCHANNEL_IRINT2           ((expchannel_t)4)
-
-/**
- * @brief   Interrupt channel for the TOUCH_INT signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_TOUCHINT         ((expchannel_t)5)
-
-/**
- * @brief   Interrupt channel for the GAUGE_BATLOW2 signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_GAUGEBATLOW2     ((expchannel_t)6)
-
-/**
- * @brief   Interrupt channel for the GAUGE_BATGD2 signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_GAUGEBATGD2      ((expchannel_t)7)
-
-/**
- * @brief   Interrupt channel for the PATH_DC signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_PATHDC           ((expchannel_t)8)
-
-/**
- * @brief   Interrupt channel for the SYS_SPI_DIR signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_SYSSPIDIR        ((expchannel_t)9)
-
-/**
- * @brief   Interrupt channel for the SYS_SYNC signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_SYSSYNC          ((expchannel_t)12)
-
-/**
- * @brief   Interrupt channel for the SYS_PD signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_SYSPD            ((expchannel_t)13)
-
-/**
- * @brief   Interrupt channel for the SYS_WARMRST signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_SYSWARMRST       ((expchannel_t)14)
-
-/**
- * @brief   Interrupt channel for the SYS_UART_UP signal.
- */
-#define MODULE_GPIO_EXTCHANNEL_SYSUARTUP        ((expchannel_t)15)
-
-/**
- * @brief   SYS_REG_EN output signal GPIO.
- */
-extern apalGpio_t moduleGpioSysRegEn;
-
-/**
- * @brief   IR_INT1 input signal GPIO.
- */
-extern apalGpio_t moduleGpioIrInt1;
-
-/**
- * @brief   POWER_EN output signal GPIO.
- */
-extern apalGpio_t moduleGpioPowerEn;
-
-/**
- * @brief   SYS_UART_DN bidirectional signal GPIO.
- */
-extern apalGpio_t moduleGpioSysUartDn;
-
-/**
- * @brief   CHARGE_STAT2A input signal GPIO.
- */
-extern apalGpio_t moduleGpioChargeStat2A;
-
-/**
- * @brief   GAUGE_BATLOW2 input signal GPIO.
- */
-extern apalGpio_t moduleGpioGaugeBatLow2;
-
-/**
- * @brief   GAUGE_BATGD2 input signal GPIO.
- */
-extern apalGpio_t moduleGpioGaugeBatGd2;
-
-/**
- * @brief   LED output signal GPIO.
- */
-extern apalGpio_t moduleGpioLed;
-
-/**
- * @brief   SYS_UART_UP bidirectional signal GPIO.
- */
-extern apalGpio_t moduleGpioSysUartUp;
-
-/**
- * @brief   CHARGE_STAT1A input signal GPIO.
- */
-extern apalGpio_t moduleGpioChargeStat1A;
-
-/**
- * @brief   GAUGE_BATLOW1 input signal GPIO.
- */
-extern apalGpio_t moduleGpioGaugeBatLow1;
-
-/**
- * @brief   GAUGE_BATGD1 input signal GPIO.
- */
-extern apalGpio_t moduleGpioGaugeBatGd1;
-
-/**
- * @brief   CHARG_EN1 output signal GPIO.
- */
-extern apalGpio_t moduleGpioChargeEn1;
-
-/**
- * @brief   IR_INT2 input signal GPIO.
- */
-extern apalGpio_t moduleGpioIrInt2;
-
-/**
- * @brief   TOUCH_INT input signal GPIO.
- */
-extern apalGpio_t moduleGpioTouchInt;
-
-/**
- * @brief   SYS_DONE input signal GPIO.
- */
-extern apalGpio_t moduleGpioSysDone;
-
-/**
- * @brief   SYS_PROG output signal GPIO.
- */
-extern apalGpio_t moduleGpioSysProg;
-
-/**
- * @brief   PATH_DC input signal GPIO.
- */
-extern apalGpio_t moduleGpioPathDc;
-
-/**
- * @brief   SYS_SPI_DIR bidirectional signal GPIO.
- */
-extern apalGpio_t moduleGpioSysSpiDir;
-
-/**
- * @brief   SYS_SYNC bidirectional signal GPIO.
- */
-extern apalGpio_t moduleGpioSysSync;
-
-/**
- * @brief   SYS_PD bidirectional signal GPIO.
- */
-extern apalGpio_t moduleGpioSysPd;
-
-/**
- * @brief   SYS_WARMRST bidirectional signal GPIO.
- */
-extern apalGpio_t moduleGpioSysWarmrst;
-
-/**
- * @brief   BT_RST output signal GPIO.
- */
-extern apalGpio_t moduleGpioBtRst;
-
-/**
- * @brief   CHARGE_EN2 output signal GPIO.
- */
-extern apalGpio_t moduleGpioChargeEn2;
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name AMiRo-OS core configurations
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Event flag to be set on a IR_INT1 / CHARGE_STAT1A interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_IRINT1           ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_IRINT1)
-
-/**
- * @brief   Event flag to be set on a GAUGE_BATLOW1 interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_GAUGEBATLOW1     ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_GAUGEBATLOW1)
-
-/**
- * @brief   Event flag to be set on a GAUGE_BATGD1 interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_GAUGEBATGD1      ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_GAUGEBATGD1)
-
-/**
- * @brief   Event flag to be set on a SYS_UART_DN interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_SYSUARTDN        ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_SYSUARTDN)
-
-/**
- * @brief   Event flag to be set on a IR_INT2 / CHARGE_STAT2A interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_IRINT2           ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_IRINT2)
-
-/**
- * @brief   Event flag to be set on a TOUCH_INT interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_TOUCHINT         ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_TOUCHINT)
-
-/**
- * @brief   Event flag to be set on a GAUGE_BATLOW2 interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_GAUGEBATLOW2     ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_GAUGEBATLOW2)
-
-/**
- * @brief   Event flag to be set on a GAUGE_BATGD2 interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_GAUGEBATGD2      ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_GAUGEBATGD2)
-
-/**
- * @brief   Event flag to be set on a PATH_DC interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_PATHDC           ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_PATHDC)
-
-/**
- * @brief   Event flag to be set on a SYS_SPI_DIR interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_SYSSPIDIR        ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_SYSSPIDIR)
-
-/**
- * @brief   Event flag to be set on a SYS_SYNC interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_SYSSYNC          ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_SYSSYNC)
-
-/**
- * @brief   Event flag to be set on a SYS_PD interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_SYSPD            ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_SYSPD)
-
-/**
- * @brief   Event flag to be set on a SYS_WARMRST interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_SYSWARMRST       ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_SYSWARMRST)
-
-/**
- * @brief   Event flag to be set on a SYS_UART_UP interrupt.
- */
-#define MODULE_OS_IOEVENTFLAGS_SYSUARTUP        ((eventflags_t)1 << MODULE_GPIO_EXTCHANNEL_SYSUARTUP)
-
-/**
- * @brief   PD signal for SSSP.
- */
-extern apalControlGpio_t moduleSsspPd;
-
-/**
- * @brief   SYNC signal for SSSP.
- */
-extern apalControlGpio_t moduleSsspSync;
-
-/**
- * @brief   Shell prompt text.
- */
-extern const char* moduleShellPrompt;
-
-/**
- * @brief   Unit test initialization hook.
- */
-#define MODULE_INIT_TESTS() {                                                 \
-  /* add unit-test shell commands */                                          \
-  aosShellAddCommand(aos.shell, &moduleUtAdcVsys.shellcmd);                   \
-  aosShellAddCommand(aos.shell, &moduleUtAlldAt24c01bn.shellcmd);             \
-  aosShellAddCommand(aos.shell, &moduleUtAlldBq24103a.shellcmd);              \
-  aosShellAddCommand(aos.shell, &moduleUtAlldBq27500.shellcmd);               \
-  aosShellAddCommand(aos.shell, &moduleUtAlldBq27500Bq24103a.shellcmd);       \
-  aosShellAddCommand(aos.shell, &moduleUtAlldIna219.shellcmd);                \
-  aosShellAddCommand(aos.shell, &moduleUtAlldMpr121.shellcmd);                \
-  aosShellAddCommand(aos.shell, &moduleUtAlldPca9544a.shellcmd);              \
-  aosShellAddCommand(aos.shell, &moduleUtAlldPklcs1212e4001.shellcmd);        \
-  aosShellAddCommand(aos.shell, &moduleUtAlldLed.shellcmd);                   \
-  aosShellAddCommand(aos.shell, &moduleUtAlldTps62113.shellcmd);              \
-  aosShellAddCommand(aos.shell, &moduleUtAlldTps62113Ina219.shellcmd);        \
-  aosShellAddCommand(aos.shell, &moduleUtAlldVcnl4020.shellcmd);              \
-}
-
-/**
- * @brief   Periphery communication interfaces initialization hook.
- */
-#define MODULE_INIT_PERIPHERY_COMM() {                                        \
-  /* serial driver */                                                         \
-  sdStart(&MODULE_HAL_PROGIF, &moduleHalProgIfConfig);                        \
-  /* I2C */                                                                   \
-  moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed = (PCA9544A_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed) ? PCA9544A_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed;  \
-  moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed = (VCNL4020_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed) ? VCNL4020_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed;  \
-  moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed = (INA219_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed) ? INA219_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed;  \
-  moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed = (BQ27500_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed) ? BQ27500_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed;  \
-  moduleHalI2cProxPm18Pm33GaugeRearConfig.duty_cycle = (moduleHalI2cProxPm18Pm33GaugeRearConfig.clock_speed <= 100000) ? STD_DUTY_CYCLE : FAST_DUTY_CYCLE_2;  \
-  i2cStart(&MODULE_HAL_I2C_PROX_PM18_PM33_GAUGEREAR, &moduleHalI2cProxPm18Pm33GaugeRearConfig); \
-  moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed = (PCA9544A_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed) ? PCA9544A_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed; \
-  moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed = (VCNL4020_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed) ? VCNL4020_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed; \
-  moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed = (INA219_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed) ? INA219_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed; \
-  moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed = (AT24C01BN_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed) ? AT24C01BN_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed; \
-  moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed = (MPR121_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed) ? MPR121_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed; \
-  moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed = (BQ27500_LLD_I2C_MAXFREQUENCY < moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed) ? BQ27500_LLD_I2C_MAXFREQUENCY : moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed; \
-  moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.duty_cycle = (moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig.clock_speed <= 100000) ? STD_DUTY_CYCLE : FAST_DUTY_CYCLE_2;  \
-  i2cStart(&MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT, &moduleHalI2cProxPm42Pm50PmVddEepromTouchGaugeFrontConfig);  \
-  /* ADC */                                                                   \
-  adcStart(&MODULE_HAL_ADC_VSYS, NULL);                                       \
-  /* PWM */                                                                   \
-  pwmStart(&MODULE_HAL_PWM_BUZZER, &moduleHalPwmBuzzerConfig);                \
-  moduleHalPwmBuzzerConfig.frequency = MODULE_HAL_PWM_BUZZER.clock;           \
-  pwmStop(&MODULE_HAL_PWM_BUZZER);                                            \
-  moduleHalPwmBuzzerConfig.period = moduleHalPwmBuzzerConfig.frequency / PKLCS1212E4001_LLD_FREQUENCY_SPEC; \
-  pwmStart(&MODULE_HAL_PWM_BUZZER, &moduleHalPwmBuzzerConfig);                \
-}
-
-/**
- * @brief   Hook to handle IO events during SSSP startup synchronization.
- */
-#define MODULE_SSP_STARTUP_OUTRO_IO_EVENT(mask, flags) {                      \
-  /* ignore all events */                                                     \
-  (void)mask;                                                                 \
-  (void)flags;                                                                \
-}
-
-/**
- * @brief   Periphery communication interface deinitialization hook.
- */
-#define MODULE_SHUTDOWN_PERIPHERY_COMM() {                                    \
-  /* PWM */                                                                   \
-  pwmStop(&MODULE_HAL_PWM_BUZZER);                                            \
-  /* ADC */                                                                   \
-  adcStop(&MODULE_HAL_ADC_VSYS);                                              \
-  /* I2C */                                                                   \
-  i2cStop(&MODULE_HAL_I2C_PROX_PM18_PM33_GAUGEREAR);                          \
-  i2cStop(&MODULE_HAL_I2C_PROX_PM42_PM50_PMVDD_EEPROM_TOUCH_GAUGEFRONT);      \
-  /* don't stop the serial driver so messages can still be printed */         \
-}
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Low-level drivers
- * @{
- */
-/*===========================================================================*/
-#include <alld_at24c01bn-sh-b.h>
-#include <alld_bq24103a.h>
-#include <alld_bq27500.h>
-#include <alld_ina219.h>
-#include <alld_led.h>
-#include <alld_mpr121.h>
-#include <alld_pca9544a.h>
-#include <alld_pklcs1212e4001.h>
-#include <alld_tps62113.h>
-#include <alld_vcnl4020.h>
-
-/**
- * @brief   EEPROM driver.
- */
-extern AT24C01BNDriver moduleLldEeprom;
-
-/**
- * @brief   Battery charger (front battery) driver.
- */
-extern BQ24103ADriver moduleLldBatteryChargerFront;
-
-/**
- * @brief   Battery charger (rear battery) driver.
- */
-extern BQ24103ADriver moduleLldBatteryChargerRear;
-
-/**
- * @brief   Fuel gauge (front battery) driver.
- */
-extern BQ27500Driver moduleLldFuelGaugeFront;
-
-/**
- * @brief   Fuel gauge (rear battery) driver.
- */
-extern BQ27500Driver moduleLldFuelGaugeRear;
-
-/**
- * @brief   Power monitor (VDD) driver.
- */
-extern INA219Driver moduleLldPowerMonitorVdd;
-
-/**
- * @brief   Power monitor (VIO 1.8) driver.
- */
-extern INA219Driver moduleLldPowerMonitorVio18;
-
-/**
- * @brief   Power monitor (VIO 3.3) driver.
- */
-extern INA219Driver moduleLldPowerMonitorVio33;
-
-/**
- * @brief   Power monitor (VSYS 4.2) driver.
- */
-extern INA219Driver moduleLldPowerMonitorVsys42;
-
-/**
- * @brief   Power monitor (VIO 5.0) driver.
- */
-extern INA219Driver moduleLldPowerMonitorVio50;
-
-/**
- * @brief   Status LED driver.
- */
-extern LEDDriver moduleLldStatusLed;
-
-/**
- * @brief   Touch sensor driver.
- */
-extern MPR121Driver moduleLldTouch;
-
-/**
- * @brief   I2C multiplexer (I2C 1) driver.
- */
-extern PCA9544ADriver moduleLldI2cMultiplexer1;
-
-/**
- * @brief   I2C multiplexer (I2C 2) driver.
- */
-extern PCA9544ADriver moduleLldI2cMultiplexer2;
-
-/**
- * @brief   Step down converter driver.
- * @note    Although there multiple TPS62113, those are completely identical from driver few (share the same signals).
- */
-extern TPS62113Driver moduleLldStepDownConverter;
-
-/**
- * @brief   Proximity sensor (I2C 1) driver.
- */
-extern VCNL4020Driver moduleLldProximity1;
-
-/**
- * @brief   Proximity sensor (I2C 2) driver.
- */
-extern VCNL4020Driver moduleLldProximity2;
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Unit tests (UT)
- * @{
- */
-/*===========================================================================*/
-#if (AMIROOS_CFG_TESTS_ENABLE == true) || defined(__DOXYGEN__)
-#include <ut_lld_adc.h>
-#include <ut_alld_at24c01bn-sh-b.h>
-#include <ut_alld_bq24103a.h>
-#include <ut_alld_bq27500.h>
-#include <ut_alld_bq27500_bq24103a.h>
-#include <ut_alld_ina219.h>
-#include <ut_alld_led.h>
-#include <ut_alld_mpr121.h>
-#include <ut_alld_pca9544a.h>
-#include <ut_alld_pklcs1212e4001.h>
-#include <ut_alld_tps62113.h>
-#include <ut_alld_tps62113_ina219.h>
-#include <ut_alld_vcnl4020.h>
-
-/**
- * @brief   ADC unit test object.
- */
-extern aos_unittest_t moduleUtAdcVsys;
-
-/**
- * @brief   AT24C01BN-SH-B (EEPROM) unit test object.
- */
-extern aos_unittest_t moduleUtAlldAt24c01bn;
-
-/**
- * @brief   BQ24103A (battery charger) unit test object.
- */
-extern aos_unittest_t moduleUtAlldBq24103a;
-
-/**
- * @brief   BQ27500 (fuel gauge) unit test object.
- */
-extern aos_unittest_t moduleUtAlldBq27500;
-
-/**
- * @brief   BQ27500 (fuela gauge) in combination with BQ24103A (battery charger) unit test object.
- */
-extern aos_unittest_t moduleUtAlldBq27500Bq24103a;
-
-/**
- * @brief   INA219 (power monitor) unit test object.
- */
-extern aos_unittest_t moduleUtAlldIna219;
-
-/**
- * @brief   Status LED unit test object.
- */
-extern aos_unittest_t moduleUtAlldLed;
-
-/**
- * @brief   MPR121 (touch sensor) unit test object.
- */
-extern aos_unittest_t moduleUtAlldMpr121;
-
-/**
- * @brief   PCA9544A (I2C multiplexer) unit test object.
- */
-extern aos_unittest_t moduleUtAlldPca9544a;
-
-/**
- * @brief   PKLCS1212E4001 (buzzer) unit test object.
- */
-extern aos_unittest_t moduleUtAlldPklcs1212e4001;
-
-/**
- * @brief   TPS62113 (step-down converter) unit test object.
- */
-extern aos_unittest_t moduleUtAlldTps62113;
-
-/**
- * @brief   TPS62113 (step-sown converter) in combination with INA219 (power monitor) unit test object.
- */
-extern aos_unittest_t moduleUtAlldTps62113Ina219;
-
-/**
- * @brief   VCNL4020 (proximity sensor) unit test object.
- */
-extern aos_unittest_t moduleUtAlldVcnl4020;
-
-#endif /* AMIROOS_CFG_TESTS_ENABLE == true */
-
-/** @} */
-
-#endif /* _AMIROOS_MODULE_H_ */
diff --git a/os/modules/aos_chconf.h b/os/modules/aos_chconf.h
deleted file mode 100644
index 823a1e4..0000000
--- a/os/modules/aos_chconf.h
+++ /dev/null
@@ -1,558 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2018  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file    os/modules/common/chconf.h
- * @brief   Common ChibiOS Configuration file for the all modules.
- * @details Contains the application specific kernel settings.
- *
- * @addtogroup config
- * @details Kernel related settings and hooks.
- * @{
- */
-
-#ifndef _AOS_CHCONF_H_
-#define _AOS_CHCONF_H_
-
-#define _CHIBIOS_RT_CONF_
-
-#include <aosconf.h>
-
-/*===========================================================================*/
-/**
- * @name System timers settings
- */
-/*===========================================================================*/
-
-// These settings are specific to each module.
-
-/*===========================================================================*/
-/**
- * @name Kernel parameters and options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Round robin interval.
- * @details This constant is the number of system ticks allowed for the
- *          threads before preemption occurs. Setting this value to zero
- *          disables the preemption for threads with equal priority and the
- *          round robin becomes cooperative. Note that higher priority
- *          threads can still preempt, the kernel is always preemptive.
- * @note    Disabling the round robin preemption makes the kernel more compact
- *          and generally faster.
- * @note    The round robin preemption is not supported in tickless mode and
- *          must be set to zero in that case.
- */
-#define CH_CFG_TIME_QUANTUM                 0
-
-/**
- * @brief   Managed RAM size.
- * @details Size of the RAM area to be managed by the OS. If set to zero
- *          then the whole available RAM is used. The core memory is made
- *          available to the heap allocator and/or can be used directly through
- *          the simplified core memory allocator.
- *
- * @note    In order to let the OS manage the whole RAM the linker script must
- *          provide the @p __heap_base__ and @p __heap_end__ symbols.
- * @note    Requires @p CH_CFG_USE_MEMCORE.
- */
-#define CH_CFG_MEMCORE_SIZE                 0
-
-/**
- * @brief   Idle thread automatic spawn suppression.
- * @details When this option is activated the function @p chSysInit()
- *          does not spawn the idle thread. The application @p main()
- *          function becomes the idle thread and must implement an
- *          infinite loop.
- */
-#define CH_CFG_NO_IDLE_THREAD               FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Performance options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   OS optimization.
- * @details If enabled then time efficient rather than space efficient code
- *          is used when two possible implementations exist.
- *
- * @note    This is not related to the compiler optimization options.
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_OPTIMIZE_SPEED               TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Subsystem options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Time Measurement APIs.
- * @details If enabled then the time measurement APIs are included in
- *          the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_TM                       TRUE
-
-/**
- * @brief   Threads registry APIs.
- * @details If enabled then the registry APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_REGISTRY                 FALSE
-
-/**
- * @brief   Threads synchronization APIs.
- * @details If enabled then the @p chThdWait() function is included in
- *          the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_WAITEXIT                 TRUE
-
-/**
- * @brief   Semaphores APIs.
- * @details If enabled then the Semaphores APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_SEMAPHORES               TRUE
-
-/**
- * @brief   Semaphores queuing mode.
- * @details If enabled then the threads are enqueued on semaphores by
- *          priority rather than in FIFO order.
- *
- * @note    The default is @p FALSE. Enable this if you have special
- *          requirements.
- * @note    Requires @p CH_CFG_USE_SEMAPHORES.
- */
-#define CH_CFG_USE_SEMAPHORES_PRIORITY      FALSE
-
-/**
- * @brief   Mutexes APIs.
- * @details If enabled then the mutexes APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MUTEXES                  TRUE
-
-/**
- * @brief   Enables recursive behavior on mutexes.
- * @note    Recursive mutexes are heavier and have an increased
- *          memory footprint.
- *
- * @note    The default is @p FALSE.
- * @note    Requires @p CH_CFG_USE_MUTEXES.
- */
-#define CH_CFG_USE_MUTEXES_RECURSIVE        FALSE
-
-/**
- * @brief   Conditional Variables APIs.
- * @details If enabled then the conditional variables APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_MUTEXES.
- */
-#define CH_CFG_USE_CONDVARS                 TRUE
-
-/**
- * @brief   Conditional Variables APIs with timeout.
- * @details If enabled then the conditional variables APIs with timeout
- *          specification are included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_CONDVARS.
- */
-#define CH_CFG_USE_CONDVARS_TIMEOUT         TRUE
-
-/**
- * @brief   Events Flags APIs.
- * @details If enabled then the event flags APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_EVENTS                   TRUE
-
-/**
- * @brief   Events Flags APIs with timeout.
- * @details If enabled then the events APIs with timeout specification
- *          are included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_EVENTS.
- */
-#define CH_CFG_USE_EVENTS_TIMEOUT           TRUE
-
-/**
- * @brief   Synchronous Messages APIs.
- * @details If enabled then the synchronous messages APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MESSAGES                 FALSE
-
-/**
- * @brief   Synchronous Messages queuing mode.
- * @details If enabled then messages are served by priority rather than in
- *          FIFO order.
- *
- * @note    The default is @p FALSE. Enable this if you have special
- *          requirements.
- * @note    Requires @p CH_CFG_USE_MESSAGES.
- */
-#define CH_CFG_USE_MESSAGES_PRIORITY        FALSE
-
-/**
- * @brief   Mailboxes APIs.
- * @details If enabled then the asynchronous messages (mailboxes) APIs are
- *          included in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_SEMAPHORES.
- */
-#define CH_CFG_USE_MAILBOXES                FALSE
-
-/**
- * @brief   I/O Queues APIs.
- * @details If enabled then the I/O queues APIs are included in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_QUEUES                   FALSE
-
-/**
- * @brief   Core Memory Manager APIs.
- * @details If enabled then the core memory manager APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MEMCORE                  FALSE
-
-/**
- * @brief   Heap Allocator APIs.
- * @details If enabled then the memory heap allocator APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
- *          @p CH_CFG_USE_SEMAPHORES.
- * @note    Mutexes are recommended.
- */
-#define CH_CFG_USE_HEAP                     FALSE
-
-/**
- * @brief   Memory Pools Allocator APIs.
- * @details If enabled then the memory pools allocator APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- */
-#define CH_CFG_USE_MEMPOOLS                 FALSE
-
-/**
- * @brief   Dynamic Threads APIs.
- * @details If enabled then the dynamic threads creation APIs are included
- *          in the kernel.
- *
- * @note    The default is @p TRUE.
- * @note    Requires @p CH_CFG_USE_WAITEXIT.
- * @note    Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
- */
-#define CH_CFG_USE_DYNAMIC                  FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Debug options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Debug option, kernel statistics.
- *
- * @note    The default is @p FALSE.
- */
-#if ((CH_CFG_USE_TM == TRUE) && (AMIROOS_CFG_DBG == true)) || defined(__DOXYGEN__)
-  #define CH_DBG_STATISTICS                 TRUE
-#else
-  #define CH_DBG_STATISTICS                 FALSE
-#endif
-
-/**
- * @brief   Debug option, system state check.
- * @details If enabled the correct call protocol for system APIs is checked
- *          at runtime.
- *
- * @note    The default is @p FALSE.
- */
-#if (AMIROOS_CFG_DBG == true) || defined(__DOXYGEN__)
-  #define CH_DBG_SYSTEM_STATE_CHECK         TRUE
-#else
-  #define CH_DBG_SYSTEM_STATE_CHECK         FALSE
-#endif
-
-/**
- * @brief   Debug option, parameters checks.
- * @details If enabled then the checks on the API functions input
- *          parameters are activated.
- *
- * @note    The default is @p FALSE.
- */
-#if (AMIROOS_CFG_DBG == true) || defined(__DOXYGEN__)
-  #define CH_DBG_ENABLE_CHECKS              TRUE
-#else
-  #define CH_DBG_ENABLE_CHECKS              FALSE
-#endif
-
-/**
- * @brief   Debug option, consistency checks.
- * @details If enabled then all the assertions in the kernel code are
- *          activated. This includes consistency checks inside the kernel,
- *          runtime anomalies and port-defined checks.
- *
- * @note    The default is @p FALSE.
- */
-#if (AMIROOS_CFG_DBG == true) || defined(__DOXYGEN__)
-  #define CH_DBG_ENABLE_ASSERTS             TRUE
-#else
-  #define CH_DBG_ENABLE_ASSERTS             FALSE
-#endif
-
-/**
- * @brief   Debug option, trace buffer.
- * @details If enabled then the trace buffer is activated.
- *
- * @note    The default is @p CH_DBG_TRACE_MASK_DISABLED.
- */
-#define CH_DBG_TRACE_MASK                   CH_DBG_TRACE_MASK_DISABLED
-
-/**
- * @brief   Trace buffer entries.
- * @note    The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
- *          different from @p CH_DBG_TRACE_MASK_DISABLED.
- */
-#define CH_DBG_TRACE_BUFFER_SIZE            128
-
-/**
- * @brief   Debug option, stack checks.
- * @details If enabled then a runtime stack check is performed.
- *
- * @note    The default is @p FALSE.
- * @note    The stack check is performed in a architecture/port dependent way.
- *          It may not be implemented or some ports.
- * @note    The default failure mode is to halt the system with the global
- *          @p panic_msg variable set to @p NULL.
- */
-#if (AMIROOS_CFG_DBG == true) || defined(__DOXYGEN__)
-  #define CH_DBG_ENABLE_STACK_CHECK         TRUE
-#else
-  #define CH_DBG_ENABLE_STACK_CHECK         FALSE
-#endif
-
-/**
- * @brief   Debug option, stacks initialization.
- * @details If enabled then the threads working area is filled with a byte
- *          value when a thread is created. This can be useful for the
- *          runtime measurement of the used stack.
- *
- * @note    The default is @p FALSE.
- */
-#if (AMIROOS_CFG_PROFILE == true) || defined(__DOXYGEN__)
-  #define CH_DBG_FILL_THREADS               TRUE
-#else
-  #define CH_DBG_FILL_THREADS               FALSE
-#endif
-
-/**
- * @brief   Debug option, threads profiling.
- * @details If enabled then a field is added to the @p thread_t structure that
- *          counts the system ticks occurred while executing the thread.
- *
- * @note    The default is @p FALSE.
- * @note    This debug option is not currently compatible with the
- *          tickless mode.
- */
-#if ((CH_CFG_ST_TIMEDELTA == 0) && (AMIROOS_CFG_PROFILE == true)) || defined(__DOXYGEN__)
-  #define CH_DBG_THREADS_PROFILING          TRUE
-#else
-  #define CH_DBG_THREADS_PROFILING          FALSE
-#endif
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Kernel hooks
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Threads descriptor structure extension.
- * @details User fields added to the end of the @p thread_t structure.
- */
-#define CH_CFG_THREAD_EXTRA_FIELDS                                          \
-  /* Add threads custom fields here.*/
-
-/**
- * @brief   Threads initialization hook.
- * @details User initialization code added to the @p chThdInit() API.
- *
- * @note    It is invoked from within @p chThdInit() and implicitly from all
- *          the threads creation APIs.
- */
-#define CH_CFG_THREAD_INIT_HOOK(tp) {                                       \
-  /* Add threads initialization code here.*/                                \
-}
-
-/**
- * @brief   Threads finalization hook.
- * @details User finalization code added to the @p chThdExit() API.
- *
- * @note    It is inserted into lock zone.
- * @note    It is also invoked when the threads simply return in order to
- *          terminate.
- */
-#define CH_CFG_THREAD_EXIT_HOOK(tp) {                                       \
-  /* Add threads finalization code here.*/                                  \
-}
-
-/**
- * @brief   Context switch hook.
- * @details This hook is invoked just before switching between threads.
- */
-#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) {                              \
-  /* Context switch code here.*/                                            \
-}
-
-/**
- * @brief   ISR enter hook.
- */
-#define CH_CFG_IRQ_PROLOGUE_HOOK() {                                        \
-  /* IRQ prologue code here.*/                                              \
-}
-
-/**
- * @brief   ISR exit hook.
- */
-#define CH_CFG_IRQ_EPILOGUE_HOOK() {                                        \
-  /* IRQ epilogue code here.*/                                              \
-}
-
-/**
- * @brief   Idle thread enter hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to activate a power saving mode.
- */
-#define CH_CFG_IDLE_ENTER_HOOK() {                                          \
-  /* Idle-enter code here.*/                                                \
-}
-
-/**
- * @brief   Idle thread leave hook.
- * @note    This hook is invoked within a critical zone, no OS functions
- *          should be invoked from here.
- * @note    This macro can be used to deactivate a power saving mode.
- */
-#define CH_CFG_IDLE_LEAVE_HOOK() {                                          \
-  /* Idle-leave code here.*/                                                \
-}
-
-/**
- * @brief   Idle Loop hook.
- * @details This hook is continuously invoked by the idle thread loop.
- */
-#define CH_CFG_IDLE_LOOP_HOOK() {                                           \
-  /* Idle loop code here.*/                                                 \
-}
-
-/**
- * @brief   System tick event hook.
- * @details This hook is invoked in the system tick handler immediately
- *          after processing the virtual timers queue.
- */
-#define CH_CFG_SYSTEM_TICK_HOOK() {                                         \
-  /* System tick event code here.*/                                         \
-}
-
-/**
- * @brief   System halt hook.
- * @details This hook is invoked in case to a system halting error before
- *          the system is halted.
- */
-#define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \
-  extern void aosPrintHaltErrorCode(const char* reason);                       \
-  aosPrintHaltErrorCode(reason);                                               \
-}
-
-/**
- * @brief   Trace hook.
- * @details This hook is invoked each time a new record is written in the
- *          trace buffer.
- */
-#define CH_CFG_TRACE_HOOK(tep) {                                            \
-  /* Trace code here.*/                                                     \
-}
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Port specific settings
- */
-/*===========================================================================*/
-
-// These settings are specific to each module.
-
-/*===========================================================================*/
-/**
- * @name other
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Flag to enable/disable floating point support in chprinf()
- */
-#define CHPRINTF_USE_FLOAT                  TRUE
-
-/** @} */
-
-#endif  /* _AOS_CHCONF_H_ */
-
-/** @} */
diff --git a/os/modules/flash.mk b/os/modules/flash.mk
deleted file mode 100644
index 21e9339..0000000
--- a/os/modules/flash.mk
+++ /dev/null
@@ -1,48 +0,0 @@
-################################################################################
-# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
-# (AMiRo) platform.                                                            #
-# Copyright (C) 2016..2018  Thomas Schöpping et al.                            #
-#                                                                              #
-# This program is free software: you can redistribute it and/or modify         #
-# it under the terms of the GNU General Public License as published by         #
-# the Free Software Foundation, either version 3 of the License, or            #
-# (at your option) any later version.                                          #
-#                                                                              #
-# This program is distributed in the hope that it will be useful,              #
-# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
-# GNU General Public License for more details.                                 #
-#                                                                              #
-# You should have received a copy of the GNU General Public License            #
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
-#                                                                              #
-# This research/work was supported by the Cluster of Excellence Cognitive      #
-# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
-# funded by the German Research Foundation (DFG).                              #
-################################################################################
-
-
-
-# the path to this makefile
-FLASH_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
-
-include $(FLASH_DIR)../../bootloader/bootloader.mk
-
-# the files to flash
-ifdef PROJECT
-  FLASH_MODULES = $(PROJECT)
-  FLASH_FILES = build/$(PROJECT).$(FLASHTOOL_EXT)
-else
-  FLASH_MODULES = $(MODULES)
-  FLASH_FILES = $(foreach module,$(MODULES),$(module)/build/$(module).$(FLASHTOOL_EXT))
-endif
-
-flash: $(FLASH_FILES)
-	$(info )
-ifeq ($(FLASHTOOL),SerialBoot)
-	$(info Flashing ($(FLASHTOOL)):)
-	$(FLASHTOOL_CMD) $(FLASHTOOL_ARGS)
-else
-	$(info ERROR: unable to flash the module (SerialBoot unavailable))
-endif
-
diff --git a/os/modules/modules.mk b/os/modules/modules.mk
deleted file mode 100644
index 1d84a5d..0000000
--- a/os/modules/modules.mk
+++ /dev/null
@@ -1,37 +0,0 @@
-################################################################################
-# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
-# (AMiRo) platform.                                                            #
-# Copyright (C) 2016..2018  Thomas Schöpping et al.                            #
-#                                                                              #
-# This program is free software: you can redistribute it and/or modify         #
-# it under the terms of the GNU General Public License as published by         #
-# the Free Software Foundation, either version 3 of the License, or            #
-# (at your option) any later version.                                          #
-#                                                                              #
-# This program is distributed in the hope that it will be useful,              #
-# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
-# GNU General Public License for more details.                                 #
-#                                                                              #
-# You should have received a copy of the GNU General Public License            #
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
-#                                                                              #
-# This research/work was supported by the Cluster of Excellence Cognitive      #
-# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
-# funded by the German Research Foundation (DFG).                              #
-################################################################################
-
-
-
-# absolute path to this directory
-MODULES_DIR := $(dir $(lastword $(MAKEFILE_LIST)))
-
-# list of available modules
-MODULES = $(patsubst $(MODULES_DIR)%/,%,$(sort $(dir $(wildcard $(MODULES_DIR)*/*))))
-
-# include paths
-MODULESINC = $(MODULES_DIR)
-
-# C source files
-MODULESCSRC = $(MODULES_DIR)
-
