commit 7368d8da0270071eda920475b3f09f2147e09a31
Author: Thomas Schöpping <tschoepp@cit-ec.uni-bielefeld.de>
Date:   Fri Jan 17 14:11:15 2020 +0100

    ChibiOS updated and patches adopted accordingly

diff --git a/kernel/ChibiOS b/kernel/ChibiOS
index 9a5761d..b564131 160000
--- a/kernel/ChibiOS
+++ b/kernel/ChibiOS
@@ -1 +1 @@
-Subproject commit 9a5761d8a6a46a8ae917697914af74e17d8fccf2
+Subproject commit b5641312f05301031f554e9b7611fc765217acc0
diff --git a/kernel/patches/I2C-without-DMA.patch b/kernel/patches/I2C-without-DMA.patch
index d41425c..c2bbc70 100644
--- a/kernel/patches/I2C-without-DMA.patch
+++ b/kernel/patches/I2C-without-DMA.patch
@@ -37,7 +37,7 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
  
  /*===========================================================================*/
  /* Driver constants.                                                         */
-@@ -72,6 +78,20 @@
+@@ -75,6 +81,20 @@
  #define I2C_EV6_MASTER_REC_MODE_SELECTED                                    \
    ((uint32_t)(((I2C_SR2_MSL | I2C_SR2_BUSY)<< 16) | I2C_SR1_ADDR))
  
@@ -58,7 +58,7 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
  #define I2C_EV8_2_MASTER_BYTE_TRANSMITTED                                   \
    ((uint32_t)(((I2C_SR2_MSL | I2C_SR2_BUSY | I2C_SR2_TRA) << 16) |          \
                I2C_SR1_BTF | I2C_SR1_TXE))
-@@ -129,8 +149,24 @@ static void i2c_lld_abort_operation(I2CDriver *i2cp) {
+@@ -132,8 +152,24 @@ static void i2c_lld_abort_operation(I2CDriver *i2cp) {
    dp->SR1 = 0;
  
    /* Stops the associated DMA streams.*/
@@ -85,7 +85,7 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
  }
  
  /**
-@@ -235,14 +271,18 @@ static void i2c_lld_set_opmode(I2CDriver *i2cp) {
+@@ -238,14 +274,18 @@ static void i2c_lld_set_opmode(I2CDriver *i2cp) {
    dp->CR1 = regCR1;
  }
  
@@ -106,18 +106,9 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
    I2C_TypeDef *dp = i2cp->i2c;
    uint32_t regSR2 = dp->SR2;
    uint32_t event = dp->SR1;
-@@ -252,7 +292,7 @@ static void i2c_lld_serve_event_interrupt(I2CDriver *i2cp) {
-      done by the DMA.*/
-   switch (I2C_EV_MASK & (event | (regSR2 << 16))) {
-   case I2C_EV5_MASTER_MODE_SELECT:
--    if ((i2cp->addr >> 8) > 0) { 
-+    if ((i2cp->addr >> 8) > 0) {
-       /* 10-bit address: 1 1 1 1 0 X X R/W */
-       dp->DR = 0xF0 | (0x6 & (i2cp->addr >> 8)) | (0x1 & i2cp->addr);
-     } else {
-@@ -293,7 +333,146 @@ static void i2c_lld_serve_event_interrupt(I2CDriver *i2cp) {
-   if (event & (I2C_SR1_ADDR | I2C_SR1_ADD10))
-     (void)dp->SR2;
+@@ -303,7 +343,146 @@ static void i2c_lld_serve_event_interrupt(I2CDriver *i2cp) {
+     dp->SR1 &= ~I2C_SR1_BERR;
+   }
  }
 +#endif /* any I2CDx uses DMA mode */
 +
@@ -253,8 +244,8 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
 +  }
 +}
 +#endif /* any I2CDx uses non-DMA mode */
- 
 +
+ 
 +#if (STM32_I2C_USE_I2C1 && STM32_I2C_I2C1_USE_DMA) ||                      \
 +    (STM32_I2C_USE_I2C2 && STM32_I2C_I2C2_USE_DMA) ||                      \
 +    (STM32_I2C_USE_I2C3 && STM32_I2C_I2C3_USE_DMA) ||                      \
@@ -262,7 +253,7 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
  /**
   * @brief   DMA RX end IRQ handler.
   *
-@@ -347,6 +526,7 @@ static void i2c_lld_serve_tx_end_irq(I2CDriver *i2cp, uint32_t flags) {
+@@ -357,6 +536,7 @@ static void i2c_lld_serve_tx_end_irq(I2CDriver *i2cp, uint32_t flags) {
       of R/W transaction itself.*/
    dp->CR2 |= I2C_CR2_ITEVTEN;
  }
@@ -270,7 +261,7 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
  
  /**
   * @brief   I2C error handler.
-@@ -359,8 +539,24 @@ static void i2c_lld_serve_tx_end_irq(I2CDriver *i2cp, uint32_t flags) {
+@@ -369,8 +549,24 @@ static void i2c_lld_serve_tx_end_irq(I2CDriver *i2cp, uint32_t flags) {
  static void i2c_lld_serve_error_interrupt(I2CDriver *i2cp, uint16_t sr) {
  
    /* Clears interrupt flags just to be safe.*/
@@ -297,7 +288,7 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
  
    i2cp->errors = I2C_NO_ERROR;
  
-@@ -407,7 +603,11 @@ OSAL_IRQ_HANDLER(STM32_I2C1_EVENT_HANDLER) {
+@@ -421,7 +617,11 @@ OSAL_IRQ_HANDLER(STM32_I2C1_EVENT_HANDLER) {
  
    OSAL_IRQ_PROLOGUE();
  
@@ -310,7 +301,7 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
  
    OSAL_IRQ_EPILOGUE();
  }
-@@ -437,7 +637,11 @@ OSAL_IRQ_HANDLER(STM32_I2C2_EVENT_HANDLER) {
+@@ -451,7 +651,11 @@ OSAL_IRQ_HANDLER(STM32_I2C2_EVENT_HANDLER) {
  
    OSAL_IRQ_PROLOGUE();
  
@@ -323,7 +314,7 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
  
    OSAL_IRQ_EPILOGUE();
  }
-@@ -469,7 +673,11 @@ OSAL_IRQ_HANDLER(STM32_I2C3_EVENT_HANDLER) {
+@@ -483,7 +687,11 @@ OSAL_IRQ_HANDLER(STM32_I2C3_EVENT_HANDLER) {
  
    OSAL_IRQ_PROLOGUE();
  
@@ -336,7 +327,7 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
  
    OSAL_IRQ_EPILOGUE();
  }
-@@ -540,19 +748,22 @@ void i2c_lld_start(I2CDriver *i2cp) {
+@@ -554,19 +762,22 @@ void i2c_lld_start(I2CDriver *i2cp) {
    /* If in stopped state then enables the I2C and DMA clocks.*/
    if (i2cp->state == I2C_STOP) {
  
@@ -368,7 +359,7 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
        i2cp->dmarx = dmaStreamAllocI(STM32_I2C_I2C1_RX_DMA_STREAM,
                                      STM32_I2C_I2C1_IRQ_PRIORITY,
                                      (stm32_dmaisr_t)i2c_lld_serve_rx_end_irq,
-@@ -563,22 +774,50 @@ void i2c_lld_start(I2CDriver *i2cp) {
+@@ -577,22 +788,50 @@ void i2c_lld_start(I2CDriver *i2cp) {
                                      (stm32_dmaisr_t)i2c_lld_serve_tx_end_irq,
                                      (void *)i2cp);
        osalDbgAssert(i2cp->dmatx != NULL, "unable to allocate stream");
@@ -419,7 +410,7 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
        i2cp->dmarx = dmaStreamAllocI(STM32_I2C_I2C2_RX_DMA_STREAM,
                                      STM32_I2C_I2C2_IRQ_PRIORITY,
                                      (stm32_dmaisr_t)i2c_lld_serve_rx_end_irq,
-@@ -589,22 +828,50 @@ void i2c_lld_start(I2CDriver *i2cp) {
+@@ -603,22 +842,50 @@ void i2c_lld_start(I2CDriver *i2cp) {
                                      (stm32_dmaisr_t)i2c_lld_serve_tx_end_irq,
                                      (void *)i2cp);
        osalDbgAssert(i2cp->dmatx != NULL, "unable to allocate stream");
@@ -470,7 +461,7 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
        i2cp->dmarx = dmaStreamAllocI(STM32_I2C_I2C3_RX_DMA_STREAM,
                                      STM32_I2C_I2C3_IRQ_PRIORITY,
                                      (stm32_dmaisr_t)i2c_lld_serve_rx_end_irq,
-@@ -615,28 +882,35 @@ void i2c_lld_start(I2CDriver *i2cp) {
+@@ -629,28 +896,35 @@ void i2c_lld_start(I2CDriver *i2cp) {
                                      (stm32_dmaisr_t)i2c_lld_serve_tx_end_irq,
                                      (void *)i2cp);
        osalDbgAssert(i2cp->dmatx != NULL, "unable to allocate stream");
@@ -515,7 +506,7 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
    /* Setup I2C parameters.*/
    i2c_lld_set_clock(i2cp);
    i2c_lld_set_opmode(i2cp);
-@@ -659,13 +933,15 @@ void i2c_lld_stop(I2CDriver *i2cp) {
+@@ -673,13 +947,15 @@ void i2c_lld_stop(I2CDriver *i2cp) {
  
      /* I2C disable.*/
      i2c_lld_abort_operation(i2cp);
@@ -535,7 +526,7 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
        nvicDisableVector(I2C1_EV_IRQn);
        nvicDisableVector(I2C1_ER_IRQn);
        rccDisableI2C1();
-@@ -674,6 +950,12 @@ void i2c_lld_stop(I2CDriver *i2cp) {
+@@ -688,6 +964,12 @@ void i2c_lld_stop(I2CDriver *i2cp) {
  
  #if STM32_I2C_USE_I2C2
      if (&I2CD2 == i2cp) {
@@ -548,7 +539,7 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
        nvicDisableVector(I2C2_EV_IRQn);
        nvicDisableVector(I2C2_ER_IRQn);
        rccDisableI2C2();
-@@ -682,6 +964,12 @@ void i2c_lld_stop(I2CDriver *i2cp) {
+@@ -696,6 +978,12 @@ void i2c_lld_stop(I2CDriver *i2cp) {
  
  #if STM32_I2C_USE_I2C3
      if (&I2CD3 == i2cp) {
@@ -561,7 +552,7 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
        nvicDisableVector(I2C3_EV_IRQn);
        nvicDisableVector(I2C3_ER_IRQn);
        rccDisableI2C3();
-@@ -732,10 +1020,43 @@ msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr,
+@@ -747,10 +1035,43 @@ msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr,
    /* Releases the lock from high level driver.*/
    osalSysUnlock();
  
@@ -609,7 +600,53 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
  
    /* Calculating the time window for the timeout on the busy bus condition.*/
    start = osalOsGetSystemTimeX();
-@@ -812,15 +1133,61 @@ msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr,
+@@ -769,7 +1090,21 @@ msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr,
+     /* If the system time went outside the allowed window then a timeout
+        condition is returned.*/
+     if (!osalTimeIsInRangeX(osalOsGetSystemTimeX(), start, end)) {
+-      dmaStreamDisable(i2cp->dmarx);
++#if STM32_I2C_USE_I2C1 && STM32_I2C_I2C1_USE_DMA
++      if (&I2CD1 == i2cp) {
++        dmaStreamDisable(i2cp->dmarx);
++      }
++#endif
++#if STM32_I2C_USE_I2C2 && STM32_I2C_I2C2_USE_DMA
++      if (&I2CD2 == i2cp) {
++        dmaStreamDisable(i2cp->dmarx);
++      }
++#endif
++#if STM32_I2C_USE_I2C3 && STM32_I2C_I2C3_USE_DMA
++      if (&I2CD3 == i2cp) {
++        dmaStreamDisable(i2cp->dmarx);
++      }
++#endif
+       return MSG_TIMEOUT;
+     }
+ 
+@@ -783,7 +1118,21 @@ msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr,
+   /* Waits for the operation completion or a timeout.*/
+   msg = osalThreadSuspendTimeoutS(&i2cp->thread, timeout);
+   if (msg != MSG_OK) {
+-    dmaStreamDisable(i2cp->dmarx);
++#if STM32_I2C_USE_I2C1 && STM32_I2C_I2C1_USE_DMA
++    if (&I2CD1 == i2cp) {
++      dmaStreamDisable(i2cp->dmarx);
++    }
++#endif
++#if STM32_I2C_USE_I2C2 && STM32_I2C_I2C2_USE_DMA
++    if (&I2CD2 == i2cp) {
++      dmaStreamDisable(i2cp->dmarx);
++    }
++#endif
++#if STM32_I2C_USE_I2C3 && STM32_I2C_I2C3_USE_DMA
++    if (&I2CD3 == i2cp) {
++      dmaStreamDisable(i2cp->dmarx);
++    }
++#endif
+   }
+ 
+   return msg;
+@@ -835,15 +1184,61 @@ msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr,
    /* Releases the lock from high level driver.*/
    osalSysUnlock();
  
@@ -680,6 +717,60 @@ diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.c b/os/hal/ports/STM32/LLD
  
    /* Calculating the time window for the timeout on the busy bus condition.*/
    start = osalOsGetSystemTimeX();
+@@ -862,8 +1257,24 @@ msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr,
+     /* If the system time went outside the allowed window then a timeout
+        condition is returned.*/
+     if (!osalTimeIsInRangeX(osalOsGetSystemTimeX(), start, end)) {
+-      dmaStreamDisable(i2cp->dmatx);
+-      dmaStreamDisable(i2cp->dmarx);
++#if STM32_I2C_USE_I2C1 && STM32_I2C_I2C1_USE_DMA
++      if (&I2CD1 == i2cp) {
++        dmaStreamDisable(i2cp->dmatx);
++        dmaStreamDisable(i2cp->dmarx);
++      }
++#endif
++#if STM32_I2C_USE_I2C2 && STM32_I2C_I2C2_USE_DMA
++      if (&I2CD2 == i2cp) {
++        dmaStreamDisable(i2cp->dmatx);
++        dmaStreamDisable(i2cp->dmarx);
++      }
++#endif
++#if STM32_I2C_USE_I2C3 && STM32_I2C_I2C3_USE_DMA
++      if (&I2CD3 == i2cp) {
++        dmaStreamDisable(i2cp->dmatx);
++        dmaStreamDisable(i2cp->dmarx);
++      }
++#endif
+       return MSG_TIMEOUT;
+     }
+ 
+@@ -877,8 +1288,24 @@ msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr,
+   /* Waits for the operation completion or a timeout.*/
+   msg = osalThreadSuspendTimeoutS(&i2cp->thread, timeout);
+   if (msg != MSG_OK) {
+-    dmaStreamDisable(i2cp->dmatx);
+-    dmaStreamDisable(i2cp->dmarx);
++#if STM32_I2C_USE_I2C1 && STM32_I2C_I2C1_USE_DMA
++    if (&I2CD1 == i2cp) {
++      dmaStreamDisable(i2cp->dmatx);
++      dmaStreamDisable(i2cp->dmarx);
++    }
++#endif
++#if STM32_I2C_USE_I2C2 && STM32_I2C_I2C2_USE_DMA
++    if (&I2CD2 == i2cp) {
++      dmaStreamDisable(i2cp->dmatx);
++      dmaStreamDisable(i2cp->dmarx);
++    }
++#endif
++#if STM32_I2C_USE_I2C3 && STM32_I2C_I2C3_USE_DMA
++    if (&I2CD3 == i2cp) {
++      dmaStreamDisable(i2cp->dmatx);
++      dmaStreamDisable(i2cp->dmarx);
++    }
++#endif
+   }
+ 
+   return msg;
 diff --git a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.h b/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.h
 --- a/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.h
 +++ b/os/hal/ports/STM32/LLD/I2Cv1/hal_i2c_lld.h
