amiro-os / modules / STM32L476RG-NUCLEO64 / board.c @ ae448fac
History | View | Annotate | Download (8.56 KB)
1 | 27d0378b | Simon Welzel | /*
|
---|---|---|---|
2 | ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||
3 | |||
4 | Licensed under the Apache License, Version 2.0 (the "License");
|
||
5 | you may not use this file except in compliance with the License.
|
||
6 | You may obtain a copy of the License at
|
||
7 | |||
8 | http://www.apache.org/licenses/LICENSE-2.0
|
||
9 | |||
10 | Unless required by applicable law or agreed to in writing, software
|
||
11 | distributed under the License is distributed on an "AS IS" BASIS,
|
||
12 | WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||
13 | See the License for the specific language governing permissions and
|
||
14 | limitations under the License.
|
||
15 | */
|
||
16 | |||
17 | /*
|
||
18 | * This file has been automatically generated using ChibiStudio board
|
||
19 | * generator plugin. Do not edit manually.
|
||
20 | */
|
||
21 | |||
22 | #include "hal.h" |
||
23 | #include "stm32_gpio.h" |
||
24 | |||
25 | /*===========================================================================*/
|
||
26 | /* Driver local definitions. */
|
||
27 | /*===========================================================================*/
|
||
28 | |||
29 | /*===========================================================================*/
|
||
30 | /* Driver exported variables. */
|
||
31 | /*===========================================================================*/
|
||
32 | |||
33 | /*===========================================================================*/
|
||
34 | /* Driver local variables and types. */
|
||
35 | /*===========================================================================*/
|
||
36 | |||
37 | /**
|
||
38 | * @brief Type of STM32 GPIO port setup.
|
||
39 | */
|
||
40 | typedef struct { |
||
41 | uint32_t moder; |
||
42 | uint32_t otyper; |
||
43 | uint32_t ospeedr; |
||
44 | uint32_t pupdr; |
||
45 | uint32_t odr; |
||
46 | uint32_t afrl; |
||
47 | uint32_t afrh; |
||
48 | uint32_t ascr; |
||
49 | uint32_t lockr; |
||
50 | } gpio_setup_t; |
||
51 | |||
52 | /**
|
||
53 | * @brief Type of STM32 GPIO initialization data.
|
||
54 | */
|
||
55 | typedef struct { |
||
56 | #if STM32_HAS_GPIOA || defined(__DOXYGEN__)
|
||
57 | gpio_setup_t PAData; |
||
58 | #endif
|
||
59 | #if STM32_HAS_GPIOB || defined(__DOXYGEN__)
|
||
60 | gpio_setup_t PBData; |
||
61 | #endif
|
||
62 | #if STM32_HAS_GPIOC || defined(__DOXYGEN__)
|
||
63 | gpio_setup_t PCData; |
||
64 | #endif
|
||
65 | #if STM32_HAS_GPIOD || defined(__DOXYGEN__)
|
||
66 | gpio_setup_t PDData; |
||
67 | #endif
|
||
68 | #if STM32_HAS_GPIOE || defined(__DOXYGEN__)
|
||
69 | gpio_setup_t PEData; |
||
70 | #endif
|
||
71 | #if STM32_HAS_GPIOF || defined(__DOXYGEN__)
|
||
72 | gpio_setup_t PFData; |
||
73 | #endif
|
||
74 | #if STM32_HAS_GPIOG || defined(__DOXYGEN__)
|
||
75 | gpio_setup_t PGData; |
||
76 | #endif
|
||
77 | #if STM32_HAS_GPIOH || defined(__DOXYGEN__)
|
||
78 | gpio_setup_t PHData; |
||
79 | #endif
|
||
80 | #if STM32_HAS_GPIOI || defined(__DOXYGEN__)
|
||
81 | gpio_setup_t PIData; |
||
82 | #endif
|
||
83 | #if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
|
||
84 | gpio_setup_t PJData; |
||
85 | #endif
|
||
86 | #if STM32_HAS_GPIOK || defined(__DOXYGEN__)
|
||
87 | gpio_setup_t PKData; |
||
88 | #endif
|
||
89 | } gpio_config_t; |
||
90 | |||
91 | /**
|
||
92 | * @brief STM32 GPIO static initialization data.
|
||
93 | */
|
||
94 | static const gpio_config_t gpio_default_config = { |
||
95 | #if STM32_HAS_GPIOA
|
||
96 | {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, |
||
97 | VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH, VAL_GPIOA_ASCR, |
||
98 | VAL_GPIOA_LOCKR}, |
||
99 | #endif
|
||
100 | #if STM32_HAS_GPIOB
|
||
101 | {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, |
||
102 | VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH, VAL_GPIOB_ASCR, |
||
103 | VAL_GPIOB_LOCKR}, |
||
104 | #endif
|
||
105 | #if STM32_HAS_GPIOC
|
||
106 | {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, |
||
107 | VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH, VAL_GPIOC_ASCR, |
||
108 | VAL_GPIOC_LOCKR}, |
||
109 | #endif
|
||
110 | #if STM32_HAS_GPIOD
|
||
111 | {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, |
||
112 | VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH, VAL_GPIOD_ASCR, |
||
113 | VAL_GPIOD_LOCKR}, |
||
114 | #endif
|
||
115 | #if STM32_HAS_GPIOE
|
||
116 | {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, |
||
117 | VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH, VAL_GPIOE_ASCR, |
||
118 | VAL_GPIOE_LOCKR}, |
||
119 | #endif
|
||
120 | #if STM32_HAS_GPIOF
|
||
121 | {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, |
||
122 | VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH, VAL_GPIOF_ASCR, |
||
123 | VAL_GPIOF_LOCKR}, |
||
124 | #endif
|
||
125 | #if STM32_HAS_GPIOG
|
||
126 | {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, |
||
127 | VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH, VAL_GPIOG_ASCR, |
||
128 | VAL_GPIOG_LOCKR}, |
||
129 | #endif
|
||
130 | #if STM32_HAS_GPIOH
|
||
131 | {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, |
||
132 | VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH, VAL_GPIOH_ASCR, |
||
133 | VAL_GPIOH_LOCKR}, |
||
134 | #endif
|
||
135 | #if STM32_HAS_GPIOI
|
||
136 | {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, |
||
137 | VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH, VAL_GPIOI_ASCR, |
||
138 | VAL_GPIOI_LOCKR}, |
||
139 | #endif
|
||
140 | #if STM32_HAS_GPIOJ
|
||
141 | {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, |
||
142 | VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH, VAL_GPIOJ_ASCR, |
||
143 | VAL_GPIOJ_LOCKR}, |
||
144 | #endif
|
||
145 | #if STM32_HAS_GPIOK
|
||
146 | {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, |
||
147 | VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH, VAL_GPIOK_ASCR, |
||
148 | VAL_GPIOK_LOCKR} |
||
149 | #endif
|
||
150 | }; |
||
151 | |||
152 | /*===========================================================================*/
|
||
153 | /* Driver local functions. */
|
||
154 | /*===========================================================================*/
|
||
155 | |||
156 | static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) { |
||
157 | |||
158 | gpiop->OTYPER = config->otyper; |
||
159 | gpiop->ASCR = config->ascr; |
||
160 | gpiop->OSPEEDR = config->ospeedr; |
||
161 | gpiop->PUPDR = config->pupdr; |
||
162 | gpiop->ODR = config->odr; |
||
163 | gpiop->AFRL = config->afrl; |
||
164 | gpiop->AFRH = config->afrh; |
||
165 | gpiop->MODER = config->moder; |
||
166 | gpiop->LOCKR = config->lockr; |
||
167 | } |
||
168 | |||
169 | static void stm32_gpio_init(void) { |
||
170 | |||
171 | /* Enabling GPIO-related clocks, the mask comes from the
|
||
172 | registry header file.*/
|
||
173 | rccResetAHB2(STM32_GPIO_EN_MASK); |
||
174 | rccEnableAHB2(STM32_GPIO_EN_MASK, true);
|
||
175 | |||
176 | /* Initializing all the defined GPIO ports.*/
|
||
177 | #if STM32_HAS_GPIOA
|
||
178 | gpio_init(GPIOA, &gpio_default_config.PAData); |
||
179 | #endif
|
||
180 | #if STM32_HAS_GPIOB
|
||
181 | gpio_init(GPIOB, &gpio_default_config.PBData); |
||
182 | #endif
|
||
183 | #if STM32_HAS_GPIOC
|
||
184 | gpio_init(GPIOC, &gpio_default_config.PCData); |
||
185 | #endif
|
||
186 | #if STM32_HAS_GPIOD
|
||
187 | gpio_init(GPIOD, &gpio_default_config.PDData); |
||
188 | #endif
|
||
189 | #if STM32_HAS_GPIOE
|
||
190 | gpio_init(GPIOE, &gpio_default_config.PEData); |
||
191 | #endif
|
||
192 | #if STM32_HAS_GPIOF
|
||
193 | gpio_init(GPIOF, &gpio_default_config.PFData); |
||
194 | #endif
|
||
195 | #if STM32_HAS_GPIOG
|
||
196 | gpio_init(GPIOG, &gpio_default_config.PGData); |
||
197 | #endif
|
||
198 | #if STM32_HAS_GPIOH
|
||
199 | gpio_init(GPIOH, &gpio_default_config.PHData); |
||
200 | #endif
|
||
201 | #if STM32_HAS_GPIOI
|
||
202 | gpio_init(GPIOI, &gpio_default_config.PIData); |
||
203 | #endif
|
||
204 | #if STM32_HAS_GPIOJ
|
||
205 | gpio_init(GPIOJ, &gpio_default_config.PJData); |
||
206 | #endif
|
||
207 | #if STM32_HAS_GPIOK
|
||
208 | gpio_init(GPIOK, &gpio_default_config.PKData); |
||
209 | #endif
|
||
210 | } |
||
211 | |||
212 | /*===========================================================================*/
|
||
213 | /* Driver interrupt handlers. */
|
||
214 | /*===========================================================================*/
|
||
215 | |||
216 | /*===========================================================================*/
|
||
217 | /* Driver exported functions. */
|
||
218 | /*===========================================================================*/
|
||
219 | |||
220 | /**
|
||
221 | * @brief Early initialization code.
|
||
222 | * @details GPIO ports and system clocks are initialized before everything
|
||
223 | * else.
|
||
224 | */
|
||
225 | void __early_init(void) { |
||
226 | |||
227 | stm32_gpio_init(); |
||
228 | stm32_clock_init(); |
||
229 | } |
||
230 | |||
231 | #if HAL_USE_SDC || defined(__DOXYGEN__)
|
||
232 | /**
|
||
233 | * @brief SDC card detection.
|
||
234 | */
|
||
235 | bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
|
||
236 | |||
237 | (void)sdcp;
|
||
238 | /* TODO: Fill the implementation.*/
|
||
239 | return true; |
||
240 | } |
||
241 | |||
242 | /**
|
||
243 | * @brief SDC card write protection detection.
|
||
244 | */
|
||
245 | bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
|
||
246 | |||
247 | (void)sdcp;
|
||
248 | /* TODO: Fill the implementation.*/
|
||
249 | return false; |
||
250 | } |
||
251 | #endif /* HAL_USE_SDC */ |
||
252 | |||
253 | #if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
|
||
254 | /**
|
||
255 | * @brief MMC_SPI card detection.
|
||
256 | */
|
||
257 | bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
|
||
258 | |||
259 | (void)mmcp;
|
||
260 | /* TODO: Fill the implementation.*/
|
||
261 | return true; |
||
262 | } |
||
263 | |||
264 | /**
|
||
265 | * @brief MMC_SPI card write protection detection.
|
||
266 | */
|
||
267 | bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
|
||
268 | |||
269 | (void)mmcp;
|
||
270 | /* TODO: Fill the implementation.*/
|
||
271 | return false; |
||
272 | } |
||
273 | #endif
|
||
274 | |||
275 | /**
|
||
276 | * @brief Board-specific initialization code.
|
||
277 | * @todo Add your board-specific code, if any.
|
||
278 | */
|
||
279 | void boardInit(void) { |
||
280 | |||
281 | } |