commit ae448fac52bee29d5e2bda8348ff9d4565f23581
Author: Thomas Schöpping <tschoepp@cit-ec.uni-bielefeld.de>
Date:   Fri Jan 25 14:40:35 2019 +0100

    renamed the STM32L4 module directory.

diff --git a/modules/RT-STM32L476RG-NUCLEO64/Makefile b/modules/RT-STM32L476RG-NUCLEO64/Makefile
deleted file mode 100644
index bbf57ef..0000000
--- a/modules/RT-STM32L476RG-NUCLEO64/Makefile
+++ /dev/null
@@ -1,308 +0,0 @@
-################################################################################
-# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
-# (AMiRo) platform.                                                            #
-# Copyright (C) 2016..2019  Thomas Schöpping et al.                            #
-#                                                                              #
-# This program is free software: you can redistribute it and/or modify         #
-# it under the terms of the GNU General Public License as published by         #
-# the Free Software Foundation, either version 3 of the License, or            #
-# (at your option) any later version.                                          #
-#                                                                              #
-# This program is distributed in the hope that it will be useful,              #
-# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
-# GNU General Public License for more details.                                 #
-#                                                                              #
-# You should have received a copy of the GNU General Public License            #
-# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
-#                                                                              #
-# This research/work was supported by the Cluster of Excellence Cognitive      #
-# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
-# funded by the German Research Foundation (DFG).                              #
-################################################################################
-
-
-
-################################################################################
-# Build global options                                                         #
-# NOTE: Can be overridden externally.                                          #
-#                                                                              #
-
-# Compiler options here.
-ifeq ($(USE_OPT),)
-  USE_OPT = -O2 -fomit-frame-pointer -falign-functions=16 -fstack-usage
-endif
-
-# C specific options here (added to USE_OPT).
-ifeq ($(USE_COPT),)
-  USE_COPT = -std=c11
-endif
-
-# C++ specific options here (added to USE_OPT).
-ifeq ($(USE_CPPOPT),)
-  USE_CPPOPT = -fno-rtti -std=c++17
-endif
-
-# Enable this if you want the linker to remove unused code and data
-ifeq ($(USE_LINK_GC),)
-  USE_LINK_GC = yes
-endif
-
-# Linker extra options here.
-ifeq ($(USE_LDOPT),)
-  USE_LDOPT =
-endif
-
-# Enable this if you want link time optimizations (LTO)
-ifeq ($(USE_LTO),)
-  USE_LTO = yes
-endif
-
-# If enabled, this option allows to compile the application in THUMB mode.
-ifeq ($(USE_THUMB),)
-  USE_THUMB = yes
-endif
-
-# Enable this if you want to see the full log while compiling.
-ifeq ($(USE_VERBOSE_COMPILE),)
-  USE_VERBOSE_COMPILE = no
-endif
-
-# If enabled, this option makes the build process faster by not compiling
-# modules not used in the current configuration.
-ifeq ($(USE_SMART_BUILD),)
-  USE_SMART_BUILD = no
-endif
-
-#                                                                              #
-# Build global options                                                         #
-################################################################################
-
-################################################################################
-# Architecture or project specific options                                     #
-#                                                                              #
-
-# Stack size to be allocated to the Cortex-M process stack. This stack is
-# the stack used by the main() thread.
-ifeq ($(USE_PROCESS_STACKSIZE),)
-  USE_PROCESS_STACKSIZE = 0x400
-endif
-
-# Stack size to the allocated to the Cortex-M main/exceptions stack. This
-# stack is used for processing interrupts and exceptions.
-ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
-  USE_EXCEPTIONS_STACKSIZE = 0x400
-endif
-
-# Enables the use of FPU on Cortex-M4.
-# Possible selections are:
-#   no     - no FPU is used (probably equals 'soft')
-#   soft   - does not use the FPU, thus all floating point operations are emulated
-#   softfp - uses the FPU, but uses the integer registers only
-#   hard   - uses the FPU and passes data via the FPU registers
-ifeq ($(USE_FPU),)
-  USE_FPU = softfp
-endif
-
-#                                                                              #
-# Architecture or project specific options                                     #
-################################################################################
-
-################################################################################
-# Project, sources and paths                                                   #
-#                                                                              #
-
-# Define project name here
-PROJECT := $(patsubst $(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))..)/%,%,$(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))))
-
-# Imported source files and paths
-include ../../kernel/kernel.mk
-CHIBIOS := $(AMIROOS_KERNEL)
-AMIROOS = ../..
-# Licensing files
-include $(CHIBIOS)/os/license/license.mk
-# Startup files
-include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32l4xx.mk
-# HAL-OSAL files
-include $(CHIBIOS)/os/hal/hal.mk
-include $(CHIBIOS)/os/hal/ports/STM32/STM32L4xx/platform.mk
-include $(CHIBIOS)/os/hal/osal/rt/osal.mk
-# RTOS files
-include $(CHIBIOS)/os/rt/rt.mk
-include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
-# Other files (optional).
-include $(CHIBIOS)/test/lib/test.mk
-include $(CHIBIOS)/test/rt/rt_test.mk
-include $(CHIBIOS)/test/oslib/oslib_test.mk
-# AMiRo-BLT files
-include ../../bootloader/bootloader.mk
-# AMiRo-LLD files
-include ../../periphery-lld/periphery-lld.mk
-# AMiRo-OS files
-include ../modules.mk
-include $(AMIROOS)/core/core.mk
-include $(AMIROOS)/unittests/unittests.mk
-
-# Define linker script file here
-LDSCRIPT= STM32L476xG.ld
-
-# C sources that can be compiled in ARM or THUMB mode depending on the global
-# setting.
-CSRC = $(LICSRC) \
-       $(STARTUPSRC) \
-       $(KERNSRC) \
-       $(PORTSRC) \
-       $(OSALSRC) \
-       $(HALSRC) \
-       $(PLATFORMSRC) \
-       $(MODULESCSRC) \
-       $(TESTSRC) \
-       $(PERIPHERYLLDCSRC) \
-       $(AMIROOSCORECSRC) \
-       $(UNITTESTSCSRC) \
-       $(CHIBIOS)/os/various/evtimer.c \
-       $(CHIBIOS)/os/various/syscalls.c \
-       $(CHIBIOS)/os/hal/lib/streams/chprintf.c \
-       board.c \
-       module.c \
-       $(APPSCSRC)
-
-# C++ sources that can be compiled in ARM or THUMB mode depending on the global
-# setting.
-CPPSRC = $(AMIROOSCORECPPSRC) \
-         $(CHIBIOS)/os/various/cpp_wrappers/syscalls_cpp.cpp \
-         $(APPSCPPSRC)
-
-# C sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-ACSRC = $(APPSACSRC)
-
-# C++ sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-ACPPSRC = $(APPSACPPSRC)
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-TCSRC = $(APPSTCSRC)
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-#       option that results in lower performance and larger code size.
-TCPPSRC = $(APPSTCPPSRC)
-
-# List ASM source files here
-ASMSRC = $(APPSASMSRC)
-ASMXSRC = $(STARTUPASM) \
-          $(PORTASM) \
-          $(OSALASM) \
-          $(APPSASMXSRC)
-
-INCDIR = $(LICINC) \
-         $(STARTUPINC) \
-         $(KERNINC) \
-         $(PORTINC) \
-         $(OSALINC) \
-         $(HALINC) \
-         $(PLATFORMINC) \
-         $(MODULESINC) \
-         $(TESTINC) \
-         $(BOOTLOADERINC) \
-         $(CHIBIOS)/os/hal/lib/streams \
-         $(PERIPHERYLLDINC) \
-         $(AMIROOS) \
-         $(AMIROOSCOREINC) \
-         $(UNITTESTSINC) \
-         $(APPSINC)
-
-#                                                                              #
-# Project, sources and paths                                                   #
-################################################################################
-
-################################################################################
-# Compiler settings                                                            #
-# NOTE: Some can be overridden externally.                                     #
-#                                                                              #
-
-MCU  = cortex-m4
-
-#TRGT = arm-elf-
-TRGT = arm-none-eabi-
-CC   = $(TRGT)gcc
-CPPC = $(TRGT)g++
-# Enable loading with g++ only if you need C++ runtime support.
-# NOTE: You can use C++ even without C++ support if you are careful. C++
-#       runtime support makes code size explode.
-LD   = $(TRGT)gcc
-#LD   = $(TRGT)g++
-CP   = $(TRGT)objcopy
-AS   = $(TRGT)gcc -x assembler-with-cpp
-AR   = $(TRGT)ar
-OD   = $(TRGT)objdump
-SZ   = $(TRGT)size
-HEX  = $(CP) -O ihex
-BIN  = $(CP) -O binary
-SREC = $(CP) -O srec --srec-len=248
-
-# ARM-specific options here
-ifeq ($(AOPT),)
-  AOPT =
-endif
-
-# THUMB-specific options here
-ifeq ($(TOPT),)
-  TOPT = -mthumb -DTHUMB
-endif
-
-# Define C warning options here
-ifeq ($(CWARN),)
-  CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
-endif
-
-# Define C++ warning options here
-ifeq ($(CPPWARN),)
-  CPPWARN = -Wall -Wextra -Wundef
-endif
-
-#                                                                              #
-# Compiler settings                                                            #
-################################################################################
-
-################################################################################
-# Start of user section                                                        #
-#                                                                              #
-
-# List all user C define here, like -D_DEBUG=1
-UDEFS +=
-
-# Define ASM defines here
-UADEFS +=
-
-# List all user directories here
-UINCDIR +=
-
-# List the user directory to look for the libraries here
-ULIBDIR +=
-
-# List all user libraries here
-ULIBS +=
-
-#                                                                              #
-# End of user defines                                                          #
-################################################################################
-
-################################################################################
-# Start of targets section                                                     #
-#                                                                              #
-
-# all and its dependencies
-BUILDDIR = ./build
-RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
-include $(RULESPATH)/rules.mk
-
-#                                                                              #
-# End of targets section                                                       #
-################################################################################
-
diff --git a/modules/RT-STM32L476RG-NUCLEO64/STM32L476xG.ld b/modules/RT-STM32L476RG-NUCLEO64/STM32L476xG.ld
deleted file mode 100644
index a125d22..0000000
--- a/modules/RT-STM32L476RG-NUCLEO64/STM32L476xG.ld
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/*
- * STM32L476xG memory setup.
- */
-MEMORY
-{
-    flash0  : org = 0x08000000, len = 1M
-    flash1  : org = 0x00000000, len = 0
-    flash2  : org = 0x00000000, len = 0
-    flash3  : org = 0x00000000, len = 0
-    flash4  : org = 0x00000000, len = 0
-    flash5  : org = 0x00000000, len = 0
-    flash6  : org = 0x00000000, len = 0
-    flash7  : org = 0x00000000, len = 0
-    ram0    : org = 0x20000000, len = 96k
-    ram1    : org = 0x00000000, len = 0
-    ram2    : org = 0x00000000, len = 0
-    ram3    : org = 0x00000000, len = 0
-    ram4    : org = 0x10000000, len = 32k
-    ram5    : org = 0x00000000, len = 0
-    ram6    : org = 0x00000000, len = 0
-    ram7    : org = 0x00000000, len = 0
-}
-
-/* For each data/text section two region are defined, a virtual region
-   and a load region (_LMA suffix).*/
-
-/* Flash region to be used for exception vectors.*/
-REGION_ALIAS("VECTORS_FLASH", flash0);
-REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
-
-/* Flash region to be used for constructors and destructors.*/
-REGION_ALIAS("XTORS_FLASH", flash0);
-REGION_ALIAS("XTORS_FLASH_LMA", flash0);
-
-/* Flash region to be used for code text.*/
-REGION_ALIAS("TEXT_FLASH", flash0);
-REGION_ALIAS("TEXT_FLASH_LMA", flash0);
-
-/* Flash region to be used for read only data.*/
-REGION_ALIAS("RODATA_FLASH", flash0);
-REGION_ALIAS("RODATA_FLASH_LMA", flash0);
-
-/* Flash region to be used for various.*/
-REGION_ALIAS("VARIOUS_FLASH", flash0);
-REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
-
-/* Flash region to be used for RAM(n) initialization data.*/
-REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
-
-/* RAM region to be used for Main stack. This stack accommodates the processing
-   of all exceptions and interrupts.*/
-REGION_ALIAS("MAIN_STACK_RAM", ram0);
-
-/* RAM region to be used for the process stack. This is the stack used by
-   the main() function.*/
-REGION_ALIAS("PROCESS_STACK_RAM", ram0);
-
-/* RAM region to be used for data segment.*/
-REGION_ALIAS("DATA_RAM", ram0);
-REGION_ALIAS("DATA_RAM_LMA", flash0);
-
-/* RAM region to be used for BSS segment.*/
-REGION_ALIAS("BSS_RAM", ram0);
-
-/* RAM region to be used for the default heap.*/
-REGION_ALIAS("HEAP_RAM", ram0);
-
-/* Generic rules inclusion.*/
-INCLUDE rules.ld
diff --git a/modules/RT-STM32L476RG-NUCLEO64/alldconf.h b/modules/RT-STM32L476RG-NUCLEO64/alldconf.h
deleted file mode 100644
index cfc54d9..0000000
--- a/modules/RT-STM32L476RG-NUCLEO64/alldconf.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2019  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file
- * @brief   AMiRo-LLD configuration file for the PowerManagement v1.1 module.
- * @details Contains the application specific AMiRo-LLD settings.
- *
- * @addtogroup STM32L476RG-NUCLEO64
- * @{
- */
-
-#ifndef _ALLDCONF_H_
-#define _ALLDCONF_H_
-
-/*
- * compatibility guards
- */
-#define _AMIRO_LLD_CFG_
-#define AMIRO_LLD_CFG_VERSION_MAJOR         1
-#define AMIRO_LLD_CFG_VERSION_MINOR         0
-
-/**
- * @brief   Width of the apalTime_t data type.
- *
- * @details Possible values are 8, 16, 32, and 64 bits.
- *          By definition time is represented at microsecond precision.
- */
-#define AMIROLLD_CFG_TIME_SIZE          32
-
-/**
- * @brief   Enable flag for the MPU6050 IMU.
- */
-//#define AMIROLLD_CFG_USE_MPU6050
-
-#endif /* _ALLDCONF_H_ */
-
-/** @} */
diff --git a/modules/RT-STM32L476RG-NUCLEO64/aosconf.h b/modules/RT-STM32L476RG-NUCLEO64/aosconf.h
deleted file mode 100644
index 2a09b0e..0000000
--- a/modules/RT-STM32L476RG-NUCLEO64/aosconf.h
+++ /dev/null
@@ -1,242 +0,0 @@
-/*
-AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
-Copyright (C) 2016..2019  Thomas Schöpping et al.
-
-This program is free software: you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation, either version 3 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-
-/**
- * @file
- * @brief   AMiRo-OS Configuration file for the PowerManagement v1.1 module.
- * @details Contains the application specific AMiRo-OS settings.
- *
- * @addtogroup powermanagement_aos_config
- * @{
- */
-
-#ifndef _AOSCONF_H_
-#define _AOSCONF_H_
-
-/*
- * compatibility guards
- */
-#define _AMIRO_OS_CFG_
-#define _AMIRO_OS_CFG_VERSION_MAJOR_            2
-#define _AMIRO_OS_CFG_VERSION_MINOR_            0
-
-#include <stdbool.h>
-
-/*
- * Include an external configuration file to override the following default settings only if required.
- */
-#if defined(AMIRO_APPS) && (AMIRO_APPS == true)
-  #include <osconf.h>
-#endif
-
-/*===========================================================================*/
-/**
- * @name Kernel parameters and options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Flag to enable/disable debug API and logic.
- */
-#if !defined(OS_CFG_DBG)
-  #define AMIROOS_CFG_DBG                       true
-#else
-  #define AMIROOS_CFG_DBG                       OS_CFG_DBG
-#endif
-
-/**
- * @brief   Flag to enable/disable unit tests.
- * @note    Setting this flag will implicitely enable the shell.
- */
-#if !defined(OS_CFG_TESTS_ENABLE)
-  #define AMIROOS_CFG_TESTS_ENABLE              false
-#else
-  #define AMIROOS_CFG_TESTS_ENABLE              OS_CFG_TESTS_ENABLE
-#endif
-
-/**
- * @brief   Flag to enable/disable profiling API and logic.
- */
-#if !defined(OS_CFG_PROFILE)
-  #define AMIROOS_CFG_PROFILE                   true
-#else
-  #define AMIROOS_CFG_PROFILE                   OS_CFG_PROFILE
-#endif
-
-/**
- * @brief   Mask for the control thread to listen to certain IO events.
- * @note    Any mandatory events (e.g. for SSSP) are enabled implicitely despite this configuration.
- */
-#if !defined(OS_CFG_MAIN_LOOP_IOEVENT_MASK)
-  #define AMIROOS_CFG_MAIN_LOOP_IOEVENT_MASK    MODULE_OS_IOEVENTFLAGS_USERBUTTON
-#else
-  #define AMIROOS_CFG_MAIN_LOOP_IOEVENT_MASK    OS_CFG_MAIN_LOOP_IOEVENT_MASK
-#endif
-
-/**
- * @brief   Timeout value when waiting for events in the main loop in microseconds.
- * @details A value of 0 deactivates the timeout.
- */
-#if !defined(OS_CFG_MAIN_LOOP_TIMEOUT)
-  #define AMIROOS_CFG_MAIN_LOOP_TIMEOUT         0
-#else
-  #define AMIROOS_CFG_MAIN_LOOP_TIMEOUT         OS_CFG_MAIN_LOOP_TIMEOUT
-#endif
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name SSSP (Startup Shutdown Synchronization Protocol) configuration.
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Flag to enable SSSP.
- */
-#if !defined(OS_CFG_SSSP_ENABLE)
-  #define AMIROOS_CFG_SSSP_ENABLE               false
-#else
-  #define AMIROOS_CFG_SSSP_ENABLE               OS_CFG_SSSP_ENABLE
-#endif
-
-/**
- * @brief   Flag to set the module as SSSP master.
- * @details There must be only one module with this flag set to true in a system.
- */
-#if !defined(OS_CFG_SSSP_MASTER)
-  #define AMIROOS_CFG_SSSP_MASTER               false
-#else
-  #define AMIROOS_CFG_SSSP_MASTER               OS_CFG_SSSP_MASTER
-#endif
-
-/**
- * @brief   Flag to set the module to be the first in the stack.
- * @details There must be only one module with this flag set to true in a system.
- */
-#if !defined(OS_CFG_SSSP_STACK_START)
-  #define AMIROOS_CFG_SSSP_STACK_START          false
-#else
-  #define AMIROOS_CFG_SSSP_STACK_START          OS_CFG_SSSP_STACK_START
-#endif
-
-/**
- * @brief   Flag to set the module to be the last in the stack.
- * @details There must be only one module with this flag set to true in a system.
- */
-#if !defined(OS_CFG_SSSP_STACK_END)
-  #define AMIROOS_CFG_SSSP_STACK_END            false
-#else
-  #define AMIROOS_CFG_SSSP_STACK_END            OS_CFG_SSSP_STACK_END
-#endif
-
-/**
- * @brief   Delay time (in microseconds) how long a SSSP signal must be active.
- */
-#if !defined(OS_CFG_SSSP_SIGNALDELAY)
-  #define AMIROOS_CFG_SSSP_SIGNALDELAY          1000
-#else
-  #define AMIROOS_CFG_SSSP_SIGNALDELAY          OS_CFG_SSSP_SIGNALDELAY
-#endif
-
-/**
- * @brief   Time boundary for robot wide clock synchronization in microseconds.
- * @details Whenever the SSSP S (snychronization) signal gets logically deactivated,
- *          All modules need to align their local uptime to the nearest multiple of this value.
- */
-#if !defined(OS_CFG_SSSP_SYSSYNCPERIOD)
-  #define AMIROOS_CFG_SSSP_SYSSYNCPERIOD        1000000
-#else
-  #define AMIROOS_CFG_SSSP_SYSSYNCPERIOD        OS_CFG_SSSP_SYSSYNCPERIOD
-#endif
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name System shell options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief   Shell enable flag.
- */
-#if !defined(OS_CFG_SHELL_ENABLE)
-  #define AMIROOS_CFG_SHELL_ENABLE              true
-#else
-  #define AMIROOS_CFG_SHELL_ENABLE              OS_CFG_SHELL_ENABLE
-#endif
-
-/**
- * @brief   Shell thread stack size.
- */
-#if !defined(OS_CFG_SHELL_STACKSIZE)
-  #define AMIROOS_CFG_SHELL_STACKSIZE           1024
-#else
-  #define AMIROOS_CFG_SHELL_STACKSIZE           OS_CFG_SHELL_STACKSIZE
-#endif
-
-/**
- * @brief   Shell thread priority.
- * @details Thread priorities are specified as an integer value.
- *          Predefined ranges are:
- *            lowest  ┌ THD_LOWPRIO_MIN
- *                    │ ...
- *                    └ THD_LOWPRIO_MAX
- *                    ┌ THD_NORMALPRIO_MIN
- *                    │ ...
- *                    └ THD_NORMALPRIO_MAX
- *                    ┌ THD_HIGHPRIO_MIN
- *                    │ ...
- *                    └ THD_HIGHPRIO_MAX
- *                    ┌ THD_RTPRIO_MIN
- *                    │ ...
- *            highest └ THD_RTPRIO_MAX
- */
-#if !defined(OS_CFG_SHELL_THREADPRIO)
-  #define AMIROOS_CFG_SHELL_THREADPRIO          AOS_THD_NORMALPRIO_MIN
-#else
-  #define AMIROOS_CFG_SHELL_THREADPRIO          OS_CFG_SHELL_THREADPRIO
-#endif
-
-/**
- * @brief   Shell maximum input line length.
- */
-#if !defined(OS_CFG_SHELL_LINEWIDTH)
-  #define AMIROOS_CFG_SHELL_LINEWIDTH           64
-#else
-  #define AMIROOS_CFG_SHELL_LINEWIDTH           OS_CFG_SHELL_LINEWIDTH
-#endif
-
-/**
- * @brief   Shell maximum number of arguments.
- */
-#if !defined(OS_CFG_SHELL_MAXARGS)
-  #define AMIROOS_CFG_SHELL_MAXARGS             4
-#else
-  #define AMIROOS_CFG_SHELL_MAXARGS             OS_CFG_SHELL_MAXARGS
-#endif
-
-/** @} */
-
-#endif /* _AOSCONF_H_ */
-
-/** @} */
diff --git a/modules/RT-STM32L476RG-NUCLEO64/board.c b/modules/RT-STM32L476RG-NUCLEO64/board.c
deleted file mode 100644
index c5776a1..0000000
--- a/modules/RT-STM32L476RG-NUCLEO64/board.c
+++ /dev/null
@@ -1,281 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/*
- * This file has been automatically generated using ChibiStudio board
- * generator plugin. Do not edit manually.
- */
-
-#include "hal.h"
-#include "stm32_gpio.h"
-
-/*===========================================================================*/
-/* Driver local definitions.                                                 */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver exported variables.                                                */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver local variables and types.                                         */
-/*===========================================================================*/
-
-/**
- * @brief   Type of STM32 GPIO port setup.
- */
-typedef struct {
-  uint32_t              moder;
-  uint32_t              otyper;
-  uint32_t              ospeedr;
-  uint32_t              pupdr;
-  uint32_t              odr;
-  uint32_t              afrl;
-  uint32_t              afrh;
-  uint32_t              ascr;
-  uint32_t              lockr;
-} gpio_setup_t;
-
-/**
- * @brief   Type of STM32 GPIO initialization data.
- */
-typedef struct {
-#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
-  gpio_setup_t          PAData;
-#endif
-#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
-  gpio_setup_t          PBData;
-#endif
-#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
-  gpio_setup_t          PCData;
-#endif
-#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
-  gpio_setup_t          PDData;
-#endif
-#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
-  gpio_setup_t          PEData;
-#endif
-#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
-  gpio_setup_t          PFData;
-#endif
-#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
-  gpio_setup_t          PGData;
-#endif
-#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
-  gpio_setup_t          PHData;
-#endif
-#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
-  gpio_setup_t          PIData;
-#endif
-#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
-  gpio_setup_t          PJData;
-#endif
-#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
-  gpio_setup_t          PKData;
-#endif
-} gpio_config_t;
-
-/**
- * @brief   STM32 GPIO static initialization data.
- */
-static const gpio_config_t gpio_default_config = {
-#if STM32_HAS_GPIOA
-  {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
-   VAL_GPIOA_ODR,   VAL_GPIOA_AFRL,   VAL_GPIOA_AFRH,    VAL_GPIOA_ASCR,
-   VAL_GPIOA_LOCKR},
-#endif
-#if STM32_HAS_GPIOB
-  {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
-   VAL_GPIOB_ODR,   VAL_GPIOB_AFRL,   VAL_GPIOB_AFRH,    VAL_GPIOB_ASCR,
-   VAL_GPIOB_LOCKR},
-#endif
-#if STM32_HAS_GPIOC
-  {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
-   VAL_GPIOC_ODR,   VAL_GPIOC_AFRL,   VAL_GPIOC_AFRH,    VAL_GPIOC_ASCR,
-   VAL_GPIOC_LOCKR},
-#endif
-#if STM32_HAS_GPIOD
-  {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
-   VAL_GPIOD_ODR,   VAL_GPIOD_AFRL,   VAL_GPIOD_AFRH,    VAL_GPIOD_ASCR,
-   VAL_GPIOD_LOCKR},
-#endif
-#if STM32_HAS_GPIOE
-  {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
-   VAL_GPIOE_ODR,   VAL_GPIOE_AFRL,   VAL_GPIOE_AFRH,    VAL_GPIOE_ASCR,
-   VAL_GPIOE_LOCKR},
-#endif
-#if STM32_HAS_GPIOF
-  {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
-   VAL_GPIOF_ODR,   VAL_GPIOF_AFRL,   VAL_GPIOF_AFRH,    VAL_GPIOF_ASCR,
-   VAL_GPIOF_LOCKR},
-#endif
-#if STM32_HAS_GPIOG
-  {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
-   VAL_GPIOG_ODR,   VAL_GPIOG_AFRL,   VAL_GPIOG_AFRH,    VAL_GPIOG_ASCR,
-   VAL_GPIOG_LOCKR},
-#endif
-#if STM32_HAS_GPIOH
-  {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
-   VAL_GPIOH_ODR,   VAL_GPIOH_AFRL,   VAL_GPIOH_AFRH,    VAL_GPIOH_ASCR,
-   VAL_GPIOH_LOCKR},
-#endif
-#if STM32_HAS_GPIOI
-  {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
-   VAL_GPIOI_ODR,   VAL_GPIOI_AFRL,   VAL_GPIOI_AFRH,    VAL_GPIOI_ASCR,
-   VAL_GPIOI_LOCKR},
-#endif
-#if STM32_HAS_GPIOJ
-  {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
-   VAL_GPIOJ_ODR,   VAL_GPIOJ_AFRL,   VAL_GPIOJ_AFRH,    VAL_GPIOJ_ASCR,
-   VAL_GPIOJ_LOCKR},
-#endif
-#if STM32_HAS_GPIOK
-  {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
-   VAL_GPIOK_ODR,   VAL_GPIOK_AFRL,   VAL_GPIOK_AFRH,    VAL_GPIOK_ASCR,
-   VAL_GPIOK_LOCKR}
-#endif
-};
-
-/*===========================================================================*/
-/* Driver local functions.                                                   */
-/*===========================================================================*/
-
-static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
-
-  gpiop->OTYPER  = config->otyper;
-  gpiop->ASCR    = config->ascr;
-  gpiop->OSPEEDR = config->ospeedr;
-  gpiop->PUPDR   = config->pupdr;
-  gpiop->ODR     = config->odr;
-  gpiop->AFRL    = config->afrl;
-  gpiop->AFRH    = config->afrh;
-  gpiop->MODER   = config->moder;
-  gpiop->LOCKR   = config->lockr;
-}
-
-static void stm32_gpio_init(void) {
-
-  /* Enabling GPIO-related clocks, the mask comes from the
-     registry header file.*/
-  rccResetAHB2(STM32_GPIO_EN_MASK);
-  rccEnableAHB2(STM32_GPIO_EN_MASK, true);
-
-  /* Initializing all the defined GPIO ports.*/
-#if STM32_HAS_GPIOA
-  gpio_init(GPIOA, &gpio_default_config.PAData);
-#endif
-#if STM32_HAS_GPIOB
-  gpio_init(GPIOB, &gpio_default_config.PBData);
-#endif
-#if STM32_HAS_GPIOC
-  gpio_init(GPIOC, &gpio_default_config.PCData);
-#endif
-#if STM32_HAS_GPIOD
-  gpio_init(GPIOD, &gpio_default_config.PDData);
-#endif
-#if STM32_HAS_GPIOE
-  gpio_init(GPIOE, &gpio_default_config.PEData);
-#endif
-#if STM32_HAS_GPIOF
-  gpio_init(GPIOF, &gpio_default_config.PFData);
-#endif
-#if STM32_HAS_GPIOG
-  gpio_init(GPIOG, &gpio_default_config.PGData);
-#endif
-#if STM32_HAS_GPIOH
-  gpio_init(GPIOH, &gpio_default_config.PHData);
-#endif
-#if STM32_HAS_GPIOI
-  gpio_init(GPIOI, &gpio_default_config.PIData);
-#endif
-#if STM32_HAS_GPIOJ
-  gpio_init(GPIOJ, &gpio_default_config.PJData);
-#endif
-#if STM32_HAS_GPIOK
-  gpio_init(GPIOK, &gpio_default_config.PKData);
-#endif
-}
-
-/*===========================================================================*/
-/* Driver interrupt handlers.                                                */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver exported functions.                                                */
-/*===========================================================================*/
-
-/**
- * @brief   Early initialization code.
- * @details GPIO ports and system clocks are initialized before everything
- *          else.
- */
-void __early_init(void) {
-
-  stm32_gpio_init();
-  stm32_clock_init();
-}
-
-#if HAL_USE_SDC || defined(__DOXYGEN__)
-/**
- * @brief   SDC card detection.
- */
-bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
-
-  (void)sdcp;
-  /* TODO: Fill the implementation.*/
-  return true;
-}
-
-/**
- * @brief   SDC card write protection detection.
- */
-bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
-
-  (void)sdcp;
-  /* TODO: Fill the implementation.*/
-  return false;
-}
-#endif /* HAL_USE_SDC */
-
-#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
-/**
- * @brief   MMC_SPI card detection.
- */
-bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
-
-  (void)mmcp;
-  /* TODO: Fill the implementation.*/
-  return true;
-}
-
-/**
- * @brief   MMC_SPI card write protection detection.
- */
-bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
-
-  (void)mmcp;
-  /* TODO: Fill the implementation.*/
-  return false;
-}
-#endif
-
-/**
- * @brief   Board-specific initialization code.
- * @todo    Add your board-specific code, if any.
- */
-void boardInit(void) {
-
-}
diff --git a/modules/RT-STM32L476RG-NUCLEO64/board.h b/modules/RT-STM32L476RG-NUCLEO64/board.h
deleted file mode 100644
index 257f066..0000000
--- a/modules/RT-STM32L476RG-NUCLEO64/board.h
+++ /dev/null
@@ -1,1506 +0,0 @@
-/*
-    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
-
-    Licensed under the Apache License, Version 2.0 (the "License");
-    you may not use this file except in compliance with the License.
-    You may obtain a copy of the License at
-
-        http://www.apache.org/licenses/LICENSE-2.0
-
-    Unless required by applicable law or agreed to in writing, software
-    distributed under the License is distributed on an "AS IS" BASIS,
-    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-    See the License for the specific language governing permissions and
-    limitations under the License.
-*/
-
-/*
- * This file has been automatically generated using ChibiStudio board
- * generator plugin. Do not edit manually.
- */
-
-#ifndef BOARD_H
-#define BOARD_H
-
-/*===========================================================================*/
-/* Driver constants.                                                         */
-/*===========================================================================*/
-
-/*
- * Setup for STMicroelectronics STM32 Nucleo64-L476RG board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_ST_NUCLEO64_L476RG
-#define BOARD_NAME                  "STMicroelectronics STM32 Nucleo64-L476RG"
-#define BOARD_VERSION           "1.0"
-
-/*
- * Board oscillators-related settings.
- */
-#if !defined(STM32_LSECLK)
-#define STM32_LSECLK                32768U
-#endif
-
-#define STM32_LSEDRV                (3U << 3U)
-
-#if !defined(STM32_HSECLK)
-#define STM32_HSECLK                8000000U
-#endif
-
-#define STM32_HSE_BYPASS
-
-/*
- * Board voltages.
- * Required for performance limits calculation.
- */
-#define STM32_VDD                   300U
-
-/*
- * MCU type as defined in the ST header.
- */
-#define STM32L476xx
-
-/*
- * IO pins assignments.
- */
-#define GPIOA_ARD_A0                0U
-#define GPIOA_ACD12_IN5             0U
-#define GPIOA_ARD_A1                1U
-#define GPIOA_ACD12_IN6             1U
-#define GPIOA_ARD_D1                2U
-#define GPIOA_USART2_TX             2U
-#define GPIOA_ARD_D0                3U
-#define GPIOA_USART2_RX             3U
-#define GPIOA_ARD_A2                4U
-#define GPIOA_ACD12_IN9             4U
-#define GPIOA_ARD_D13               5U
-#define GPIOA_LED_GREEN             5U
-#define GPIOA_ARD_D12               6U
-#define GPIOA_ARD_D11               7U
-#define GPIOA_ARD_D7                8U
-#define GPIOA_ARD_D8                9U
-#define GPIOA_ARD_D2                10U
-#define GPIOA_PIN11                 11U
-#define GPIOA_PIN12                 12U
-#define GPIOA_SWDIO                 13U
-#define GPIOA_SWCLK                 14U
-#define GPIOA_PIN15                 15U
-
-#define GPIOB_ARD_A3                0U
-#define GPIOB_ACD12_IN15            0U
-#define GPIOB_PIN1                  1U
-#define GPIOB_PIN2                  2U
-#define GPIOB_ARD_D3                3U
-#define GPIOB_SWO                   3U
-#define GPIOB_ARD_D5                4U
-#define GPIOB_ARD_D4                5U
-#define GPIOB_ARD_D10               6U
-#define GPIOB_PIN7                  7U
-#define GPIOB_ARD_D15               8U
-#define GPIOB_ARD_D14               9U
-#define GPIOB_ARD_D6                10U
-#define GPIOB_PIN11                 11U
-#define GPIOB_PIN12                 12U
-#define GPIOB_PIN13                 13U
-#define GPIOB_PIN14                 14U
-#define GPIOB_PIN15                 15U
-
-#define GPIOC_ARD_A5                0U
-#define GPIOC_ACD123_IN1            0U
-#define GPIOC_ARD_A4                1U
-#define GPIOC_ACD123_IN2            1U
-#define GPIOC_PIN2                  2U
-#define GPIOC_PIN3                  3U
-#define GPIOC_PIN4                  4U
-#define GPIOC_PIN5                  5U
-#define GPIOC_PIN6                  6U
-#define GPIOC_ARD_D9                7U
-#define GPIOC_PIN8                  8U
-#define GPIOC_PIN9                  9U
-#define GPIOC_PIN10                 10U
-#define GPIOC_PIN11                 11U
-#define GPIOC_PIN12                 12U
-#define GPIOC_BUTTON                13U
-#define GPIOC_OSC32_IN              14U
-#define GPIOC_OSC32_OUT             15U
-
-#define GPIOD_PIN0                  0U
-#define GPIOD_PIN1                  1U
-#define GPIOD_PIN2                  2U
-#define GPIOD_PIN3                  3U
-#define GPIOD_PIN4                  4U
-#define GPIOD_PIN5                  5U
-#define GPIOD_PIN6                  6U
-#define GPIOD_PIN7                  7U
-#define GPIOD_PIN8                  8U
-#define GPIOD_PIN9                  9U
-#define GPIOD_PIN10                 10U
-#define GPIOD_PIN11                 11U
-#define GPIOD_PIN12                 12U
-#define GPIOD_PIN13                 13U
-#define GPIOD_PIN14                 14U
-#define GPIOD_PIN15                 15U
-
-#define GPIOE_PIN0                  0U
-#define GPIOE_PIN1                  1U
-#define GPIOE_PIN2                  2U
-#define GPIOE_PIN3                  3U
-#define GPIOE_PIN4                  4U
-#define GPIOE_PIN5                  5U
-#define GPIOE_PIN6                  6U
-#define GPIOE_PIN7                  7U
-#define GPIOE_PIN8                  8U
-#define GPIOE_PIN9                  9U
-#define GPIOE_PIN10                 10U
-#define GPIOE_PIN11                 11U
-#define GPIOE_PIN12                 12U
-#define GPIOE_PIN13                 13U
-#define GPIOE_PIN14                 14U
-#define GPIOE_PIN15                 15U
-
-#define GPIOF_PIN0                  0U
-#define GPIOF_PIN1                  1U
-#define GPIOF_PIN2                  2U
-#define GPIOF_PIN3                  3U
-#define GPIOF_PIN4                  4U
-#define GPIOF_PIN5                  5U
-#define GPIOF_PIN6                  6U
-#define GPIOF_PIN7                  7U
-#define GPIOF_PIN8                  8U
-#define GPIOF_PIN9                  9U
-#define GPIOF_PIN10                 10U
-#define GPIOF_PIN11                 11U
-#define GPIOF_PIN12                 12U
-#define GPIOF_PIN13                 13U
-#define GPIOF_PIN14                 14U
-#define GPIOF_PIN15                 15U
-
-#define GPIOG_PIN0                  0U
-#define GPIOG_PIN1                  1U
-#define GPIOG_PIN2                  2U
-#define GPIOG_PIN3                  3U
-#define GPIOG_PIN4                  4U
-#define GPIOG_PIN5                  5U
-#define GPIOG_PIN6                  6U
-#define GPIOG_PIN7                  7U
-#define GPIOG_PIN8                  8U
-#define GPIOG_PIN9                  9U
-#define GPIOG_PIN10                 10U
-#define GPIOG_PIN11                 11U
-#define GPIOG_PIN12                 12U
-#define GPIOG_PIN13                 13U
-#define GPIOG_PIN14                 14U
-#define GPIOG_PIN15                 15U
-
-#define GPIOH_OSC_IN                0U
-#define GPIOH_OSC_OUT               1U
-#define GPIOH_PIN2                  2U
-#define GPIOH_PIN3                  3U
-#define GPIOH_PIN4                  4U
-#define GPIOH_PIN5                  5U
-#define GPIOH_PIN6                  6U
-#define GPIOH_PIN7                  7U
-#define GPIOH_PIN8                  8U
-#define GPIOH_PIN9                  9U
-#define GPIOH_PIN10                 10U
-#define GPIOH_PIN11                 11U
-#define GPIOH_PIN12                 12U
-#define GPIOH_PIN13                 13U
-#define GPIOH_PIN14                 14U
-#define GPIOH_PIN15                 15U
-
-/*
- * IO lines assignments.
- */
-#define LINE_ARD_A0                 PAL_LINE(GPIOA, 0U)
-#define LINE_ACD12_IN5              PAL_LINE(GPIOA, 0U)
-#define LINE_ARD_A1                 PAL_LINE(GPIOA, 1U)
-#define LINE_ACD12_IN6              PAL_LINE(GPIOA, 1U)
-#define LINE_ARD_D1                 PAL_LINE(GPIOA, 2U)
-#define LINE_USART2_TX              PAL_LINE(GPIOA, 2U)
-#define LINE_ARD_D0                 PAL_LINE(GPIOA, 3U)
-#define LINE_USART2_RX              PAL_LINE(GPIOA, 3U)
-#define LINE_ARD_A2                 PAL_LINE(GPIOA, 4U)
-#define LINE_ACD12_IN9              PAL_LINE(GPIOA, 4U)
-#define LINE_ARD_D13                PAL_LINE(GPIOA, 5U)
-#define LINE_LED_GREEN              PAL_LINE(GPIOA, 5U)
-#define LINE_ARD_D12                PAL_LINE(GPIOA, 6U)
-#define LINE_ARD_D11                PAL_LINE(GPIOA, 7U)
-#define LINE_ARD_D7                 PAL_LINE(GPIOA, 8U)
-#define LINE_ARD_D8                 PAL_LINE(GPIOA, 9U)
-#define LINE_ARD_D2                 PAL_LINE(GPIOA, 10U)
-#define LINE_SWDIO                  PAL_LINE(GPIOA, 13U)
-#define LINE_SWCLK                  PAL_LINE(GPIOA, 14U)
-#define LINE_ARD_A3                 PAL_LINE(GPIOB, 0U)
-#define LINE_ACD12_IN15             PAL_LINE(GPIOB, 0U)
-#define LINE_ARD_D3                 PAL_LINE(GPIOB, 3U)
-#define LINE_SWO                    PAL_LINE(GPIOB, 3U)
-#define LINE_ARD_D5                 PAL_LINE(GPIOB, 4U)
-#define LINE_ARD_D4                 PAL_LINE(GPIOB, 5U)
-#define LINE_ARD_D10                PAL_LINE(GPIOB, 6U)
-#define LINE_ARD_D15                PAL_LINE(GPIOB, 8U)
-#define LINE_ARD_D14                PAL_LINE(GPIOB, 9U)
-#define LINE_ARD_D6                 PAL_LINE(GPIOB, 10U)
-#define LINE_ARD_A5                 PAL_LINE(GPIOC, 0U)
-#define LINE_ACD123_IN1             PAL_LINE(GPIOC, 0U)
-#define LINE_ARD_A4                 PAL_LINE(GPIOC, 1U)
-#define LINE_ACD123_IN2             PAL_LINE(GPIOC, 1U)
-#define LINE_ARD_D9                 PAL_LINE(GPIOC, 7U)
-#define LINE_BUTTON                 PAL_LINE(GPIOC, 13U)
-#define LINE_OSC32_IN               PAL_LINE(GPIOC, 14U)
-#define LINE_OSC32_OUT              PAL_LINE(GPIOC, 15U)
-#define LINE_OSC_IN                 PAL_LINE(GPIOH, 0U)
-#define LINE_OSC_OUT                PAL_LINE(GPIOH, 1U)
-
-/*===========================================================================*/
-/* Driver pre-compile time settings.                                         */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Derived constants and error checks.                                       */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver data structures and types.                                         */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver macros.                                                            */
-/*===========================================================================*/
-
-/*
- * I/O ports initial setup, this configuration is established soon after reset
- * in the initialization code.
- * Please refer to the STM32 Reference Manual for details.
- */
-#define PIN_MODE_INPUT(n)           (0U << ((n) * 2U))
-#define PIN_MODE_OUTPUT(n)          (1U << ((n) * 2U))
-#define PIN_MODE_ALTERNATE(n)       (2U << ((n) * 2U))
-#define PIN_MODE_ANALOG(n)          (3U << ((n) * 2U))
-#define PIN_ODR_LOW(n)              (0U << (n))
-#define PIN_ODR_HIGH(n)             (1U << (n))
-#define PIN_OTYPE_PUSHPULL(n)       (0U << (n))
-#define PIN_OTYPE_OPENDRAIN(n)      (1U << (n))
-#define PIN_OSPEED_VERYLOW(n)       (0U << ((n) * 2U))
-#define PIN_OSPEED_LOW(n)           (1U << ((n) * 2U))
-#define PIN_OSPEED_MEDIUM(n)        (2U << ((n) * 2U))
-#define PIN_OSPEED_HIGH(n)          (3U << ((n) * 2U))
-#define PIN_PUPDR_FLOATING(n)       (0U << ((n) * 2U))
-#define PIN_PUPDR_PULLUP(n)         (1U << ((n) * 2U))
-#define PIN_PUPDR_PULLDOWN(n)       (2U << ((n) * 2U))
-#define PIN_AFIO_AF(n, v)           ((v) << (((n) % 8U) * 4U))
-#define PIN_ASCR_DISABLED(n)        (0U << (n))
-#define PIN_ASCR_ENABLED(n)         (1U << (n))
-#define PIN_LOCKR_DISABLED(n)       (0U << (n))
-#define PIN_LOCKR_ENABLED(n)        (1U << (n))
-
-/*
- * GPIOA setup:
- *
- * PA0  - ARD_A0 ACD12_IN5          (analog).
- * PA1  - ARD_A1 ACD12_IN6          (analog).
- * PA2  - ARD_D1 USART2_TX          (alternate 7).
- * PA3  - ARD_D0 USART2_RX          (alternate 7).
- * PA4  - ARD_A2 ACD12_IN9          (analog).
- * PA5  - ARD_D13 LED_GREEN         (output pushpull maximum).
- * PA6  - ARD_D12                   (analog).
- * PA7  - ARD_D11                   (analog).
- * PA8  - ARD_D7                    (analog).
- * PA9  - ARD_D8                    (analog).
- * PA10 - ARD_D2                    (analog).
- * PA11 - PIN11                     (analog).
- * PA12 - PIN12                     (analog).
- * PA13 - SWDIO                     (alternate 0).
- * PA14 - SWCLK                     (alternate 0).
- * PA15 - PIN15                     (analog).
- */
-#define VAL_GPIOA_MODER             (PIN_MODE_ANALOG(GPIOA_ARD_A0) |        \
-                                     PIN_MODE_ANALOG(GPIOA_ARD_A1) |        \
-                                     PIN_MODE_ALTERNATE(GPIOA_ARD_D1) |     \
-                                     PIN_MODE_ALTERNATE(GPIOA_ARD_D0) |     \
-                                     PIN_MODE_ANALOG(GPIOA_ARD_A2) |        \
-                                     PIN_MODE_OUTPUT(GPIOA_ARD_D13) |       \
-                                     PIN_MODE_ANALOG(GPIOA_ARD_D12) |       \
-                                     PIN_MODE_ANALOG(GPIOA_ARD_D11) |       \
-                                     PIN_MODE_ANALOG(GPIOA_ARD_D7) |        \
-                                     PIN_MODE_ANALOG(GPIOA_ARD_D8) |        \
-                                     PIN_MODE_ANALOG(GPIOA_ARD_D2) |        \
-                                     PIN_MODE_ANALOG(GPIOA_PIN11) |         \
-                                     PIN_MODE_ANALOG(GPIOA_PIN12) |         \
-                                     PIN_MODE_ALTERNATE(GPIOA_SWDIO) |      \
-                                     PIN_MODE_ALTERNATE(GPIOA_SWCLK) |      \
-                                     PIN_MODE_ANALOG(GPIOA_PIN15))
-#define VAL_GPIOA_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOA_ARD_A0) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_ARD_A1) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_ARD_D1) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_ARD_D0) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_ARD_A2) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_ARD_D13) |    \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_ARD_D12) |    \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_ARD_D11) |    \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_ARD_D7) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_ARD_D8) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_ARD_D2) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
-#define VAL_GPIOA_OSPEEDR           (PIN_OSPEED_HIGH(GPIOA_ARD_A0) |        \
-                                     PIN_OSPEED_HIGH(GPIOA_ARD_A1) |        \
-                                     PIN_OSPEED_MEDIUM(GPIOA_ARD_D1) |      \
-                                     PIN_OSPEED_MEDIUM(GPIOA_ARD_D0) |      \
-                                     PIN_OSPEED_HIGH(GPIOA_ARD_A2) |        \
-                                     PIN_OSPEED_HIGH(GPIOA_ARD_D13) |       \
-                                     PIN_OSPEED_HIGH(GPIOA_ARD_D12) |       \
-                                     PIN_OSPEED_HIGH(GPIOA_ARD_D11) |       \
-                                     PIN_OSPEED_HIGH(GPIOA_ARD_D7) |        \
-                                     PIN_OSPEED_HIGH(GPIOA_ARD_D8) |        \
-                                     PIN_OSPEED_HIGH(GPIOA_ARD_D2) |        \
-                                     PIN_OSPEED_HIGH(GPIOA_PIN11) |         \
-                                     PIN_OSPEED_HIGH(GPIOA_PIN12) |         \
-                                     PIN_OSPEED_HIGH(GPIOA_SWDIO) |         \
-                                     PIN_OSPEED_HIGH(GPIOA_SWCLK) |         \
-                                     PIN_OSPEED_HIGH(GPIOA_PIN15))
-#define VAL_GPIOA_PUPDR             (PIN_PUPDR_FLOATING(GPIOA_ARD_A0) |     \
-                                     PIN_PUPDR_FLOATING(GPIOA_ARD_A1) |     \
-                                     PIN_PUPDR_FLOATING(GPIOA_ARD_D1) |     \
-                                     PIN_PUPDR_FLOATING(GPIOA_ARD_D0) |     \
-                                     PIN_PUPDR_FLOATING(GPIOA_ARD_A2) |     \
-                                     PIN_PUPDR_FLOATING(GPIOA_ARD_D13) |    \
-                                     PIN_PUPDR_FLOATING(GPIOA_ARD_D12) |    \
-                                     PIN_PUPDR_FLOATING(GPIOA_ARD_D11) |    \
-                                     PIN_PUPDR_FLOATING(GPIOA_ARD_D7) |     \
-                                     PIN_PUPDR_FLOATING(GPIOA_ARD_D8) |     \
-                                     PIN_PUPDR_FLOATING(GPIOA_ARD_D2) |     \
-                                     PIN_PUPDR_FLOATING(GPIOA_PIN11) |      \
-                                     PIN_PUPDR_FLOATING(GPIOA_PIN12) |      \
-                                     PIN_PUPDR_PULLUP(GPIOA_SWDIO) |        \
-                                     PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) |      \
-                                     PIN_PUPDR_FLOATING(GPIOA_PIN15))
-#define VAL_GPIOA_ODR               (PIN_ODR_HIGH(GPIOA_ARD_A0) |           \
-                                     PIN_ODR_HIGH(GPIOA_ARD_A1) |           \
-                                     PIN_ODR_HIGH(GPIOA_ARD_D1) |           \
-                                     PIN_ODR_HIGH(GPIOA_ARD_D0) |           \
-                                     PIN_ODR_HIGH(GPIOA_ARD_A2) |           \
-                                     PIN_ODR_LOW(GPIOA_ARD_D13) |           \
-                                     PIN_ODR_HIGH(GPIOA_ARD_D12) |          \
-                                     PIN_ODR_HIGH(GPIOA_ARD_D11) |          \
-                                     PIN_ODR_HIGH(GPIOA_ARD_D7) |           \
-                                     PIN_ODR_HIGH(GPIOA_ARD_D8) |           \
-                                     PIN_ODR_HIGH(GPIOA_ARD_D2) |           \
-                                     PIN_ODR_HIGH(GPIOA_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOA_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOA_SWDIO) |            \
-                                     PIN_ODR_HIGH(GPIOA_SWCLK) |            \
-                                     PIN_ODR_HIGH(GPIOA_PIN15))
-#define VAL_GPIOA_AFRL              (PIN_AFIO_AF(GPIOA_ARD_A0, 0U) |        \
-                                     PIN_AFIO_AF(GPIOA_ARD_A1, 0U) |        \
-                                     PIN_AFIO_AF(GPIOA_ARD_D1, 7U) |        \
-                                     PIN_AFIO_AF(GPIOA_ARD_D0, 7U) |        \
-                                     PIN_AFIO_AF(GPIOA_ARD_A2, 0U) |        \
-                                     PIN_AFIO_AF(GPIOA_ARD_D13, 0U) |       \
-                                     PIN_AFIO_AF(GPIOA_ARD_D12, 0U) |       \
-                                     PIN_AFIO_AF(GPIOA_ARD_D11, 0U))
-#define VAL_GPIOA_AFRH              (PIN_AFIO_AF(GPIOA_ARD_D7, 0U) |        \
-                                     PIN_AFIO_AF(GPIOA_ARD_D8, 0U) |        \
-                                     PIN_AFIO_AF(GPIOA_ARD_D2, 0U) |        \
-                                     PIN_AFIO_AF(GPIOA_PIN11, 0U) |         \
-                                     PIN_AFIO_AF(GPIOA_PIN12, 0U) |         \
-                                     PIN_AFIO_AF(GPIOA_SWDIO, 0U) |         \
-                                     PIN_AFIO_AF(GPIOA_SWCLK, 0U) |         \
-                                     PIN_AFIO_AF(GPIOA_PIN15, 0U))
-#define VAL_GPIOA_ASCR              (PIN_ASCR_DISABLED(GPIOA_ARD_A0) |      \
-                                     PIN_ASCR_DISABLED(GPIOA_ARD_A1) |      \
-                                     PIN_ASCR_DISABLED(GPIOA_ARD_D1) |      \
-                                     PIN_ASCR_DISABLED(GPIOA_ARD_D0) |      \
-                                     PIN_ASCR_DISABLED(GPIOA_ARD_A2) |      \
-                                     PIN_ASCR_DISABLED(GPIOA_ARD_D13) |     \
-                                     PIN_ASCR_DISABLED(GPIOA_ARD_D12) |     \
-                                     PIN_ASCR_DISABLED(GPIOA_ARD_D11) |     \
-                                     PIN_ASCR_DISABLED(GPIOA_ARD_D7) |      \
-                                     PIN_ASCR_DISABLED(GPIOA_ARD_D8) |      \
-                                     PIN_ASCR_DISABLED(GPIOA_ARD_D2) |      \
-                                     PIN_ASCR_DISABLED(GPIOA_PIN11) |       \
-                                     PIN_ASCR_DISABLED(GPIOA_PIN12) |       \
-                                     PIN_ASCR_DISABLED(GPIOA_SWDIO) |       \
-                                     PIN_ASCR_DISABLED(GPIOA_SWCLK) |       \
-                                     PIN_ASCR_DISABLED(GPIOA_PIN15))
-#define VAL_GPIOA_LOCKR             (PIN_LOCKR_DISABLED(GPIOA_ARD_A0) |     \
-                                     PIN_LOCKR_DISABLED(GPIOA_ARD_A1) |     \
-                                     PIN_LOCKR_DISABLED(GPIOA_ARD_D1) |     \
-                                     PIN_LOCKR_DISABLED(GPIOA_ARD_D0) |     \
-                                     PIN_LOCKR_DISABLED(GPIOA_ARD_A2) |     \
-                                     PIN_LOCKR_DISABLED(GPIOA_ARD_D13) |    \
-                                     PIN_LOCKR_DISABLED(GPIOA_ARD_D12) |    \
-                                     PIN_LOCKR_DISABLED(GPIOA_ARD_D11) |    \
-                                     PIN_LOCKR_DISABLED(GPIOA_ARD_D7) |     \
-                                     PIN_LOCKR_DISABLED(GPIOA_ARD_D8) |     \
-                                     PIN_LOCKR_DISABLED(GPIOA_ARD_D2) |     \
-                                     PIN_LOCKR_DISABLED(GPIOA_PIN11) |      \
-                                     PIN_LOCKR_DISABLED(GPIOA_PIN12) |      \
-                                     PIN_LOCKR_DISABLED(GPIOA_SWDIO) |      \
-                                     PIN_LOCKR_DISABLED(GPIOA_SWCLK) |      \
-                                     PIN_LOCKR_DISABLED(GPIOA_PIN15))
-
-/*
- * GPIOB setup:
- *
- * PB0  - ARD_A3 ACD12_IN15         (analog).
- * PB1  - PIN1                      (analog).
- * PB2  - PIN2                      (analog).
- * PB3  - ARD_D3 SWO                (analog).
- * PB4  - ARD_D5                    (analog).
- * PB5  - ARD_D4                    (analog).
- * PB6  - ARD_D10                   (analog).
- * PB7  - PIN7                      (analog).
- * PB8  - ARD_D15                   (analog).
- * PB9  - ARD_D14                   (analog).
- * PB10 - ARD_D6                    (analog).
- * PB11 - PIN11                     (analog).
- * PB12 - PIN12                     (analog).
- * PB13 - PIN13                     (analog).
- * PB14 - PIN14                     (analog).
- * PB15 - PIN15                     (analog).
- */
-#define VAL_GPIOB_MODER             (PIN_MODE_ANALOG(GPIOB_ARD_A3) |        \
-                                     PIN_MODE_ANALOG(GPIOB_PIN1) |          \
-                                     PIN_MODE_ANALOG(GPIOB_PIN2) |          \
-                                     PIN_MODE_ANALOG(GPIOB_ARD_D3) |        \
-                                     PIN_MODE_ANALOG(GPIOB_ARD_D5) |        \
-                                     PIN_MODE_ANALOG(GPIOB_ARD_D4) |        \
-                                     PIN_MODE_ANALOG(GPIOB_ARD_D10) |       \
-                                     PIN_MODE_ANALOG(GPIOB_PIN7) |          \
-                                     PIN_MODE_ANALOG(GPIOB_ARD_D15) |       \
-                                     PIN_MODE_ANALOG(GPIOB_ARD_D14) |       \
-                                     PIN_MODE_ANALOG(GPIOB_ARD_D6) |        \
-                                     PIN_MODE_ANALOG(GPIOB_PIN11) |         \
-                                     PIN_MODE_ANALOG(GPIOB_PIN12) |         \
-                                     PIN_MODE_ANALOG(GPIOB_PIN13) |         \
-                                     PIN_MODE_ANALOG(GPIOB_PIN14) |         \
-                                     PIN_MODE_ANALOG(GPIOB_PIN15))
-#define VAL_GPIOB_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOB_ARD_A3) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_ARD_D3) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_ARD_D5) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_ARD_D4) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_ARD_D10) |    \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_ARD_D15) |    \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_ARD_D14) |    \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_ARD_D6) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
-#define VAL_GPIOB_OSPEEDR           (PIN_OSPEED_HIGH(GPIOB_ARD_A3) |        \
-                                     PIN_OSPEED_HIGH(GPIOB_PIN1) |          \
-                                     PIN_OSPEED_HIGH(GPIOB_PIN2) |          \
-                                     PIN_OSPEED_HIGH(GPIOB_ARD_D3) |        \
-                                     PIN_OSPEED_HIGH(GPIOB_ARD_D5) |        \
-                                     PIN_OSPEED_HIGH(GPIOB_ARD_D4) |        \
-                                     PIN_OSPEED_HIGH(GPIOB_ARD_D10) |       \
-                                     PIN_OSPEED_HIGH(GPIOB_PIN7) |          \
-                                     PIN_OSPEED_HIGH(GPIOB_ARD_D15) |       \
-                                     PIN_OSPEED_HIGH(GPIOB_ARD_D14) |       \
-                                     PIN_OSPEED_HIGH(GPIOB_ARD_D6) |        \
-                                     PIN_OSPEED_HIGH(GPIOB_PIN11) |         \
-                                     PIN_OSPEED_HIGH(GPIOB_PIN12) |         \
-                                     PIN_OSPEED_HIGH(GPIOB_PIN13) |         \
-                                     PIN_OSPEED_HIGH(GPIOB_PIN14) |         \
-                                     PIN_OSPEED_HIGH(GPIOB_PIN15))
-#define VAL_GPIOB_PUPDR             (PIN_PUPDR_FLOATING(GPIOB_ARD_A3) |     \
-                                     PIN_PUPDR_FLOATING(GPIOB_PIN1) |       \
-                                     PIN_PUPDR_FLOATING(GPIOB_PIN2) |       \
-                                     PIN_PUPDR_FLOATING(GPIOB_ARD_D3) |     \
-                                     PIN_PUPDR_FLOATING(GPIOB_ARD_D5) |     \
-                                     PIN_PUPDR_FLOATING(GPIOB_ARD_D4) |     \
-                                     PIN_PUPDR_FLOATING(GPIOB_ARD_D10) |    \
-                                     PIN_PUPDR_FLOATING(GPIOB_PIN7) |       \
-                                     PIN_PUPDR_FLOATING(GPIOB_ARD_D15) |    \
-                                     PIN_PUPDR_FLOATING(GPIOB_ARD_D14) |    \
-                                     PIN_PUPDR_FLOATING(GPIOB_ARD_D6) |     \
-                                     PIN_PUPDR_FLOATING(GPIOB_PIN11) |      \
-                                     PIN_PUPDR_FLOATING(GPIOB_PIN12) |      \
-                                     PIN_PUPDR_FLOATING(GPIOB_PIN13) |      \
-                                     PIN_PUPDR_FLOATING(GPIOB_PIN14) |      \
-                                     PIN_PUPDR_FLOATING(GPIOB_PIN15))
-#define VAL_GPIOB_ODR               (PIN_ODR_HIGH(GPIOB_ARD_A3) |           \
-                                     PIN_ODR_HIGH(GPIOB_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOB_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOB_ARD_D3) |           \
-                                     PIN_ODR_HIGH(GPIOB_ARD_D5) |           \
-                                     PIN_ODR_HIGH(GPIOB_ARD_D4) |           \
-                                     PIN_ODR_HIGH(GPIOB_ARD_D10) |          \
-                                     PIN_ODR_HIGH(GPIOB_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOB_ARD_D15) |          \
-                                     PIN_ODR_HIGH(GPIOB_ARD_D14) |          \
-                                     PIN_ODR_HIGH(GPIOB_ARD_D6) |           \
-                                     PIN_ODR_HIGH(GPIOB_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOB_PIN15))
-#define VAL_GPIOB_AFRL              (PIN_AFIO_AF(GPIOB_ARD_A3, 0U) |        \
-                                     PIN_AFIO_AF(GPIOB_PIN1, 0U) |          \
-                                     PIN_AFIO_AF(GPIOB_PIN2, 0U) |          \
-                                     PIN_AFIO_AF(GPIOB_ARD_D3, 0U) |        \
-                                     PIN_AFIO_AF(GPIOB_ARD_D5, 0U) |        \
-                                     PIN_AFIO_AF(GPIOB_ARD_D4, 0U) |        \
-                                     PIN_AFIO_AF(GPIOB_ARD_D10, 0U) |       \
-                                     PIN_AFIO_AF(GPIOB_PIN7, 0U))
-#define VAL_GPIOB_AFRH              (PIN_AFIO_AF(GPIOB_ARD_D15, 0U) |       \
-                                     PIN_AFIO_AF(GPIOB_ARD_D14, 0U) |       \
-                                     PIN_AFIO_AF(GPIOB_ARD_D6, 0U) |        \
-                                     PIN_AFIO_AF(GPIOB_PIN11, 0U) |         \
-                                     PIN_AFIO_AF(GPIOB_PIN12, 0U) |         \
-                                     PIN_AFIO_AF(GPIOB_PIN13, 0U) |         \
-                                     PIN_AFIO_AF(GPIOB_PIN14, 0U) |         \
-                                     PIN_AFIO_AF(GPIOB_PIN15, 0U))
-#define VAL_GPIOB_ASCR              (PIN_ASCR_DISABLED(GPIOB_ARD_A3) |      \
-                                     PIN_ASCR_DISABLED(GPIOB_PIN1) |        \
-                                     PIN_ASCR_DISABLED(GPIOB_PIN2) |        \
-                                     PIN_ASCR_DISABLED(GPIOB_ARD_D3) |      \
-                                     PIN_ASCR_DISABLED(GPIOB_ARD_D5) |      \
-                                     PIN_ASCR_DISABLED(GPIOB_ARD_D4) |      \
-                                     PIN_ASCR_DISABLED(GPIOB_ARD_D10) |     \
-                                     PIN_ASCR_DISABLED(GPIOB_PIN7) |        \
-                                     PIN_ASCR_DISABLED(GPIOB_ARD_D15) |     \
-                                     PIN_ASCR_DISABLED(GPIOB_ARD_D14) |     \
-                                     PIN_ASCR_DISABLED(GPIOB_ARD_D6) |      \
-                                     PIN_ASCR_DISABLED(GPIOB_PIN11) |       \
-                                     PIN_ASCR_DISABLED(GPIOB_PIN12) |       \
-                                     PIN_ASCR_DISABLED(GPIOB_PIN13) |       \
-                                     PIN_ASCR_DISABLED(GPIOB_PIN14) |       \
-                                     PIN_ASCR_DISABLED(GPIOB_PIN15))
-#define VAL_GPIOB_LOCKR             (PIN_LOCKR_DISABLED(GPIOB_ARD_A3) |     \
-                                     PIN_LOCKR_DISABLED(GPIOB_PIN1) |       \
-                                     PIN_LOCKR_DISABLED(GPIOB_PIN2) |       \
-                                     PIN_LOCKR_DISABLED(GPIOB_ARD_D3) |     \
-                                     PIN_LOCKR_DISABLED(GPIOB_ARD_D5) |     \
-                                     PIN_LOCKR_DISABLED(GPIOB_ARD_D4) |     \
-                                     PIN_LOCKR_DISABLED(GPIOB_ARD_D10) |    \
-                                     PIN_LOCKR_DISABLED(GPIOB_PIN7) |       \
-                                     PIN_LOCKR_DISABLED(GPIOB_ARD_D15) |    \
-                                     PIN_LOCKR_DISABLED(GPIOB_ARD_D14) |    \
-                                     PIN_LOCKR_DISABLED(GPIOB_ARD_D6) |     \
-                                     PIN_LOCKR_DISABLED(GPIOB_PIN11) |      \
-                                     PIN_LOCKR_DISABLED(GPIOB_PIN12) |      \
-                                     PIN_LOCKR_DISABLED(GPIOB_PIN13) |      \
-                                     PIN_LOCKR_DISABLED(GPIOB_PIN14) |      \
-                                     PIN_LOCKR_DISABLED(GPIOB_PIN15))
-
-/*
- * GPIOC setup:
- *
- * PC0  - ARD_A5 ACD123_IN1         (analog).
- * PC1  - ARD_A4 ACD123_IN2         (analog).
- * PC2  - PIN2                      (analog).
- * PC3  - PIN3                      (analog).
- * PC4  - PIN4                      (analog).
- * PC5  - PIN5                      (analog).
- * PC6  - PIN6                      (analog).
- * PC7  - ARD_D9                    (analog).
- * PC8  - PIN8                      (analog).
- * PC9  - PIN9                      (analog).
- * PC10 - PIN10                     (analog).
- * PC11 - PIN11                     (analog).
- * PC12 - PIN12                     (analog).
- * PC13 - BUTTON                    (input floating).
- * PC14 - OSC32_IN                  (input floating).
- * PC15 - OSC32_OUT                 (input floating).
- */
-#define VAL_GPIOC_MODER             (PIN_MODE_ANALOG(GPIOC_ARD_A5) |        \
-                                     PIN_MODE_ANALOG(GPIOC_ARD_A4) |        \
-                                     PIN_MODE_ANALOG(GPIOC_PIN2) |          \
-                                     PIN_MODE_ANALOG(GPIOC_PIN3) |          \
-                                     PIN_MODE_ANALOG(GPIOC_PIN4) |          \
-                                     PIN_MODE_ANALOG(GPIOC_PIN5) |          \
-                                     PIN_MODE_ANALOG(GPIOC_PIN6) |          \
-                                     PIN_MODE_ANALOG(GPIOC_ARD_D9) |        \
-                                     PIN_MODE_ANALOG(GPIOC_PIN8) |          \
-                                     PIN_MODE_ANALOG(GPIOC_PIN9) |          \
-                                     PIN_MODE_ANALOG(GPIOC_PIN10) |         \
-                                     PIN_MODE_ANALOG(GPIOC_PIN11) |         \
-                                     PIN_MODE_ANALOG(GPIOC_PIN12) |         \
-                                     PIN_MODE_INPUT(GPIOC_BUTTON) |         \
-                                     PIN_MODE_INPUT(GPIOC_OSC32_IN) |       \
-                                     PIN_MODE_INPUT(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOC_ARD_A5) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_ARD_A4) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_ARD_D9) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_BUTTON) |     \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) |   \
-                                     PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_OSPEEDR           (PIN_OSPEED_HIGH(GPIOC_ARD_A5) |        \
-                                     PIN_OSPEED_HIGH(GPIOC_ARD_A4) |        \
-                                     PIN_OSPEED_HIGH(GPIOC_PIN2) |          \
-                                     PIN_OSPEED_HIGH(GPIOC_PIN3) |          \
-                                     PIN_OSPEED_HIGH(GPIOC_PIN4) |          \
-                                     PIN_OSPEED_HIGH(GPIOC_PIN5) |          \
-                                     PIN_OSPEED_HIGH(GPIOC_PIN6) |          \
-                                     PIN_OSPEED_HIGH(GPIOC_ARD_D9) |        \
-                                     PIN_OSPEED_HIGH(GPIOC_PIN8) |          \
-                                     PIN_OSPEED_HIGH(GPIOC_PIN9) |          \
-                                     PIN_OSPEED_HIGH(GPIOC_PIN10) |         \
-                                     PIN_OSPEED_HIGH(GPIOC_PIN11) |         \
-                                     PIN_OSPEED_HIGH(GPIOC_PIN12) |         \
-                                     PIN_OSPEED_HIGH(GPIOC_BUTTON) |        \
-                                     PIN_OSPEED_HIGH(GPIOC_OSC32_IN) |      \
-                                     PIN_OSPEED_HIGH(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_PUPDR             (PIN_PUPDR_FLOATING(GPIOC_ARD_A5) |     \
-                                     PIN_PUPDR_FLOATING(GPIOC_ARD_A4) |     \
-                                     PIN_PUPDR_FLOATING(GPIOC_PIN2) |       \
-                                     PIN_PUPDR_FLOATING(GPIOC_PIN3) |       \
-                                     PIN_PUPDR_FLOATING(GPIOC_PIN4) |       \
-                                     PIN_PUPDR_FLOATING(GPIOC_PIN5) |       \
-                                     PIN_PUPDR_FLOATING(GPIOC_PIN6) |       \
-                                     PIN_PUPDR_FLOATING(GPIOC_ARD_D9) |     \
-                                     PIN_PUPDR_FLOATING(GPIOC_PIN8) |       \
-                                     PIN_PUPDR_FLOATING(GPIOC_PIN9) |       \
-                                     PIN_PUPDR_FLOATING(GPIOC_PIN10) |      \
-                                     PIN_PUPDR_FLOATING(GPIOC_PIN11) |      \
-                                     PIN_PUPDR_FLOATING(GPIOC_PIN12) |      \
-                                     PIN_PUPDR_FLOATING(GPIOC_BUTTON) |     \
-                                     PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) |   \
-                                     PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_ODR               (PIN_ODR_HIGH(GPIOC_ARD_A5) |           \
-                                     PIN_ODR_HIGH(GPIOC_ARD_A4) |           \
-                                     PIN_ODR_HIGH(GPIOC_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOC_ARD_D9) |           \
-                                     PIN_ODR_HIGH(GPIOC_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOC_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOC_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOC_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOC_BUTTON) |           \
-                                     PIN_ODR_HIGH(GPIOC_OSC32_IN) |         \
-                                     PIN_ODR_HIGH(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_AFRL              (PIN_AFIO_AF(GPIOC_ARD_A5, 0U) |        \
-                                     PIN_AFIO_AF(GPIOC_ARD_A4, 0U) |        \
-                                     PIN_AFIO_AF(GPIOC_PIN2, 0U) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN3, 0U) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN4, 0U) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN5, 0U) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN6, 0U) |          \
-                                     PIN_AFIO_AF(GPIOC_ARD_D9, 0U))
-#define VAL_GPIOC_AFRH              (PIN_AFIO_AF(GPIOC_PIN8, 0U) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN9, 0U) |          \
-                                     PIN_AFIO_AF(GPIOC_PIN10, 0U) |         \
-                                     PIN_AFIO_AF(GPIOC_PIN11, 0U) |         \
-                                     PIN_AFIO_AF(GPIOC_PIN12, 0U) |         \
-                                     PIN_AFIO_AF(GPIOC_BUTTON, 0U) |        \
-                                     PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) |      \
-                                     PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U))
-#define VAL_GPIOC_ASCR              (PIN_ASCR_DISABLED(GPIOC_ARD_A5) |      \
-                                     PIN_ASCR_DISABLED(GPIOC_ARD_A4) |      \
-                                     PIN_ASCR_DISABLED(GPIOC_PIN2) |        \
-                                     PIN_ASCR_DISABLED(GPIOC_PIN3) |        \
-                                     PIN_ASCR_DISABLED(GPIOC_PIN4) |        \
-                                     PIN_ASCR_DISABLED(GPIOC_PIN5) |        \
-                                     PIN_ASCR_DISABLED(GPIOC_PIN6) |        \
-                                     PIN_ASCR_DISABLED(GPIOC_ARD_D9) |      \
-                                     PIN_ASCR_DISABLED(GPIOC_PIN8) |        \
-                                     PIN_ASCR_DISABLED(GPIOC_PIN9) |        \
-                                     PIN_ASCR_DISABLED(GPIOC_PIN10) |       \
-                                     PIN_ASCR_DISABLED(GPIOC_PIN11) |       \
-                                     PIN_ASCR_DISABLED(GPIOC_PIN12) |       \
-                                     PIN_ASCR_DISABLED(GPIOC_BUTTON) |      \
-                                     PIN_ASCR_DISABLED(GPIOC_OSC32_IN) |    \
-                                     PIN_ASCR_DISABLED(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_LOCKR             (PIN_LOCKR_DISABLED(GPIOC_ARD_A5) |     \
-                                     PIN_LOCKR_DISABLED(GPIOC_ARD_A4) |     \
-                                     PIN_LOCKR_DISABLED(GPIOC_PIN2) |       \
-                                     PIN_LOCKR_DISABLED(GPIOC_PIN3) |       \
-                                     PIN_LOCKR_DISABLED(GPIOC_PIN4) |       \
-                                     PIN_LOCKR_DISABLED(GPIOC_PIN5) |       \
-                                     PIN_LOCKR_DISABLED(GPIOC_PIN6) |       \
-                                     PIN_LOCKR_DISABLED(GPIOC_ARD_D9) |     \
-                                     PIN_LOCKR_DISABLED(GPIOC_PIN8) |       \
-                                     PIN_LOCKR_DISABLED(GPIOC_PIN9) |       \
-                                     PIN_LOCKR_DISABLED(GPIOC_PIN10) |      \
-                                     PIN_LOCKR_DISABLED(GPIOC_PIN11) |      \
-                                     PIN_LOCKR_DISABLED(GPIOC_PIN12) |      \
-                                     PIN_LOCKR_DISABLED(GPIOC_BUTTON) |     \
-                                     PIN_LOCKR_DISABLED(GPIOC_OSC32_IN) |   \
-                                     PIN_LOCKR_DISABLED(GPIOC_OSC32_OUT))
-
-/*
- * GPIOD setup:
- *
- * PD0  - PIN0                      (analog).
- * PD1  - PIN1                      (analog).
- * PD2  - PIN2                      (analog).
- * PD3  - PIN3                      (analog).
- * PD4  - PIN4                      (analog).
- * PD5  - PIN5                      (analog).
- * PD6  - PIN6                      (analog).
- * PD7  - PIN7                      (analog).
- * PD8  - PIN8                      (analog).
- * PD9  - PIN9                      (analog).
- * PD10 - PIN10                     (analog).
- * PD11 - PIN11                     (analog).
- * PD12 - PIN12                     (analog).
- * PD13 - PIN13                     (analog).
- * PD14 - PIN14                     (analog).
- * PD15 - PIN15                     (analog).
- */
-#define VAL_GPIOD_MODER             (PIN_MODE_ANALOG(GPIOD_PIN0) |          \
-                                     PIN_MODE_ANALOG(GPIOD_PIN1) |          \
-                                     PIN_MODE_ANALOG(GPIOD_PIN2) |          \
-                                     PIN_MODE_ANALOG(GPIOD_PIN3) |          \
-                                     PIN_MODE_ANALOG(GPIOD_PIN4) |          \
-                                     PIN_MODE_ANALOG(GPIOD_PIN5) |          \
-                                     PIN_MODE_ANALOG(GPIOD_PIN6) |          \
-                                     PIN_MODE_ANALOG(GPIOD_PIN7) |          \
-                                     PIN_MODE_ANALOG(GPIOD_PIN8) |          \
-                                     PIN_MODE_ANALOG(GPIOD_PIN9) |          \
-                                     PIN_MODE_ANALOG(GPIOD_PIN10) |         \
-                                     PIN_MODE_ANALOG(GPIOD_PIN11) |         \
-                                     PIN_MODE_ANALOG(GPIOD_PIN12) |         \
-                                     PIN_MODE_ANALOG(GPIOD_PIN13) |         \
-                                     PIN_MODE_ANALOG(GPIOD_PIN14) |         \
-                                     PIN_MODE_ANALOG(GPIOD_PIN15))
-#define VAL_GPIOD_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
-#define VAL_GPIOD_OSPEEDR           (PIN_OSPEED_HIGH(GPIOD_PIN0) |          \
-                                     PIN_OSPEED_HIGH(GPIOD_PIN1) |          \
-                                     PIN_OSPEED_HIGH(GPIOD_PIN2) |          \
-                                     PIN_OSPEED_HIGH(GPIOD_PIN3) |          \
-                                     PIN_OSPEED_HIGH(GPIOD_PIN4) |          \
-                                     PIN_OSPEED_HIGH(GPIOD_PIN5) |          \
-                                     PIN_OSPEED_HIGH(GPIOD_PIN6) |          \
-                                     PIN_OSPEED_HIGH(GPIOD_PIN7) |          \
-                                     PIN_OSPEED_HIGH(GPIOD_PIN8) |          \
-                                     PIN_OSPEED_HIGH(GPIOD_PIN9) |          \
-                                     PIN_OSPEED_HIGH(GPIOD_PIN10) |         \
-                                     PIN_OSPEED_HIGH(GPIOD_PIN11) |         \
-                                     PIN_OSPEED_HIGH(GPIOD_PIN12) |         \
-                                     PIN_OSPEED_HIGH(GPIOD_PIN13) |         \
-                                     PIN_OSPEED_HIGH(GPIOD_PIN14) |         \
-                                     PIN_OSPEED_HIGH(GPIOD_PIN15))
-#define VAL_GPIOD_PUPDR             (PIN_PUPDR_FLOATING(GPIOD_PIN0) |       \
-                                     PIN_PUPDR_FLOATING(GPIOD_PIN1) |       \
-                                     PIN_PUPDR_FLOATING(GPIOD_PIN2) |       \
-                                     PIN_PUPDR_FLOATING(GPIOD_PIN3) |       \
-                                     PIN_PUPDR_FLOATING(GPIOD_PIN4) |       \
-                                     PIN_PUPDR_FLOATING(GPIOD_PIN5) |       \
-                                     PIN_PUPDR_FLOATING(GPIOD_PIN6) |       \
-                                     PIN_PUPDR_FLOATING(GPIOD_PIN7) |       \
-                                     PIN_PUPDR_FLOATING(GPIOD_PIN8) |       \
-                                     PIN_PUPDR_FLOATING(GPIOD_PIN9) |       \
-                                     PIN_PUPDR_FLOATING(GPIOD_PIN10) |      \
-                                     PIN_PUPDR_FLOATING(GPIOD_PIN11) |      \
-                                     PIN_PUPDR_FLOATING(GPIOD_PIN12) |      \
-                                     PIN_PUPDR_FLOATING(GPIOD_PIN13) |      \
-                                     PIN_PUPDR_FLOATING(GPIOD_PIN14) |      \
-                                     PIN_PUPDR_FLOATING(GPIOD_PIN15))
-#define VAL_GPIOD_ODR               (PIN_ODR_HIGH(GPIOD_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOD_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOD_PIN15))
-#define VAL_GPIOD_AFRL              (PIN_AFIO_AF(GPIOD_PIN0, 0U) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN1, 0U) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN2, 0U) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN3, 0U) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN4, 0U) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN5, 0U) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN6, 0U) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN7, 0U))
-#define VAL_GPIOD_AFRH              (PIN_AFIO_AF(GPIOD_PIN8, 0U) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN9, 0U) |          \
-                                     PIN_AFIO_AF(GPIOD_PIN10, 0U) |         \
-                                     PIN_AFIO_AF(GPIOD_PIN11, 0U) |         \
-                                     PIN_AFIO_AF(GPIOD_PIN12, 0U) |         \
-                                     PIN_AFIO_AF(GPIOD_PIN13, 0U) |         \
-                                     PIN_AFIO_AF(GPIOD_PIN14, 0U) |         \
-                                     PIN_AFIO_AF(GPIOD_PIN15, 0U))
-#define VAL_GPIOD_ASCR              (PIN_ASCR_DISABLED(GPIOD_PIN0) |        \
-                                     PIN_ASCR_DISABLED(GPIOD_PIN1) |        \
-                                     PIN_ASCR_DISABLED(GPIOD_PIN2) |        \
-                                     PIN_ASCR_DISABLED(GPIOD_PIN3) |        \
-                                     PIN_ASCR_DISABLED(GPIOD_PIN4) |        \
-                                     PIN_ASCR_DISABLED(GPIOD_PIN5) |        \
-                                     PIN_ASCR_DISABLED(GPIOD_PIN6) |        \
-                                     PIN_ASCR_DISABLED(GPIOD_PIN7) |        \
-                                     PIN_ASCR_DISABLED(GPIOD_PIN8) |        \
-                                     PIN_ASCR_DISABLED(GPIOD_PIN9) |        \
-                                     PIN_ASCR_DISABLED(GPIOD_PIN10) |       \
-                                     PIN_ASCR_DISABLED(GPIOD_PIN11) |       \
-                                     PIN_ASCR_DISABLED(GPIOD_PIN12) |       \
-                                     PIN_ASCR_DISABLED(GPIOD_PIN13) |       \
-                                     PIN_ASCR_DISABLED(GPIOD_PIN14) |       \
-                                     PIN_ASCR_DISABLED(GPIOD_PIN15))
-#define VAL_GPIOD_LOCKR             (PIN_LOCKR_DISABLED(GPIOD_PIN0) |       \
-                                     PIN_LOCKR_DISABLED(GPIOD_PIN1) |       \
-                                     PIN_LOCKR_DISABLED(GPIOD_PIN2) |       \
-                                     PIN_LOCKR_DISABLED(GPIOD_PIN3) |       \
-                                     PIN_LOCKR_DISABLED(GPIOD_PIN4) |       \
-                                     PIN_LOCKR_DISABLED(GPIOD_PIN5) |       \
-                                     PIN_LOCKR_DISABLED(GPIOD_PIN6) |       \
-                                     PIN_LOCKR_DISABLED(GPIOD_PIN7) |       \
-                                     PIN_LOCKR_DISABLED(GPIOD_PIN8) |       \
-                                     PIN_LOCKR_DISABLED(GPIOD_PIN9) |       \
-                                     PIN_LOCKR_DISABLED(GPIOD_PIN10) |      \
-                                     PIN_LOCKR_DISABLED(GPIOD_PIN11) |      \
-                                     PIN_LOCKR_DISABLED(GPIOD_PIN12) |      \
-                                     PIN_LOCKR_DISABLED(GPIOD_PIN13) |      \
-                                     PIN_LOCKR_DISABLED(GPIOD_PIN14) |      \
-                                     PIN_LOCKR_DISABLED(GPIOD_PIN15))
-
-/*
- * GPIOE setup:
- *
- * PE0  - PIN0                      (analog).
- * PE1  - PIN1                      (analog).
- * PE2  - PIN2                      (analog).
- * PE3  - PIN3                      (analog).
- * PE4  - PIN4                      (analog).
- * PE5  - PIN5                      (analog).
- * PE6  - PIN6                      (analog).
- * PE7  - PIN7                      (analog).
- * PE8  - PIN8                      (analog).
- * PE9  - PIN9                      (analog).
- * PE10 - PIN10                     (analog).
- * PE11 - PIN11                     (analog).
- * PE12 - PIN12                     (analog).
- * PE13 - PIN13                     (analog).
- * PE14 - PIN14                     (analog).
- * PE15 - PIN15                     (analog).
- */
-#define VAL_GPIOE_MODER             (PIN_MODE_ANALOG(GPIOE_PIN0) |          \
-                                     PIN_MODE_ANALOG(GPIOE_PIN1) |          \
-                                     PIN_MODE_ANALOG(GPIOE_PIN2) |          \
-                                     PIN_MODE_ANALOG(GPIOE_PIN3) |          \
-                                     PIN_MODE_ANALOG(GPIOE_PIN4) |          \
-                                     PIN_MODE_ANALOG(GPIOE_PIN5) |          \
-                                     PIN_MODE_ANALOG(GPIOE_PIN6) |          \
-                                     PIN_MODE_ANALOG(GPIOE_PIN7) |          \
-                                     PIN_MODE_ANALOG(GPIOE_PIN8) |          \
-                                     PIN_MODE_ANALOG(GPIOE_PIN9) |          \
-                                     PIN_MODE_ANALOG(GPIOE_PIN10) |         \
-                                     PIN_MODE_ANALOG(GPIOE_PIN11) |         \
-                                     PIN_MODE_ANALOG(GPIOE_PIN12) |         \
-                                     PIN_MODE_ANALOG(GPIOE_PIN13) |         \
-                                     PIN_MODE_ANALOG(GPIOE_PIN14) |         \
-                                     PIN_MODE_ANALOG(GPIOE_PIN15))
-#define VAL_GPIOE_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
-#define VAL_GPIOE_OSPEEDR           (PIN_OSPEED_HIGH(GPIOE_PIN0) |          \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN1) |          \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN2) |          \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN3) |          \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN4) |          \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN5) |          \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN6) |          \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN7) |          \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN8) |          \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN9) |          \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN10) |         \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN11) |         \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN12) |         \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN13) |         \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN14) |         \
-                                     PIN_OSPEED_HIGH(GPIOE_PIN15))
-#define VAL_GPIOE_PUPDR             (PIN_PUPDR_FLOATING(GPIOE_PIN0) |       \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN1) |       \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN2) |       \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN3) |       \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN4) |       \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN5) |       \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN6) |       \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN7) |       \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN8) |       \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN9) |       \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN10) |      \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN11) |      \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN12) |      \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN13) |      \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN14) |      \
-                                     PIN_PUPDR_FLOATING(GPIOE_PIN15))
-#define VAL_GPIOE_ODR               (PIN_ODR_HIGH(GPIOE_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOE_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOE_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOE_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOE_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOE_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOE_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOE_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOE_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOE_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOE_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOE_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOE_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOE_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOE_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOE_PIN15))
-#define VAL_GPIOE_AFRL              (PIN_AFIO_AF(GPIOE_PIN0, 0U) |          \
-                                     PIN_AFIO_AF(GPIOE_PIN1, 0U) |          \
-                                     PIN_AFIO_AF(GPIOE_PIN2, 0U) |          \
-                                     PIN_AFIO_AF(GPIOE_PIN3, 0U) |          \
-                                     PIN_AFIO_AF(GPIOE_PIN4, 0U) |          \
-                                     PIN_AFIO_AF(GPIOE_PIN5, 0U) |          \
-                                     PIN_AFIO_AF(GPIOE_PIN6, 0U) |          \
-                                     PIN_AFIO_AF(GPIOE_PIN7, 0U))
-#define VAL_GPIOE_AFRH              (PIN_AFIO_AF(GPIOE_PIN8, 0U) |          \
-                                     PIN_AFIO_AF(GPIOE_PIN9, 0U) |          \
-                                     PIN_AFIO_AF(GPIOE_PIN10, 0U) |         \
-                                     PIN_AFIO_AF(GPIOE_PIN11, 0U) |         \
-                                     PIN_AFIO_AF(GPIOE_PIN12, 0U) |         \
-                                     PIN_AFIO_AF(GPIOE_PIN13, 0U) |         \
-                                     PIN_AFIO_AF(GPIOE_PIN14, 0U) |         \
-                                     PIN_AFIO_AF(GPIOE_PIN15, 0U))
-#define VAL_GPIOE_ASCR              (PIN_ASCR_DISABLED(GPIOE_PIN0) |        \
-                                     PIN_ASCR_DISABLED(GPIOE_PIN1) |        \
-                                     PIN_ASCR_DISABLED(GPIOE_PIN2) |        \
-                                     PIN_ASCR_DISABLED(GPIOE_PIN3) |        \
-                                     PIN_ASCR_DISABLED(GPIOE_PIN4) |        \
-                                     PIN_ASCR_DISABLED(GPIOE_PIN5) |        \
-                                     PIN_ASCR_DISABLED(GPIOE_PIN6) |        \
-                                     PIN_ASCR_DISABLED(GPIOE_PIN7) |        \
-                                     PIN_ASCR_DISABLED(GPIOE_PIN8) |        \
-                                     PIN_ASCR_DISABLED(GPIOE_PIN9) |        \
-                                     PIN_ASCR_DISABLED(GPIOE_PIN10) |       \
-                                     PIN_ASCR_DISABLED(GPIOE_PIN11) |       \
-                                     PIN_ASCR_DISABLED(GPIOE_PIN12) |       \
-                                     PIN_ASCR_DISABLED(GPIOE_PIN13) |       \
-                                     PIN_ASCR_DISABLED(GPIOE_PIN14) |       \
-                                     PIN_ASCR_DISABLED(GPIOE_PIN15))
-#define VAL_GPIOE_LOCKR             (PIN_LOCKR_DISABLED(GPIOE_PIN0) |       \
-                                     PIN_LOCKR_DISABLED(GPIOE_PIN1) |       \
-                                     PIN_LOCKR_DISABLED(GPIOE_PIN2) |       \
-                                     PIN_LOCKR_DISABLED(GPIOE_PIN3) |       \
-                                     PIN_LOCKR_DISABLED(GPIOE_PIN4) |       \
-                                     PIN_LOCKR_DISABLED(GPIOE_PIN5) |       \
-                                     PIN_LOCKR_DISABLED(GPIOE_PIN6) |       \
-                                     PIN_LOCKR_DISABLED(GPIOE_PIN7) |       \
-                                     PIN_LOCKR_DISABLED(GPIOE_PIN8) |       \
-                                     PIN_LOCKR_DISABLED(GPIOE_PIN9) |       \
-                                     PIN_LOCKR_DISABLED(GPIOE_PIN10) |      \
-                                     PIN_LOCKR_DISABLED(GPIOE_PIN11) |      \
-                                     PIN_LOCKR_DISABLED(GPIOE_PIN12) |      \
-                                     PIN_LOCKR_DISABLED(GPIOE_PIN13) |      \
-                                     PIN_LOCKR_DISABLED(GPIOE_PIN14) |      \
-                                     PIN_LOCKR_DISABLED(GPIOE_PIN15))
-
-/*
- * GPIOF setup:
- *
- * PF0  - PIN0                      (analog).
- * PF1  - PIN1                      (analog).
- * PF2  - PIN2                      (analog).
- * PF3  - PIN3                      (analog).
- * PF4  - PIN4                      (analog).
- * PF5  - PIN5                      (analog).
- * PF6  - PIN6                      (analog).
- * PF7  - PIN7                      (analog).
- * PF8  - PIN8                      (analog).
- * PF9  - PIN9                      (analog).
- * PF10 - PIN10                     (analog).
- * PF11 - PIN11                     (analog).
- * PF12 - PIN12                     (analog).
- * PF13 - PIN13                     (analog).
- * PF14 - PIN14                     (analog).
- * PF15 - PIN15                     (analog).
- */
-#define VAL_GPIOF_MODER             (PIN_MODE_ANALOG(GPIOF_PIN0) |          \
-                                     PIN_MODE_ANALOG(GPIOF_PIN1) |          \
-                                     PIN_MODE_ANALOG(GPIOF_PIN2) |          \
-                                     PIN_MODE_ANALOG(GPIOF_PIN3) |          \
-                                     PIN_MODE_ANALOG(GPIOF_PIN4) |          \
-                                     PIN_MODE_ANALOG(GPIOF_PIN5) |          \
-                                     PIN_MODE_ANALOG(GPIOF_PIN6) |          \
-                                     PIN_MODE_ANALOG(GPIOF_PIN7) |          \
-                                     PIN_MODE_ANALOG(GPIOF_PIN8) |          \
-                                     PIN_MODE_ANALOG(GPIOF_PIN9) |          \
-                                     PIN_MODE_ANALOG(GPIOF_PIN10) |         \
-                                     PIN_MODE_ANALOG(GPIOF_PIN11) |         \
-                                     PIN_MODE_ANALOG(GPIOF_PIN12) |         \
-                                     PIN_MODE_ANALOG(GPIOF_PIN13) |         \
-                                     PIN_MODE_ANALOG(GPIOF_PIN14) |         \
-                                     PIN_MODE_ANALOG(GPIOF_PIN15))
-#define VAL_GPIOF_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
-#define VAL_GPIOF_OSPEEDR           (PIN_OSPEED_HIGH(GPIOF_PIN0) |          \
-                                     PIN_OSPEED_HIGH(GPIOF_PIN1) |          \
-                                     PIN_OSPEED_HIGH(GPIOF_PIN2) |          \
-                                     PIN_OSPEED_HIGH(GPIOF_PIN3) |          \
-                                     PIN_OSPEED_HIGH(GPIOF_PIN4) |          \
-                                     PIN_OSPEED_HIGH(GPIOF_PIN5) |          \
-                                     PIN_OSPEED_HIGH(GPIOF_PIN6) |          \
-                                     PIN_OSPEED_HIGH(GPIOF_PIN7) |          \
-                                     PIN_OSPEED_HIGH(GPIOF_PIN8) |          \
-                                     PIN_OSPEED_HIGH(GPIOF_PIN9) |          \
-                                     PIN_OSPEED_HIGH(GPIOF_PIN10) |         \
-                                     PIN_OSPEED_HIGH(GPIOF_PIN11) |         \
-                                     PIN_OSPEED_HIGH(GPIOF_PIN12) |         \
-                                     PIN_OSPEED_HIGH(GPIOF_PIN13) |         \
-                                     PIN_OSPEED_HIGH(GPIOF_PIN14) |         \
-                                     PIN_OSPEED_HIGH(GPIOF_PIN15))
-#define VAL_GPIOF_PUPDR             (PIN_PUPDR_FLOATING(GPIOF_PIN0) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN1) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN2) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN3) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN4) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN5) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN6) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN7) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN8) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN9) |       \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN10) |      \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN11) |      \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN12) |      \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN13) |      \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN14) |      \
-                                     PIN_PUPDR_FLOATING(GPIOF_PIN15))
-#define VAL_GPIOF_ODR               (PIN_ODR_HIGH(GPIOF_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOF_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOF_PIN15))
-#define VAL_GPIOF_AFRL              (PIN_AFIO_AF(GPIOF_PIN0, 0U) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN1, 0U) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN2, 0U) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN3, 0U) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN4, 0U) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN5, 0U) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN6, 0U) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN7, 0U))
-#define VAL_GPIOF_AFRH              (PIN_AFIO_AF(GPIOF_PIN8, 0U) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN9, 0U) |          \
-                                     PIN_AFIO_AF(GPIOF_PIN10, 0U) |         \
-                                     PIN_AFIO_AF(GPIOF_PIN11, 0U) |         \
-                                     PIN_AFIO_AF(GPIOF_PIN12, 0U) |         \
-                                     PIN_AFIO_AF(GPIOF_PIN13, 0U) |         \
-                                     PIN_AFIO_AF(GPIOF_PIN14, 0U) |         \
-                                     PIN_AFIO_AF(GPIOF_PIN15, 0U))
-#define VAL_GPIOF_ASCR              (PIN_ASCR_DISABLED(GPIOF_PIN0) |        \
-                                     PIN_ASCR_DISABLED(GPIOF_PIN1) |        \
-                                     PIN_ASCR_DISABLED(GPIOF_PIN2) |        \
-                                     PIN_ASCR_DISABLED(GPIOF_PIN3) |        \
-                                     PIN_ASCR_DISABLED(GPIOF_PIN4) |        \
-                                     PIN_ASCR_DISABLED(GPIOF_PIN5) |        \
-                                     PIN_ASCR_DISABLED(GPIOF_PIN6) |        \
-                                     PIN_ASCR_DISABLED(GPIOF_PIN7) |        \
-                                     PIN_ASCR_DISABLED(GPIOF_PIN8) |        \
-                                     PIN_ASCR_DISABLED(GPIOF_PIN9) |        \
-                                     PIN_ASCR_DISABLED(GPIOF_PIN10) |       \
-                                     PIN_ASCR_DISABLED(GPIOF_PIN11) |       \
-                                     PIN_ASCR_DISABLED(GPIOF_PIN12) |       \
-                                     PIN_ASCR_DISABLED(GPIOF_PIN13) |       \
-                                     PIN_ASCR_DISABLED(GPIOF_PIN14) |       \
-                                     PIN_ASCR_DISABLED(GPIOF_PIN15))
-#define VAL_GPIOF_LOCKR             (PIN_LOCKR_DISABLED(GPIOF_PIN0) |       \
-                                     PIN_LOCKR_DISABLED(GPIOF_PIN1) |       \
-                                     PIN_LOCKR_DISABLED(GPIOF_PIN2) |       \
-                                     PIN_LOCKR_DISABLED(GPIOF_PIN3) |       \
-                                     PIN_LOCKR_DISABLED(GPIOF_PIN4) |       \
-                                     PIN_LOCKR_DISABLED(GPIOF_PIN5) |       \
-                                     PIN_LOCKR_DISABLED(GPIOF_PIN6) |       \
-                                     PIN_LOCKR_DISABLED(GPIOF_PIN7) |       \
-                                     PIN_LOCKR_DISABLED(GPIOF_PIN8) |       \
-                                     PIN_LOCKR_DISABLED(GPIOF_PIN9) |       \
-                                     PIN_LOCKR_DISABLED(GPIOF_PIN10) |      \
-                                     PIN_LOCKR_DISABLED(GPIOF_PIN11) |      \
-                                     PIN_LOCKR_DISABLED(GPIOF_PIN12) |      \
-                                     PIN_LOCKR_DISABLED(GPIOF_PIN13) |      \
-                                     PIN_LOCKR_DISABLED(GPIOF_PIN14) |      \
-                                     PIN_LOCKR_DISABLED(GPIOF_PIN15))
-
-/*
- * GPIOG setup:
- *
- * PG0  - PIN0                      (analog).
- * PG1  - PIN1                      (analog).
- * PG2  - PIN2                      (analog).
- * PG3  - PIN3                      (analog).
- * PG4  - PIN4                      (analog).
- * PG5  - PIN5                      (analog).
- * PG6  - PIN6                      (analog).
- * PG7  - PIN7                      (analog).
- * PG8  - PIN8                      (analog).
- * PG9  - PIN9                      (analog).
- * PG10 - PIN10                     (analog).
- * PG11 - PIN11                     (analog).
- * PG12 - PIN12                     (analog).
- * PG13 - PIN13                     (analog).
- * PG14 - PIN14                     (analog).
- * PG15 - PIN15                     (analog).
- */
-#define VAL_GPIOG_MODER             (PIN_MODE_ANALOG(GPIOG_PIN0) |          \
-                                     PIN_MODE_ANALOG(GPIOG_PIN1) |          \
-                                     PIN_MODE_ANALOG(GPIOG_PIN2) |          \
-                                     PIN_MODE_ANALOG(GPIOG_PIN3) |          \
-                                     PIN_MODE_ANALOG(GPIOG_PIN4) |          \
-                                     PIN_MODE_ANALOG(GPIOG_PIN5) |          \
-                                     PIN_MODE_ANALOG(GPIOG_PIN6) |          \
-                                     PIN_MODE_ANALOG(GPIOG_PIN7) |          \
-                                     PIN_MODE_ANALOG(GPIOG_PIN8) |          \
-                                     PIN_MODE_ANALOG(GPIOG_PIN9) |          \
-                                     PIN_MODE_ANALOG(GPIOG_PIN10) |         \
-                                     PIN_MODE_ANALOG(GPIOG_PIN11) |         \
-                                     PIN_MODE_ANALOG(GPIOG_PIN12) |         \
-                                     PIN_MODE_ANALOG(GPIOG_PIN13) |         \
-                                     PIN_MODE_ANALOG(GPIOG_PIN14) |         \
-                                     PIN_MODE_ANALOG(GPIOG_PIN15))
-#define VAL_GPIOG_OTYPER            (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN1) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN2) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN3) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN4) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN5) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN6) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN7) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN8) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN9) |       \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN10) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN11) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN12) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN13) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN14) |      \
-                                     PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
-#define VAL_GPIOG_OSPEEDR           (PIN_OSPEED_VERYLOW(GPIOG_PIN0) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN1) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN2) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN3) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN4) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN5) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN6) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN7) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN8) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN9) |       \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN10) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN11) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN12) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN13) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN14) |      \
-                                     PIN_OSPEED_VERYLOW(GPIOG_PIN15))
-#define VAL_GPIOG_PUPDR             (PIN_PUPDR_FLOATING(GPIOG_PIN0) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN1) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN2) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN3) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN4) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN5) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN6) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN7) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN8) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN9) |       \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN10) |      \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN11) |      \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN12) |      \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN13) |      \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN14) |      \
-                                     PIN_PUPDR_FLOATING(GPIOG_PIN15))
-#define VAL_GPIOG_ODR               (PIN_ODR_HIGH(GPIOG_PIN0) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN1) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN2) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN3) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN4) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN5) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN6) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN7) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN8) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN9) |             \
-                                     PIN_ODR_HIGH(GPIOG_PIN10) |            \
-                                     PIN_ODR_HIGH(GPIOG_PIN11) |            \
-                                     PIN_ODR_HIGH(GPIOG_PIN12) |            \
-                                     PIN_ODR_HIGH(GPIOG_PIN13) |            \
-                                     PIN_ODR_HIGH(GPIOG_PIN14) |            \
-                                     PIN_ODR_HIGH(GPIOG_PIN15))
-#define VAL_GPIOG_AFRL              (PIN_AFIO_AF(GPIOG_PIN0, 0U) |          \
-                                     PIN_AFIO_AF(GPIOG_PIN1, 0U) |          \
-                                     PIN_AFIO_AF(GPIOG_PIN2, 0U) |          \
-                                     PIN_AFIO_AF(GPIOG_PIN3, 0U) |          \
-                                     PIN_AFIO_AF(GPIOG_PIN4, 0U) |          \
-                                     PIN_AFIO_AF(GPIOG_PIN5, 0U) |          \
-                                     PIN_AFIO_AF(GPIOG_PIN6, 0U) |          \
-                                     PIN_AFIO_AF(GPIOG_PIN7, 0U))
-#define VAL_GPIOG_AFRH              (PIN_AFIO_AF(GPIOG_PIN8, 0U) |          \
-                                     PIN_AFIO_AF(GPIOG_PIN9, 0U) |          \
-                                     PIN_AFIO_AF(GPIOG_PIN10, 0U) |         \
-                                     PIN_AFIO_AF(GPIOG_PIN11, 0U) |         \
-                                     PIN_AFIO_AF(GPIOG_PIN12, 0U) |         \
-                                     PIN_AFIO_AF(GPIOG_PIN13, 0U) |         \
-                                     PIN_AFIO_AF(GPIOG_PIN14, 0U) |         \
-                                     PIN_AFIO_AF(GPIOG_PIN15, 0U))
-#define VAL_GPIOG_ASCR              (PIN_ASCR_DISABLED(GPIOG_PIN0) |        \
-                                     PIN_ASCR_DISABLED(GPIOG_PIN1) |        \
-                                     PIN_ASCR_DISABLED(GPIOG_PIN2) |        \
-                                     PIN_ASCR_DISABLED(GPIOG_PIN3) |        \
-                                     PIN_ASCR_DISABLED(GPIOG_PIN4) |        \
-                                     PIN_ASCR_DISABLED(GPIOG_PIN5) |        \
-                                     PIN_ASCR_DISABLED(GPIOG_PIN6) |        \
-                                     PIN_ASCR_DISABLED(GPIOG_PIN7) |        \
-                                     PIN_ASCR_DISABLED(GPIOG_PIN8) |        \
-                                     PIN_ASCR_DISABLED(GPIOG_PIN9) |        \
-                                     PIN_ASCR_DISABLED(GPIOG_PIN10) |       \
-                                     PIN_ASCR_DISABLED(GPIOG_PIN11) |       \
-                                     PIN_ASCR_DISABLED(GPIOG_PIN12) |       \
-                                     PIN_ASCR_DISABLED(GPIOG_PIN13) |       \
-                                     PIN_ASCR_DISABLED(GPIOG_PIN14) |       \
-                                     PIN_ASCR_DISABLED(GPIOG_PIN15))
-#define VAL_GPIOG_LOCKR             (PIN_LOCKR_DISABLED(GPIOG_PIN0) |       \
-                                     PIN_LOCKR_DISABLED(GPIOG_PIN1) |       \
-                                     PIN_LOCKR_DISABLED(GPIOG_PIN2) |       \
-                                     PIN_LOCKR_DISABLED(GPIOG_PIN3) |       \
-                                     PIN_LOCKR_DISABLED(GPIOG_PIN4) |       \
-                                     PIN_LOCKR_DISABLED(GPIOG_PIN5) |       \
-                                     PIN_LOCKR_DISABLED(GPIOG_PIN6) |       \
-                                     PIN_LOCKR_DISABLED(GPIOG_PIN7) |       \
-                                     PIN_LOCKR_DISABLED(GPIOG_PIN8) |       \
-                                     PIN_LOCKR_DISABLED(GPIOG_PIN9) |       \
-                                     PIN_LOCKR_DISABLED(GPIOG_PIN10) |      \
-                                     PIN_LOCKR_DISABLED(GPIOG_PIN11) |      \
-                                     PIN_LOCKR_DISABLED(GPIOG_PIN12) |      \
-                                     PIN_LOCKR_DISABLED(GPIOG_PIN13) |      \
-                                     PIN_LOCKR_DISABLED(GPIOG_PIN14) |      \
-                                     PIN_LOCKR_DISABLED(GPIOG_PIN15))
-
-/*
- * GPIOH setup:
- *
- * PH0  - OSC_IN                    (input floating).
- * PH1  - OSC_OUT                   (input floating).
- * PH2  - PIN2                      (analog).
- * PH3  - PIN3                      (analog).
- * PH4  - PIN4                      (analog).
- * PH5  - PIN5                      (analog).
- * PH6  - PIN6                      (analog).
- * PH7  - PIN7                      (analog).
- * PH8  - PIN8                  