commit b010278f64771c524affd37e08c386a5f220f69e
Author: Thomas Schöpping <tschoepp@cit-ec.uni-bielefeld.de>
Date:   Fri Mar 8 11:19:58 2019 +0100

    Introduced PowerManagement v1.2 module.
    Also adapted PowerManagement v1.1 and ADC unit test.

diff --git a/modules/PowerManagement_1-1/alldconf.h b/modules/PowerManagement_1-1/alldconf.h
index 832924f..9a45185 100644
--- a/modules/PowerManagement_1-1/alldconf.h
+++ b/modules/PowerManagement_1-1/alldconf.h
@@ -60,6 +60,7 @@ along with this program.  If not, see <http://www.gnu.org/licenses/>.
  * @brief   Enable flag for the BQ27500 fuel gauge.
  */
 #define AMIROLLD_CFG_BQ27500                    1
+#define BQ27500_LLD_HWVERSION                   120
 
 /**
  * @brief   Enable flag for the INA219 power monitor.
diff --git a/modules/PowerManagement_1-2/Makefile b/modules/PowerManagement_1-2/Makefile
new file mode 100644
index 0000000..09773b1
--- /dev/null
+++ b/modules/PowerManagement_1-2/Makefile
@@ -0,0 +1,272 @@
+################################################################################
+# AMiRo-OS is an operating system designed for the Autonomous Mini Robot       #
+# (AMiRo) platform.                                                            #
+# Copyright (C) 2016..2019  Thomas Schöpping et al.                            #
+#                                                                              #
+# This program is free software: you can redistribute it and/or modify         #
+# it under the terms of the GNU General Public License as published by         #
+# the Free Software Foundation, either version 3 of the License, or            #
+# (at your option) any later version.                                          #
+#                                                                              #
+# This program is distributed in the hope that it will be useful,              #
+# but WITHOUT ANY WARRANTY; without even the implied warranty of               #
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                #
+# GNU General Public License for more details.                                 #
+#                                                                              #
+# You should have received a copy of the GNU General Public License            #
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.        #
+#                                                                              #
+# This research/work was supported by the Cluster of Excellence Cognitive      #
+# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is   #
+# funded by the German Research Foundation (DFG).                              #
+################################################################################
+
+
+
+################################################################################
+# Build global options                                                         #
+# NOTE: Can be overridden externally.                                          #
+#                                                                              #
+
+# Compiler options here.
+ifeq ($(USE_OPT),)
+  USE_OPT = -O2 -fstack-usage
+endif
+
+# C specific options here (added to USE_OPT).
+ifeq ($(USE_COPT),)
+  USE_COPT = -std=c17
+endif
+
+# C++ specific options here (added to USE_OPT).
+ifeq ($(USE_CPPOPT),)
+  USE_CPPOPT = -fno-rtti -std=c++17
+endif
+
+# Enable this if you want the linker to remove unused code and data.
+ifeq ($(USE_LINK_GC),)
+  USE_LINK_GC = yes
+endif
+
+# Linker extra options here.
+ifeq ($(USE_LDOPT),)
+  USE_LDOPT =
+endif
+
+# Enable this if you want link time optimizations (LTO).
+ifeq ($(USE_LTO),)
+  USE_LTO = yes
+endif
+
+# Enable this if you want to see the full log while compiling.
+ifeq ($(USE_VERBOSE_COMPILE),)
+  USE_VERBOSE_COMPILE = no
+endif
+
+# If enabled, this option makes the build process faster by not compiling
+# modules not used in the current configuration.
+ifeq ($(USE_SMART_BUILD),)
+  USE_SMART_BUILD = no
+endif
+
+#                                                                              #
+# Build global options                                                         #
+################################################################################
+
+################################################################################
+# Architecture or project specific options                                     #
+#                                                                              #
+
+# Stack size to be allocated to the Cortex-M process stack. This stack is
+# the stack used by the main() thread.
+ifeq ($(USE_PROCESS_STACKSIZE),)
+  USE_PROCESS_STACKSIZE = 0x400
+endif
+
+# Stack size to the allocated to the Cortex-M main/exceptions stack. This
+# stack is used for processing interrupts and exceptions.
+ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
+  USE_EXCEPTIONS_STACKSIZE = 0x400
+endif
+
+# Enables the use of FPU.
+# Possible selections are:
+#   no     - no FPU is used (probably equals 'soft')
+#   soft   - does not use the FPU, thus all floating point operations are emulated
+#   softfp - uses the FPU, but uses the integer registers only
+#   hard   - uses the FPU and passes data via the FPU registers
+ifeq ($(USE_FPU),)
+  USE_FPU = softfp
+endif
+
+# FPU-related options.
+ifeq ($(USE_FPU_OPT),)
+  USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv4-sp-d16
+endif
+
+#                                                                              #
+# Architecture or project specific options                                     #
+################################################################################
+
+################################################################################
+# Project, target, sources and paths                                           #
+#                                                                              #
+
+# Absolute path to the project
+PROJECT_PATH := $(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST)))))
+
+# Define project name here
+PROJECT := $(patsubst $(abspath $(dir $(abspath $(lastword $(MAKEFILE_LIST))))..)/%,%,$(PROJECT_PATH))
+
+# Target settings.
+MCU = cortex-m4
+
+# Imported source files and paths.
+include ../../kernel/kernel.mk
+CHIBIOS    := $(AMIROOS_KERNEL)
+CONFDIR    := .
+ifeq ($(BUILDDIR),)
+  BUILDDIR := $(PROJECT_PATH)/build
+endif
+DEPDIR     := $(dir $(BUILDDIR)).dep
+AMIROOS    := ../..
+# Licensing files.
+include $(CHIBIOS)/os/license/license.mk
+# Startup files.
+include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk
+# HAL-OSAL files (optional).
+include $(CHIBIOS)/os/hal/hal.mk
+include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk
+include $(CHIBIOS)/os/hal/osal/rt/osal.mk
+include $(CHIBIOS)/os/hal/lib/streams/streams.mk
+# RTOS files (optional).
+include $(CHIBIOS)/os/rt/rt.mk
+include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
+# Auto-build files in ./source recursively.
+include $(CHIBIOS)/tools/mk/autobuild.mk
+# Other files (optional).
+include $(CHIBIOS)/test/lib/test.mk
+include $(CHIBIOS)/test/rt/rt_test.mk
+include $(CHIBIOS)/test/oslib/oslib_test.mk
+# AMiRo-BLT files
+include ../../bootloader/bootloader.mk
+# AMiRo-LLD files
+include ../../periphery-lld/periphery-lld.mk
+# AMiRo-OS files
+include ../modules.mk
+include $(AMIROOS)/core/core.mk
+include $(AMIROOS)/unittests/unittests.mk
+
+# Define linker script file here
+LDSCRIPT= STM32F405xG.ld
+
+# C sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CSRC = $(ALLCSRC) \
+       $(CHIBIOS)/os/various/syscalls.c \
+       $(CHIBIOS)/os/various/evtimer.c \
+       $(TESTSRC) \
+       board.c \
+       $(PERIPHERYLLDCSRC) \
+       $(UNITTESTSCSRC) \
+       $(AMIROOSCORECSRC) \
+       $(MODULESCSRC) \
+       module.c \
+       $(APPSCSRC)
+
+# C++ sources that can be compiled in ARM or THUMB mode depending on the global
+# setting.
+CPPSRC = $(ALLCPPSRC) \
+         $(CHIBIOS)/os/various/cpp_wrappers/syscalls_cpp.cpp \
+         $(AMIROOSCORECPPSRC) \
+         $(APPSCPPSRC)
+
+# List ASM source files here.
+ASMSRC = $(ALLASMSRC) \
+         $(APPSASMSRC)
+
+# List ASM with preprocessor source files here.
+ASMXSRC = $(ALLXASMSRC) \
+          $(APPSASMXSRC)
+
+# Inclusion directories.
+INCDIR = $(CONFDIR) \
+         $(ALLINC) \
+         $(TESTINC) \
+         $(CHIBIOS)/os/hal/lib/streams \
+         $(BOOTLOADERINC) \
+         $(PERIPHERYLLDINC) \
+         $(AMIROOS) \
+         $(UNITTESTSINC) \
+         $(AMIROOSCOREINC) \
+         $(MODULESINC) \
+         $(APPSINC)
+
+# Define C warning options here.
+CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
+
+# Define C++ warning options here.
+CPPWARN = -Wall -Wextra -Wundef
+
+# Create an additional .srec image file.
+SREC = $(CP) -O srec --srec-len=248
+
+#                                                                              #
+# Project, target, sources and paths                                           #
+################################################################################
+
+################################################################################
+# Start of user section                                                        #
+#                                                                              #
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS +=
+
+# Define ASM defines here
+UADEFS +=
+
+# List all user directories here
+UINCDIR +=
+
+# List the user directory to look for the libraries here
+ULIBDIR +=
+
+# List all user libraries here
+ULIBS +=
+
+#                                                                              #
+# End of user section                                                          #
+################################################################################
+
+################################################################################
+# Common rules                                                                 #
+#                                                                              #
+
+RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk
+include $(RULESPATH)/arm-none-eabi.mk
+include $(RULESPATH)/rules.mk
+
+#                                                                              #
+# Common rules                                                                 #
+################################################################################
+
+################################################################################
+# Custom rules                                                                 #
+#                                                                              #
+
+FLASH_MODULES = $(PROJECT)
+FLASH_FILES = $(BUILDDIR)/$(PROJECT).$(FLASHTOOL_EXT)
+
+flash: $(FLASH_FILES)
+	$(info )
+ifeq ($(FLASHTOOL),SerialBoot)
+	$(info Flashing ($(FLASHTOOL)):)
+	$(FLASHTOOL_CMD) $(FLASHTOOL_ARGS)
+else
+	$(info ERROR: unable to flash the module (SerialBoot unavailable))
+endif
+
+#                                                                              #
+# Custom rules                                                                 #
+################################################################################
+
diff --git a/modules/PowerManagement_1-2/STM32F405xG.ld b/modules/PowerManagement_1-2/STM32F405xG.ld
new file mode 100644
index 0000000..339cd14
--- /dev/null
+++ b/modules/PowerManagement_1-2/STM32F405xG.ld
@@ -0,0 +1,88 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2019  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/*
+ * STM32F405xG memory setup.
+ * Note: Use of ram1 and ram2 is mutually exclusive with use of ram0.
+ */
+MEMORY
+{
+    flash0  : org = 0x08008000, len = 1M-32k
+    flash1  : org = 0x00000000, len = 0
+    flash2  : org = 0x00000000, len = 0
+    flash3  : org = 0x00000000, len = 0
+    flash4  : org = 0x00000000, len = 0
+    flash5  : org = 0x00000000, len = 0
+    flash6  : org = 0x00000000, len = 0
+    flash7  : org = 0x00000000, len = 0
+    ram0    : org = 0x20000000, len = 128k      /* SRAM1 + SRAM2 */
+    ram1    : org = 0x20000000, len = 112k      /* SRAM1 */
+    ram2    : org = 0x2001C000, len = 16k       /* SRAM2 */
+    ram3    : org = 0x00000000, len = 0
+    ram4    : org = 0x10000000, len = 64k       /* CCM SRAM */
+    ram5    : org = 0x40024000, len = 4k        /* BCKP SRAM */
+    ram6    : org = 0x00000000, len = 0
+    ram7    : org = 0x00000000, len = 0
+}
+
+/* For each data/text section two region are defined, a virtual region
+   and a load region (_LMA suffix).*/
+
+/* Flash region to be used for exception vectors.*/
+REGION_ALIAS("VECTORS_FLASH", flash0);
+REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for constructors and destructors.*/
+REGION_ALIAS("XTORS_FLASH", flash0);
+REGION_ALIAS("XTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for code text.*/
+REGION_ALIAS("TEXT_FLASH", flash0);
+REGION_ALIAS("TEXT_FLASH_LMA", flash0);
+
+/* Flash region to be used for read only data.*/
+REGION_ALIAS("RODATA_FLASH", flash0);
+REGION_ALIAS("RODATA_FLASH_LMA", flash0);
+
+/* Flash region to be used for various.*/
+REGION_ALIAS("VARIOUS_FLASH", flash0);
+REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
+
+/* Flash region to be used for RAM(n) initialization data.*/
+REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
+
+/* RAM region to be used for Main stack. This stack accommodates the processing
+   of all exceptions and interrupts.*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+   the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+REGION_ALIAS("DATA_RAM_LMA", flash0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
+/* RAM region to be used for the default heap.*/
+REGION_ALIAS("HEAP_RAM", ram0);
+
+/* Generic rules inclusion.*/
+INCLUDE rules.ld
diff --git a/modules/PowerManagement_1-2/alldconf.h b/modules/PowerManagement_1-2/alldconf.h
new file mode 100644
index 0000000..c4fc2d4
--- /dev/null
+++ b/modules/PowerManagement_1-2/alldconf.h
@@ -0,0 +1,142 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2019  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file
+ * @brief   AMiRo-LLD configuration file for the PowerManagement v1.2 module.
+ * @details Contains the application specific AMiRo-LLD settings.
+ *
+ * @addtogroup powermanagement_lld_config
+ * @{
+ */
+
+#ifndef ALLDCONF_H
+#define ALLDCONF_H
+
+/*
+ * compatibility guards
+ */
+#define _AMIRO_LLD_CFG_
+#define AMIRO_LLD_CFG_VERSION_MAJOR             1
+#define AMIRO_LLD_CFG_VERSION_MINOR             0
+
+/**
+ * @brief   Width of the apalTime_t data type.
+ *
+ * @details Possible values are 8, 16, 32, and 64 bits.
+ *          By definition time is represented at microsecond precision.
+ */
+#define AMIROLLD_CFG_TIME_SIZE                  32
+
+// required to differentiate between various sensor rings
+#include <board.h>
+
+/**
+ * @brief   Enable flag for the AT24C01BN-SH-B EEPROM.
+ */
+#define AMIROLLD_CFG_AT24C01B                   1
+
+/**
+ * @brief   Enable flag for the BQ24103A charger.
+ */
+#define AMIROLLD_CFG_BQ241xx                    1
+
+/**
+ * @brief   Enable flag for the BQ27500 fuel gauge.
+ */
+#define AMIROLLD_CFG_BQ27500                    1
+#define BQ27500_LLD_HWVERSION                   130
+
+/**
+ * @brief   Enable flag for the INA219 power monitor.
+ */
+#define AMIROLLD_CFG_INA219                     1
+
+/**
+ * @brief   Enable flag for the status LED.
+ */
+#define AMIROLLD_CFG_LED                        1
+
+/**
+ * @brief   Enable flag for the PKLCS1212E4001 buzzer.
+ */
+#define AMIROLLD_CFG_PKxxxExxx                  1
+#define PKxxxExxx_LLD_FREQUENCY_MIN             2000
+#define PKxxxExxx_LLD_FREQUENCY_SPEC            4000
+#define PKxxxExxx_LLD_FREQUENCY_MAX             6000
+
+/**
+ * @brief   Enable flag for the TPS2051BDBV power switch.
+ */
+#define AMIROLLD_CFG_TPS20xxB                   1
+
+/**
+ * @brief   Enable flag for the TPS62113 step-down converter.
+ */
+#define AMIROLLD_CFG_TPS6211x                   1
+
+#if (BOARD_SENSORRING == BOARD_PROXIMITYSENSOR) || defined(__DOXYGEN__)
+
+/**
+ * @brief   Enable flag for the MPR121 touch sensor.
+ */
+#define AMIROLLD_CFG_MPR121                     1
+
+/**
+ * @brief   Enable flag for the PCA9544A I2C multiplexer.
+ */
+#define AMIROLLD_CFG_PCA9544A                   1
+
+/**
+ * @brief   Enable flag for the VCNL4020 proximity sensor.
+ */
+#define AMIROLLD_CFG_VCNL4020                   1
+
+#endif /* (BOARD_SENSORRING == BOARD_PROXIMITYSENSOR) */
+
+#if (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L0X) || defined(__DOXYGEN__)
+
+/**
+ * @brief   Enable flag for the PCAL6524 GPIO extender
+ */
+#define AMIROLLD_CFG_PCAL6524                   1
+
+/**
+ * @brief   Enable flag for the AT42Q1050 touch sensor.
+ */
+#define AMIROLLD_CFG_AT42QT1050                 1
+
+#endif /* (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L0X) */
+
+#if (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L1X) || defined(__DOXYGEN__)
+
+/**
+ * @brief   Enable flag for the PCAL6524 GPIO extender
+ */
+#define AMIROLLD_CFG_PCAL6524                   1
+
+/**
+ * @brief   Enable flag for the AT42Q1050 touch sensor.
+ */
+#define AMIROLLD_CFG_AT42QT1050                 1
+
+#endif /* (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L1X) */
+
+#endif /* ALLDCONF_H */
+
+/** @} */
diff --git a/modules/PowerManagement_1-2/aosconf.h b/modules/PowerManagement_1-2/aosconf.h
new file mode 100644
index 0000000..c768343
--- /dev/null
+++ b/modules/PowerManagement_1-2/aosconf.h
@@ -0,0 +1,242 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2019  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file
+ * @brief   AMiRo-OS Configuration file for the PowerManagement v1.2 module.
+ * @details Contains the application specific AMiRo-OS settings.
+ *
+ * @addtogroup powermanagement_aos_config
+ * @{
+ */
+
+#ifndef AOSCONF_H
+#define AOSCONF_H
+
+/*
+ * compatibility guards
+ */
+#define _AMIRO_OS_CFG_
+#define AMIRO_OS_CFG_VERSION_MAJOR              2
+#define AMIRO_OS_CFG_VERSION_MINOR              0
+
+#include <stdbool.h>
+
+/*
+ * Include an external configuration file to override the following default settings only if required.
+ */
+#if defined(AMIRO_APPS) && (AMIRO_APPS == true)
+  #include <osconf.h>
+#endif /* defined(AMIRO_APPS) && (AMIRO_APPS == true) */
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Flag to enable/disable debug API and logic.
+ */
+#if !defined(OS_CFG_DBG)
+  #define AMIROOS_CFG_DBG                       true
+#else /* !defined(OS_CFG_DBG) */
+  #define AMIROOS_CFG_DBG                       OS_CFG_DBG
+#endif /* !defined(OS_CFG_DBG) */
+
+/**
+ * @brief   Flag to enable/disable unit tests.
+ * @note    Setting this flag will implicitely enable the shell.
+ */
+#if !defined(OS_CFG_TESTS_ENABLE)
+  #define AMIROOS_CFG_TESTS_ENABLE              true
+#else /* !defined(OS_CFG_TESTS_ENABLE) */
+  #define AMIROOS_CFG_TESTS_ENABLE              OS_CFG_TESTS_ENABLE
+#endif /* !defined(OS_CFG_TESTS_ENABLE) */
+
+/**
+ * @brief   Flag to enable/disable profiling API and logic.
+ */
+#if !defined(OS_CFG_PROFILE)
+  #define AMIROOS_CFG_PROFILE                   true
+#else /* !defined(OS_CFG_PROFILE) */
+  #define AMIROOS_CFG_PROFILE                   OS_CFG_PROFILE
+#endif /* !defined(OS_CFG_PROFILE) */
+
+/**
+ * @brief   Mask for the control thread to listen to certain IO events.
+ * @note    Any mandatory events (e.g. for SSSP) are enabled implicitely despite this configuration.
+ */
+#if !defined(OS_CFG_MAIN_LOOP_IOEVENT_MASK)
+  #define AMIROOS_CFG_MAIN_LOOP_IOEVENT_MASK    0
+#else /* !defined(OS_CFG_MAIN_LOOP_IOEVENT_MASK) */
+  #define AMIROOS_CFG_MAIN_LOOP_IOEVENT_MASK    OS_CFG_MAIN_LOOP_IOEVENT_MASK
+#endif /* !defined(OS_CFG_MAIN_LOOP_IOEVENT_MASK) */
+
+/**
+ * @brief   Timeout value when waiting for events in the main loop in microseconds.
+ * @details A value of 0 deactivates the timeout.
+ */
+#if !defined(OS_CFG_MAIN_LOOP_TIMEOUT)
+  #define AMIROOS_CFG_MAIN_LOOP_TIMEOUT         0
+#else /* !defined(OS_CFG_MAIN_LOOP_TIMEOUT) */
+  #define AMIROOS_CFG_MAIN_LOOP_TIMEOUT         OS_CFG_MAIN_LOOP_TIMEOUT
+#endif /* !defined(OS_CFG_MAIN_LOOP_TIMEOUT) */
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name SSSP (Startup Shutdown Synchronization Protocol) configuration.
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Flag to enable SSSP.
+ */
+#if !defined(OS_CFG_SSSP_ENABLE)
+  #define AMIROOS_CFG_SSSP_ENABLE               true
+#else /* !defined(OS_CFG_SSSP_ENABLE) */
+  #define AMIROOS_CFG_SSSP_ENABLE               OS_CFG_SSSP_ENABLE
+#endif /* !defined(OS_CFG_SSSP_ENABLE) */
+
+/**
+ * @brief   Flag to set the module as SSSP master.
+ * @details There must be only one module with this flag set to true in a system.
+ */
+#if !defined(OS_CFG_SSSP_MASTER)
+  #define AMIROOS_CFG_SSSP_MASTER               true
+#else /* !defined(OS_CFG_SSSP_MASTER) */
+  #define AMIROOS_CFG_SSSP_MASTER               OS_CFG_SSSP_MASTER
+#endif /* !defined(OS_CFG_SSSP_MASTER) */
+
+/**
+ * @brief   Flag to set the module to be the first in the stack.
+ * @details There must be only one module with this flag set to true in a system.
+ */
+#if !defined(OS_CFG_SSSP_STACK_START)
+  #define AMIROOS_CFG_SSSP_STACK_START          false
+#else /* !defined(OS_CFG_SSSP_STACK_START) */
+  #define AMIROOS_CFG_SSSP_STACK_START          OS_CFG_SSSP_STACK_START
+#endif /* !defined(OS_CFG_SSSP_STACK_START) */
+
+/**
+ * @brief   Flag to set the module to be the last in the stack.
+ * @details There must be only one module with this flag set to true in a system.
+ */
+#if !defined(OS_CFG_SSSP_STACK_END)
+  #define AMIROOS_CFG_SSSP_STACK_END            false
+#else /* !defined(OS_CFG_SSSP_STACK_END) */
+  #define AMIROOS_CFG_SSSP_STACK_END            OS_CFG_SSSP_STACK_END
+#endif /* !defined(OS_CFG_SSSP_STACK_END) */
+
+/**
+ * @brief   Delay time (in microseconds) how long a SSSP signal must be active.
+ */
+#if !defined(OS_CFG_SSSP_SIGNALDELAY)
+  #define AMIROOS_CFG_SSSP_SIGNALDELAY          1000
+#else /* !defined(OS_CFG_SSSP_SIGNALDELAY) */
+  #define AMIROOS_CFG_SSSP_SIGNALDELAY          OS_CFG_SSSP_SIGNALDELAY
+#endif /* !defined(OS_CFG_SSSP_SIGNALDELAY) */
+
+/**
+ * @brief   Time boundary for robot wide clock synchronization in microseconds.
+ * @details Whenever the SSSP S (snychronization) signal gets logically deactivated,
+ *          All modules need to align their local uptime to the nearest multiple of this value.
+ */
+#if !defined(OS_CFG_SSSP_SYSSYNCPERIOD)
+  #define AMIROOS_CFG_SSSP_SYSSYNCPERIOD        1000000
+#else /* !defined(OS_CFG_SSSP_SYSSYNCPERIOD) */
+  #define AMIROOS_CFG_SSSP_SYSSYNCPERIOD        OS_CFG_SSSP_SYSSYNCPERIOD
+#endif /* !defined(OS_CFG_SSSP_SYSSYNCPERIOD) */
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name System shell options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Shell enable flag.
+ */
+#if !defined(OS_CFG_SHELL_ENABLE)
+  #define AMIROOS_CFG_SHELL_ENABLE              true
+#else /* !defined(OS_CFG_SHELL_ENABLE) */
+  #define AMIROOS_CFG_SHELL_ENABLE              OS_CFG_SHELL_ENABLE
+#endif /* !defined(OS_CFG_SHELL_ENABLE) */
+
+/**
+ * @brief   Shell thread stack size.
+ */
+#if !defined(OS_CFG_SHELL_STACKSIZE)
+  #define AMIROOS_CFG_SHELL_STACKSIZE           1024
+#else /* !defined(OS_CFG_SHELL_STACKSIZE) */
+  #define AMIROOS_CFG_SHELL_STACKSIZE           OS_CFG_SHELL_STACKSIZE
+#endif /* !defined(OS_CFG_SHELL_STACKSIZE) */
+
+/**
+ * @brief   Shell thread priority.
+ * @details Thread priorities are specified as an integer value.
+ *          Predefined ranges are:
+ *            lowest  ┌ THD_LOWPRIO_MIN
+ *                    │ ...
+ *                    └ THD_LOWPRIO_MAX
+ *                    ┌ THD_NORMALPRIO_MIN
+ *                    │ ...
+ *                    └ THD_NORMALPRIO_MAX
+ *                    ┌ THD_HIGHPRIO_MIN
+ *                    │ ...
+ *                    └ THD_HIGHPRIO_MAX
+ *                    ┌ THD_RTPRIO_MIN
+ *                    │ ...
+ *            highest └ THD_RTPRIO_MAX
+ */
+#if !defined(OS_CFG_SHELL_THREADPRIO)
+  #define AMIROOS_CFG_SHELL_THREADPRIO          AOS_THD_NORMALPRIO_MIN
+#else /* !defined(OS_CFG_SHELL_THREADPRIO) */
+  #define AMIROOS_CFG_SHELL_THREADPRIO          OS_CFG_SHELL_THREADPRIO
+#endif /* !defined(OS_CFG_SHELL_THREADPRIO) */
+
+/**
+ * @brief   Shell maximum input line length.
+ */
+#if !defined(OS_CFG_SHELL_LINEWIDTH)
+  #define AMIROOS_CFG_SHELL_LINEWIDTH           128
+#else /* !defined(OS_CFG_SHELL_LINEWIDTH) */
+  #define AMIROOS_CFG_SHELL_LINEWIDTH           OS_CFG_SHELL_LINEWIDTH
+#endif /* !defined(OS_CFG_SHELL_LINEWIDTH) */
+
+/**
+ * @brief   Shell maximum number of arguments.
+ */
+#if !defined(OS_CFG_SHELL_MAXARGS)
+  #define AMIROOS_CFG_SHELL_MAXARGS             16
+#else /* !defined(OS_CFG_SHELL_MAXARGS) */
+  #define AMIROOS_CFG_SHELL_MAXARGS             OS_CFG_SHELL_MAXARGS
+#endif /* !defined(OS_CFG_SHELL_MAXARGS) */
+
+/** @} */
+
+#endif /* AOSCONF_H */
+
+/** @} */
diff --git a/modules/PowerManagement_1-2/board.c b/modules/PowerManagement_1-2/board.c
new file mode 100644
index 0000000..17468aa
--- /dev/null
+++ b/modules/PowerManagement_1-2/board.c
@@ -0,0 +1,154 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2019  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file
+ * @brief   PowerManagement v1.2 Board specific initializations.
+ *
+ * @addtogroup powermanagement_board
+ * @{
+ */
+
+#include <hal.h>
+#include <stm32_gpio.h>
+
+/**
+ * @brief   GPIO initialization.
+ *
+ * @param[in]   gpiop   GPIO register block.
+ * @param[in]   config  GPIO configuration.
+ */
+
+
+
+/**
+ * @brief   GPIO initialization.
+ *
+ * @param[in] gpiop     GPIO register block.
+ * @param[in] moder     Mode register configuration.
+ * @param[in] otyper    Otype register configuration.
+ * @param[in] ospeedr   Ospeed register configuration.
+ * @param[in] pupdr     Pupd register configuration.
+ * @param[in] odr       OD register configuration.
+ * @param[in] afrl      AF register (low) configuration.
+ * @param[in] afrh      AF register (high ) configuration.
+ * @param[in] ignmask   Mask to ignore individual pads.
+ */
+static void _gpio_init(stm32_gpio_t *gpiop,
+                      const uint32_t moder,
+                      const uint32_t otyper,
+                      const uint32_t ospeedr,
+                      const uint32_t pupdr,
+                      const uint32_t odr,
+                      const uint32_t afrl,
+                      const uint32_t afrh,
+                      const uint16_t ignmask) {
+
+  const uint8_t lut[] = {0x00, 0x03, 0x0C, 0x0F,
+                         0x30, 0x33, 0x3C, 0x3F,
+                         0xC0, 0xC3, 0xCC, 0xCF,
+                         0xF0, 0xF3, 0xFC, 0xFF};
+
+  /* some bit-magic to fan out the mask */
+  const uint32_t ignmask2 = (lut[(ignmask >> 12)       ] << 24) |
+                            (lut[(ignmask >>  8) & 0x0F] << 16) |
+                            (lut[(ignmask >>  4) & 0x0F] <<  8) |
+                            (lut[(ignmask      ) & 0x0F]);
+  const uint32_t ignmask4_low = (lut[lut[(ignmask >> 6) & 0x03]] << 24) |
+                                (lut[lut[(ignmask >> 4) & 0x03]] << 16) |
+                                (lut[lut[(ignmask >> 2) & 0x03]] <<  8) |
+                                (lut[lut[(ignmask     ) & 0x03]]);
+  const uint32_t ignmask4_high = (lut[lut[(ignmask >> 14)       ]] << 24) |
+                                 (lut[lut[(ignmask >> 12) & 0x03]] << 16) |
+                                 (lut[lut[(ignmask >> 10) & 0x03]] <<  8) |
+                                 (lut[lut[(ignmask >>  8) & 0x03]]);
+
+  gpiop->OTYPER  = (gpiop->OTYPER  & ignmask      ) | (otyper  & ~ignmask      );
+  gpiop->OSPEEDR = (gpiop->OSPEEDR & ignmask2     ) | (ospeedr & ~ignmask2     );
+  gpiop->PUPDR   = (gpiop->PUPDR   & ignmask2     ) | (pupdr   & ~ignmask2     );
+  gpiop->ODR     = (gpiop->ODR     & ignmask      ) | (odr     & ~ignmask      );
+  gpiop->AFRL    = (gpiop->AFRL    & ignmask4_low ) | (afrl    & ~ignmask4_low );
+  gpiop->AFRH    = (gpiop->AFRH    & ignmask4_high) | (afrh    & ~ignmask4_high);
+  gpiop->MODER   = (gpiop->MODER   & ignmask2     ) | (moder   & ~ignmask2     );
+}
+
+/**
+ * @brief   GPIO initilization for all ports.
+ */
+static void _stm32_gpio_init(void) {
+
+  /* Enabling GPIO-related clocks, the mask comes from the
+     registry header file.*/
+  rccResetAHB1(STM32_GPIO_EN_MASK);
+  rccEnableAHB1(STM32_GPIO_EN_MASK, true);
+
+  /* Initializing all the defined GPIO ports.*/
+#if STM32_HAS_GPIOA
+  _gpio_init(GPIOA, VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH, VAL_GPIOA_IGNORE);
+#endif
+#if STM32_HAS_GPIOB
+  _gpio_init(GPIOB, VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH, VAL_GPIOB_IGNORE);
+#endif
+#if STM32_HAS_GPIOC
+  _gpio_init(GPIOC, VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH, VAL_GPIOC_IGNORE);
+#endif
+#if STM32_HAS_GPIOD
+  _gpio_init(GPIOD, VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH, VAL_GPIOD_IGNORE);
+#endif
+#if STM32_HAS_GPIOE
+  _gpio_init(GPIOE, VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH, VAL_GPIOE_IGNORE);
+#endif
+#if STM32_HAS_GPIOF
+  _gpio_init(GPIOF, VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH, VAL_GPIOF_IGNORE);
+#endif
+#if STM32_HAS_GPIOG
+  _gpio_init(GPIOG, VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH, VAL_GPIOG_IGNORE);
+#endif
+#if STM32_HAS_GPIOH
+  _gpio_init(GPIOH, VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH, VAL_GPIOH_IGNORE);
+#endif
+#if STM32_HAS_GPIOI
+  _gpio_init(GPIOI, VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH, VAL_GPIOI_IGNORE);
+#endif
+#if STM32_HAS_GPIOJ
+  _gpio_init(GPIOJ, VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR, VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH, VAL_GPIOJ_IGNORE);
+#endif
+#if STM32_HAS_GPIOK
+  _gpio_init(GPIOK, VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR, VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH, VAL_GPIOK_IGNORE);
+#endif
+}
+
+/**
+ * @brief   Early initialization code.
+ * @details This initialization must be performed just after stack setup
+ *          and before any other initialization.
+ */
+void __early_init(void) {
+
+  _stm32_gpio_init();
+  stm32_clock_init();
+}
+
+/**
+ * @brief   Board-specific initialization code.
+ * @todo    Add your board-specific code, if any.
+ */
+void boardInit(void) {
+}
+
+/** @} */
diff --git a/modules/PowerManagement_1-2/board.h b/modules/PowerManagement_1-2/board.h
new file mode 100644
index 0000000..4b045b1
--- /dev/null
+++ b/modules/PowerManagement_1-2/board.h
@@ -0,0 +1,1412 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2019  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file
+ * @brief   PowerManagement v1.2 Board specific macros.
+ *
+ * @addtogroup powermanagement_board
+ * @{
+ */
+
+#ifndef BOARD_H
+#define BOARD_H
+
+/*
+ * Setup for AMiRo PowerManagement v1.2 board.
+ */
+
+/*
+ * Board identifier.
+ */
+#define BOARD_POWERMANAGEMENT_1_2
+#define BOARD_NAME                      "AMiRo PowerManagement v1.2"
+
+/*
+ * Board oscillators-related settings.
+ * NOTE: LSE not fitted.
+ */
+#if !defined(STM32_LSECLK)
+#define STM32_LSECLK                    0U
+#endif
+
+#if !defined(STM32_HSECLK)
+#define STM32_HSECLK                    8000000U
+#endif
+
+/*
+ * Board voltages.
+ * Required for performance limits calculation.
+ */
+#define STM32_VDD                       330U
+
+/*
+ * MCU type as defined in the ST header.
+ */
+#define STM32F405xx
+
+/*
+ * STM32F4 alternate function definitions
+ */
+#define STM32F4xx_AF_system             0U
+#define STM32F4xx_AF_TIM1to2            1U
+#define STM32F4xx_AF_TIM3to5            2U
+#define STM32F4xx_AF_TIM8to11           3U
+#define STM32F4xx_AF_I2C1to3            4U
+#define STM32F4xx_AF_SPI1to2            5U
+#define STM32F4xx_AF_SPI3               6U
+#define STM32F4xx_AF_USART1to3          7U
+#define STM32F4xx_AF_USART4to6          8U
+#define STM32F4xx_AF_CAN1to2_TIM12to14  9U
+#define STM32F4xx_AF_OTG_HSFS           10U
+#define STM32F4xx_AF_ETH                11U
+#define STM32F4xx_AF_FSMC_SDIO_OTGHS    12U
+#define STM32F4xx_AF_DCMI               13U
+#define STM32F4xx_AF_EVENTOUT           15U
+
+/*
+ * Identifiers for the several sensor rings, which can be attached to the PowerManagement v1.1 module.
+ */
+#define BOARD_NOSENSORRING              0
+#define BOARD_PROXIMITYSENSOR           1
+#define BOARD_DISTANCESENSOR_VL53L0X    2
+#define BOARD_DISTANCESENSOR_VL53L1X    3
+
+/*
+ * Configuration macro to define which type of sensor ring is attached.
+ */
+#define BOARD_SENSORRING                BOARD_PROXIMITYSENSOR
+
+/*
+ * IO pins assignments.
+ */
+#define GPIOA_WKUP                      0U
+#define GPIOA_SWITCH_STATUS_N           1U
+#define GPIOA_SYS_UART_TX               2U
+#define GPIOA_SYS_UART_RX               3U
+#define GPIOA_SYS_SPI_SS0_N             4U
+#define GPIOA_SYS_SPI_SCLK              5U
+#define GPIOA_SYS_SPI_MISO              6U
+#define GPIOA_SYS_SPI_MOSI              7U
+#define GPIOA_SYS_REG_EN                8U
+#define GPIOA_PROG_RX                   9U
+#define GPIOA_PROG_TX                   10U
+#define GPIOA_CAN_RX                    11U
+#define GPIOA_CAN_TX                    12U
+#define GPIOA_SWDIO                     13U
+#define GPIOA_SWCLK                     14U
+#define GPIOA_SYS_SPI_SS1_N             15U
+
+#define GPIOB_IR_INT1_N                 0U
+#define GPIOB_VSYS_SENSE                1U
+#define GPIOB_POWER_EN                  2U
+#define GPIOB_SYS_UART_DN               3U
+#define GPIOB_CHARGE_STAT2A             4U
+#define GPIOB_BUZZER                    5U
+#define GPIOB_GAUGE_BATLOW2             6U
+#define GPIOB_GAUGE_BATGD2_N            7U
+#define GPIOB_GAUGE_SCL2                8U
+#define GPIOB_GAUGE_SDA2                9U
+#define GPIOB_GAUGE_SCL1                10U
+#define GPIOB_GAUGE_SDA1                11U
+#define GPIOB_LED                       12U
+#define GPIOB_BT_RTS                    13U
+#define GPIOB_BT_CTS                    14U
+#define GPIOB_SYS_UART_UP               15U
+
+#define GPIOC_CHARGE_STAT1A             0U
+#define GPIOC_GAUGE_BATLOW1             1U
+#define GPIOC_GAUGE_BATGD1_N            2U
+#define GPIOC_CHARGE_EN1_N              3U
+#define GPIOC_IR_INT2_N                 4U
+#define GPIOC_TOUCH_INT_N               5U
+#define GPIOC_SYS_DONE                  6U
+#define GPIOC_SYS_PROG_N                7U
+#define GPIOC_PATH_DC                   8U
+#define GPIOC_SYS_SPI_DIR               9U
+#define GPIOC_BT_RX                     10U
+#define GPIOC_BT_TX                     11U
+#define GPIOC_SYS_INT_N                 12U
+#define GPIOC_SYS_PD_N                  13U
+#define GPIOC_SYS_WARMRST_N             14U
+#define GPIOC_BT_RST                    15U
+
+#define GPIOD_PIN0                      0U
+#define GPIOD_PIN1                      1U
+#define GPIOD_CHARGE_EN2_N              2U
+#define GPIOD_PIN3                      3U
+#define GPIOD_PIN4                      4U
+#define GPIOD_PIN5                      5U
+#define GPIOD_PIN6                      6U
+#define GPIOD_PIN7                      7U
+#define GPIOD_PIN8                      8U
+#define GPIOD_PIN9                      9U
+#define GPIOD_PIN10                     10U
+#define GPIOD_PIN11                     11U
+#define GPIOD_PIN12                     12U
+#define GPIOD_PIN13                     13U
+#define GPIOD_PIN14                     14U
+#define GPIOD_PIN15                     15U
+
+#define GPIOE_PIN0                      0U
+#define GPIOE_PIN1                      1U
+#define GPIOE_PIN2                      2U
+#define GPIOE_PIN3                      3U
+#define GPIOE_PIN4                      4U
+#define GPIOE_PIN5                      5U
+#define GPIOE_PIN6                      6U
+#define GPIOE_PIN7                      7U
+#define GPIOE_PIN8                      8U
+#define GPIOE_PIN9                      9U
+#define GPIOE_PIN10                     10U
+#define GPIOE_PIN11                     11U
+#define GPIOE_PIN12                     12U
+#define GPIOE_PIN13                     13U
+#define GPIOE_PIN14                     14U
+#define GPIOE_PIN15                     15U
+
+#define GPIOF_PIN0                      0U
+#define GPIOF_PIN1                      1U
+#define GPIOF_PIN2                      2U
+#define GPIOF_PIN3                      3U
+#define GPIOF_PIN4                      4U
+#define GPIOF_PIN5                      5U
+#define GPIOF_PIN6                      6U
+#define GPIOF_PIN7                      7U
+#define GPIOF_PIN8                      8U
+#define GPIOF_PIN9                      9U
+#define GPIOF_PIN10                     10U
+#define GPIOF_PIN11                     11U
+#define GPIOF_PIN12                     12U
+#define GPIOF_PIN13                     13U
+#define GPIOF_PIN14                     14U
+#define GPIOF_PIN15                     15U
+
+#define GPIOG_PIN0                      0U
+#define GPIOG_PIN1                      1U
+#define GPIOG_PIN2                      2U
+#define GPIOG_PIN3                      3U
+#define GPIOG_PIN4                      4U
+#define GPIOG_PIN5                      5U
+#define GPIOG_PIN6                      6U
+#define GPIOG_PIN7                      7U
+#define GPIOG_PIN8                      8U
+#define GPIOG_PIN9                      9U
+#define GPIOG_PIN10                     10U
+#define GPIOG_PIN11                     11U
+#define GPIOG_PIN12                     12U
+#define GPIOG_PIN13                     13U
+#define GPIOG_PIN14                     14U
+#define GPIOG_PIN15                     15U
+
+#define GPIOH_OSC_IN                    0U
+#define GPIOH_OSC_OUT                   1U
+#define GPIOH_PIN2                      2U
+#define GPIOH_PIN3                      3U
+#define GPIOH_PIN4                      4U
+#define GPIOH_PIN5                      5U
+#define GPIOH_PIN6                      6U
+#define GPIOH_PIN7                      7U
+#define GPIOH_PIN8                      8U
+#define GPIOH_PIN9                      9U
+#define GPIOH_PIN10                     10U
+#define GPIOH_PIN11                     11U
+#define GPIOH_PIN12                     12U
+#define GPIOH_PIN13                     13U
+#define GPIOH_PIN14                     14U
+#define GPIOH_PIN15                     15U
+
+#define GPIOI_PIN0                      0U
+#define GPIOI_PIN1                      1U
+#define GPIOI_PIN2                      2U
+#define GPIOI_PIN3                      3U
+#define GPIOI_PIN4                      4U
+#define GPIOI_PIN5                      5U
+#define GPIOI_PIN6                      6U
+#define GPIOI_PIN7                      7U
+#define GPIOI_PIN8                      8U
+#define GPIOI_PIN9                      9U
+#define GPIOI_PIN10                     10U
+#define GPIOI_PIN11                     11U
+#define GPIOI_PIN12                     12U
+#define GPIOI_PIN13                     13U
+#define GPIOI_PIN14                     14U
+#define GPIOI_PIN15                     15U
+
+/*
+ * IO lines assignments.
+ */
+#define LINE_WKUP                       PAL_LINE(GPIOA, GPIOA_WKUP)
+#define LINE_SWITCH_STATUS_N            PAL_LINE(GPIOA, GPIOA_SWITCH_STATUS_N)
+#define LINE_SYS_UART_TX                PAL_LINE(GPIOA, GPIOA_SYS_UART_TX)
+#define LINE_SYS_UART_RX                PAL_LINE(GPIOA, GPIOA_SYS_UART_RX)
+#define LINE_SYS_SPI_SS0_N              PAL_LINE(GPIOA, GPIOA_SYS_SPI_SS0_N)
+#define LINE_SYS_SPI_SCLK               PAL_LINE(GPIOA, GPIOA_SYS_SPI_SCLK)
+#define LINE_SYS_SPI_MISO               PAL_LINE(GPIOA, GPIOA_SYS_SPI_MISO)
+#define LINE_SYS_SPI_MOSI               PAL_LINE(GPIOA, GPIOA_SYS_SPI_MOSI)
+#define LINE_SYS_REG_EN                 PAL_LINE(GPIOA, GPIOA_SYS_REG_EN)
+#define LINE_PROG_RX                    PAL_LINE(GPIOA, GPIOA_PROG_RX)
+#define LINE_PROG_TX                    PAL_LINE(GPIOA, GPIOA_PROG_TX)
+#define LINE_CAN_RX                     PAL_LINE(GPIOA, GPIOA_CAN_RX)
+#define LINE_CAN_TX                     PAL_LINE(GPIOA, GPIOA_CAN_TX)
+#define LINE_SWDIO                      PAL_LINE(GPIOA, GPIOA_SWDIO)
+#define LINE_SWCLK                      PAL_LINE(GPIOA, GPIOA_SWCLK)
+#define LINE_SYS_SPI_SS1_N              PAL_LINE(GPIOA, GPIOA_SYS_SPI_SS1_N)
+
+#define LINE_IR_INT1_N                  PAL_LINE(GPIOB, GPIOB_IR_INT1_N)
+#define LINE_VSYS_SENSE                 PAL_LINE(GPIOB, GPIOB_VSYS_SENSE)
+#define LINE_POWER_EN                   PAL_LINE(GPIOB, GPIOB_POWER_EN)
+#define LINE_SYS_UART_DN                PAL_LINE(GPIOB, GPIOB_SYS_UART_DN)
+#define LINE_CHARGE_STAT2A              PAL_LINE(GPIOB, GPIOB_CHARGE_STAT2A)
+#define LINE_BUZZER                     PAL_LINE(GPIOB, GPIOB_BUZZER)
+#define LINE_GAUGE_BATLOW2              PAL_LINE(GPIOB, GPIOB_GAUGE_BATLOW2)
+#define LINE_GAUGE_BATGD2_N             PAL_LINE(GPIOB, GPIOB_GAUGE_BATGD2_N)
+#define LINE_GAUGE_SCL2                 PAL_LINE(GPIOB, GPIOB_GAUGE_SCL2)
+#define LINE_GAUGE_SDA2                 PAL_LINE(GPIOB, GPIOB_GAUGE_SDA2)
+#define LINE_GAUGE_SCL1                 PAL_LINE(GPIOB, GPIOB_GAUGE_SCL1)
+#define LINE_GAUGE_SDA1                 PAL_LINE(GPIOB, GPIOB_GAUGE_SDA1)
+#define LINE_LED                        PAL_LINE(GPIOB, GPIOB_LED)
+#define LINE_BT_RTS                     PAL_LINE(GPIOB, GPIOB_BT_RTS)
+#define LINE_BT_CTS                     PAL_LINE(GPIOB, GPIOB_BT_CTS)
+#define LINE_SYS_UART_UP                PAL_LINE(GPIOB, GPIOB_SYS_UART_UP)
+
+#define LINE_CHARGE_STAT1A              PAL_LINE(GPIOC, GPIOC_CHARGE_STAT1A)
+#define LINE_GAUGE_BATLOW1              PAL_LINE(GPIOC, GPIOC_GAUGE_BATLOW1)
+#define LINE_GAUGE_BATGD1_N             PAL_LINE(GPIOC, GPIOC_GAUGE_BATGD1_N)
+#define LINE_CHARGE_EN1_N               PAL_LINE(GPIOC, GPIOC_CHARGE_EN1_N)
+#define LINE_IR_INT2_N                  PAL_LINE(GPIOC, GPIOC_IR_INT2_N)
+#define LINE_TOUCH_INT_N                PAL_LINE(GPIOC, GPIOC_TOUCH_INT_N)
+#define LINE_SYS_DONE                   PAL_LINE(GPIOC, GPIOC_SYS_DONE)
+#define LINE_SYS_PROG_N                 PAL_LINE(GPIOC, GPIOC_SYS_PROG_N)
+#define LINE_PATH_DC                    PAL_LINE(GPIOC, GPIOC_PATH_DC)
+#define LINE_SYS_SPI_DIR                PAL_LINE(GPIOC, GPIOC_SYS_SPI_DIR)
+#define LINE_BT_RX                      PAL_LINE(GPIOC, GPIOC_BT_RX)
+#define LINE_BT_TX                      PAL_LINE(GPIOC, GPIOC_BT_TX)
+#define LINE_SYS_INT_N                  PAL_LINE(GPIOC, GPIOC_SYS_INT_N)
+#define LINE_SYS_PD_N                   PAL_LINE(GPIOC, GPIOC_SYS_PD_N)
+#define LINE_SYS_WARMRST_N              PAL_LINE(GPIOC, GPIOC_SYS_WARMRST_N)
+#define LINE_BT_RST                     PAL_LINE(GPIOC, GPIOC_BT_RST)
+
+#define LINE_CHARGE_EN2_N               PAL_LINE(GPIOD, GPIOD_CHARGE_EN2_N)
+
+#define LINE_OSC_IN                     PAL_LINE(GPIOH, 0U)
+#define LINE_OSC_OUT                    PAL_LINE(GPIOH, 1U)
+
+/*
+ * I/O ports initial setup, this configuration is established soon after reset
+ * in the initialization code.
+ * Please refer to the STM32 Reference Manual for details.
+ */
+#define PIN_IGNORE(n)                   (1U << (n))
+#define PIN_MODE_INPUT(n)               (0U << ((n) * 2U))
+#define PIN_MODE_OUTPUT(n)              (1U << ((n) * 2U))
+#define PIN_MODE_ALTERNATE(n)           (2U << ((n) * 2U))
+#define PIN_MODE_ANALOG(n)              (3U << ((n) * 2U))
+#define PIN_ODR_LOW(n)                  (0U << (n))
+#define PIN_ODR_HIGH(n)                 (1U << (n))
+#define PIN_OTYPE_PUSHPULL(n)           (0U << (n))
+#define PIN_OTYPE_OPENDRAIN(n)          (1U << (n))
+#define PIN_OSPEED_LOW(n)               (0U << ((n) * 2U))
+#define PIN_OSPEED_MEDIUM(n)            (1U << ((n) * 2U))
+#define PIN_OSPEED_HIGH(n)              (2U << ((n) * 2U))
+#define PIN_OSPEED_VERYHIGH(n)          (3U << ((n) * 2U))
+#define PIN_PUPDR_FLOATING(n)           (0U << ((n) * 2U))
+#define PIN_PUPDR_PULLUP(n)             (1U << ((n) * 2U))
+#define PIN_PUPDR_PULLDOWN(n)           (2U << ((n) * 2U))
+#define PIN_AFIO_AF(n, v)               ((v) << (((n) % 8U) * 4U))
+
+/*
+ * GPIOA setup:
+ *
+ * PA0  - WKUP                          (input floating)
+ * PA1  - SWITCH_STATUS_N               (input floating)
+ * PA2  - SYS_UART_TX                   (input floating)
+ * PA3  - SYS_UART_RX                   (alternate 7 pushpull floating)
+ * PA4  - SYS_SPI_SS0_N                 (input floating)
+ * PA5  - SYS_SPI_SCLK                  (alternate 5 pushpull floating)
+ * PA6  - SYS_SPI_MISO                  (alternate 5 pushpull floating)
+ * PA7  - SYS_SPI_MOSI                  (alternate 5 pushpull floating)
+ * PA8  - SYS_REG_EN                    (output pushpull high)
+ * PA9  - PROG_RX                       (alternate 7 pushpull floating)
+ * PA10 - PROG_TX                       (alternate 7 pushpull pullup)
+ * PA11 - CAN_RX                        (alternate 9 pushpull floating)
+ * PA12 - CAN_TX                        (alternate 9 pushpull floating)
+ * PA13 - SWDIO                         (alternate 0 pushpull floating)
+ * PA14 - SWCLK                         (alternate 0 pushpull floating)
+ * PA15 - SYS_SPI_SS1_N                 (input floating)
+ */
+#define VAL_GPIOA_IGNORE                0
+#define VAL_GPIOA_MODER                 (PIN_MODE_INPUT(GPIOA_WKUP) |                                 \
+                                         PIN_MODE_INPUT(GPIOA_SWITCH_STATUS_N) |                      \
+                                         PIN_MODE_INPUT(GPIOA_SYS_UART_TX) |                          \
+                                         PIN_MODE_ALTERNATE(GPIOA_SYS_UART_RX) |                      \
+                                         PIN_MODE_INPUT(GPIOA_SYS_SPI_SS0_N) |                        \
+                                         PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_SCLK) |                     \
+                                         PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MISO) |                     \
+                                         PIN_MODE_ALTERNATE(GPIOA_SYS_SPI_MOSI) |                     \
+                                         PIN_MODE_OUTPUT(GPIOA_SYS_REG_EN) |                          \
+                                         PIN_MODE_ALTERNATE(GPIOA_PROG_RX) |                          \
+                                         PIN_MODE_ALTERNATE(GPIOA_PROG_TX) |                          \
+                                         PIN_MODE_ALTERNATE(GPIOA_CAN_RX) |                           \
+                                         PIN_MODE_ALTERNATE(GPIOA_CAN_TX) |                           \
+                                         PIN_MODE_ALTERNATE(GPIOA_SWDIO) |                            \
+                                         PIN_MODE_ALTERNATE(GPIOA_SWCLK) |                            \
+                                         PIN_MODE_INPUT(GPIOA_SYS_SPI_SS1_N))
+#define VAL_GPIOA_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOA_WKUP) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SWITCH_STATUS_N) |                  \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_UART_TX) |                      \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_UART_RX) |                      \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SS0_N) |                    \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SCLK) |                     \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_MISO) |                     \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_MOSI) |                     \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_REG_EN) |                       \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_PROG_RX) |                          \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_PROG_TX) |                          \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_CAN_RX) |                           \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_CAN_TX) |                           \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOA_SYS_SPI_SS1_N))
+#define VAL_GPIOA_OSPEEDR               (PIN_OSPEED_VERYHIGH(GPIOA_WKUP) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SWITCH_STATUS_N) |                 \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_UART_TX) |                     \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_UART_RX) |                     \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SS0_N) |                   \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SCLK) |                    \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_MISO) |                    \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_MOSI) |                    \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_REG_EN) |                      \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_PROG_RX) |                         \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_PROG_TX) |                         \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_CAN_RX) |                          \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_CAN_TX) |                          \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SWDIO) |                           \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SWCLK) |                           \
+                                         PIN_OSPEED_VERYHIGH(GPIOA_SYS_SPI_SS1_N))
+#define VAL_GPIOA_PUPDR                 (PIN_PUPDR_FLOATING(GPIOA_WKUP) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOA_SWITCH_STATUS_N) |                  \
+                                         PIN_PUPDR_FLOATING(GPIOA_SYS_UART_TX) |                      \
+                                         PIN_PUPDR_FLOATING(GPIOA_SYS_UART_RX) |                      \
+                                         PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SS0_N) |                    \
+                                         PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SCLK) |                     \
+                                         PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_MISO) |                     \
+                                         PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_MOSI) |                     \
+                                         PIN_PUPDR_FLOATING(GPIOA_SYS_REG_EN) |                       \
+                                         PIN_PUPDR_FLOATING(GPIOA_PROG_RX) |                          \
+                                         PIN_PUPDR_PULLUP(GPIOA_PROG_TX) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOA_CAN_RX) |                           \
+                                         PIN_PUPDR_FLOATING(GPIOA_CAN_TX) |                           \
+                                         PIN_PUPDR_FLOATING(GPIOA_SWDIO) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOA_SWCLK) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOA_SYS_SPI_SS1_N))
+#define VAL_GPIOA_ODR                   (PIN_ODR_HIGH(GPIOA_WKUP) |                                   \
+                                         PIN_ODR_HIGH(GPIOA_SWITCH_STATUS_N) |                        \
+                                         PIN_ODR_HIGH(GPIOA_SYS_UART_TX) |                            \
+                                         PIN_ODR_HIGH(GPIOA_SYS_UART_RX) |                            \
+                                         PIN_ODR_HIGH(GPIOA_SYS_SPI_SS0_N) |                          \
+                                         PIN_ODR_HIGH(GPIOA_SYS_SPI_SCLK) |                           \
+                                         PIN_ODR_HIGH(GPIOA_SYS_SPI_MISO) |                           \
+                                         PIN_ODR_HIGH(GPIOA_SYS_SPI_MOSI) |                           \
+                                         PIN_ODR_HIGH(GPIOA_SYS_REG_EN) |                             \
+                                         PIN_ODR_HIGH(GPIOA_PROG_RX) |                                \
+                                         PIN_ODR_HIGH(GPIOA_PROG_TX) |                                \
+                                         PIN_ODR_HIGH(GPIOA_CAN_RX) |                                 \
+                                         PIN_ODR_HIGH(GPIOA_CAN_TX) |                                 \
+                                         PIN_ODR_HIGH(GPIOA_SWDIO) |                                  \
+                                         PIN_ODR_HIGH(GPIOA_SWCLK) |                                  \
+                                         PIN_ODR_HIGH(GPIOA_SYS_SPI_SS1_N))
+#define VAL_GPIOA_AFRL                  (PIN_AFIO_AF(GPIOA_WKUP, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOA_SWITCH_STATUS_N, STM32F4xx_AF_system) |    \
+                                         PIN_AFIO_AF(GPIOA_SYS_UART_TX, STM32F4xx_AF_USART1to3) |     \
+                                         PIN_AFIO_AF(GPIOA_SYS_UART_RX, STM32F4xx_AF_USART1to3) |     \
+                                         PIN_AFIO_AF(GPIOA_SYS_SPI_SS0_N, STM32F4xx_AF_system) |      \
+                                         PIN_AFIO_AF(GPIOA_SYS_SPI_SCLK, STM32F4xx_AF_SPI1to2) |      \
+                                         PIN_AFIO_AF(GPIOA_SYS_SPI_MISO, STM32F4xx_AF_SPI1to2) |      \
+                                         PIN_AFIO_AF(GPIOA_SYS_SPI_MOSI, STM32F4xx_AF_SPI1to2))
+#define VAL_GPIOA_AFRH                  (PIN_AFIO_AF(GPIOA_SYS_REG_EN, STM32F4xx_AF_system) |         \
+                                         PIN_AFIO_AF(GPIOA_PROG_RX, STM32F4xx_AF_USART1to3) |         \
+                                         PIN_AFIO_AF(GPIOA_PROG_TX, STM32F4xx_AF_USART1to3) |         \
+                                         PIN_AFIO_AF(GPIOA_CAN_RX, STM32F4xx_AF_CAN1to2_TIM12to14) |  \
+                                         PIN_AFIO_AF(GPIOA_CAN_TX, STM32F4xx_AF_CAN1to2_TIM12to14) |  \
+                                         PIN_AFIO_AF(GPIOA_SWDIO, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOA_SWCLK, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOA_SYS_SPI_SS1_N, STM32F4xx_AF_system))
+
+/*
+ * GPIOB setup:
+ *
+ * PB0  - IR_INT1_N                     (input floating)
+ * PB1  - VSYS_SENSE                    (analog)
+ * PB2  - POWER_EN                      (output pushpull high)
+ * PB3  - SYS_UART_DN                   (output opendrain high)
+ * PB4  - CHARGE_STAT2A                 (inout floating)
+ * PB5  - BUZZER                        (alternate 2 pushpull floating)
+ * PB6  - GAUGE_BATLOW2                 (input floating)
+ * PB7  - GAUGE_BATGD2_N                (input floating)
+ * PB8  - GAUGE_SCL2                    (alternate 4 opendrain floating)
+ * PB9  - GAUGE_SDA2                    (alternate 4 opendrain floating)
+ * PB10 - GAUGE_SCL1                    (alternate 4 opendrain floating)
+ * PB11 - GAUGE_SDA1                    (alternate 4 opendrain floating)
+ * PB12 - LED                           (output opendrain high)
+ * PB13 - BT_RTS                        (alternate 7 pushpull floating)
+ * PB14 - BT_CTS                        (inout floating)
+ * PB15 - SYS_UART_UP                   (output opendrain high)
+ */
+#define VAL_GPIOB_IGNORE                (PIN_IGNORE(GPIOB_POWER_EN) |                                 \
+                                         PIN_IGNORE(GPIOB_SYS_UART_DN) |                              \
+                                         PIN_IGNORE(GPIOB_LED) |                                      \
+                                         PIN_IGNORE(GPIOB_SYS_UART_UP)) & 0
+#define VAL_GPIOB_MODER                 (PIN_MODE_INPUT(GPIOB_IR_INT1_N) |                            \
+                                         PIN_MODE_ANALOG(GPIOB_VSYS_SENSE) |                          \
+                                         PIN_MODE_OUTPUT(GPIOB_POWER_EN) |                            \
+                                         PIN_MODE_OUTPUT(GPIOB_SYS_UART_DN) |                         \
+                                         PIN_MODE_INPUT(GPIOB_CHARGE_STAT2A) |                        \
+                                         PIN_MODE_ALTERNATE(GPIOB_BUZZER) |                           \
+                                         PIN_MODE_INPUT(GPIOB_GAUGE_BATLOW2) |                        \
+                                         PIN_MODE_INPUT(GPIOB_GAUGE_BATGD2_N) |                       \
+                                         PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL2) |                       \
+                                         PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA2) |                       \
+                                         PIN_MODE_ALTERNATE(GPIOB_GAUGE_SCL1) |                       \
+                                         PIN_MODE_ALTERNATE(GPIOB_GAUGE_SDA1) |                       \
+                                         PIN_MODE_OUTPUT(GPIOB_LED) |                                 \
+                                         PIN_MODE_ALTERNATE(GPIOB_BT_RTS) |                           \
+                                         PIN_MODE_INPUT(GPIOB_BT_CTS) |                               \
+                                         PIN_MODE_OUTPUT(GPIOB_SYS_UART_UP))
+#define VAL_GPIOB_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOB_IR_INT1_N) |                        \
+                                         PIN_OTYPE_PUSHPULL(GPIOB_VSYS_SENSE) |                       \
+                                         PIN_OTYPE_PUSHPULL(GPIOB_POWER_EN) |                         \
+                                         PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_DN) |                     \
+                                         PIN_OTYPE_PUSHPULL(GPIOB_CHARGE_STAT2A) |                    \
+                                         PIN_OTYPE_PUSHPULL(GPIOB_BUZZER) |                           \
+                                         PIN_OTYPE_PUSHPULL(GPIOB_GAUGE_BATLOW2) |                    \
+                                         PIN_OTYPE_PUSHPULL(GPIOB_GAUGE_BATGD2_N) |                   \
+                                         PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL2) |                      \
+                                         PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA2) |                      \
+                                         PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SCL1) |                      \
+                                         PIN_OTYPE_OPENDRAIN(GPIOB_GAUGE_SDA1) |                      \
+                                         PIN_OTYPE_OPENDRAIN(GPIOB_LED) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOB_BT_RTS) |                           \
+                                         PIN_OTYPE_PUSHPULL(GPIOB_BT_CTS) |                           \
+                                         PIN_OTYPE_OPENDRAIN(GPIOB_SYS_UART_UP))
+#define VAL_GPIOB_OSPEEDR               (PIN_OSPEED_VERYHIGH(GPIOB_IR_INT1_N) |                       \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_VSYS_SENSE) |                      \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_POWER_EN) |                        \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_SYS_UART_DN) |                     \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_CHARGE_STAT2A) |                   \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_BUZZER) |                          \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_BATLOW2) |                   \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_BATGD2_N) |                  \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SCL2) |                      \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SDA2) |                      \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SCL1) |                      \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_GAUGE_SDA1) |                      \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_LED) |                             \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_BT_RTS) |                          \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_BT_CTS) |                          \
+                                         PIN_OSPEED_VERYHIGH(GPIOB_SYS_UART_UP))
+#define VAL_GPIOB_PUPDR                 (PIN_PUPDR_FLOATING(GPIOB_IR_INT1_N) |                        \
+                                         PIN_PUPDR_FLOATING(GPIOB_VSYS_SENSE) |                       \
+                                         PIN_PUPDR_FLOATING(GPIOB_POWER_EN) |                         \
+                                         PIN_PUPDR_FLOATING(GPIOB_SYS_UART_DN) |                      \
+                                         PIN_PUPDR_FLOATING(GPIOB_CHARGE_STAT2A) |                    \
+                                         PIN_PUPDR_FLOATING(GPIOB_BUZZER) |                           \
+                                         PIN_PUPDR_FLOATING(GPIOB_GAUGE_BATLOW2) |                    \
+                                         PIN_PUPDR_FLOATING(GPIOB_GAUGE_BATGD2_N) |                   \
+                                         PIN_PUPDR_FLOATING(GPIOB_GAUGE_SCL2) |                       \
+                                         PIN_PUPDR_FLOATING(GPIOB_GAUGE_SDA2) |                       \
+                                         PIN_PUPDR_FLOATING(GPIOB_GAUGE_SCL1) |                       \
+                                         PIN_PUPDR_FLOATING(GPIOB_GAUGE_SDA1) |                       \
+                                         PIN_PUPDR_FLOATING(GPIOB_LED) |                              \
+                                         PIN_PUPDR_FLOATING(GPIOB_BT_RTS) |                           \
+                                         PIN_PUPDR_FLOATING(GPIOB_BT_CTS) |                           \
+                                         PIN_PUPDR_FLOATING(GPIOB_SYS_UART_UP))
+#define VAL_GPIOB_ODR                   (PIN_ODR_HIGH(GPIOB_IR_INT1_N) |                              \
+                                         PIN_ODR_HIGH(GPIOB_VSYS_SENSE) |                             \
+                                         PIN_ODR_HIGH(GPIOB_POWER_EN) |                               \
+                                         PIN_ODR_HIGH(GPIOB_SYS_UART_DN) |                            \
+                                         PIN_ODR_HIGH(GPIOB_CHARGE_STAT2A) |                          \
+                                         PIN_ODR_HIGH(GPIOB_BUZZER) |                                 \
+                                         PIN_ODR_HIGH(GPIOB_GAUGE_BATLOW2) |                          \
+                                         PIN_ODR_HIGH(GPIOB_GAUGE_BATGD2_N) |                         \
+                                         PIN_ODR_HIGH(GPIOB_GAUGE_SCL2) |                             \
+                                         PIN_ODR_HIGH(GPIOB_GAUGE_SDA2) |                             \
+                                         PIN_ODR_HIGH(GPIOB_GAUGE_SCL1) |                             \
+                                         PIN_ODR_HIGH(GPIOB_GAUGE_SDA1) |                             \
+                                         PIN_ODR_HIGH(GPIOB_LED) |                                    \
+                                         PIN_ODR_HIGH(GPIOB_BT_RTS) |                                 \
+                                         PIN_ODR_HIGH(GPIOB_BT_CTS) |                                 \
+                                         PIN_ODR_HIGH(GPIOB_SYS_UART_UP))
+#define VAL_GPIOB_AFRL                  (PIN_AFIO_AF(GPIOB_IR_INT1_N, STM32F4xx_AF_system) |          \
+                                         PIN_AFIO_AF(GPIOB_VSYS_SENSE, STM32F4xx_AF_system) |         \
+                                         PIN_AFIO_AF(GPIOB_POWER_EN, STM32F4xx_AF_system) |           \
+                                         PIN_AFIO_AF(GPIOB_SYS_UART_DN, STM32F4xx_AF_system) |        \
+                                         PIN_AFIO_AF(GPIOB_CHARGE_STAT2A, STM32F4xx_AF_system) |      \
+                                         PIN_AFIO_AF(GPIOB_BUZZER, STM32F4xx_AF_TIM3to5) |            \
+                                         PIN_AFIO_AF(GPIOB_GAUGE_BATLOW2, STM32F4xx_AF_system) |      \
+                                         PIN_AFIO_AF(GPIOB_GAUGE_BATGD2_N, STM32F4xx_AF_system))
+#define VAL_GPIOB_AFRH                  (PIN_AFIO_AF(GPIOB_GAUGE_SCL2, STM32F4xx_AF_I2C1to3) |        \
+                                         PIN_AFIO_AF(GPIOB_GAUGE_SDA2, STM32F4xx_AF_I2C1to3) |        \
+                                         PIN_AFIO_AF(GPIOB_GAUGE_SCL1, STM32F4xx_AF_I2C1to3) |        \
+                                         PIN_AFIO_AF(GPIOB_GAUGE_SDA1, STM32F4xx_AF_I2C1to3) |        \
+                                         PIN_AFIO_AF(GPIOB_LED, STM32F4xx_AF_system) |                \
+                                         PIN_AFIO_AF(GPIOB_BT_RTS, STM32F4xx_AF_USART1to3) |          \
+                                         PIN_AFIO_AF(GPIOB_BT_CTS, STM32F4xx_AF_USART1to3) |          \
+                                         PIN_AFIO_AF(GPIOB_SYS_UART_UP, STM32F4xx_AF_system))
+
+/*
+ * GPIOC setup:
+ *
+ * PC0  - CHARGE_STAT1A                 (input floating)
+ * PC1  - GAUGE_BATLOW1                 (input floating)
+ * PC2  - GAUGE_BATGD1_N                (input floating)
+ * PC3  - CHARGE_EN1_N                  (output opendrain high)
+ * PC4  - IR_INT2_N                     (input floating)
+ * PC5  - TOUCH_INT_N                   (input floating)
+ * PC6  - SYS_DONE                      (input floating)
+ * PC7  - SYS_PROG_N                    (output opendrain high)
+ * PC8  - PATH_DC                       (input floating)
+ * PC9  - SYS_SPI_DIR                   (output opendrain high)
+ * PC10 - BT_RX                         (alternate 7 pushpull floating)
+ * PC11 - BT_TX                         (alternate 7 pushpull floating)
+ * PC12 - SYS_INT_N                     (output opendrain low)
+ * PC13 - SYS_PD_N                      (output opendrain high)
+ * PC14 - SYS_WARMRST_N                 (output opendrain high)
+ * PC15 - BT_RST                        (output opendrain high)
+ */
+#define VAL_GPIOC_IGNORE                (PIN_IGNORE(GPIOC_CHARGE_EN1_N) |                             \
+                                         PIN_IGNORE(GPIOC_SYS_INT_N) |                                \
+                                         PIN_IGNORE(GPIOC_SYS_PD_N)) & 0
+#define VAL_GPIOC_MODER                 (PIN_MODE_INPUT(GPIOC_CHARGE_STAT1A) |                        \
+                                         PIN_MODE_INPUT(GPIOC_GAUGE_BATLOW1) |                        \
+                                         PIN_MODE_INPUT(GPIOC_GAUGE_BATGD1_N) |                       \
+                                         PIN_MODE_OUTPUT(GPIOC_CHARGE_EN1_N) |                        \
+                                         PIN_MODE_INPUT(GPIOC_IR_INT2_N) |                            \
+                                         PIN_MODE_INPUT(GPIOC_TOUCH_INT_N) |                          \
+                                         PIN_MODE_INPUT(GPIOC_SYS_DONE) |                             \
+                                         PIN_MODE_OUTPUT(GPIOC_SYS_PROG_N) |                          \
+                                         PIN_MODE_INPUT(GPIOC_PATH_DC) |                              \
+                                         PIN_MODE_OUTPUT(GPIOC_SYS_SPI_DIR) |                         \
+                                         PIN_MODE_ALTERNATE(GPIOC_BT_RX) |                            \
+                                         PIN_MODE_ALTERNATE(GPIOC_BT_TX) |                            \
+                                         PIN_MODE_OUTPUT(GPIOC_SYS_INT_N) |                           \
+                                         PIN_MODE_OUTPUT(GPIOC_SYS_PD_N) |                            \
+                                         PIN_MODE_OUTPUT(GPIOC_SYS_WARMRST_N) |                       \
+                                         PIN_MODE_OUTPUT(GPIOC_BT_RST))
+#define VAL_GPIOC_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOC_CHARGE_STAT1A) |                    \
+                                         PIN_OTYPE_PUSHPULL(GPIOC_GAUGE_BATLOW1) |                    \
+                                         PIN_OTYPE_PUSHPULL(GPIOC_GAUGE_BATGD1_N) |                   \
+                                         PIN_OTYPE_OPENDRAIN(GPIOC_CHARGE_EN1_N) |                    \
+                                         PIN_OTYPE_PUSHPULL(GPIOC_IR_INT2_N) |                        \
+                                         PIN_OTYPE_PUSHPULL(GPIOC_TOUCH_INT_N) |                      \
+                                         PIN_OTYPE_PUSHPULL(GPIOC_SYS_DONE) |                         \
+                                         PIN_OTYPE_OPENDRAIN(GPIOC_SYS_PROG_N) |                      \
+                                         PIN_OTYPE_PUSHPULL(GPIOC_PATH_DC) |                          \
+                                         PIN_OTYPE_OPENDRAIN(GPIOC_SYS_SPI_DIR) |                     \
+                                         PIN_OTYPE_PUSHPULL(GPIOC_BT_RX) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOC_BT_TX) |                            \
+                                         PIN_OTYPE_OPENDRAIN(GPIOC_SYS_INT_N) |                       \
+                                         PIN_OTYPE_OPENDRAIN(GPIOC_SYS_PD_N) |                        \
+                                         PIN_OTYPE_OPENDRAIN(GPIOC_SYS_WARMRST_N) |                   \
+                                         PIN_OTYPE_OPENDRAIN(GPIOC_BT_RST))
+#define VAL_GPIOC_OSPEEDR               (PIN_OSPEED_VERYHIGH(GPIOC_CHARGE_STAT1A) |                   \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_GAUGE_BATLOW1) |                   \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_GAUGE_BATGD1_N) |                  \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_CHARGE_EN1_N) |                    \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_IR_INT2_N) |                       \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_TOUCH_INT_N) |                     \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_SYS_DONE) |                        \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_SYS_PROG_N) |                      \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_PATH_DC) |                         \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_SYS_SPI_DIR) |                     \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_BT_RX) |                           \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_BT_TX) |                           \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_SYS_INT_N) |                       \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_SYS_PD_N) |                        \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_SYS_WARMRST_N) |                   \
+                                         PIN_OSPEED_VERYHIGH(GPIOC_BT_RST))
+#define VAL_GPIOC_PUPDR                 (PIN_PUPDR_FLOATING(GPIOC_CHARGE_STAT1A) |                    \
+                                         PIN_PUPDR_FLOATING(GPIOC_GAUGE_BATLOW1) |                    \
+                                         PIN_PUPDR_FLOATING(GPIOC_GAUGE_BATGD1_N) |                   \
+                                         PIN_PUPDR_FLOATING(GPIOC_CHARGE_EN1_N) |                     \
+                                         PIN_PUPDR_FLOATING(GPIOC_IR_INT2_N) |                        \
+                                         PIN_PUPDR_FLOATING(GPIOC_TOUCH_INT_N) |                      \
+                                         PIN_PUPDR_FLOATING(GPIOC_SYS_DONE) |                         \
+                                         PIN_PUPDR_FLOATING(GPIOC_SYS_PROG_N) |                       \
+                                         PIN_PUPDR_FLOATING(GPIOC_PATH_DC) |                          \
+                                         PIN_PUPDR_FLOATING(GPIOC_SYS_SPI_DIR) |                      \
+                                         PIN_PUPDR_FLOATING(GPIOC_BT_RX) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOC_BT_TX) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOC_SYS_INT_N) |                        \
+                                         PIN_PUPDR_FLOATING(GPIOC_SYS_PD_N) |                         \
+                                         PIN_PUPDR_FLOATING(GPIOC_SYS_WARMRST_N) |                    \
+                                         PIN_PUPDR_FLOATING(GPIOC_BT_RST))
+#define VAL_GPIOC_ODR                   (PIN_ODR_HIGH(GPIOC_CHARGE_STAT1A) |                          \
+                                         PIN_ODR_HIGH(GPIOC_GAUGE_BATLOW1) |                          \
+                                         PIN_ODR_HIGH(GPIOC_GAUGE_BATGD1_N) |                         \
+                                         PIN_ODR_HIGH(GPIOC_CHARGE_EN1_N) |                           \
+                                         PIN_ODR_HIGH(GPIOC_IR_INT2_N) |                              \
+                                         PIN_ODR_HIGH(GPIOC_TOUCH_INT_N) |                            \
+                                         PIN_ODR_HIGH(GPIOC_SYS_DONE) |                               \
+                                         PIN_ODR_HIGH(GPIOC_SYS_PROG_N) |                             \
+                                         PIN_ODR_LOW(GPIOC_PATH_DC) |                                 \
+                                         PIN_ODR_HIGH(GPIOC_SYS_SPI_DIR) |                            \
+                                         PIN_ODR_HIGH(GPIOC_BT_RX) |                                  \
+                                         PIN_ODR_HIGH(GPIOC_BT_TX) |                                  \
+                                         PIN_ODR_LOW(GPIOC_SYS_INT_N) |                               \
+                                         PIN_ODR_HIGH(GPIOC_SYS_PD_N) |                               \
+                                         PIN_ODR_HIGH(GPIOC_SYS_WARMRST_N) |                          \
+                                         PIN_ODR_HIGH(GPIOC_BT_RST))
+#define VAL_GPIOC_AFRL                  (PIN_AFIO_AF(GPIOC_CHARGE_STAT1A, STM32F4xx_AF_system) |      \
+                                         PIN_AFIO_AF(GPIOC_GAUGE_BATLOW1, STM32F4xx_AF_system) |      \
+                                         PIN_AFIO_AF(GPIOC_GAUGE_BATGD1_N, STM32F4xx_AF_system) |     \
+                                         PIN_AFIO_AF(GPIOC_CHARGE_EN1_N, STM32F4xx_AF_system) |       \
+                                         PIN_AFIO_AF(GPIOC_IR_INT2_N, STM32F4xx_AF_system) |          \
+                                         PIN_AFIO_AF(GPIOC_TOUCH_INT_N, STM32F4xx_AF_system) |        \
+                                         PIN_AFIO_AF(GPIOC_SYS_DONE, STM32F4xx_AF_system) |           \
+                                         PIN_AFIO_AF(GPIOC_SYS_PROG_N, STM32F4xx_AF_system))
+#define VAL_GPIOC_AFRH                  (PIN_AFIO_AF(GPIOC_PATH_DC, STM32F4xx_AF_system) |            \
+                                         PIN_AFIO_AF(GPIOC_SYS_SPI_DIR, STM32F4xx_AF_system) |        \
+                                         PIN_AFIO_AF(GPIOC_BT_RX, STM32F4xx_AF_USART1to3) |           \
+                                         PIN_AFIO_AF(GPIOC_BT_TX, STM32F4xx_AF_USART1to3) |           \
+                                         PIN_AFIO_AF(GPIOC_SYS_INT_N, STM32F4xx_AF_system) |          \
+                                         PIN_AFIO_AF(GPIOC_SYS_PD_N, STM32F4xx_AF_system) |           \
+                                         PIN_AFIO_AF(GPIOC_SYS_WARMRST_N, STM32F4xx_AF_system) |      \
+                                         PIN_AFIO_AF(GPIOC_BT_RST, STM32F4xx_AF_system))
+
+/*
+ * GPIOD setup:
+ *
+ * PD0  - PIN0                          (input floating)
+ * PD1  - PIN1                          (input floating)
+ * PD2  - CHARGE_EN2_N                  (output opendrain high)
+ * PD3  - PIN3                          (input floating)
+ * PD4  - PIN4                          (input floating)
+ * PD5  - PIN5                          (input floating)
+ * PD6  - PIN6                          (input floating)
+ * PD7  - PIN7                          (input floating)
+ * PD8  - PIN8                          (input floating)
+ * PD9  - PIN9                          (input floating)
+ * PD10 - PIN10                         (input floating)
+ * PD11 - PIN11                         (input floating)
+ * PD12 - PIN12                         (input floating)
+ * PD13 - PIN13                         (input floating)
+ * PD14 - PIN14                         (input floating)
+ * PD15 - PIN15                         (input floating)
+ */
+#define VAL_GPIOD_IGNORE                (PIN_IGNORE(GPIOD_CHARGE_EN2_N)) & 0
+#define VAL_GPIOD_MODER                 (PIN_MODE_INPUT(GPIOD_PIN0) |                                 \
+                                         PIN_MODE_INPUT(GPIOD_PIN1) |                                 \
+                                         PIN_MODE_OUTPUT(GPIOD_CHARGE_EN2_N) |                        \
+                                         PIN_MODE_INPUT(GPIOD_PIN3) |                                 \
+                                         PIN_MODE_INPUT(GPIOD_PIN4) |                                 \
+                                         PIN_MODE_INPUT(GPIOD_PIN5) |                                 \
+                                         PIN_MODE_INPUT(GPIOD_PIN6) |                                 \
+                                         PIN_MODE_INPUT(GPIOD_PIN7) |                                 \
+                                         PIN_MODE_INPUT(GPIOD_PIN8) |                                 \
+                                         PIN_MODE_INPUT(GPIOD_PIN9) |                                 \
+                                         PIN_MODE_INPUT(GPIOD_PIN10) |                                \
+                                         PIN_MODE_INPUT(GPIOD_PIN11) |                                \
+                                         PIN_MODE_INPUT(GPIOD_PIN12) |                                \
+                                         PIN_MODE_INPUT(GPIOD_PIN13) |                                \
+                                         PIN_MODE_INPUT(GPIOD_PIN14) |                                \
+                                         PIN_MODE_INPUT(GPIOD_PIN15))
+#define VAL_GPIOD_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN1) |                             \
+                                         PIN_OTYPE_OPENDRAIN(GPIOD_CHARGE_EN2_N) |                    \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN3) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN4) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN5) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN6) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN7) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN8) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN9) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN10) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN11) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN12) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN13) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN14) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
+#define VAL_GPIOD_OSPEEDR               (PIN_OSPEED_VERYHIGH(GPIOD_PIN0) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN1) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_CHARGE_EN2_N) |                    \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN3) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN4) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN5) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN6) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN7) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN8) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN9) |                            \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN10) |                           \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN11) |                           \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN12) |                           \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN13) |                           \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN14) |                           \
+                                         PIN_OSPEED_VERYHIGH(GPIOD_PIN15))
+#define VAL_GPIOD_PUPDR                 (PIN_PUPDR_PULLUP(GPIOD_PIN0) |                               \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN1) |                               \
+                                         PIN_PUPDR_FLOATING(GPIOD_CHARGE_EN2_N) |                     \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN3) |                               \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN4) |                               \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN5) |                               \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN6) |                               \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN7) |                               \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN8) |                               \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN9) |                               \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN10) |                              \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN11) |                              \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN12) |                              \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN13) |                              \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN14) |                              \
+                                         PIN_PUPDR_PULLUP(GPIOD_PIN15))
+#define VAL_GPIOD_ODR                   (PIN_ODR_HIGH(GPIOD_PIN0) |                                   \
+                                         PIN_ODR_HIGH(GPIOD_PIN1) |                                   \
+                                         PIN_ODR_HIGH(GPIOD_CHARGE_EN2_N) |                           \
+                                         PIN_ODR_HIGH(GPIOD_PIN3) |                                   \
+                                         PIN_ODR_HIGH(GPIOD_PIN4) |                                   \
+                                         PIN_ODR_HIGH(GPIOD_PIN5) |                                   \
+                                         PIN_ODR_HIGH(GPIOD_PIN6) |                                   \
+                                         PIN_ODR_HIGH(GPIOD_PIN7) |                                   \
+                                         PIN_ODR_HIGH(GPIOD_PIN8) |                                   \
+                                         PIN_ODR_HIGH(GPIOD_PIN9) |                                   \
+                                         PIN_ODR_HIGH(GPIOD_PIN10) |                                  \
+                                         PIN_ODR_HIGH(GPIOD_PIN11) |                                  \
+                                         PIN_ODR_HIGH(GPIOD_PIN12) |                                  \
+                                         PIN_ODR_HIGH(GPIOD_PIN13) |                                  \
+                                         PIN_ODR_HIGH(GPIOD_PIN14) |                                  \
+                                         PIN_ODR_HIGH(GPIOD_PIN15))
+#define VAL_GPIOD_AFRL                  (PIN_AFIO_AF(GPIOD_PIN0, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOD_PIN1, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOD_CHARGE_EN2_N, STM32F4xx_AF_system) |       \
+                                         PIN_AFIO_AF(GPIOD_PIN3, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOD_PIN4, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOD_PIN5, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOD_PIN6, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOD_PIN7, STM32F4xx_AF_system))
+#define VAL_GPIOD_AFRH                  (PIN_AFIO_AF(GPIOD_PIN8, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOD_PIN9, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOD_PIN10, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOD_PIN11, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOD_PIN12, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOD_PIN13, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOD_PIN14, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOD_PIN15, STM32F4xx_AF_system))
+
+/*
+ * GPIOE setup:
+ *
+ * PE0  - PIN0                          (input floating)
+ * PE1  - PIN1                          (input floating)
+ * PE2  - PIN2                          (input floating)
+ * PE3  - PIN3                          (input floating)
+ * PE4  - PIN4                          (input floating)
+ * PE5  - PIN5                          (input floating)
+ * PE6  - PIN6                          (input floating)
+ * PE7  - PIN7                          (input floating)
+ * PE8  - PIN8                          (input floating)
+ * PE9  - PIN9                          (input floating)
+ * PE10 - PIN10                         (input floating)
+ * PE11 - PIN11                         (input floating)
+ * PE12 - PIN12                         (input floating)
+ * PE13 - PIN13                         (input floating)
+ * PE14 - PIN14                         (input floating)
+ * PE15 - PIN15                         (input floating)
+ */
+#define VAL_GPIOE_IGNORE                0
+#define VAL_GPIOE_MODER                 (PIN_MODE_INPUT(GPIOE_PIN0) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN1) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN2) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN3) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN4) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN5) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN6) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN7) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN8) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN9) |                                 \
+                                         PIN_MODE_INPUT(GPIOE_PIN10) |                                \
+                                         PIN_MODE_INPUT(GPIOE_PIN11) |                                \
+                                         PIN_MODE_INPUT(GPIOE_PIN12) |                                \
+                                         PIN_MODE_INPUT(GPIOE_PIN13) |                                \
+                                         PIN_MODE_INPUT(GPIOE_PIN14) |                                \
+                                         PIN_MODE_INPUT(GPIOE_PIN15))
+#define VAL_GPIOE_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN1) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN2) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN3) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN4) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN5) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN6) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN7) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN8) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN9) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN10) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN11) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN12) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN13) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN14) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
+#define VAL_GPIOE_OSPEEDR               (PIN_OSPEED_LOW(GPIOE_PIN0) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN1) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN2) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN3) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN4) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN5) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN6) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN7) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN8) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN9) |                                 \
+                                         PIN_OSPEED_LOW(GPIOE_PIN10) |                                \
+                                         PIN_OSPEED_LOW(GPIOE_PIN11) |                                \
+                                         PIN_OSPEED_LOW(GPIOE_PIN12) |                                \
+                                         PIN_OSPEED_LOW(GPIOE_PIN13) |                                \
+                                         PIN_OSPEED_LOW(GPIOE_PIN14) |                                \
+                                         PIN_OSPEED_LOW(GPIOE_PIN15))
+#define VAL_GPIOE_PUPDR                 (PIN_PUPDR_FLOATING(GPIOE_PIN0) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN1) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN2) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN3) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN4) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN5) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN6) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN7) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN8) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN9) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN10) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN11) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN12) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN13) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN14) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOE_PIN15))
+#define VAL_GPIOE_ODR                   (PIN_ODR_LOW(GPIOE_PIN0) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN1) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN2) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN3) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN4) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN5) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN6) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN7) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN8) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN9) |                                    \
+                                         PIN_ODR_LOW(GPIOE_PIN10) |                                   \
+                                         PIN_ODR_LOW(GPIOE_PIN11) |                                   \
+                                         PIN_ODR_LOW(GPIOE_PIN12) |                                   \
+                                         PIN_ODR_LOW(GPIOE_PIN13) |                                   \
+                                         PIN_ODR_LOW(GPIOE_PIN14) |                                   \
+                                         PIN_ODR_LOW(GPIOE_PIN15))
+#define VAL_GPIOE_AFRL                  (PIN_AFIO_AF(GPIOE_PIN0, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOE_PIN1, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOE_PIN2, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOE_PIN3, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOE_PIN4, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOE_PIN5, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOE_PIN6, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOE_PIN7, STM32F4xx_AF_system))
+#define VAL_GPIOE_AFRH                  (PIN_AFIO_AF(GPIOE_PIN8, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOE_PIN9, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOE_PIN10, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOE_PIN11, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOE_PIN12, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOE_PIN13, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOE_PIN14, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOE_PIN15, STM32F4xx_AF_system))
+
+/*
+ * GPIOF setup:
+ *
+ * PF0  - PIN0                          (input floating)
+ * PF1  - PIN1                          (input floating)
+ * PF2  - PIN2                          (input floating)
+ * PF3  - PIN3                          (input floating)
+ * PF4  - PIN4                          (input floating)
+ * PF5  - PIN5                          (input floating)
+ * PF6  - PIN6                          (input floating)
+ * PF7  - PIN7                          (input floating)
+ * PF8  - PIN8                          (input floating)
+ * PF9  - PIN9                          (input floating)
+ * PF10 - PIN10                         (input floating)
+ * PF11 - PIN11                         (input floating)
+ * PF12 - PIN12                         (input floating)
+ * PF13 - PIN13                         (input floating)
+ * PF14 - PIN14                         (input floating)
+ * PF15 - PIN15                         (input floating)
+ */
+#define VAL_GPIOF_IGNORE                0
+#define VAL_GPIOF_MODER                 (PIN_MODE_INPUT(GPIOF_PIN0) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN1) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN2) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN3) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN4) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN5) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN6) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN7) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN8) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN9) |                                 \
+                                         PIN_MODE_INPUT(GPIOF_PIN10) |                                \
+                                         PIN_MODE_INPUT(GPIOF_PIN11) |                                \
+                                         PIN_MODE_INPUT(GPIOF_PIN12) |                                \
+                                         PIN_MODE_INPUT(GPIOF_PIN13) |                                \
+                                         PIN_MODE_INPUT(GPIOF_PIN14) |                                \
+                                         PIN_MODE_INPUT(GPIOF_PIN15))
+#define VAL_GPIOF_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN1) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN2) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN3) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN4) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN5) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN6) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN7) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN8) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN9) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN10) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN11) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN12) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN13) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN14) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
+#define VAL_GPIOF_OSPEEDR               (PIN_OSPEED_LOW(GPIOF_PIN0) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN1) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN2) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN3) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN4) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN5) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN6) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN7) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN8) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN9) |                                 \
+                                         PIN_OSPEED_LOW(GPIOF_PIN10) |                                \
+                                         PIN_OSPEED_LOW(GPIOF_PIN11) |                                \
+                                         PIN_OSPEED_LOW(GPIOF_PIN12) |                                \
+                                         PIN_OSPEED_LOW(GPIOF_PIN13) |                                \
+                                         PIN_OSPEED_LOW(GPIOF_PIN14) |                                \
+                                         PIN_OSPEED_LOW(GPIOF_PIN15))
+#define VAL_GPIOF_PUPDR                 (PIN_PUPDR_FLOATING(GPIOF_PIN0) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN1) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN2) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN3) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN4) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN5) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN6) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN7) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN8) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN9) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN10) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN11) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN12) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN13) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN14) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOF_PIN15))
+#define VAL_GPIOF_ODR                   (PIN_ODR_LOW(GPIOF_PIN0) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN1) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN2) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN3) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN4) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN5) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN6) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN7) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN8) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN9) |                                    \
+                                         PIN_ODR_LOW(GPIOF_PIN10) |                                   \
+                                         PIN_ODR_LOW(GPIOF_PIN11) |                                   \
+                                         PIN_ODR_LOW(GPIOF_PIN12) |                                   \
+                                         PIN_ODR_LOW(GPIOF_PIN13) |                                   \
+                                         PIN_ODR_LOW(GPIOF_PIN14) |                                   \
+                                         PIN_ODR_LOW(GPIOF_PIN15))
+#define VAL_GPIOF_AFRL                  (PIN_AFIO_AF(GPIOF_PIN0, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOF_PIN1, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOF_PIN2, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOF_PIN3, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOF_PIN4, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOF_PIN5, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOF_PIN6, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOF_PIN7, STM32F4xx_AF_system))
+#define VAL_GPIOF_AFRH                  (PIN_AFIO_AF(GPIOF_PIN8, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOF_PIN9, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOF_PIN10, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOF_PIN11, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOF_PIN12, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOF_PIN13, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOF_PIN14, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOF_PIN15, STM32F4xx_AF_system))
+
+/*
+ * GPIOG setup:
+ *
+ * PG0  - PIN0                          (input floating)
+ * PG1  - PIN1                          (input floating)
+ * PG2  - PIN2                          (input floating)
+ * PG3  - PIN3                          (input floating)
+ * PG4  - PIN4                          (input floating)
+ * PG5  - PIN5                          (input floating)
+ * PG6  - PIN6                          (input floating)
+ * PG7  - PIN7                          (input floating)
+ * PG8  - PIN8                          (input floating)
+ * PG9  - PIN9                          (input floating)
+ * PG10 - PIN10                         (input floating)
+ * PG11 - PIN11                         (input floating)
+ * PG12 - PIN12                         (input floating)
+ * PG13 - PIN13                         (input floating)
+ * PG14 - PIN14                         (input floating)
+ * PG15 - PIN15                         (input floating)
+ */
+#define VAL_GPIOG_IGNORE                0
+#define VAL_GPIOG_MODER                 (PIN_MODE_INPUT(GPIOG_PIN0) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN1) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN2) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN3) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN4) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN5) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN6) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN7) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN8) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN9) |                                 \
+                                         PIN_MODE_INPUT(GPIOG_PIN10) |                                \
+                                         PIN_MODE_INPUT(GPIOG_PIN11) |                                \
+                                         PIN_MODE_INPUT(GPIOG_PIN12) |                                \
+                                         PIN_MODE_INPUT(GPIOG_PIN13) |                                \
+                                         PIN_MODE_INPUT(GPIOG_PIN14) |                                \
+                                         PIN_MODE_INPUT(GPIOG_PIN15))
+#define VAL_GPIOG_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN1) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN2) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN3) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN4) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN5) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN6) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN7) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN8) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN9) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN10) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN11) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN12) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN13) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN14) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
+#define VAL_GPIOG_OSPEEDR               (PIN_OSPEED_LOW(GPIOG_PIN0) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN1) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN2) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN3) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN4) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN5) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN6) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN7) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN8) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN9) |                                 \
+                                         PIN_OSPEED_LOW(GPIOG_PIN10) |                                \
+                                         PIN_OSPEED_LOW(GPIOG_PIN11) |                                \
+                                         PIN_OSPEED_LOW(GPIOG_PIN12) |                                \
+                                         PIN_OSPEED_LOW(GPIOG_PIN13) |                                \
+                                         PIN_OSPEED_LOW(GPIOG_PIN14) |                                \
+                                         PIN_OSPEED_LOW(GPIOG_PIN15))
+#define VAL_GPIOG_PUPDR                 (PIN_PUPDR_FLOATING(GPIOG_PIN0) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN1) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN2) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN3) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN4) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN5) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN6) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN7) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN8) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN9) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN10) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN11) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN12) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN13) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN14) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOG_PIN15))
+#define VAL_GPIOG_ODR                   (PIN_ODR_LOW(GPIOG_PIN0) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN1) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN2) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN3) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN4) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN5) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN6) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN7) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN8) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN9) |                                    \
+                                         PIN_ODR_LOW(GPIOG_PIN10) |                                   \
+                                         PIN_ODR_LOW(GPIOG_PIN11) |                                   \
+                                         PIN_ODR_LOW(GPIOG_PIN12) |                                   \
+                                         PIN_ODR_LOW(GPIOG_PIN13) |                                   \
+                                         PIN_ODR_LOW(GPIOG_PIN14) |                                   \
+                                         PIN_ODR_LOW(GPIOG_PIN15))
+#define VAL_GPIOG_AFRL                  (PIN_AFIO_AF(GPIOG_PIN0, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOG_PIN1, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOG_PIN2, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOG_PIN3, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOG_PIN4, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOG_PIN5, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOG_PIN6, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOG_PIN7, STM32F4xx_AF_system))
+#define VAL_GPIOG_AFRH                  (PIN_AFIO_AF(GPIOG_PIN8, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOG_PIN9, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOG_PIN10, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOG_PIN11, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOG_PIN12, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOG_PIN13, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOG_PIN14, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOG_PIN15, STM32F4xx_AF_system))
+
+/*
+ * GPIOH setup:
+ *
+ * PH0  - OSC_IN                        (input floating)
+ * PH1  - OSC_OUT                       (input floating)
+ * PH2  - PIN2                          (input floating)
+ * PH3  - PIN3                          (input floating)
+ * PH4  - PIN4                          (input floating)
+ * PH5  - PIN5                          (input floating)
+ * PH6  - PIN6                          (input floating)
+ * PH7  - PIN7                          (input floating)
+ * PH8  - PIN8                          (input floating)
+ * PH9  - PIN9                          (input floating)
+ * PH10 - PIN10                         (input floating)
+ * PH11 - PIN11                         (input floating)
+ * PH12 - PIN12                         (input floating)
+ * PH13 - PIN13                         (input floating)
+ * PH14 - PIN14                         (input floating)
+ * PH15 - PIN15                         (input floating)
+ */
+#define VAL_GPIOH_IGNORE                0
+#define VAL_GPIOH_MODER                 (PIN_MODE_INPUT(GPIOH_OSC_IN) |                               \
+                                         PIN_MODE_INPUT(GPIOH_OSC_OUT) |                              \
+                                         PIN_MODE_INPUT(GPIOH_PIN2) |                                 \
+                                         PIN_MODE_INPUT(GPIOH_PIN3) |                                 \
+                                         PIN_MODE_INPUT(GPIOH_PIN4) |                                 \
+                                         PIN_MODE_INPUT(GPIOH_PIN5) |                                 \
+                                         PIN_MODE_INPUT(GPIOH_PIN6) |                                 \
+                                         PIN_MODE_INPUT(GPIOH_PIN7) |                                 \
+                                         PIN_MODE_INPUT(GPIOH_PIN8) |                                 \
+                                         PIN_MODE_INPUT(GPIOH_PIN9) |                                 \
+                                         PIN_MODE_INPUT(GPIOH_PIN10) |                                \
+                                         PIN_MODE_INPUT(GPIOH_PIN11) |                                \
+                                         PIN_MODE_INPUT(GPIOH_PIN12) |                                \
+                                         PIN_MODE_INPUT(GPIOH_PIN13) |                                \
+                                         PIN_MODE_INPUT(GPIOH_PIN14) |                                \
+                                         PIN_MODE_INPUT(GPIOH_PIN15))
+#define VAL_GPIOH_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) |                           \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) |                          \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN2) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN3) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN4) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN5) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN6) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN7) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN8) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN9) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN10) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN11) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN12) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN13) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN14) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOH_PIN15))
+#define VAL_GPIOH_OSPEEDR               (PIN_OSPEED_VERYHIGH(GPIOH_OSC_IN) |                          \
+                                         PIN_OSPEED_VERYHIGH(GPIOH_OSC_OUT) |                         \
+                                         PIN_OSPEED_LOW(GPIOH_PIN2) |                                 \
+                                         PIN_OSPEED_LOW(GPIOH_PIN3) |                                 \
+                                         PIN_OSPEED_LOW(GPIOH_PIN4) |                                 \
+                                         PIN_OSPEED_LOW(GPIOH_PIN5) |                                 \
+                                         PIN_OSPEED_LOW(GPIOH_PIN6) |                                 \
+                                         PIN_OSPEED_LOW(GPIOH_PIN7) |                                 \
+                                         PIN_OSPEED_LOW(GPIOH_PIN8) |                                 \
+                                         PIN_OSPEED_LOW(GPIOH_PIN9) |                                 \
+                                         PIN_OSPEED_LOW(GPIOH_PIN10) |                                \
+                                         PIN_OSPEED_LOW(GPIOH_PIN11) |                                \
+                                         PIN_OSPEED_LOW(GPIOH_PIN12) |                                \
+                                         PIN_OSPEED_LOW(GPIOH_PIN13) |                                \
+                                         PIN_OSPEED_LOW(GPIOH_PIN14) |                                \
+                                         PIN_OSPEED_LOW(GPIOH_PIN15))
+#define VAL_GPIOH_PUPDR                 (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) |                           \
+                                         PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) |                          \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN2) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN3) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN4) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN5) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN6) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN7) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN8) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN9) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN10) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN11) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN12) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN13) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN14) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOH_PIN15))
+#define VAL_GPIOH_ODR                   (PIN_ODR_HIGH(GPIOH_OSC_IN) |                                 \
+                                         PIN_ODR_HIGH(GPIOH_OSC_OUT) |                                \
+                                         PIN_ODR_HIGH(GPIOH_PIN2) |                                   \
+                                         PIN_ODR_HIGH(GPIOH_PIN3) |                                   \
+                                         PIN_ODR_HIGH(GPIOH_PIN4) |                                   \
+                                         PIN_ODR_HIGH(GPIOH_PIN5) |                                   \
+                                         PIN_ODR_HIGH(GPIOH_PIN6) |                                   \
+                                         PIN_ODR_HIGH(GPIOH_PIN7) |                                   \
+                                         PIN_ODR_HIGH(GPIOH_PIN8) |                                   \
+                                         PIN_ODR_HIGH(GPIOH_PIN9) |                                   \
+                                         PIN_ODR_HIGH(GPIOH_PIN10) |                                  \
+                                         PIN_ODR_HIGH(GPIOH_PIN11) |                                  \
+                                         PIN_ODR_HIGH(GPIOH_PIN12) |                                  \
+                                         PIN_ODR_HIGH(GPIOH_PIN13) |                                  \
+                                         PIN_ODR_HIGH(GPIOH_PIN14) |                                  \
+                                         PIN_ODR_HIGH(GPIOH_PIN15))
+#define VAL_GPIOH_AFRL                  (PIN_AFIO_AF(GPIOH_OSC_IN, STM32F4xx_AF_system) |             \
+                                         PIN_AFIO_AF(GPIOH_OSC_OUT, STM32F4xx_AF_system) |            \
+                                         PIN_AFIO_AF(GPIOH_PIN2, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOH_PIN3, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOH_PIN4, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOH_PIN5, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOH_PIN6, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOH_PIN7, STM32F4xx_AF_system))
+#define VAL_GPIOH_AFRH                  (PIN_AFIO_AF(GPIOH_PIN8, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOH_PIN9, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOH_PIN10, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOH_PIN11, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOH_PIN12, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOH_PIN13, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOH_PIN14, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOH_PIN15, STM32F4xx_AF_system))
+
+/*
+ * GPIOI setup:
+ *
+ * PI0  - PIN0                          (input floating)
+ * PI1  - PIN1                          (input floating)
+ * PI2  - PIN2                          (input floating)
+ * PI3  - PIN3                          (input floating)
+ * PI4  - PIN4                          (input floating)
+ * PI5  - PIN5                          (input floating)
+ * PI6  - PIN6                          (input floating)
+ * PI7  - PIN7                          (input floating)
+ * PI8  - PIN8                          (input floating)
+ * PI9  - PIN9                          (input floating)
+ * PI10 - PIN10                         (input floating)
+ * PI11 - PIN11                         (input floating)
+ * PI12 - PIN12                         (input floating)
+ * PI13 - PIN13                         (input floating)
+ * PI14 - PIN14                         (input floating)
+ * PI15 - PIN15                         (input floating)
+ */
+#define VAL_GPIOI_IGNORE                0
+#define VAL_GPIOI_MODER                 (PIN_MODE_INPUT(GPIOI_PIN0) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN1) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN2) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN3) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN4) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN5) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN6) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN7) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN8) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN9) |                                 \
+                                         PIN_MODE_INPUT(GPIOI_PIN10) |                                \
+                                         PIN_MODE_INPUT(GPIOI_PIN11) |                                \
+                                         PIN_MODE_INPUT(GPIOI_PIN12) |                                \
+                                         PIN_MODE_INPUT(GPIOI_PIN13) |                                \
+                                         PIN_MODE_INPUT(GPIOI_PIN14) |                                \
+                                         PIN_MODE_INPUT(GPIOI_PIN15))
+#define VAL_GPIOI_OTYPER                (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN1) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN2) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN3) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN4) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN5) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN6) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN7) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN8) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN9) |                             \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN10) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN11) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN12) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN13) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN14) |                            \
+                                         PIN_OTYPE_PUSHPULL(GPIOI_PIN15))
+#define VAL_GPIOI_OSPEEDR               (PIN_OSPEED_LOW(GPIOI_PIN0) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN1) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN2) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN3) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN4) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN5) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN6) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN7) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN8) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN9) |                                 \
+                                         PIN_OSPEED_LOW(GPIOI_PIN10) |                                \
+                                         PIN_OSPEED_LOW(GPIOI_PIN11) |                                \
+                                         PIN_OSPEED_LOW(GPIOI_PIN12) |                                \
+                                         PIN_OSPEED_LOW(GPIOI_PIN13) |                                \
+                                         PIN_OSPEED_LOW(GPIOI_PIN14) |                                \
+                                         PIN_OSPEED_LOW(GPIOI_PIN15))
+#define VAL_GPIOI_PUPDR                 (PIN_PUPDR_FLOATING(GPIOI_PIN0) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN1) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN2) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN3) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN4) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN5) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN6) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN7) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN8) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN9) |                             \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN10) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN11) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN12) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN13) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN14) |                            \
+                                         PIN_PUPDR_FLOATING(GPIOI_PIN15))
+#define VAL_GPIOI_ODR                   (PIN_ODR_LOW(GPIOI_PIN0) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN1) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN2) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN3) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN4) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN5) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN6) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN7) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN8) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN9) |                                    \
+                                         PIN_ODR_LOW(GPIOI_PIN10) |                                   \
+                                         PIN_ODR_LOW(GPIOI_PIN11) |                                   \
+                                         PIN_ODR_LOW(GPIOI_PIN12) |                                   \
+                                         PIN_ODR_LOW(GPIOI_PIN13) |                                   \
+                                         PIN_ODR_LOW(GPIOI_PIN14) |                                   \
+                                         PIN_ODR_LOW(GPIOI_PIN15))
+#define VAL_GPIOI_AFRL                  (PIN_AFIO_AF(GPIOI_PIN0, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOI_PIN1, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOI_PIN2, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOI_PIN3, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOI_PIN4, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOI_PIN5, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOI_PIN6, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOI_PIN7, STM32F4xx_AF_system))
+#define VAL_GPIOI_AFRH                  (PIN_AFIO_AF(GPIOI_PIN8, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOI_PIN9, STM32F4xx_AF_system) |               \
+                                         PIN_AFIO_AF(GPIOI_PIN10, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOI_PIN11, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOI_PIN12, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOI_PIN13, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOI_PIN14, STM32F4xx_AF_system) |              \
+                                         PIN_AFIO_AF(GPIOI_PIN15, STM32F4xx_AF_system))
+
+#if !defined(_FROM_ASM_)
+#ifdef __cplusplus
+extern "C" {
+#endif
+  void boardInit(void);
+#ifdef __cplusplus
+}
+#endif
+#endif /* _FROM_ASM_ */
+
+#endif /* BOARD_H */
+
+/** @} */
diff --git a/modules/PowerManagement_1-2/chconf.h b/modules/PowerManagement_1-2/chconf.h
new file mode 100644
index 0000000..d601cd5
--- /dev/null
+++ b/modules/PowerManagement_1-2/chconf.h
@@ -0,0 +1,154 @@
+/*
+ * AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+ * Copyright (C) 2016..2019  Thomas Schöpping et al.
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/**
+ * @file    
+ * @brief   ChibiOS Configuration file for the PowerManagement v1.2 module.
+ * @details Contains the application specific kernel settings.
+ *
+ * @addtogroup powermanagement_ch_config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef CHCONF_H
+#define CHCONF_H
+
+#include <aosconf.h>
+
+/*===========================================================================*/
+/**
+ * @name System timers settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   System time counter resolution.
+ * @note    Allowed values are 16 or 32 bits.
+ */
+#if !defined(CH_CFG_ST_RESOLUTION)
+#define CH_CFG_ST_RESOLUTION                    32
+#endif
+
+// more common definition in aos_chconf.h
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+// common definitions in aos_chconf.h
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Performance options
+ * @{
+ */
+/*===========================================================================*/
+
+// common definitions in aos_chconf.h
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+// common definitions in aos_chconf.h
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Objects factory options
+ * @{
+ */
+/*===========================================================================*/
+
+// common definitions in aos_chconf.h
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Debug options
+ * @{
+ */
+/*===========================================================================*/
+
+// common definitions in aos_chconf.h
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel hooks
+ * @{
+ */
+/*===========================================================================*/
+
+// common definitions in aos_chconf.h
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Port-specific settings (override port settings defaulted in chcore.h).
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   NVIC VTOR initialization offset.
+ * @details On initialization, the code at this address in the flash memory will be executed.
+ */
+#define CORTEX_VTOR_INIT                        0x00008000U
+
+/**
+ * @brief   Flag to enable/disable sleep mode when the system is idle.
+ */
+#define CORTEX_ENABLE_WFI_IDLE                  TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name other
+ * @{
+ */
+/*===========================================================================*/
+
+// common definitions in aos_chconf.h
+
+/** @} */
+
+#include <aos_chconf.h>
+
+#endif  /* CHCONF_H */
+
+/** @} */
diff --git a/modules/PowerManagement_1-2/halconf.h b/modules/PowerManagement_1-2/halconf.h
new file mode 100644
index 0000000..97a4b46
--- /dev/null
+++ b/modules/PowerManagement_1-2/halconf.h
@@ -0,0 +1,534 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2019  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file
+ * @brief   HAL configuration header for the PowerManagement v1.2 module.
+ * @details HAL configuration file, this file allows to enable or disable the
+ *          various device drivers from your application. You may also use
+ *          this file in order to override the device drivers default settings.
+ *
+ * @addtogroup POWERMANAGEMENT_HAL_CONF
+ * @{
+ */
+
+#ifndef HALCONF_H
+#define HALCONF_H
+
+#define _CHIBIOS_HAL_CONF_
+#define _CHIBIOS_HAL_CONF_VER_7_0_
+
+#include "mcuconf.h"
+
+/**
+ * @brief   Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL                         TRUE
+#endif
+
+/**
+ * @brief   Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC                         TRUE
+#endif
+
+/**
+ * @brief   Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN                         TRUE
+#endif
+
+/**
+ * @brief   Enables the cryptographic subsystem.
+ */
+#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
+#define HAL_USE_CRY                         FALSE
+#endif
+
+/**
+ * @brief   Enables the DAC subsystem.
+ */
+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
+#define HAL_USE_DAC                         FALSE
+#endif
+
+/**
+ * @brief   Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT                         FALSE
+#endif
+
+/**
+ * @brief   Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C                         TRUE
+#endif
+
+/**
+ * @brief   Enables the I2S subsystem.
+ */
+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
+#define HAL_USE_I2S                         FALSE
+#endif
+
+/**
+ * @brief   Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU                         FALSE
+#endif
+
+/**
+ * @brief   Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC                         FALSE
+#endif
+
+/**
+ * @brief   Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI                     FALSE
+#endif
+
+/**
+ * @brief   Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM                         TRUE
+#endif
+
+/**
+ * @brief   Enables the QEI subsystem.
+ */
+#if !defined(HAL_USE_QEI) || defined(__DOXYGEN__)
+#define HAL_USE_QEI                         FALSE
+#endif
+
+/**
+ * @brief   Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC                         TRUE
+#endif
+
+/**
+ * @brief   Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC                         FALSE
+#endif
+
+/**
+ * @brief   Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL                      TRUE
+#endif
+
+/**
+ * @brief   Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB                  FALSE
+#endif
+
+/**
+ * @brief   Enables the SIO subsystem.
+ */
+#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__)
+#define HAL_USE_SIO                         FALSE
+#endif
+
+/**
+ * @brief   Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI                         TRUE
+#endif
+
+/**
+ * @brief   Enables the TRNG subsystem.
+ */
+#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__)
+#define HAL_USE_TRNG                        FALSE
+#endif
+
+/**
+ * @brief   Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART                        FALSE
+#endif
+
+/**
+ * @brief   Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB                         FALSE
+#endif
+
+/**
+ * @brief   Enables the WDG subsystem.
+ */
+#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
+#define HAL_USE_WDG                         FALSE
+#endif
+
+/**
+ * @brief   Enables the WSPI subsystem.
+ */
+#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__)
+#define HAL_USE_WSPI                        FALSE
+#endif
+
+/*===========================================================================*/
+/* PAL driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__)
+#define PAL_USE_CALLBACKS                   TRUE
+#endif
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
+#define PAL_USE_WAIT                        FALSE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT                        TRUE
+#endif
+
+/**
+ * @brief   Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION            FALSE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE                  FALSE
+#endif
+
+/**
+ * @brief   Enforces the driver to use direct callbacks rather than OSAL events.
+ */
+#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__)
+#define CAN_ENFORCE_USE_CALLBACKS           FALSE
+#endif
+
+/*===========================================================================*/
+/* CRY driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables the SW fall-back of the cryptographic driver.
+ * @details When enabled, this option, activates a fall-back software
+ *          implementation for algorithms not supported by the underlying
+ *          hardware.
+ * @note    Fall-back implementations may not be present for all algorithms.
+ */
+#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
+#define HAL_CRY_USE_FALLBACK                FALSE
+#endif
+
+/**
+ * @brief   Makes the driver forcibly use the fall-back implementations.
+ */
+#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
+#define HAL_CRY_ENFORCE_FALLBACK            FALSE
+#endif
+
+/*===========================================================================*/
+/* DAC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
+#define DAC_USE_WAIT                        TRUE
+#endif
+
+/**
+ * @brief   Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define DAC_USE_MUTUAL_EXCLUSION            TRUE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION            TRUE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables the zero-copy API.
+ */
+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
+#define MAC_USE_ZERO_COPY                   FALSE
+#endif
+
+/**
+ * @brief   Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS                      TRUE
+#endif
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings.                                          */
+/*===========================================================================*/
+
+/**
+ * @brief   Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ *          routines releasing some extra CPU time for the threads with
+ *          lower priority, this may slow down the driver a bit however.
+ *          This option is recommended also if the SPI driver does not
+ *          use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING                    TRUE
+#endif
+
+/*===========================================================================*/
+/* SDC driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Number of initialization attempts before rejecting the card.
+ * @note    Attempts are performed at 10mS intervals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY                      100
+#endif
+
+/**
+ * @brief   Include support for MMC cards.
+ * @note    MMC support is not yet implemented so this option must be kept
+ *          at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT                     FALSE
+#endif
+
+/**
+ * @brief   Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ *          routines releasing some extra CPU time for the threads with
+ *          lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING                    TRUE
+#endif
+
+/**
+ * @brief   OCR initialization constant for V20 cards.
+ */
+#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__)
+#define SDC_INIT_OCR_V20                    0x50FF8000U
+#endif
+
+/**
+ * @brief   OCR initialization constant for non-V20 cards.
+ */
+#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__)
+#define SDC_INIT_OCR                        0x80100000U
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings.                                           */
+/*===========================================================================*/
+
+/**
+ * @brief   Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ *          default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE              115200
+#endif
+
+/**
+ * @brief   Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ *          buffers depending on the requirements of your application.
+ * @note    The default is 16 bytes for both the transmission and receive
+ *          buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE                 16
+#endif
+
+/*===========================================================================*/
+/* SERIAL_USB driver related setting.                                        */
+/*===========================================================================*/
+
+/**
+ * @brief   Serial over USB buffers size.
+ * @details Configuration parameter, the buffer size must be a multiple of
+ *          the USB data endpoint maximum packet size.
+ * @note    The default is 256 bytes for both the transmission and receive
+ *          buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_SIZE             256
+#endif
+
+/**
+ * @brief   Serial over USB number of buffers.
+ * @note    The default is 2 buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_NUMBER           2
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT                        TRUE
+#endif
+
+/**
+ * @brief   Enables circular transfers APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__)
+#define SPI_USE_CIRCULAR                    FALSE
+#endif
+
+
+/**
+ * @brief   Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION            TRUE
+#endif
+
+/**
+ * @brief   Handling method for SPI CS line.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__)
+#define SPI_SELECT_MODE                     SPI_SELECT_MODE_PAD
+#endif
+
+/*===========================================================================*/
+/* UART driver related settings.                                             */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
+#define UART_USE_WAIT                       FALSE
+#endif
+
+/**
+ * @brief   Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define UART_USE_MUTUAL_EXCLUSION           FALSE
+#endif
+
+/*===========================================================================*/
+/* USB driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
+#define USB_USE_WAIT                        FALSE
+#endif
+
+/*===========================================================================*/
+/* WSPI driver related settings.                                             */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__)
+#define WSPI_USE_WAIT                       TRUE
+#endif
+
+/**
+ * @brief   Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define WSPI_USE_MUTUAL_EXCLUSION           TRUE
+#endif
+
+#endif /* HALCONF_H */
+
+/** @} */
diff --git a/modules/PowerManagement_1-2/mcuconf.h b/modules/PowerManagement_1-2/mcuconf.h
new file mode 100644
index 0000000..9714490
--- /dev/null
+++ b/modules/PowerManagement_1-2/mcuconf.h
@@ -0,0 +1,351 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2019  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#ifndef MCUCONF_H
+#define MCUCONF_H
+
+/*
+ * STM32F4xx drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 15...0       Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3        Lowest...Highest.
+ */
+
+#define STM32F4xx_MCUCONF
+
+/*
+ * Some old revisions of F4x MCU randomly chrashes with certain compiler options enabled.
+ * This flag makes the kernel dynamically detect the MCUs ID code and CPU ID and react accordingly.
+ * (see ChibiOS kernel: os/hal/ports/STM32/STM32F4xx/hal_lld.c)
+ */
+#define STM32_USE_REVISION_A_FIX
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_NO_INIT                       FALSE
+#define STM32_HSI_ENABLED                   TRUE
+#define STM32_LSI_ENABLED                   TRUE
+#define STM32_HSE_ENABLED                   TRUE
+#define STM32_LSE_ENABLED                   FALSE
+#define STM32_CLOCK48_REQUIRED              TRUE
+#define STM32_SW                            STM32_SW_PLL
+#define STM32_PLLSRC                        STM32_PLLSRC_HSE
+#define STM32_PLLM_VALUE                    8
+#define STM32_PLLN_VALUE                    336
+#define STM32_PLLP_VALUE                    2
+#define STM32_PLLQ_VALUE                    7
+#define STM32_HPRE                          STM32_HPRE_DIV1
+#define STM32_PPRE1                         STM32_PPRE1_DIV4
+#define STM32_PPRE2                         STM32_PPRE2_DIV2
+#define STM32_RTCSEL                        STM32_RTCSEL_LSI
+#define STM32_RTCPRE_VALUE                  8
+#define STM32_MCO1SEL                       STM32_MCO1SEL_HSI
+#define STM32_MCO1PRE                       STM32_MCO1PRE_DIV1
+#define STM32_MCO2SEL                       STM32_MCO2SEL_SYSCLK
+#define STM32_MCO2PRE                       STM32_MCO2PRE_DIV5
+#define STM32_I2SSRC                        STM32_I2SSRC_CKIN
+#define STM32_PLLI2SN_VALUE                 192
+#define STM32_PLLI2SR_VALUE                 5
+#define STM32_PVD_ENABLE                    FALSE
+#define STM32_PLS                           STM32_PLS_LEV0
+#define STM32_BKPRAM_ENABLE                 FALSE
+
+/*
+ * IRQ system settings.
+ */
+#define STM32_IRQ_EXTI0_PRIORITY            6
+#define STM32_IRQ_EXTI1_PRIORITY            6
+#define STM32_IRQ_EXTI2_PRIORITY            6
+#define STM32_IRQ_EXTI3_PRIORITY            6
+#define STM32_IRQ_EXTI4_PRIORITY            6
+#define STM32_IRQ_EXTI5_9_PRIORITY          6
+#define STM32_IRQ_EXTI10_15_PRIORITY        6
+#define STM32_IRQ_EXTI16_PRIORITY           6
+#define STM32_IRQ_EXTI17_PRIORITY           15
+#define STM32_IRQ_EXTI18_PRIORITY           6
+#define STM32_IRQ_EXTI19_PRIORITY           6
+#define STM32_IRQ_EXTI20_PRIORITY           6
+#define STM32_IRQ_EXTI21_PRIORITY           15
+#define STM32_IRQ_EXTI22_PRIORITY           15
+
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_ADCPRE                    ADC_CCR_ADCPRE_DIV4
+#define STM32_ADC_USE_ADC1                  TRUE
+#define STM32_ADC_USE_ADC2                  FALSE
+#define STM32_ADC_USE_ADC3                  FALSE
+#define STM32_ADC_ADC1_DMA_STREAM           STM32_DMA_STREAM_ID(2, 4)
+#define STM32_ADC_ADC2_DMA_STREAM           STM32_DMA_STREAM_ID(2, 2)
+#define STM32_ADC_ADC3_DMA_STREAM           STM32_DMA_STREAM_ID(2, 1)
+#define STM32_ADC_ADC1_DMA_PRIORITY         2
+#define STM32_ADC_ADC2_DMA_PRIORITY         2
+#define STM32_ADC_ADC3_DMA_PRIORITY         2
+#define STM32_ADC_IRQ_PRIORITY              6
+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY     6
+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY     6
+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY     6
+
+/*
+ * CAN driver system settings.
+ */
+#define STM32_CAN_USE_CAN1                  TRUE
+#define STM32_CAN_USE_CAN2                  FALSE
+#define STM32_CAN_CAN1_IRQ_PRIORITY         11
+#define STM32_CAN_CAN2_IRQ_PRIORITY         11
+
+/*
+ * DAC driver system settings.
+ */
+#define STM32_DAC_DUAL_MODE                 FALSE
+#define STM32_DAC_USE_DAC1_CH1              FALSE
+#define STM32_DAC_USE_DAC1_CH2              FALSE
+#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY     10
+#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY     10
+#define STM32_DAC_DAC1_CH1_DMA_PRIORITY     2
+#define STM32_DAC_DAC1_CH2_DMA_PRIORITY     2
+#define STM32_DAC_DAC1_CH1_DMA_STREAM       STM32_DMA_STREAM_ID(1, 5)
+#define STM32_DAC_DAC1_CH2_DMA_STREAM       STM32_DMA_STREAM_ID(1, 6)
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1                  FALSE
+#define STM32_GPT_USE_TIM2                  FALSE
+#define STM32_GPT_USE_TIM3                  FALSE
+#define STM32_GPT_USE_TIM4                  FALSE
+#define STM32_GPT_USE_TIM5                  FALSE
+#define STM32_GPT_USE_TIM6                  FALSE
+#define STM32_GPT_USE_TIM7                  FALSE
+#define STM32_GPT_USE_TIM8                  FALSE
+#define STM32_GPT_USE_TIM9                  FALSE
+#define STM32_GPT_USE_TIM11                 FALSE
+#define STM32_GPT_USE_TIM12                 FALSE
+#define STM32_GPT_USE_TIM14                 FALSE
+#define STM32_GPT_TIM1_IRQ_PRIORITY         7
+#define STM32_GPT_TIM2_IRQ_PRIORITY         7
+#define STM32_GPT_TIM3_IRQ_PRIORITY         7
+#define STM32_GPT_TIM4_IRQ_PRIORITY         7
+#define STM32_GPT_TIM5_IRQ_PRIORITY         7
+#define STM32_GPT_TIM6_IRQ_PRIORITY         7
+#define STM32_GPT_TIM7_IRQ_PRIORITY         7
+#define STM32_GPT_TIM8_IRQ_PRIORITY         7
+#define STM32_GPT_TIM9_IRQ_PRIORITY         7
+#define STM32_GPT_TIM11_IRQ_PRIORITY        7
+#define STM32_GPT_TIM12_IRQ_PRIORITY        7
+#define STM32_GPT_TIM14_IRQ_PRIORITY        7
+
+/*
+ * I2C driver system settings.
+ */
+#define STM32_I2C_USE_I2C1                  TRUE
+#define STM32_I2C_USE_I2C2                  TRUE
+#define STM32_I2C_USE_I2C3                  FALSE
+#define STM32_I2C_BUSY_TIMEOUT              50
+#define STM32_I2C_I2C1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)
+#define STM32_I2C_I2C1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 6)
+#define STM32_I2C_I2C2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)
+#define STM32_I2C_I2C2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)
+#define STM32_I2C_I2C3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 2)
+#define STM32_I2C_I2C3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
+#define STM32_I2C_I2C1_IRQ_PRIORITY         5
+#define STM32_I2C_I2C2_IRQ_PRIORITY         5
+#define STM32_I2C_I2C3_IRQ_PRIORITY         5
+#define STM32_I2C_I2C1_DMA_PRIORITY         3
+#define STM32_I2C_I2C2_DMA_PRIORITY         3
+#define STM32_I2C_I2C3_DMA_PRIORITY         3
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
+
+/*
+ * I2S driver system settings.
+ */
+#define STM32_I2S_USE_SPI2                  FALSE
+#define STM32_I2S_USE_SPI3                  FALSE
+#define STM32_I2S_SPI2_IRQ_PRIORITY         10
+#define STM32_I2S_SPI3_IRQ_PRIORITY         10
+#define STM32_I2S_SPI2_DMA_PRIORITY         1
+#define STM32_I2S_SPI3_DMA_PRIORITY         1
+#define STM32_I2S_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)
+#define STM32_I2S_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
+#define STM32_I2S_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)
+#define STM32_I2S_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)
+#define STM32_I2S_DMA_ERROR_HOOK(i2sp)      osalSysHalt("DMA failure")
+
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1                  FALSE
+#define STM32_ICU_USE_TIM2                  FALSE
+#define STM32_ICU_USE_TIM3                  FALSE
+#define STM32_ICU_USE_TIM4                  FALSE
+#define STM32_ICU_USE_TIM5                  FALSE
+#define STM32_ICU_USE_TIM8                  FALSE
+#define STM32_ICU_USE_TIM9                  FALSE
+#define STM32_ICU_TIM1_IRQ_PRIORITY         7
+#define STM32_ICU_TIM2_IRQ_PRIORITY         7
+#define STM32_ICU_TIM3_IRQ_PRIORITY         7
+#define STM32_ICU_TIM4_IRQ_PRIORITY         7
+#define STM32_ICU_TIM5_IRQ_PRIORITY         7
+#define STM32_ICU_TIM8_IRQ_PRIORITY         7
+#define STM32_ICU_TIM9_IRQ_PRIORITY         7
+
+/*
+ * MAC driver system settings.
+ */
+#define STM32_MAC_TRANSMIT_BUFFERS          2
+#define STM32_MAC_RECEIVE_BUFFERS           4
+#define STM32_MAC_BUFFERS_SIZE              1522
+#define STM32_MAC_PHY_TIMEOUT               100
+#define STM32_MAC_ETH1_CHANGE_PHY_STATE     TRUE
+#define STM32_MAC_ETH1_IRQ_PRIORITY         13
+#define STM32_MAC_IP_CHECKSUM_OFFLOAD       0
+
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED              FALSE
+#define STM32_PWM_USE_TIM1                  FALSE
+#define STM32_PWM_USE_TIM2                  FALSE
+#define STM32_PWM_USE_TIM3                  TRUE
+#define STM32_PWM_USE_TIM4                  FALSE
+#define STM32_PWM_USE_TIM5                  FALSE
+#define STM32_PWM_USE_TIM8                  FALSE
+#define STM32_PWM_USE_TIM9                  FALSE
+#define STM32_PWM_TIM1_IRQ_PRIORITY         7
+#define STM32_PWM_TIM2_IRQ_PRIORITY         7
+#define STM32_PWM_TIM3_IRQ_PRIORITY         7
+#define STM32_PWM_TIM4_IRQ_PRIORITY         7
+#define STM32_PWM_TIM5_IRQ_PRIORITY         7
+#define STM32_PWM_TIM8_IRQ_PRIORITY         7
+#define STM32_PWM_TIM9_IRQ_PRIORITY         7
+
+/*
+ * SDC driver system settings.
+ */
+#define STM32_SDC_SDIO_DMA_PRIORITY         3
+#define STM32_SDC_SDIO_IRQ_PRIORITY         9
+#define STM32_SDC_WRITE_TIMEOUT_MS          1000
+#define STM32_SDC_READ_TIMEOUT_MS           1000
+#define STM32_SDC_CLOCK_ACTIVATION_DELAY    10
+#define STM32_SDC_SDIO_UNALIGNED_SUPPORT    TRUE
+#define STM32_SDC_SDIO_DMA_STREAM           STM32_DMA_STREAM_ID(2, 3)
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1             TRUE
+#define STM32_SERIAL_USE_USART2             FALSE
+#define STM32_SERIAL_USE_USART3             FALSE
+#define STM32_SERIAL_USE_UART4              FALSE
+#define STM32_SERIAL_USE_UART5              FALSE
+#define STM32_SERIAL_USE_USART6             FALSE
+#define STM32_SERIAL_USART1_PRIORITY        12
+#define STM32_SERIAL_USART2_PRIORITY        12
+#define STM32_SERIAL_USART3_PRIORITY        12
+#define STM32_SERIAL_UART4_PRIORITY         12
+#define STM32_SERIAL_UART5_PRIORITY         12
+#define STM32_SERIAL_USART6_PRIORITY        12
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1                  TRUE
+#define STM32_SPI_USE_SPI2                  FALSE
+#define STM32_SPI_USE_SPI3                  FALSE
+#define STM32_SPI_SPI1_RX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 0)
+#define STM32_SPI_SPI1_TX_DMA_STREAM        STM32_DMA_STREAM_ID(2, 3)
+#define STM32_SPI_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)
+#define STM32_SPI_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
+#define STM32_SPI_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)
+#define STM32_SPI_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)
+#define STM32_SPI_SPI1_DMA_PRIORITY         1
+#define STM32_SPI_SPI2_DMA_PRIORITY         1
+#define STM32_SPI_SPI3_DMA_PRIORITY         1
+#define STM32_SPI_SPI1_IRQ_PRIORITY         10
+#define STM32_SPI_SPI2_IRQ_PRIORITY         10
+#define STM32_SPI_SPI3_IRQ_PRIORITY         10
+#define STM32_SPI_DMA_ERROR_HOOK(spip)      osalSysHalt("DMA failure")
+
+/*
+ * ST driver system settings.
+ */
+#define STM32_ST_IRQ_PRIORITY               8
+#define STM32_ST_USE_TIMER                  2
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1               FALSE
+#define STM32_UART_USE_USART2               TRUE
+#define STM32_UART_USE_USART3               TRUE
+#define STM32_UART_USE_UART4                FALSE
+#define STM32_UART_USE_UART5                FALSE
+#define STM32_UART_USE_USART6               FALSE
+#define STM32_UART_USART1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 5)
+#define STM32_UART_USART1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)
+#define STM32_UART_USART2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 5)
+#define STM32_UART_USART2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6)
+#define STM32_UART_USART3_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 1)
+#define STM32_UART_USART3_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 3)
+#define STM32_UART_UART4_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 2)
+#define STM32_UART_UART4_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 4)
+#define STM32_UART_UART5_RX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 0)
+#define STM32_UART_UART5_TX_DMA_STREAM      STM32_DMA_STREAM_ID(1, 7)
+#define STM32_UART_USART6_RX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 2)
+#define STM32_UART_USART6_TX_DMA_STREAM     STM32_DMA_STREAM_ID(2, 7)
+#define STM32_UART_USART1_IRQ_PRIORITY      12
+#define STM32_UART_USART2_IRQ_PRIORITY      12
+#define STM32_UART_USART3_IRQ_PRIORITY      12
+#define STM32_UART_UART4_IRQ_PRIORITY       12
+#define STM32_UART_UART5_IRQ_PRIORITY       12
+#define STM32_UART_USART6_IRQ_PRIORITY      12
+#define STM32_UART_USART1_DMA_PRIORITY      0
+#define STM32_UART_USART2_DMA_PRIORITY      0
+#define STM32_UART_USART3_DMA_PRIORITY      0
+#define STM32_UART_UART4_DMA_PRIORITY       0
+#define STM32_UART_UART5_DMA_PRIORITY       0
+#define STM32_UART_USART6_DMA_PRIORITY      0
+#define STM32_UART_DMA_ERROR_HOOK(uartp)    osalSysHalt("DMA failure")
+
+/*
+ * USB driver system settings.
+ */
+#define STM32_USB_USE_OTG1                  FALSE
+#define STM32_USB_USE_OTG2                  FALSE
+#define STM32_USB_OTG1_IRQ_PRIORITY         14
+#define STM32_USB_OTG2_IRQ_PRIORITY         14
+#define STM32_USB_OTG1_RX_FIFO_SIZE         512
+#define STM32_USB_OTG2_RX_FIFO_SIZE         1024
+#define STM32_USB_OTG_THREAD_PRIO           LOWPRIO
+#define STM32_USB_OTG_THREAD_STACK_SIZE     128
+#define STM32_USB_OTGFIFO_FILL_BASEPRI      0
+
+/*
+ * WDG driver system settings.
+ */
+#define STM32_WDG_USE_IWDG                  FALSE
+
+#endif /* MCUCONF_H */
diff --git a/modules/PowerManagement_1-2/module.c b/modules/PowerManagement_1-2/module.c
new file mode 100644
index 0000000..c7de881
--- /dev/null
+++ b/modules/PowerManagement_1-2/module.c
@@ -0,0 +1,1493 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2019  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file
+ * @brief   Structures and constant for the PowerManagement module.
+ *
+ * @addtogroup powermanagement_module
+ * @{
+ */
+
+#include "module.h"
+
+/*===========================================================================*/
+/**
+ * @name Module specific functions
+ * @{
+ */
+/*===========================================================================*/
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name ChibiOS/HAL configuration
+ * @{
+ */
+/*===========================================================================*/
+
+ADCConversionGroup moduleHalAdcVsysConversionGroup = {
+  /* buffer type        */ true,
+  /* number of channels */ 1,
+  /* callback function  */ NULL,
+  /* error callback     */ NULL,
+  /* CR1                */ ADC_CR1_AWDEN | ADC_CR1_AWDIE,
+  /* CR2                */ ADC_CR2_SWSTART | ADC_CR2_CONT,
+  /* SMPR1              */ 0,
+  /* SMPR2              */ ADC_SMPR2_SMP_AN9(ADC_SAMPLE_480),
+  /* HTR                */ ADC_HTR_HT,
+  /* LTR                */ 0,
+  /* SQR1               */ ADC_SQR1_NUM_CH(1),
+  /* SQR2               */ 0,
+  /* SQR3               */ ADC_SQR3_SQ1_N(ADC_CHANNEL_IN9),
+};
+
+CANConfig moduleHalCanConfig = {
+  /* mcr  */ CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
+  /* btr  */ CAN_BTR_SJW(1) | CAN_BTR_TS2(3) | CAN_BTR_TS1(15) | CAN_BTR_BRP(1),
+};
+
+I2CConfig moduleHalI2cSrPm18Pm33GaugeRearConfig = {
+  /* I²C mode   */ OPMODE_I2C,
+  /* frequency  */ 400000, // TODO: replace with some macro (-> ChibiOS/HAL)
+  /* duty cycle */ FAST_DUTY_CYCLE_2,
+};
+
+I2CConfig moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig = {
+  /* I²C mode   */ OPMODE_I2C,
+  /* frequency  */ 400000, // TODO: replace with some macro (-> ChibiOS/HAL)
+  /* duty cycle */ FAST_DUTY_CYCLE_2,
+};
+
+PWMConfig moduleHalPwmBuzzerConfig = {
+  /* frequency              */ 1000000,
+  /* period                 */ 0,
+  /* callback               */ NULL,
+  /* channel configurations */ {
+    /* channel 0              */ {
+      /* mode                   */ PWM_OUTPUT_DISABLED,
+      /* callback               */ NULL
+    },
+    /* channel 1              */ {
+      /* mode                   */ PWM_OUTPUT_ACTIVE_HIGH,
+      /* callback               */ NULL
+    },
+    /* channel 2              */ {
+      /* mode                   */ PWM_OUTPUT_DISABLED,
+      /* callback               */ NULL
+    },
+    /* channel 3              */ {
+      /* mode                   */ PWM_OUTPUT_DISABLED,
+      /* callback               */ NULL
+    },
+  },
+  /* TIM CR2 register       */ 0,
+#if (STM32_PWM_USE_ADVANCED == TRUE)
+  /* TIM BDTR register      */ 0,
+#endif /* (STM32_PWM_USE_ADVANCED == TRUE) */
+  /* TIM DIER register      */ 0,
+};
+
+SerialConfig moduleHalProgIfConfig = {
+  /* bit rate */ 115200,
+  /* CR1      */ 0,
+  /* CR1      */ 0,
+  /* CR1      */ 0,
+};
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name GPIO definitions
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   SWITCH_STATUS input signal GPIO.
+ */
+static apalGpio_t _gpioSwitchStatus = {
+  /* port */ GPIOA,
+  /* pad  */ GPIOA_SWITCH_STATUS_N,
+};
+ROMCONST apalControlGpio_t moduleGpioSwitchStatus = {
+  /* GPIO */ &_gpioSwitchStatus,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_INPUT,
+    /* active state   */ APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ APAL_GPIO_EDGE_NONE,
+  },
+};
+
+/**
+ * @brief   SYS_REG_EN output signal GPIO.
+ */
+static apalGpio_t _gpioSysRegEn = {
+  /* port */ GPIOA,
+  /* pad  */ GPIOA_SYS_REG_EN,
+};
+ROMCONST apalControlGpio_t moduleGpioSysRegEn = {
+  /* GPIO */ &_gpioSysRegEn,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_OUTPUT,
+    /* active state   */ APAL_GPIO_ACTIVE_HIGH,
+    /* interrupt edge */ APAL_GPIO_EDGE_NONE,
+  },
+};
+
+/**
+ * @brief   IR_INT1 input signal GPIO.
+ */
+static apalGpio_t _gpioIrInt1 = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_IR_INT1_N,
+};
+ROMCONST apalControlGpio_t moduleGpioIrInt1 = {
+  /* GPIO */ &_gpioIrInt1,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_INPUT,
+#if (BOARD_SENSORRING == BOARD_PROXIMITYSENSOR)
+    /* active state   */ (VCNL4020_LLD_INT_EDGE == APAL_GPIO_EDGE_RISING) ? APAL_GPIO_ACTIVE_HIGH : APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ VCNL4020_LLD_INT_EDGE,
+#elif (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L0X)
+    /* active state   */ (PCAL6524_LLD_INT_EDGE == APAL_GPIO_EDGE_RISING) ? APAL_GPIO_ACTIVE_HIGH : APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ PCAL6524_LLD_INT_EDGE,
+#elif (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L1X)
+    /* active state   */ (PCAL6524_LLD_INT_EDGE == APAL_GPIO_EDGE_RISING) ? APAL_GPIO_ACTIVE_HIGH : APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ PCAL6524_LLD_INT_EDGE,
+#else /* (BOARD_SENSORRING == ?) */
+    /* active state   */ APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ APAL_GPIO_EDGE_NONE,
+#endif /* (BOARD_SENSORRING == ?) */
+  },
+};
+
+/**
+ * @brief   POWER_EN output signal GPIO.
+ */
+static apalGpio_t _gpioPowerEn = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_POWER_EN,
+};
+ROMCONST apalControlGpio_t moduleGpioPowerEn = {
+  /* GPIO */ &_gpioPowerEn,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_OUTPUT,
+    /* active state   */ APAL_GPIO_ACTIVE_HIGH,
+    /* interrupt edge */ APAL_GPIO_EDGE_NONE,
+  },
+};
+
+/**
+ * @brief   SYS_UART_DN bidirectional signal GPIO.
+ */
+static apalGpio_t _gpioSysUartDn = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_SYS_UART_DN,
+};
+ROMCONST apalControlGpio_t moduleGpioSysUartDn = {
+  /* GPIO */ &_gpioSysUartDn,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
+    /* active state   */ APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ APAL_GPIO_EDGE_BOTH,
+  },
+};
+
+/**
+ * @brief   CHARGE_STAT2A input signal GPIO.
+ */
+static apalGpio_t _gpioChargeStat2A = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_CHARGE_STAT2A,
+};
+ROMCONST apalControlGpio_t moduleGpioChargeStat2A = {
+  /* GPIO */ &_gpioChargeStat2A,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_INPUT,
+    /* active state   */ BQ241xx_LLD_CHARGE_STATUS_GPIO_ACTIVE_STATE,
+    /* interrupt edge */ APAL_GPIO_EDGE_NONE,
+  },
+};
+
+/**
+ * @brief   GAUGE_BATLOW2 input signal GPIO.
+ */
+static apalGpio_t _gpioGaugeBatLow2 = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_GAUGE_BATLOW2,
+};
+ROMCONST apalControlGpio_t moduleGpioGaugeBatLow2 = {
+  /* GPIO */ &_gpioGaugeBatLow2,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_INPUT,
+    /* active state   */ BQ27500_LLD_BATLOW_ACTIVE_STATE,
+    /* interrupt edge */ APAL_GPIO_EDGE_BOTH,
+  },
+};
+
+/**
+ * @brief   GAUGE_BATGD2 input signal GPIO.
+ */
+static apalGpio_t _gpioGaugeBatGd2 = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_GAUGE_BATGD2_N,
+};
+ROMCONST apalControlGpio_t moduleGpioGaugeBatGd2 = {
+  /* GPIO */ &_gpioGaugeBatGd2,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_INPUT,
+    /* active state   */ BQ27500_LLD_BATGOOD_ACTIVE_STATE,
+    /* interrupt edge */ APAL_GPIO_EDGE_BOTH,
+  },
+};
+
+/**
+ * @brief   LED output signal GPIO.
+ */
+static apalGpio_t _gpioLed = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_LED,
+};
+ROMCONST apalControlGpio_t moduleGpioLed = {
+  /* GPIO */ &_gpioLed,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_OUTPUT,
+    /* active state   */ LED_LLD_GPIO_ACTIVE_STATE,
+    /* interrupt edge */ APAL_GPIO_EDGE_NONE,
+  },
+};
+
+/**
+ * @brief   SYS_UART_UP bidirectional signal GPIO.
+ */
+static apalGpio_t _gpioSysUartUp = {
+  /* port */ GPIOB,
+  /* pad  */ GPIOB_SYS_UART_UP,
+};
+ROMCONST apalControlGpio_t moduleGpioSysUartUp = {
+  /* GPIO */ &_gpioSysUartUp,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
+    /* active state   */ APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ APAL_GPIO_EDGE_BOTH,
+  },
+};
+
+/**
+ * @brief   CHARGE_STAT1A input signal GPIO.
+ */
+static apalGpio_t _gpioChargeStat1A = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_CHARGE_STAT1A,
+};
+ROMCONST apalControlGpio_t moduleGpioChargeStat1A = {
+  /* GPIO */ &_gpioChargeStat1A,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_INPUT,
+    /* active state   */ BQ241xx_LLD_CHARGE_STATUS_GPIO_ACTIVE_STATE,
+    /* interrupt edge */ APAL_GPIO_EDGE_NONE,
+  },
+};
+
+/**
+ * @brief   GAUGE_BATLOW1 input signal GPIO.
+ */
+static apalGpio_t _gpioGaugeBatLow1 = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_GAUGE_BATLOW1,
+};
+ROMCONST apalControlGpio_t moduleGpioGaugeBatLow1 = {
+  /* GPIO */ &_gpioGaugeBatLow1,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_INPUT,
+    /* active state   */ BQ27500_LLD_BATLOW_ACTIVE_STATE,
+    /* interrupt edge */ APAL_GPIO_EDGE_BOTH,
+  },
+};
+
+/**
+ * @brief   GAUGE_BATGD1 input signal GPIO.
+ */
+static apalGpio_t _gpioGaugeBatGd1 = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_GAUGE_BATGD1_N,
+};
+ROMCONST apalControlGpio_t moduleGpioGaugeBatGd1 = {
+  /* GPIO */ &_gpioGaugeBatGd1,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_INPUT,
+    /* active state   */ BQ27500_LLD_BATGOOD_ACTIVE_STATE,
+    /* interrupt edge */ APAL_GPIO_EDGE_BOTH,
+  },
+};
+
+/**
+ * @brief   CHARG_EN1 output signal GPIO.
+ */
+static apalGpio_t _gpioChargeEn1 = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_CHARGE_EN1_N,
+};
+ROMCONST apalControlGpio_t moduleGpioChargeEn1 = {
+  /* GPIO */ &_gpioChargeEn1,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_OUTPUT,
+    /* active state   */ BQ241xx_LLD_ENABLED_GPIO_ACTIVE_STATE,
+    /* interrupt edge */ APAL_GPIO_EDGE_NONE,
+  },
+};
+
+/**
+ * @brief   IR_INT2 input signal GPIO.
+ */
+static apalGpio_t _gpioIrInt2 = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_IR_INT2_N,
+};
+ROMCONST apalControlGpio_t moduleGpioIrInt2 = {
+  /* GPIO */ &_gpioIrInt2,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_INPUT,
+#if (BOARD_SENSORRING == BOARD_PROXIMITYSENSOR)
+    /* active state   */ (VCNL4020_LLD_INT_EDGE == APAL_GPIO_EDGE_RISING) ? APAL_GPIO_ACTIVE_HIGH : APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ VCNL4020_LLD_INT_EDGE,
+#elif (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L0X)
+    /* active state   */ (PCAL6524_LLD_INT_EDGE == APAL_GPIO_EDGE_RISING) ? APAL_GPIO_ACTIVE_HIGH : APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ PCAL6524_LLD_INT_EDGE,
+#elif (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L1X)
+    /* active state   */ (PCAL6524_LLD_INT_EDGE == APAL_GPIO_EDGE_RISING) ? APAL_GPIO_ACTIVE_HIGH : APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ PCAL6524_LLD_INT_EDGE,
+#else /* (BOARD_SENSORRING == ?) */
+    /* active state   */ APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ APAL_GPIO_EDGE_NONE,
+#endif /* (BOARD_SENSORRING == ?) */
+  },
+};
+
+/**
+ * @brief   TOUCH_INT input signal GPIO.
+ */
+static apalGpio_t _gpioTouchInt = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_TOUCH_INT_N,
+};
+ROMCONST apalControlGpio_t moduleGpioTouchInt = {
+  /* GPIO */ &_gpioTouchInt,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_INPUT,
+#if (BOARD_SENSORRING == BOARD_PROXIMITYSENSOR)
+    /* active state   */ (MPR121_LLD_INT_EDGE == APAL_GPIO_EDGE_RISING) ? APAL_GPIO_ACTIVE_HIGH : APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ MPR121_LLD_INT_EDGE,
+#elif (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L0X)
+    /* active state   */ (AT42QT1050_LLD_INT_EDGE == APAL_GPIO_EDGE_RISING) ? APAL_GPIO_ACTIVE_HIGH : APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ AT42QT1050_LLD_INT_EDGE,
+#elif (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L1X)
+    /* active state   */ (AT42QT1050_LLD_INT_EDGE == APAL_GPIO_EDGE_RISING) ? APAL_GPIO_ACTIVE_HIGH : APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ AT42QT1050_LLD_INT_EDGE,
+#else /* (BOARD_SENSORRING == ?) */
+    /* active state   */ APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ APAL_GPIO_EDGE_NONE,
+#endif /* (BOARD_SENSORRING == ?) */
+  },
+};
+
+/**
+ * @brief   SYS_DONE input signal GPIO.
+ */
+static apalGpio_t _gpioSysDone = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_SYS_DONE,
+};
+ROMCONST apalControlGpio_t moduleGpioSysDone = {
+  /* GPIO */ &_gpioSysDone,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_INPUT,
+    /* active state   */ APAL_GPIO_ACTIVE_HIGH,
+    /* interrupt edge */ APAL_GPIO_EDGE_NONE,
+  },
+};
+
+/**
+ * @brief   SYS_PROG output signal GPIO.
+ */
+static apalGpio_t _gpioSysProg = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_SYS_PROG_N,
+};
+ROMCONST apalControlGpio_t moduleGpioSysProg = {
+  /* GPIO */ &_gpioSysProg,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_OUTPUT,
+    /* active state   */ APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ APAL_GPIO_EDGE_NONE,
+  },
+};
+
+/**
+ * @brief   PATH_DC input signal GPIO.
+ */
+static apalGpio_t _gpioPathDc = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_PATH_DC,
+};
+ROMCONST apalControlGpio_t moduleGpioPathDc = {
+  /* GPIO */ &_gpioPathDc,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_INPUT,
+    /* active state   */ APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ APAL_GPIO_EDGE_BOTH,
+  },
+};
+
+/**
+ * @brief   SYS_SPI_DIR bidirectional signal GPIO.
+ */
+static apalGpio_t _gpioSysSpiDir = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_SYS_SPI_DIR,
+};
+ROMCONST apalControlGpio_t moduleGpioSysSpiDir = {
+  /* GPIO */ &_gpioSysSpiDir,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
+    /* active state   */ APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ APAL_GPIO_EDGE_FALLING,
+  },
+};
+
+/**
+ * @brief   SYS_SYNC bidirectional signal GPIO.
+ */
+static apalGpio_t _gpioSysSync = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_SYS_INT_N,
+};
+ROMCONST apalControlGpio_t moduleGpioSysSync = {
+  /* GPIO */ &_gpioSysSync,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
+    /* active state   */ APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ APAL_GPIO_EDGE_BOTH,
+  },
+};
+
+/**
+ * @brief   SYS_PD bidirectional signal GPIO.
+ */
+static apalGpio_t _gpioSysPd = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_SYS_PD_N,
+};
+ROMCONST apalControlGpio_t moduleGpioSysPd = {
+  /* GPIO */ &_gpioSysPd,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
+    /* active state   */ APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ APAL_GPIO_EDGE_BOTH,
+  },
+};
+
+/**
+ * @brief   SYS_WARMRST bidirectional signal GPIO.
+ */
+static apalGpio_t _gpioSysWarmrst = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_SYS_WARMRST_N,
+};
+ROMCONST apalControlGpio_t moduleGpioSysWarmrst = {
+  /* GPIO */ &_gpioSysWarmrst,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_BIDIRECTIONAL,
+    /* active state   */ APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ APAL_GPIO_EDGE_BOTH,
+  },
+};
+
+/**
+ * @brief   BT_RST output signal GPIO.
+ */
+static apalGpio_t _gpioBtRst = {
+  /* port */ GPIOC,
+  /* pad  */ GPIOC_BT_RST,
+};
+ROMCONST apalControlGpio_t moduleGpioBtRst = {
+  /* GPIO */ &_gpioBtRst,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_OUTPUT,
+    /* active state   */ APAL_GPIO_ACTIVE_LOW,
+    /* interrupt edge */ APAL_GPIO_EDGE_NONE,
+  },
+};
+
+/**
+ * @brief   CHARGE_EN2 output signal GPIO.
+ */
+static apalGpio_t _gpioChargeEn2 = {
+  /* port */ GPIOD,
+  /* pad  */ GPIOD_CHARGE_EN2_N,
+};
+ROMCONST apalControlGpio_t moduleGpioChargeEn2 = {
+  /* GPIO */ &_gpioChargeEn2,
+  /* meta */ {
+    /* direction      */ APAL_GPIO_DIRECTION_OUTPUT,
+    /* active state   */ BQ241xx_LLD_ENABLED_GPIO_ACTIVE_STATE,
+    /* interrupt edge */ APAL_GPIO_EDGE_NONE,
+  },
+};
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name AMiRo-OS core configurations
+ * @{
+ */
+/*===========================================================================*/
+
+#if (AMIROOS_CFG_SHELL_ENABLE == true) || (AMIROOS_CFG_TESTS_ENABLE == true) || defined(__DOXYGEN__)
+ROMCONST char* moduleShellPrompt = "PowerManagement";
+#endif /* (AMIROOS_CFG_SHELL_ENABLE == true) || (AMIROOS_CFG_TESTS_ENABLE == true) */
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Startup Shutdown Synchronization Protocol (SSSP)
+ * @{
+ */
+/*===========================================================================*/
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Low-level drivers
+ * @{
+ */
+/*===========================================================================*/
+
+AT24C01BDriver moduleLldEeprom = {
+  /* I2C driver   */ &MODULE_HAL_I2C_SR_PM42_PM50_PMVDD_EEPROM_GAUGEFRONT,
+  /* I2C address  */ AT24C01B_LLD_I2C_ADDR_FIXED,
+};
+
+BQ241xxDriver moduleLldBatteryChargerFront = {
+  /* charge enable GPIO */ &moduleGpioChargeEn1,
+  /* charge status GPIO */ &moduleGpioChargeStat1A,
+};
+
+BQ241xxDriver moduleLldBatteryChargerRear = {
+  /* charge enable GPIO */ &moduleGpioChargeEn2,
+  /* charge status GPIO */ &moduleGpioChargeStat2A,
+};
+
+BQ27500Driver moduleLldFuelGaugeFront = {
+  /* I2C driver         */ &MODULE_HAL_I2C_SR_PM42_PM50_PMVDD_EEPROM_GAUGEFRONT,
+  /* battery low GPIO   */ &moduleGpioGaugeBatLow1,
+  /* battery good GPIO  */ &moduleGpioGaugeBatGd1,
+};
+
+BQ27500Driver moduleLldFuelGaugeRear = {
+  /* I2C driver         */ &MODULE_HAL_I2C_SR_PM18_PM33_GAUGEREAR,
+  /* battery low GPIO   */ &moduleGpioGaugeBatLow2,
+  /* battery good GPIO  */ &moduleGpioGaugeBatGd2,
+};
+
+INA219Driver moduleLldPowerMonitorVdd = {
+  /* I2C Driver       */ &MODULE_HAL_I2C_SR_PM42_PM50_PMVDD_EEPROM_GAUGEFRONT,
+  /* I²C address      */ INA219_LLD_I2C_ADDR_A0 | INA219_LLD_I2C_ADDR_A1,
+  /* current LSB (uA) */ 0x00u,
+  /* configuration    */ NULL,
+};
+
+INA219Driver moduleLldPowerMonitorVio18 = {
+  /* I2C Driver       */ &MODULE_HAL_I2C_SR_PM18_PM33_GAUGEREAR,
+  /* I²C address      */ INA219_LLD_I2C_ADDR_A1,
+  /* current LSB (uA) */ 0x00u,
+  /* configuration    */ NULL,
+};
+
+INA219Driver moduleLldPowerMonitorVio33 = {
+  /* I2C Driver       */ &MODULE_HAL_I2C_SR_PM18_PM33_GAUGEREAR,
+  /* I²C address      */ INA219_LLD_I2C_ADDR_FIXED,
+  /* current LSB (uA) */ 0x00u,
+  /* configuration    */ NULL,
+};
+
+INA219Driver moduleLldPowerMonitorVsys42 = {
+  /* I2C Driver       */ &MODULE_HAL_I2C_SR_PM42_PM50_PMVDD_EEPROM_GAUGEFRONT,
+  /* I²C address      */ INA219_LLD_I2C_ADDR_FIXED,
+  /* current LSB (uA) */ 0x00u,
+  /* configuration    */ NULL,
+};
+
+INA219Driver moduleLldPowerMonitorVio50 = {
+  /* I2C Driver       */ &MODULE_HAL_I2C_SR_PM42_PM50_PMVDD_EEPROM_GAUGEFRONT,
+  /* I²C address      */ INA219_LLD_I2C_ADDR_A1,
+  /* current LSB (uA) */ 0x00u,
+  /* configuration    */ NULL,
+};
+
+LEDDriver moduleLldStatusLed = {
+  /* LED GPIO */ &moduleGpioLed,
+};
+
+TPS6211xDriver moduleLldStepDownConverter = {
+  /* Power enable GPIO */ &moduleGpioPowerEn,
+};
+
+#if (BOARD_SENSORRING == BOARD_PROXIMITYSENSOR) || defined(__DOXYGEN__)
+
+MPR121Driver moduleLldTouch = {
+  /* I²C Driver */ &MODULE_HAL_I2C_SR_PM42_PM50_PMVDD_EEPROM_GAUGEFRONT,
+};
+
+PCA9544ADriver moduleLldI2cMultiplexer1 = {
+  /* I²C driver   */ &MODULE_HAL_I2C_SR_PM18_PM33_GAUGEREAR,
+  /* I²C address  */ PCA9544A_LLD_I2C_ADDR_A0 | PCA9544A_LLD_I2C_ADDR_A1 | PCA9544A_LLD_I2C_ADDR_A2,
+};
+
+PCA9544ADriver moduleLldI2cMultiplexer2 = {
+  /* I²C driver   */ &MODULE_HAL_I2C_SR_PM42_PM50_PMVDD_EEPROM_GAUGEFRONT,
+  /* I²C address  */ PCA9544A_LLD_I2C_ADDR_A0 | PCA9544A_LLD_I2C_ADDR_A1 | PCA9544A_LLD_I2C_ADDR_A2,
+};
+
+VCNL4020Driver moduleLldProximity1 = {
+  /* I²C Driver */ &MODULE_HAL_I2C_SR_PM18_PM33_GAUGEREAR,
+};
+
+VCNL4020Driver moduleLldProximity2 = {
+  /* I²C Driver */ &MODULE_HAL_I2C_SR_PM42_PM50_PMVDD_EEPROM_GAUGEFRONT,
+};
+
+#endif /* (BOARD_SENSORRING == BOARD_PROXIMITYSENSOR) */
+
+#if (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L0X) || defined(__DOXYGEN__)
+
+PCAL6524Driver moduleLldGpioExtender1 = {
+  /* I²C driver   */ &MODULE_HAL_I2C_SR_PM18_PM33_GAUGEREAR,
+  /* I²C address  */ PCAL6524_LLD_I2C_ADDR_VDD,
+};
+
+PCAL6524Driver moduleLldGpioExtender2 = {
+  /* I²C driver   */ &MODULE_HAL_I2C_SR_PM42_PM50_PMVDD_EEPROM_GAUGEFRONT,
+  /* I²C address  */ PCAL6524_LLD_I2C_ADDR_VDD,
+};
+
+AT42QT1050Driver moduleLldTouch = {
+  /* I²C driver   */ &MODULE_HAL_I2C_SR_PM42_PM50_PMVDD_EEPROM_GAUGEFRONT,
+  /* I²C address  */ AT42QT1050_LLD_I2C_ADDRSEL_LOW,
+};
+
+#endif /* (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L0X) */
+
+#if (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L1X) || defined(__DOXYGEN__)
+
+PCAL6524Driver moduleLldGpioExtender1 = {
+  /* I²C driver   */ &MODULE_HAL_I2C_SR_PM18_PM33_GAUGEREAR,
+  /* I²C address  */ PCAL6524_LLD_I2C_ADDR_VDD,
+};
+
+PCAL6524Driver moduleLldGpioExtender2 = {
+  /* I²C driver   */ &MODULE_HAL_I2C_SR_PM42_PM50_PMVDD_EEPROM_GAUGEFRONT,
+  /* I²C address  */ PCAL6524_LLD_I2C_ADDR_VDD,
+};
+
+AT42QT1050Driver moduleLldTouch = {
+  /* I²C driver   */ &MODULE_HAL_I2C_SR_PM42_PM50_PMVDD_EEPROM_GAUGEFRONT,
+  /* I²C address  */ AT42QT1050_LLD_I2C_ADDRSEL_LOW,
+};
+
+#endif /* (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L1X) */
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Unit tests (UT)
+ * @{
+ */
+/*===========================================================================*/
+#if (AMIROOS_CFG_TESTS_ENABLE == true) || defined(__DOXYGEN__)
+#include <string.h>
+
+/*
+ * ADC
+ */
+static int _utShellCmdCb_Adc(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAdcVsys, NULL);
+  return AOS_OK;
+}
+static ut_adcdata_t _utAdcVsysData = {
+  /* driver               */ &MODULE_HAL_ADC_VSYS,
+  /* ADC conversion group */ &moduleHalAdcVsysConversionGroup,
+};
+aos_unittest_t moduleUtAdcVsys = {
+  /* name           */ "ADC",
+  /* info           */ "VSYS",
+  /* test function  */ utAdcFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:ADC",
+    /* callback */ _utShellCmdCb_Adc,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAdcVsysData,
+};
+
+/*
+ * AT24C01B (EEPROM)
+ */
+static int _utShellCmdCb_AlldAt24c01b(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldAt24c01b, NULL);
+  return AOS_OK;
+}
+static ut_at24c01bdata_t _utAlldAt24c01bData = {
+  /* driver   */ &moduleLldEeprom,
+  /* timeout  */ MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldAt24c01b = {
+  /* name           */ "AT24C01B",
+  /* info           */ "1kbit EEPROM",
+  /* test function  */ utAlldAt24c01bFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:EEPROM",
+    /* callback */ _utShellCmdCb_AlldAt24c01b,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldAt24c01bData,
+};
+
+/*
+ * bq24103a (battery charger)
+ */
+static int _utShellCmdCb_AlldBq24103a(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  // local variables
+  bool print_help = false;
+
+  // evaluate argument
+  if (argc == 2) {
+    if (strcmp(argv[1], "-f") == 0 || strcmp(argv[1], "--front") == 0) {
+      moduleUtAlldBq24103a.data = &moduleLldBatteryChargerFront;
+      aosUtRun(stream, &moduleUtAlldBq24103a, "front battery");
+      moduleUtAlldBq24103a.data = NULL;
+    }
+    else if (strcmp(argv[1], "-r") == 0 || strcmp(argv[1], "--rear") == 0) {
+      moduleUtAlldBq24103a.data = &moduleLldBatteryChargerRear;
+      aosUtRun(stream, &moduleUtAlldBq24103a, "rear battery");
+      moduleUtAlldBq24103a.data = NULL;
+    }
+    else {
+      print_help = true;
+    }
+  } else {
+    print_help = true;
+  }
+
+  // print help or just return
+  if (print_help) {
+    chprintf(stream, "Usage: %s OPTION\n", argv[0]);
+    chprintf(stream, "Options:\n");
+    chprintf(stream, "  --front, -f\n");
+    chprintf(stream, "    Test the front battery charger.\n");
+    chprintf(stream, "  --rear, -r\n");
+    chprintf(stream, "    Test the rear battery charger.\n");
+    return AOS_INVALID_ARGUMENTS;
+  } else {
+    return AOS_OK;
+  }
+}
+aos_unittest_t moduleUtAlldBq24103a = {
+  /* name           */ "bq24103a",
+  /* info           */ "battery charger",
+  /* test function  */ utAlldBq241xxFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:BatteryCharger",
+    /* callback */ _utShellCmdCb_AlldBq24103a,
+    /* next     */ NULL,
+  },
+  /* data           */ NULL,
+};
+
+/*
+ * bq27500 (fuel gauge)
+ */
+static int _utShellCmdCb_AlldBq27500(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  // evaluate arguments
+  if (argc == 2) {
+    if (strcmp(argv[1], "-f") == 0 || strcmp(argv[1], "--front") == 0) {
+      ((ut_bq27500data_t*)moduleUtAlldBq27500.data)->driver = &moduleLldFuelGaugeFront;
+      aosUtRun(stream, &moduleUtAlldBq27500, "front battery");
+      ((ut_bq27500data_t*)moduleUtAlldBq27500.data)->driver = NULL;
+      return AOS_OK;
+    }
+    else if (strcmp(argv[1], "-r") == 0 || strcmp(argv[1], "--rear") == 0) {
+      ((ut_bq27500data_t*)moduleUtAlldBq27500.data)->driver = &moduleLldFuelGaugeRear;
+      aosUtRun(stream, &moduleUtAlldBq27500, "rear battery");
+      ((ut_bq27500data_t*)moduleUtAlldBq27500.data)->driver = NULL;
+      return AOS_OK;
+    }
+  }
+  // print help
+  chprintf(stream, "Usage: %s OPTION\n", argv[0]);
+  chprintf(stream, "Options:\n");
+  chprintf(stream, "  --front, -f\n");
+  chprintf(stream, "    Test the front battery fuel gauge.\n");
+  chprintf(stream, "  --rear, -r\n");
+  chprintf(stream, "    Test the rear battery fuel gauge.\n");
+  return AOS_INVALID_ARGUMENTS;
+}
+static ut_bq27500data_t _utAlldBq27500Data = {
+  /* driver   */ NULL,
+  /* timeout  */ MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldBq27500 = {
+  /* name           */ "bq27500",
+  /* info           */ "fuel gauge",
+  /* test function  */ utAlldBq27500Func,
+  /* shell command  */ {
+    /* name     */ "unittest:FuelGauge",
+    /* callback */ _utShellCmdCb_AlldBq27500,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldBq27500Data,
+};
+
+/*
+ * bq27500 (fuel gauge) in combination with bq24103a (battery charger)
+ */
+static int _utShellCmdCb_AlldBq27500Bq24103a(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  // evaluate arguments
+  if (argc == 2) {
+    if (strcmp(argv[1], "-f") == 0 || strcmp(argv[1], "--front") == 0) {
+      ((ut_bq27500bq241xxdata_t*)moduleUtAlldBq27500Bq24103a.data)->bq27500 = &moduleLldFuelGaugeFront;
+      ((ut_bq27500bq241xxdata_t*)moduleUtAlldBq27500Bq24103a.data)->bq241xx = &moduleLldBatteryChargerFront;
+      aosUtRun(stream, &moduleUtAlldBq27500Bq24103a, "front battery");
+      ((ut_bq27500bq241xxdata_t*)moduleUtAlldBq27500Bq24103a.data)->bq27500 = NULL;
+      ((ut_bq27500bq241xxdata_t*)moduleUtAlldBq27500Bq24103a.data)->bq241xx = NULL;
+      return AOS_OK;
+    }
+    else if (strcmp(argv[1], "-r") == 0 || strcmp(argv[1], "--rear") == 0) {
+      ((ut_bq27500bq241xxdata_t*)moduleUtAlldBq27500Bq24103a.data)->bq27500 = &moduleLldFuelGaugeRear;
+      ((ut_bq27500bq241xxdata_t*)moduleUtAlldBq27500Bq24103a.data)->bq241xx = &moduleLldBatteryChargerRear;
+      aosUtRun(stream, &moduleUtAlldBq27500Bq24103a, "rear battery");
+      ((ut_bq27500bq241xxdata_t*)moduleUtAlldBq27500Bq24103a.data)->bq27500 = NULL;
+      ((ut_bq27500bq241xxdata_t*)moduleUtAlldBq27500Bq24103a.data)->bq241xx = NULL;
+      return AOS_OK;
+    }
+  }
+  // print help
+  chprintf(stream, "Usage: %s OPTION\n", argv[0]);
+  chprintf(stream, "Options:\n");
+  chprintf(stream, "  --front, -f\n");
+  chprintf(stream, "    Test the front battery fuel gauge and charger.\n");
+  chprintf(stream, "  --rear, -r\n");
+  chprintf(stream, "    Test the rear battery fuel gauge and charger.\n");
+  return AOS_INVALID_ARGUMENTS;
+}
+static ut_bq27500bq241xxdata_t _utAlldBq27500Bq24103aData= {
+  /* bq27500 driver   */ NULL,
+  /* bq24103a driver  */ NULL,
+  /* timeout          */ MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldBq27500Bq24103a = {
+  /* name           */ "BQ27500 & BQ24103A",
+  /* info           */ "fuel gauge & battery charger",
+  /* test function  */ utAlldBq27500Bq241xxFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:FuelGauge&BatteryCharger",
+    /* callback */ _utShellCmdCb_AlldBq27500Bq24103a,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldBq27500Bq24103aData,
+};
+
+/*
+ * INA219 (power monitor)
+ */
+static int _utShellCmdCb_AlldIna219(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  // evaluate arguments
+  if (argc == 2) {
+    if (strcmp(argv[1], "VDD") == 0) {
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = &moduleLldPowerMonitorVdd;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 3.3f;
+      aosUtRun(stream, &moduleUtAlldIna219, "VDD (3.3V)");
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = NULL;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 0.0f;
+      return AOS_OK;
+    }
+    else if (strcmp(argv[1], "VIO1.8") == 0) {
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = &moduleLldPowerMonitorVio18;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 1.8f;
+      aosUtRun(stream, &moduleUtAlldIna219, "VIO (1.8V)");
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = NULL;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 0.0f;
+      return AOS_OK;
+    }
+    else if (strcmp(argv[1], "VIO3.3") == 0) {
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = &moduleLldPowerMonitorVio33;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 3.3f;
+      aosUtRun(stream, &moduleUtAlldIna219, "VIO (3.3V)");
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = NULL;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 0.0f;
+      return AOS_OK;
+    }
+    else if (strcmp(argv[1], "VSYS4.2") == 0) {
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = &moduleLldPowerMonitorVsys42;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 4.2f;
+      aosUtRun(stream, &moduleUtAlldIna219, "VSYS (4.2V)");
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = NULL;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 0.0f;
+      return AOS_OK;
+    }
+    else if (strcmp(argv[1], "VIO5.0") == 0) {
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = &moduleLldPowerMonitorVio50;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 5.0f;
+      aosUtRun(stream, &moduleUtAlldIna219, "VIO (5.0V)");
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->inad = NULL;
+      ((ut_ina219data_t*)moduleUtAlldIna219.data)->v_expected = 0.0f;
+      return AOS_OK;
+    }
+  }
+  // print help
+  chprintf(stream, "Usage: %s OPTION\n", argv[0]);
+  chprintf(stream, "Options:\n");
+  chprintf(stream, "  VDD\n");
+  chprintf(stream, "    Test VDD (3.3V) power monitor.\n");
+  chprintf(stream, "  VIO1.8\n");
+  chprintf(stream, "    Test VIO 1.8V power monitor.\n");
+  chprintf(stream, "  VIO3.3\n");
+  chprintf(stream, "    Test VIO 3.3V power monitor.\n");
+  chprintf(stream, "  VSYS4.2\n");
+  chprintf(stream, "    Test VSYS 4.2V power monitor.\n");
+  chprintf(stream, "  VIO5.0\n");
+  chprintf(stream, "    Test VIO 5.0V power monitor.\n");
+  return AOS_INVALID_ARGUMENTS;
+}
+static ut_ina219data_t _utAlldIna219Data = {
+  /* driver           */ NULL,
+  /* expected voltage */ 0.0f,
+  /* tolerance        */ 0.05f,
+  /* timeout          */ MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldIna219 = {
+  /* name           */ "INA219",
+  /* info           */ "power monitor",
+  /* test function  */ utAlldIna219Func,
+  /* shell command  */ {
+    /* name     */ "unittest:PowerMonitor",
+    /* callback */ _utShellCmdCb_AlldIna219,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldIna219Data,
+};
+
+/*
+ * Status LED
+ */
+static int _utShellCmdCb_AlldLed(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldLed, NULL);
+  return AOS_OK;
+}
+aos_unittest_t moduleUtAlldLed = {
+  /* name           */ "LED",
+  /* info           */ NULL,
+  /* test function  */ utAlldLedFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:StatusLED",
+    /* callback */ _utShellCmdCb_AlldLed,
+    /* next     */ NULL,
+  },
+  /* data           */ &moduleLldStatusLed,
+};
+
+/*
+ * PKLCS1212E4001 (buzzer)
+ */
+static int _utShellCmdCb_AlldPklcs1212e4001(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldPklcs1212e4001, NULL);
+  return AOS_OK;
+}
+static ut_pkxxxexxx_t _utAlldPklcs1212e4001Data = {
+  /* PWM driver   */ &MODULE_HAL_PWM_BUZZER,
+  /* PWM channel  */ MODULE_HAL_PWM_BUZZER_CHANNEL
+};
+aos_unittest_t moduleUtAlldPklcs1212e4001 = {
+  /* name           */ "PKLCS1212E4001",
+  /* info           */ "buzzer",
+  /* test function  */ utAlldPkxxxexxxFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:Buzzer",
+    /* callback */ _utShellCmdCb_AlldPklcs1212e4001,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldPklcs1212e4001Data,
+};
+
+/*
+ * TPS62113 (step-down converter)
+ */
+static int _utShellCmdCb_AlldTps62113(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  // Although there are four TPS62113 on the PCB, they all share the same input signal.
+  // A sa result, no additional shell arguments need to be evaluated.
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldTps62113, NULL);
+  return AOS_OK;
+}
+aos_unittest_t moduleUtAlldTps62113 = {
+  /* name           */ "TPS62113",
+  /* info           */ "step-down converter",
+  /* test function  */ utAlldTps6211xFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:StepDownConverter",
+    /* callback */ _utShellCmdCb_AlldTps62113,
+    /* next     */ NULL,
+  },
+  /* data           */ &moduleLldStepDownConverter,
+};
+
+/*
+ * TPS62113 (step-donw converter) in combination with INA219 (power monitor)
+ */
+static int _utShellCmdCb_AlldTps62113Ina219(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldTps62113Ina219, "VSYS (4.2V)");
+  return AOS_OK;
+}
+static ut_tps6211xina219data_t _utAlldTps62113Ina219Data = {
+  /* TPS62113 */ &moduleLldStepDownConverter,
+  /* INA219   */ &moduleLldPowerMonitorVsys42,
+  /* timeout  */ MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldTps62113Ina219 = {
+  /* name           */ "TPS62113 & INA219",
+  /* info           */ "step-down converter & power monitor",
+  /* test function  */ utAlldTps6211xIna219Func,
+  /* shell command  */ {
+    /* name     */ "unittest:StepDownConverter&PowerMonitor",
+    /* callback */ _utShellCmdCb_AlldTps62113Ina219,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldTps62113Ina219Data,
+};
+
+#if (BOARD_SENSORRING == BOARD_PROXIMITYSENSOR) || defined(__DOXYGEN__)
+
+/*
+ * MPR121 (touch sensor)
+ */
+static int _utShellCmdCb_AlldMpr121(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldMpr121, NULL);
+  return AOS_OK;
+}
+static ut_mpr121data_t _utAlldMpr121Data= {
+  /* MPR121 driver  */ &moduleLldTouch,
+  /* timeout        */ MICROSECONDS_PER_SECOND,
+  /* event source   */ &aos.events.io,
+  /* event flags    */ MODULE_OS_IOEVENTFLAGS_TOUCHINT,
+};
+aos_unittest_t moduleUtAlldMpr121 = {
+  /* name           */ "MPR121",
+  /* info           */ "touch sensor",
+  /* test function  */ utAlldMpr121Func,
+  /* shell command  */ {
+    /* name     */ "unittest:Touch",
+    /* callback */ _utShellCmdCb_AlldMpr121,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldMpr121Data,
+};
+
+/*
+ * PCA9544A (I2C multiplexer)
+ */
+static int _utShellCmdCb_AlldPca5944a(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  // evaluate arguments
+  if (argc == 2) {
+    if (strcmp(argv[1], "#1") == 0) {
+      ((ut_pca9544adata_t*)moduleUtAlldPca9544a.data)->driver = &moduleLldI2cMultiplexer1;
+      aosUtRun(stream, &moduleUtAlldPca9544a, "I2C bus #1");
+      ((ut_pca9544adata_t*)moduleUtAlldPca9544a.data)->driver = NULL;
+      return AOS_OK;
+    }
+    else if (strcmp(argv[1], "#2") == 0) {
+      ((ut_pca9544adata_t*)moduleUtAlldPca9544a.data)->driver = &moduleLldI2cMultiplexer2;
+      aosUtRun(stream, &moduleUtAlldPca9544a, "I2C bus #2");
+      ((ut_pca9544adata_t*)moduleUtAlldPca9544a.data)->driver = NULL;
+      return AOS_OK;
+    }
+  }
+  // print help
+  chprintf(stream, "Usage: %s OPTION\n", argv[0]);
+  chprintf(stream, "Options:\n");
+  chprintf(stream, "  #1\n");
+  chprintf(stream, "    Test the multiplexer on the I2C bus #1.\n");
+  chprintf(stream, "  #2\n");
+  chprintf(stream, "    Test the multiplexer on the I2C bus #2.\n");
+  return AOS_INVALID_ARGUMENTS;
+}
+static ut_pca9544adata_t _utAlldPca9544aData = {
+  /* driver   */ NULL,
+  /* timeout  */ MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldPca9544a = {
+  /* name           */ "PCA9544A",
+  /* info           */ "I2C multiplexer",
+  /* test function  */ utAlldPca9544aFunc,
+  /* shell command  */ {
+    /* name     */ "unittest:I2CMultiplexer",
+    /* callback */ _utShellCmdCb_AlldPca5944a,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldPca9544aData,
+};
+
+/*
+ * VCNL4020 (proximity sensor)
+ */
+static void _utAlldVcnl4020_disableInterrupt(VCNL4020Driver* vcnl)
+{
+  uint8_t intstatus;
+  vcnl4020_lld_writereg(vcnl, VCNL4020_LLD_REGADDR_INTCTRL, 0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+  vcnl4020_lld_readreg(vcnl, VCNL4020_LLD_REGADDR_INTSTATUS, &intstatus, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+  if (intstatus) {
+    vcnl4020_lld_writereg(vcnl, VCNL4020_LLD_REGADDR_INTSTATUS, intstatus, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+  }
+  return;
+}
+static int _utShellCmdCb_AlldVcnl4020(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  enum {
+    UNKNOWN,
+    NNE, ENE, ESE, SSE, SSW,WSW,WNW, NNW,
+  } sensor = UNKNOWN;
+  // evaluate arguments
+  if (argc == 2) {
+    if (strcmp(argv[1], "-nne") == 0) {
+      sensor = NNE;
+    } else if (strcmp(argv[1], "-ene") == 0) {
+      sensor = ENE;
+    } else if (strcmp(argv[1], "-ese") == 0) {
+      sensor = ESE;
+    } else if (strcmp(argv[1], "-sse") == 0) {
+      sensor = SSE;
+    } else if (strcmp(argv[1], "-ssw") == 0) {
+      sensor = SSW;
+    } else if (strcmp(argv[1], "-wsw") == 0) {
+      sensor = WSW;
+    } else if (strcmp(argv[1], "-wnw") == 0) {
+      sensor = WNW;
+    } else if (strcmp(argv[1], "-nnw") == 0) {
+      sensor = NNW;
+    }
+  }
+  if (sensor != UNKNOWN) {
+    PCA9544ADriver* mux = NULL;
+    switch (sensor) {
+      case SSE:
+      case SSW:
+      case WSW:
+      case WNW:
+        mux = &moduleLldI2cMultiplexer1;
+        ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld = &moduleLldProximity1;
+        ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT2;
+        break;
+      case NNW:
+      case NNE:
+      case ENE:
+      case ESE:
+        mux = &moduleLldI2cMultiplexer2;
+        ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld = &moduleLldProximity2;
+        ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->evtflags = MODULE_OS_IOEVENTFLAGS_IRINT1;
+        break;
+      default:
+        break;
+    }
+    pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
+    pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH1, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
+    pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH2, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
+    pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH3, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+    _utAlldVcnl4020_disableInterrupt(((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld);
+    switch (sensor) {
+      case NNE:
+        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH1, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "north-northeast sensor");
+        break;
+      case ENE:
+        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH3, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "east-northeast sensor");
+        break;
+      case ESE:
+        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH2, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "north-southeast sensor");
+        break;
+      case SSE:
+        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "south-southeast sensor");
+        break;
+      case SSW:
+        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH1, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "south-southwest sensor");
+        break;
+      case WSW:
+        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH3, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "west-southwest sensor");
+        break;
+      case WNW:
+        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH2, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "west-northwest sensor");
+        break;
+      case NNW:
+        pca9544a_lld_setchannel(mux, PCA9544A_LLD_CH0, ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->timeout);
+        aosUtRun(stream, &moduleUtAlldVcnl4020, "north-northwest sensor");
+        break;
+      default:
+        break;
+    }
+    ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->vcnld = NULL;
+    ((ut_vcnl4020data_t*)moduleUtAlldVcnl4020.data)->evtflags = 0;
+    return AOS_OK;
+  }
+  // print help
+  chprintf(stream, "Usage: %s OPTION\n", argv[0]);
+  chprintf(stream, "Options:\n");
+  chprintf(stream, "  -nne\n");
+  chprintf(stream, "    Test north-northeast sensor.\n");
+  chprintf(stream, "  -ene\n");
+  chprintf(stream, "    Test east-northeast sensor.\n");
+  chprintf(stream, "  -ese\n");
+  chprintf(stream, "    Test east-southeast sensor.\n");
+  chprintf(stream, "  -sse\n");
+  chprintf(stream, "    Test south-southeast sensor.\n");
+  chprintf(stream, "  -ssw\n");
+  chprintf(stream, "    Test south-southwest sensor.\n");
+  chprintf(stream, "  -wsw\n");
+  chprintf(stream, "    Test west-southwest sensor.\n");
+  chprintf(stream, "  -wnw\n");
+  chprintf(stream, "    Test west-northwest sensor.\n");
+  chprintf(stream, "  -nnw\n");
+  chprintf(stream, "    Test north-northwest sensor.\n");
+  return AOS_INVALID_ARGUMENTS;
+}
+static ut_vcnl4020data_t _utAlldVcnl4020Data = {
+  /* driver       */ NULL,
+  /* timeout      */ MICROSECONDS_PER_SECOND,
+  /* event source */ &aos.events.io,
+  /* event flags  */ 0,
+};
+aos_unittest_t moduleUtAlldVcnl4020 = {
+  /* name           */ "VCNL4020",
+  /* info           */ "proximity sensor",
+  /* test function  */ utAlldVcnl4020Func,
+  /* shell command  */ {
+    /* name     */ "unittest:Proximity",
+    /* callback */ _utShellCmdCb_AlldVcnl4020,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldVcnl4020Data,
+};
+
+#endif /* (BOARD_SENSORRING == BOARD_PROXIMITYSENSOR) */
+
+#if (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L0X) || defined(__DOXYGEN__)
+
+/*
+ * PCAL6524 (GPIO extender)
+ */
+static int _utShellCmdCb_AlldPcal6524(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  // evaluate arguments
+  if (argc == 2) {
+    if (strcmp(argv[1], "#1") == 0) {
+      ((ut_pcal6524data_t*)moduleUtAlldPcal6524.data)->pcal6524d = &moduleLldGpioExtender1;
+      aosUtRun(stream, &moduleUtAlldPcal6524, "I2C bus #1");
+      ((ut_pcal6524data_t*)moduleUtAlldPcal6524.data)->pcal6524d = NULL;
+      return AOS_OK;
+    }
+    else if (strcmp(argv[1], "#2") == 0) {
+      ((ut_pcal6524data_t*)moduleUtAlldPcal6524.data)->pcal6524d = &moduleLldGpioExtender2;
+      aosUtRun(stream, &moduleUtAlldPcal6524, "I2C bus #2");
+      ((ut_pcal6524data_t*)moduleUtAlldPcal6524.data)->pcal6524d = NULL;
+      return AOS_OK;
+    }
+  }
+  // print help
+  chprintf(stream, "Usage: %s OPTION\n", argv[0]);
+  chprintf(stream, "Options:\n");
+  chprintf(stream, "  #1\n");
+  chprintf(stream, "    Test the GPIO extender on the I2C bus #1.\n");
+  chprintf(stream, "  #2\n");
+  chprintf(stream, "    Test the GPIO extender on the I2C bus #2.\n");
+  return AOS_INVALID_ARGUMENTS;
+}
+static ut_pcal6524data_t _utAlldPcal6524Data = {
+  /* driver   */ NULL,
+  /* timeout  */ MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldPcal6524 = {
+  /* name           */ "PCAL6524",
+  /* info           */ "GPIO extender",
+  /* test function  */ utAlldPcal6524Func,
+  /* shell command  */ {
+    /* name     */ "unittest:GPIOExtender",
+    /* callback */ _utShellCmdCb_AlldPcal6524,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldPcal6524Data,
+};
+
+/*
+ * AT42QT1050 (touch sensor)
+ */
+static int _utShellCmdCb_AlldAt42qt1050(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldAt42qt1050, NULL);
+  return AOS_OK;
+}
+static ut_at42qt1050data_t _utAlldAt42qt1050Data= {
+  /* AT42QT1050 driver  */ &moduleLldTouch,
+  /* timeout            */ MICROSECONDS_PER_SECOND,
+  /* event source       */ &aos.events.io,
+  /* event flags        */ MODULE_OS_IOEVENTFLAGS_TOUCHINT,
+};
+aos_unittest_t moduleUtAlldAt42qt1050 = {
+  /* name           */ "AT42QT1050",
+  /* info           */ "touch sensor",
+  /* test function  */ utAlldAt42qt1050Func,
+  /* shell command  */ {
+    /* name     */ "unittest:Touch",
+    /* callback */ _utShellCmdCb_AlldAt42qt1050,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldAt42qt1050Data,
+};
+
+#endif /* (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L0X) */
+
+#if (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L1X) || defined(__DOXYGEN__)
+
+/*
+ * PCAL6524 (GPIO extender)
+ */
+static int _utShellCmdCb_AlldPcal6524(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  // evaluate arguments
+  if (argc == 2) {
+    if (strcmp(argv[1], "#1") == 0) {
+      ((ut_pcal6524data_t*)moduleUtAlldPcal6524.data)->pcal6524d = &moduleLldGpioExtender1;
+      aosUtRun(stream, &moduleUtAlldPcal6524, "I2C bus #1");
+      ((ut_pcal6524data_t*)moduleUtAlldPcal6524.data)->pcal6524d = NULL;
+      return AOS_OK;
+    }
+    else if (strcmp(argv[1], "#2") == 0) {
+      ((ut_pcal6524data_t*)moduleUtAlldPcal6524.data)->pcal6524d = &moduleLldGpioExtender2;
+      aosUtRun(stream, &moduleUtAlldPcal6524, "I2C bus #2");
+      ((ut_pcal6524data_t*)moduleUtAlldPcal6524.data)->pcal6524d = NULL;
+      return AOS_OK;
+    }
+  }
+  // print help
+  chprintf(stream, "Usage: %s OPTION\n", argv[0]);
+  chprintf(stream, "Options:\n");
+  chprintf(stream, "  #1\n");
+  chprintf(stream, "    Test the GPIO extender on the I2C bus #1.\n");
+  chprintf(stream, "  #2\n");
+  chprintf(stream, "    Test the GPIO extender on the I2C bus #2.\n");
+  return AOS_INVALID_ARGUMENTS;
+}
+static ut_pcal6524data_t _utAlldPcal6524Data = {
+  /* driver   */ NULL,
+  /* timeout  */ MICROSECONDS_PER_SECOND,
+};
+aos_unittest_t moduleUtAlldPcal6524 = {
+  /* name           */ "PCAL6524",
+  /* info           */ "GPIO extender",
+  /* test function  */ utAlldPcal6524Func,
+  /* shell command  */ {
+    /* name     */ "unittest:GPIOExtender",
+    /* callback */ _utShellCmdCb_AlldPcal6524,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldPcal6524Data,
+};
+
+/*
+ * AT42QT1050 (touch sensor)
+ */
+static int _utShellCmdCb_AlldAt42qt1050(BaseSequentialStream* stream, int argc, char* argv[])
+{
+  (void)argc;
+  (void)argv;
+  aosUtRun(stream, &moduleUtAlldAt42qt1050, NULL);
+  return AOS_OK;
+}
+static ut_at42qt1050data_t _utAlldAt42qt1050Data= {
+  /* AT42QT1050 driver  */ &moduleLldTouch,
+  /* timeout            */ MICROSECONDS_PER_SECOND,
+  /* event source       */ &aos.events.io,
+  /* event flags        */ MODULE_OS_IOEVENTFLAGS_TOUCHINT,
+};
+aos_unittest_t moduleUtAlldAt42qt1050 = {
+  /* name           */ "AT42QT1050",
+  /* info           */ "touch sensor",
+  /* test function  */ utAlldAt42qt1050Func,
+  /* shell command  */ {
+    /* name     */ "unittest:Touch",
+    /* callback */ _utShellCmdCb_AlldAt42qt1050,
+    /* next     */ NULL,
+  },
+  /* data           */ &_utAlldAt42qt1050Data,
+};
+
+#endif /* (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L1X) */
+
+#endif /* (AMIROOS_CFG_TESTS_ENABLE == true) */
+
+/** @} */
+/** @} */
diff --git a/modules/PowerManagement_1-2/module.h b/modules/PowerManagement_1-2/module.h
new file mode 100644
index 0000000..c5589bd
--- /dev/null
+++ b/modules/PowerManagement_1-2/module.h
@@ -0,0 +1,873 @@
+/*
+AMiRo-OS is an operating system designed for the Autonomous Mini Robot (AMiRo) platform.
+Copyright (C) 2016..2019  Thomas Schöpping et al.
+
+This program is free software: you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation, either version 3 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program.  If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file
+ * @brief   Structures and constant for the PowerManagement module.
+ *
+ * @addtogroup powermanagement_module
+ * @{
+ */
+
+#ifndef AMIROOS_MODULE_H
+#define AMIROOS_MODULE_H
+
+#include <amiroos.h>
+
+/*===========================================================================*/
+/**
+ * @name Module specific functions
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Makro to store data in the core coupled memory (ccm).
+ *        Example:
+ *        int compute_buffer[128] CCM_RAM;
+ *
+ * @note The ccm is not connected to any bus system.
+ */
+#define CCM_RAM(...)                            __attribute__((section(".ram4"), ##__VA_ARGS__))
+
+/**
+ * @brief Makro to store data in the ethernet memory (eth).
+ *        Example:
+ *        int dma_buffer[128] ETH_RAM;
+ *
+ * @note The eth is a dedicated memory block with its own DMA controller.
+ */
+#define ETH_RAM(...)                            __attribute__((section(".ram2"), ##__VA_ARGS__))
+
+/**
+ * @brief Makro to store data in the backup memory (bckp).
+ *        Example:
+ *        int backup_buffer[128] BCKP_RAM;
+ *
+ * @note The eth is a dedicated memory block with its own DMA controller.
+ */
+#define BCKP_RAM(...)                           __attribute__((section(".ram5"), ##__VA_ARGS__))
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name ChibiOS/HAL configuration
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   ADC driver for reading the system voltage.
+ */
+#define MODULE_HAL_ADC_VSYS                     ADCD1
+
+/**
+ * @brief   Configuration for the ADC.
+ */
+extern ADCConversionGroup moduleHalAdcVsysConversionGroup;
+
+/**
+ * @brief   CAN driver to use.
+ */
+#define MODULE_HAL_CAN                          CAND1
+
+/**
+ * @brief   Configuration for the CAN driver.
+ */
+extern CANConfig moduleHalCanConfig;
+
+/**
+ * @brief   I2C driver to access the sensor ring, power monitors for VIO1.8 and VIO3.3, and fuel gauge (rear battery).
+ * @details Depending on the attached sensor ring, the devices connected to this bus vary:
+ *          ProximitySensor:
+ *            - I2C multiplexer (PCA9544A)
+ *            - proximity sensors (VCNL4020) #1 - #4
+ *          DistanceSensor (VL53L0X):
+ *            TODO
+ *          DistanceSensor (VL53L1X):
+ *            TODO
+ */
+#define MODULE_HAL_I2C_SR_PM18_PM33_GAUGEREAR   I2CD1
+
+/**
+ * @brief   Configuration for the sensor ring, power monitors for VIO1.8 and VIO3.3, and fuel gauge (rear battery) I2C driver.
+ * @details Depending on the attached sensor ring, the devices connected to this bus vary:
+ *          ProximitySensor:
+ *            - I2C multiplexer (PCA9544A)
+ *            - proximity sensors (VCNL4020) #1 - #4
+ *          DistanceSensor (VL53L0X):
+ *            TODO
+ *          DistanceSensor (VL53L1X):
+ *            TODO
+ */
+extern I2CConfig moduleHalI2cSrPm18Pm33GaugeRearConfig;
+
+/**
+ * @brief   I2C driver to access the sensor ring, power monitors for VSYS4.2, VIO5.0 and VDD, EEPROM, and fuel gauge (front battery).
+ * @details Depending on the attached sensor ring, the devices connected to this bus vary:
+ *          ProximitySensor:
+ *            - I2C multiplexer (PCA9544A)
+ *            - proximity sensors (VCNL4020) #1 - #4
+ *            - touch sensor (MPR121)
+ *          DistanceSensor (VL53L0X):
+ *            TODO
+ *          DistanceSensor (VL53L1X):
+ *            TODO
+ */
+#define MODULE_HAL_I2C_SR_PM42_PM50_PMVDD_EEPROM_GAUGEFRONT I2CD2
+
+/**
+ * @brief   Configuration for the sensor ring, power monitors for VSYS4.2, VIO5.0 and VDD, EEPROM, and fuel gauge (front battery) I2C driver.
+ * @details Depending on the attached sensor ring, the devices connected to this bus vary:
+ *          ProximitySensor:
+ *            - I2C multiplexer (PCA9544A)
+ *            - proximity sensors (VCNL4020) #1 - #4
+ *            - touch sensor (MPR121)
+ *          DistanceSensor (VL53L0X):
+ *            TODO
+ *          DistanceSensor (VL53L1X):
+ *            TODO
+ */
+extern I2CConfig moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig;
+
+/**
+ * @brief   PWM driver for the buzzer.
+ */
+#define MODULE_HAL_PWM_BUZZER                   PWMD3
+
+/**
+ * @brief   Configuration of the PWM driver.
+ */
+extern PWMConfig moduleHalPwmBuzzerConfig;
+
+/**
+ * @brief   PWM channeö for the buzzer.
+ */
+#define MODULE_HAL_PWM_BUZZER_CHANNEL           1
+
+/**
+ * @brief   Serial driver of the programmer interface.
+ */
+#define MODULE_HAL_PROGIF                       SD1
+
+/**
+ * @brief   Configuration for the programmer serial interface driver.
+ */
+extern SerialConfig moduleHalProgIfConfig;
+
+/**
+ * @brief   Real-Time Clock driver.
+ */
+#define MODULE_HAL_RTC                          RTCD1
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name GPIO definitions
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   SWITCH_STATUS input signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioSwitchStatus;
+
+/**
+ * @brief   SYS_REG_EN output signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioSysRegEn;
+
+/**
+ * @brief   IR_INT1 input signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioIrInt1;
+
+/**
+ * @brief   POWER_EN output signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioPowerEn;
+
+/**
+ * @brief   SYS_UART_DN bidirectional signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioSysUartDn;
+
+/**
+ * @brief   CHARGE_STAT2A input signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioChargeStat2A;
+
+/**
+ * @brief   GAUGE_BATLOW2 input signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioGaugeBatLow2;
+
+/**
+ * @brief   GAUGE_BATGD2 input signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioGaugeBatGd2;
+
+/**
+ * @brief   LED output signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioLed;
+
+/**
+ * @brief   SYS_UART_UP bidirectional signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioSysUartUp;
+
+/**
+ * @brief   CHARGE_STAT1A input signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioChargeStat1A;
+
+/**
+ * @brief   GAUGE_BATLOW1 input signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioGaugeBatLow1;
+
+/**
+ * @brief   GAUGE_BATGD1 input signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioGaugeBatGd1;
+
+/**
+ * @brief   CHARG_EN1 output signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioChargeEn1;
+
+/**
+ * @brief   IR_INT2 input signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioIrInt2;
+
+/**
+ * @brief   TOUCH_INT input signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioTouchInt;
+
+/**
+ * @brief   SYS_DONE input signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioSysDone;
+
+/**
+ * @brief   SYS_PROG output signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioSysProg;
+
+/**
+ * @brief   PATH_DC input signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioPathDc;
+
+/**
+ * @brief   SYS_SPI_DIR bidirectional signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioSysSpiDir;
+
+/**
+ * @brief   SYS_SYNC bidirectional signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioSysSync;
+
+/**
+ * @brief   SYS_PD bidirectional signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioSysPd;
+
+/**
+ * @brief   SYS_WARMRST bidirectional signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioSysWarmrst;
+
+/**
+ * @brief   BT_RST output signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioBtRst;
+
+/**
+ * @brief   CHARGE_EN2 output signal GPIO.
+ */
+extern ROMCONST apalControlGpio_t moduleGpioChargeEn2;
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name AMiRo-OS core configurations
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   Event flag to be set on a IR_INT1 / CHARGE_STAT1A interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_IRINT1           AOS_IOEVENT_FLAG(GPIOB_IR_INT1_N)
+
+/**
+ * @brief   Event flag to be set on a GAUGE_BATLOW1 interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_GAUGEBATLOW1     AOS_IOEVENT_FLAG(GPIOC_GAUGE_BATLOW1)
+
+/**
+ * @brief   Event flag to be set on a GAUGE_BATGD1 interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_GAUGEBATGD1      AOS_IOEVENT_FLAG(GPIOC_GAUGE_BATGD1_N)
+
+/**
+ * @brief   Event flag to be set on a SYS_UART_DN interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSUARTDN        AOS_IOEVENT_FLAG(GPIOB_SYS_UART_DN)
+
+/**
+ * @brief   Event flag to be set on a IR_INT2 / CHARGE_STAT2A interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_IRINT2           AOS_IOEVENT_FLAG(GPIOC_IR_INT2_N)
+
+/**
+ * @brief   Event flag to be set on a TOUCH_INT interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_TOUCHINT         AOS_IOEVENT_FLAG(GPIOC_TOUCH_INT_N)
+
+/**
+ * @brief   Event flag to be set on a GAUGE_BATLOW2 interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_GAUGEBATLOW2     AOS_IOEVENT_FLAG(GPIOB_GAUGE_BATLOW2)
+
+/**
+ * @brief   Event flag to be set on a GAUGE_BATGD2 interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_GAUGEBATGD2      AOS_IOEVENT_FLAG(GPIOB_GAUGE_BATGD2_N)
+
+/**
+ * @brief   Event flag to be set on a PATH_DC interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_PATHDC           AOS_IOEVENT_FLAG(GPIOC_PATH_DC)
+
+/**
+ * @brief   Event flag to be set on a SYS_SPI_DIR interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSSPIDIR        AOS_IOEVENT_FLAG(GPIOC_SYS_SPI_DIR)
+
+/**
+ * @brief   Event flag to be set on a SYS_SYNC interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSSYNC          AOS_IOEVENT_FLAG(GPIOC_SYS_INT_N)
+
+/**
+ * @brief   Event flag to be set on a SYS_PD interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSPD            AOS_IOEVENT_FLAG(GPIOC_SYS_PD_N)
+
+/**
+ * @brief   Event flag to be set on a SYS_WARMRST interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSWARMRST       AOS_IOEVENT_FLAG(GPIOC_SYS_WARMRST_N)
+
+/**
+ * @brief   Event flag to be set on a SYS_UART_UP interrupt.
+ */
+#define MODULE_OS_IOEVENTFLAGS_SYSUARTUP        AOS_IOEVENT_FLAG(GPIOB_SYS_UART_UP)
+
+#if (AMIROOS_CFG_SHELL_ENABLE == true) || (AMIROOS_CFG_TESTS_ENABLE == true) || defined(__DOXYGEN__)
+/**
+ * @brief   Shell prompt text.
+ */
+extern ROMCONST char* moduleShellPrompt;
+#endif /* (AMIROOS_CFG_SHELL_ENABLE == true) || (AMIROOS_CFG_TESTS_ENABLE == true) */
+
+/**
+ * @brief   Interrupt initialization macro.
+ * @note    SSSP related interrupt signals are already initialized in 'aos_system.c'.
+ */
+#define MODULE_INIT_INTERRUPTS() {                                            \
+  /* IR_INT1 */                                                               \
+  palSetPadCallback(moduleGpioIrInt1.gpio->port, moduleGpioIrInt1.gpio->pad, _intCallback, &moduleGpioIrInt1.gpio->pad); \
+  palEnablePadEvent(moduleGpioIrInt1.gpio->port, moduleGpioIrInt1.gpio->pad, APAL2CH_EDGE(moduleGpioIrInt1.meta.edge));  \
+  /* GAUGE_BATLOW2 */                                                         \
+  palSetPadCallback(moduleGpioGaugeBatLow2.gpio->port, moduleGpioGaugeBatLow2.gpio->pad, _intCallback, &moduleGpioGaugeBatLow2.gpio->pad);  \
+  palEnablePadEvent(moduleGpioGaugeBatLow2.gpio->port, moduleGpioGaugeBatLow2.gpio->pad, APAL2CH_EDGE(moduleGpioGaugeBatLow2.meta.edge));   \
+  /* GAUGE_BATGD2 */                                                          \
+  palSetPadCallback(moduleGpioGaugeBatGd2.gpio->port, moduleGpioGaugeBatGd2.gpio->pad, _intCallback, &moduleGpioGaugeBatGd2.gpio->pad); \
+  palEnablePadEvent(moduleGpioGaugeBatGd2.gpio->port, moduleGpioGaugeBatGd2.gpio->pad, APAL2CH_EDGE(moduleGpioGaugeBatGd2.meta.edge));  \
+  /* GAUGE_BATLOW1 */                                                         \
+  palSetPadCallback(moduleGpioGaugeBatLow1.gpio->port, moduleGpioGaugeBatLow1.gpio->pad, _intCallback, &moduleGpioGaugeBatLow1.gpio->pad);  \
+  palEnablePadEvent(moduleGpioGaugeBatLow1.gpio->port, moduleGpioGaugeBatLow1.gpio->pad, APAL2CH_EDGE(moduleGpioGaugeBatLow1.meta.edge));   \
+  /* GAUGE_BATGD1 */                                                          \
+  palSetPadCallback(moduleGpioGaugeBatGd1.gpio->port, moduleGpioGaugeBatGd1.gpio->pad, _intCallback, &moduleGpioGaugeBatGd1.gpio->pad); \
+  palEnablePadEvent(moduleGpioGaugeBatGd1.gpio->port, moduleGpioGaugeBatGd1.gpio->pad, APAL2CH_EDGE(moduleGpioGaugeBatGd1.meta.edge));  \
+  /* IR_INT2 */                                                               \
+  palSetPadCallback(moduleGpioIrInt2.gpio->port, moduleGpioIrInt2.gpio->pad, _intCallback, &moduleGpioIrInt2.gpio->pad); \
+  palEnablePadEvent(moduleGpioIrInt2.gpio->port, moduleGpioIrInt2.gpio->pad, APAL2CH_EDGE(moduleGpioIrInt2.meta.edge));  \
+  /* TOUCH_INT */                                                             \
+  palSetPadCallback(moduleGpioTouchInt.gpio->port, moduleGpioTouchInt.gpio->pad, _intCallback, &moduleGpioTouchInt.gpio->pad); \
+  palEnablePadEvent(moduleGpioTouchInt.gpio->port, moduleGpioTouchInt.gpio->pad, APAL2CH_EDGE(moduleGpioTouchInt.meta.edge));  \
+  /* PATH_DC */                                                               \
+  palSetPadCallback(moduleGpioPathDc.gpio->port, moduleGpioPathDc.gpio->pad, _intCallback, &moduleGpioPathDc.gpio->pad);  \
+  palEnablePadEvent(moduleGpioPathDc.gpio->port, moduleGpioPathDc.gpio->pad, APAL2CH_EDGE(moduleGpioPathDc.meta.edge));   \
+  /* SYS_SPI_DIR */                                                           \
+  palSetPadCallback(moduleGpioSysSpiDir.gpio->port, moduleGpioSysSpiDir.gpio->pad, _intCallback, &moduleGpioSysSpiDir.gpio->pad); \
+  palEnablePadEvent(moduleGpioSysSpiDir.gpio->port, moduleGpioSysSpiDir.gpio->pad, APAL2CH_EDGE(moduleGpioSysSpiDir.meta.edge));  \
+  /* SYS_WARMRST */                                                           \
+  palSetPadCallback(moduleGpioSysWarmrst.gpio->port, moduleGpioSysWarmrst.gpio->pad, _intCallback, &moduleGpioSysWarmrst.gpio->pad);  \
+  palEnablePadEvent(moduleGpioSysWarmrst.gpio->port, moduleGpioSysWarmrst.gpio->pad, APAL2CH_EDGE(moduleGpioSysWarmrst.meta.edge));   \
+}
+
+/**
+ * @brief   Unit test initialization hook.
+ */
+#define MODULE_INIT_TESTS() {                                                 \
+  /* add unit-test shell commands */                                          \
+  aosShellAddCommand(&aos.shell, &moduleUtAdcVsys.shellcmd);                  \
+  aosShellAddCommand(&aos.shell, &moduleUtAlldAt24c01b.shellcmd);             \
+  aosShellAddCommand(&aos.shell, &moduleUtAlldBq24103a.shellcmd);             \
+  aosShellAddCommand(&aos.shell, &moduleUtAlldBq27500.shellcmd);              \
+  aosShellAddCommand(&aos.shell, &moduleUtAlldBq27500Bq24103a.shellcmd);      \
+  aosShellAddCommand(&aos.shell, &moduleUtAlldIna219.shellcmd);               \
+  aosShellAddCommand(&aos.shell, &moduleUtAlldPklcs1212e4001.shellcmd);       \
+  aosShellAddCommand(&aos.shell, &moduleUtAlldLed.shellcmd);                  \
+  aosShellAddCommand(&aos.shell, &moduleUtAlldTps62113.shellcmd);             \
+  aosShellAddCommand(&aos.shell, &moduleUtAlldTps62113Ina219.shellcmd);       \
+  MODULE_INIT_TEST_SENSORRING();                                              \
+}
+#if (BOARD_SENSORRING == BOARD_PROXIMITYSENSOR) || defined(__DOXYGEN__)
+  #define MODULE_INIT_TEST_SENSORRING() {                                     \
+    aosShellAddCommand(&aos.shell, &moduleUtAlldPca9544a.shellcmd);           \
+    aosShellAddCommand(&aos.shell, &moduleUtAlldMpr121.shellcmd);             \
+    aosShellAddCommand(&aos.shell, &moduleUtAlldVcnl4020.shellcmd);           \
+  }
+#elif (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L0X) || defined(__DOXYGEN__)
+  #define MODULE_INIT_TEST_SENSORRING() {                                     \
+    aosShellAddCommand(&aos.shell, &moduleUtAlldPcal6524.shellcmd);           \
+    aosShellAddCommand(&aos.shell, &moduleUtAlldAt42qt1050.shellcmd);         \
+  }
+#elif (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L1X) || defined(__DOXYGEN__)
+  #define MODULE_INIT_TEST_SENSORRING() {                                     \
+    aosShellAddCommand(&aos.shell, &moduleUtAlldPcal6524.shellcmd);           \
+    aosShellAddCommand(&aos.shell, &moduleUtAlldAt42qt1050.shellcmd);         \
+  }
+#else /* (BOARD_SENSORRING == ?) */
+  #define MODULE_INIT_TEST_SENSORRING()         {}
+#endif /* (BOARD_SENSORRING == ?) */
+
+/**
+ * @brief   Periphery communication interfaces initialization hook.
+ */
+#define MODULE_INIT_PERIPHERY_COMM() {                                        \
+  MODULE_INIT_PERIPHERY_COMM_SENSORRING();                                    \
+  /* serial driver */                                                         \
+  sdStart(&MODULE_HAL_PROGIF, &moduleHalProgIfConfig);                        \
+  /* I2C */                                                                   \
+  moduleHalI2cSrPm18Pm33GaugeRearConfig.clock_speed = (INA219_LLD_I2C_MAXFREQUENCY < moduleHalI2cSrPm18Pm33GaugeRearConfig.clock_speed) ? INA219_LLD_I2C_MAXFREQUENCY : moduleHalI2cSrPm18Pm33GaugeRearConfig.clock_speed;  \
+  moduleHalI2cSrPm18Pm33GaugeRearConfig.clock_speed = (BQ27500_LLD_I2C_MAXFREQUENCY < moduleHalI2cSrPm18Pm33GaugeRearConfig.clock_speed) ? BQ27500_LLD_I2C_MAXFREQUENCY : moduleHalI2cSrPm18Pm33GaugeRearConfig.clock_speed;  \
+  moduleHalI2cSrPm18Pm33GaugeRearConfig.duty_cycle = (moduleHalI2cSrPm18Pm33GaugeRearConfig.clock_speed <= 100000) ? STD_DUTY_CYCLE : FAST_DUTY_CYCLE_2;  \
+  i2cStart(&MODULE_HAL_I2C_SR_PM18_PM33_GAUGEREAR, &moduleHalI2cSrPm18Pm33GaugeRearConfig); \
+  moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed = (INA219_LLD_I2C_MAXFREQUENCY < moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed) ? INA219_LLD_I2C_MAXFREQUENCY : moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed; \
+  moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed = (AT24C01B_LLD_I2C_MAXFREQUENCY < moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed) ? AT24C01B_LLD_I2C_MAXFREQUENCY : moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed; \
+  moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed = (BQ27500_LLD_I2C_MAXFREQUENCY < moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed) ? BQ27500_LLD_I2C_MAXFREQUENCY : moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed; \
+  moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.duty_cycle = (moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed <= 100000) ? STD_DUTY_CYCLE : FAST_DUTY_CYCLE_2;  \
+  i2cStart(&MODULE_HAL_I2C_SR_PM42_PM50_PMVDD_EEPROM_GAUGEFRONT, &moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig);  \
+  /* ADC */                                                                   \
+  adcStart(&MODULE_HAL_ADC_VSYS, NULL);                                       \
+  /* PWM */                                                                   \
+  pwmStart(&MODULE_HAL_PWM_BUZZER, &moduleHalPwmBuzzerConfig);                \
+  moduleHalPwmBuzzerConfig.frequency = MODULE_HAL_PWM_BUZZER.clock;           \
+  pwmStop(&MODULE_HAL_PWM_BUZZER);                                            \
+  moduleHalPwmBuzzerConfig.period = moduleHalPwmBuzzerConfig.frequency / PKxxxExxx_LLD_FREQUENCY_SPEC; \
+  pwmStart(&MODULE_HAL_PWM_BUZZER, &moduleHalPwmBuzzerConfig);                \
+}
+#if (BOARD_SENSORRING == BOARD_PROXIMITYSENSOR) || defined(__DOXYGEN__)
+  #define MODULE_INIT_PERIPHERY_COMM_SENSORRING() {                           \
+    moduleHalI2cSrPm18Pm33GaugeRearConfig.clock_speed = (PCA9544A_LLD_I2C_MAXFREQUENCY < moduleHalI2cSrPm18Pm33GaugeRearConfig.clock_speed) ? PCA9544A_LLD_I2C_MAXFREQUENCY : moduleHalI2cSrPm18Pm33GaugeRearConfig.clock_speed;  \
+    moduleHalI2cSrPm18Pm33GaugeRearConfig.clock_speed = (VCNL4020_LLD_I2C_MAXFREQUENCY < moduleHalI2cSrPm18Pm33GaugeRearConfig.clock_speed) ? VCNL4020_LLD_I2C_MAXFREQUENCY : moduleHalI2cSrPm18Pm33GaugeRearConfig.clock_speed;  \
+    moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed = (PCA9544A_LLD_I2C_MAXFREQUENCY < moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed) ? PCA9544A_LLD_I2C_MAXFREQUENCY : moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed; \
+    moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed = (VCNL4020_LLD_I2C_MAXFREQUENCY < moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed) ? VCNL4020_LLD_I2C_MAXFREQUENCY : moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed; \
+    moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed = (MPR121_LLD_I2C_MAXFREQUENCY < moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed) ? MPR121_LLD_I2C_MAXFREQUENCY : moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed; \
+  }
+#elif (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L0X) || defined(__DOXYGEN__)
+  #define MODULE_INIT_PERIPHERY_COMM_SENSORRING() {                           \
+    moduleHalI2cSrPm18Pm33GaugeRearConfig.clock_speed = (PCAL6524_LLD_I2C_MAXFREQUENCY < moduleHalI2cSrPm18Pm33GaugeRearConfig.clock_speed) ? PCAL6524_LLD_I2C_MAXFREQUENCY : moduleHalI2cSrPm18Pm33GaugeRearConfig.clock_speed;  \
+    moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed = (PCAL6524_LLD_I2C_MAXFREQUENCY < moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed) ? PCAL6524_LLD_I2C_MAXFREQUENCY : moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed;  \
+    moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed = (AT42QT1050_LLD_I2C_MAXFREQUENCY < moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed) ? AT42QT1050_LLD_I2C_MAXFREQUENCY : moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed;  \
+  }
+#elif (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L1X) || defined(__DOXYGEN__)
+  #define MODULE_INIT_PERIPHERY_COMM_SENSORRING() {                           \
+    moduleHalI2cSrPm18Pm33GaugeRearConfig.clock_speed = (PCAL6524_LLD_I2C_MAXFREQUENCY < moduleHalI2cSrPm18Pm33GaugeRearConfig.clock_speed) ? PCAL6524_LLD_I2C_MAXFREQUENCY : moduleHalI2cSrPm18Pm33GaugeRearConfig.clock_speed;  \
+    moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed = (PCAL6524_LLD_I2C_MAXFREQUENCY < moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed) ? PCAL6524_LLD_I2C_MAXFREQUENCY : moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed;  \
+    moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed = (AT42QT1050_LLD_I2C_MAXFREQUENCY < moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed) ? AT42QT1050_LLD_I2C_MAXFREQUENCY : moduleHalI2cSrPm42Pm50PmVddEepromGaugeFrontConfig.clock_speed;  \
+  }
+#else /* (BOARD_SENSORRING == ?) */
+  #define MODULE_INIT_PERIPHERY_COMM_SENSORRING() {}
+#endif /* (BOARD_SENSORRING == ?) */
+
+/**
+ * @brief   Periphery communication interface deinitialization hook.
+ */
+#define MODULE_SHUTDOWN_PERIPHERY_COMM() {                                    \
+  /* PWM */                                                                   \
+  pwmStop(&MODULE_HAL_PWM_BUZZER);                                            \
+  /* ADC */                                                                   \
+  adcStop(&MODULE_HAL_ADC_VSYS);                                              \
+  /* I2C */                                                                   \
+  i2cStop(&MODULE_HAL_I2C_SR_PM18_PM33_GAUGEREAR);                            \
+  i2cStop(&MODULE_HAL_I2C_SR_PM42_PM50_PMVDD_EEPROM_GAUGEFRONT);              \
+  /* don't stop the serial driver so messages can still be printed */         \
+}
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Startup Shutdown Synchronization Protocol (SSSP)
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief   PD signal GPIO.
+ */
+#define moduleSsspGpioPd                        moduleGpioSysPd
+
+/**
+ * @brief   SYNC signal GPIO.
+ */
+#define moduleSsspGpioSync                       moduleGpioSysSync
+
+/**
+ * @brief   DN signal GPIO.
+ */
+#define moduleSsspGpioDn                        moduleGpioSysUartDn
+
+/**
+ * @brief   UP signal GPIO.
+ */
+#define moduleSsspGpioUp                        moduleGpioSysUartUp
+
+/**
+ * @brief   Event flags for PD signal events.
+ */
+#define MODULE_SSSP_EVENTFLAGS_PD               MODULE_OS_IOEVENTFLAGS_SYSPD
+
+/**
+ * @brief   Event flags for SYNC signal events.
+ */
+#define MODULE_SSSP_EVENTFLAGS_SYNC             MODULE_OS_IOEVENTFLAGS_SYSSYNC
+
+/**
+ * @brief   Event flags for UP signal events.
+ */
+#define MODULE_SSSP_EVENTFLAGS_UP               MODULE_OS_IOEVENTFLAGS_SYSUARTUP
+
+/**
+ * @brief   Event flags for DN signal events.
+ */
+#define MODULE_SSSP_EVENTFLAGS_DN               MODULE_OS_IOEVENTFLAGS_SYSUARTDN
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Low-level drivers
+ * @{
+ */
+/*===========================================================================*/
+#include <alld_AT24C01B.h>
+#include <alld_bq241xx.h>
+#include <alld_bq27500.h>
+#include <alld_INA219.h>
+#include <alld_LED.h>
+#include <alld_PKxxxExxx.h>
+#include <alld_TPS6211x.h>
+
+/**
+ * @brief   EEPROM driver.
+ */
+extern AT24C01BDriver moduleLldEeprom;
+
+/**
+ * @brief   Battery charger (front battery) driver.
+ */
+extern BQ241xxDriver moduleLldBatteryChargerFront;
+
+/**
+ * @brief   Battery charger (rear battery) driver.
+ */
+extern BQ241xxDriver moduleLldBatteryChargerRear;
+
+/**
+ * @brief   Fuel gauge (front battery) driver.
+ */
+extern BQ27500Driver moduleLldFuelGaugeFront;
+
+/**
+ * @brief   Fuel gauge (rear battery) driver.
+ */
+extern BQ27500Driver moduleLldFuelGaugeRear;
+
+/**
+ * @brief   Power monitor (VDD) driver.
+ */
+extern INA219Driver moduleLldPowerMonitorVdd;
+
+/**
+ * @brief   Power monitor (VIO 1.8) driver.
+ */
+extern INA219Driver moduleLldPowerMonitorVio18;
+
+/**
+ * @brief   Power monitor (VIO 3.3) driver.
+ */
+extern INA219Driver moduleLldPowerMonitorVio33;
+
+/**
+ * @brief   Power monitor (VSYS 4.2) driver.
+ */
+extern INA219Driver moduleLldPowerMonitorVsys42;
+
+/**
+ * @brief   Power monitor (VIO 5.0) driver.
+ */
+extern INA219Driver moduleLldPowerMonitorVio50;
+
+/**
+ * @brief   Status LED driver.
+ */
+extern LEDDriver moduleLldStatusLed;
+
+/**
+ * @brief   Step down converter driver.
+ * @note    Although there multiple TPS6211x, those are completely identical from driver few (share the same signals).
+ */
+extern TPS6211xDriver moduleLldStepDownConverter;
+
+#if (BOARD_SENSORRING == BOARD_PROXIMITYSENSOR) || defined(__DOXYGEN__)
+
+#include <alld_MPR121.h>
+#include <alld_PCA9544A.h>
+#include <alld_VCNL4020.h>
+
+/**
+ * @brief   Touch sensor driver.
+ */
+extern MPR121Driver moduleLldTouch;
+
+/**
+ * @brief   I2C multiplexer (I2C #1) driver.
+ */
+extern PCA9544ADriver moduleLldI2cMultiplexer1;
+
+/**
+ * @brief   I2C multiplexer (I2C #2) driver.
+ */
+extern PCA9544ADriver moduleLldI2cMultiplexer2;
+
+/**
+ * @brief   Proximity sensor (I2C #1) driver.
+ */
+extern VCNL4020Driver moduleLldProximity1;
+
+/**
+ * @brief   Proximity sensor (I2C #2) driver.
+ */
+extern VCNL4020Driver moduleLldProximity2;
+
+#endif /* (BOARD_SENSORRING == BOARD_PROXIMITYSENSOR) */
+
+#if (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L0X) || defined(__DOXYGEN__)
+
+#include <alld_PCAL6524.h>
+#include <alld_AT42QT1050.h>
+
+/**
+ * @brief   GPIO extender (I2C #1) driver.
+ */
+extern PCAL6524Driver moduleLldGpioExtender1;
+
+/**
+ * @brief   GPIO extender (I2C #2) driver.
+ */
+extern PCAL6524Driver moduleLldGpioExtender2;
+
+/**
+ * @brief   Touch sensor driver.
+ */
+extern AT42QT1050Driver moduleLldTouch;
+
+#endif /* (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L0X) */
+
+#if (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L1X) || defined(__DOXYGEN__)
+
+#include <alld_PCAL6524.h>
+#include <alld_AT42QT1050.h>
+
+/**
+ * @brief   GPIO extender (I2C #1) driver.
+ */
+extern PCAL6524Driver moduleLldGpioExtender1;
+
+/**
+ * @brief   GPIO extender (I2C #2) driver.
+ */
+extern PCAL6524Driver moduleLldGpioExtender2;
+
+/**
+ * @brief   Touch sensor driver.
+ */
+extern AT42QT1050Driver moduleLldTouch;
+
+#endif /* (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L1X) */
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Unit tests (UT)
+ * @{
+ */
+/*===========================================================================*/
+#if (AMIROOS_CFG_TESTS_ENABLE == true) || defined(__DOXYGEN__)
+#include <ut_lld_adc.h>
+#include <ut_alld_AT24C01B_v1.h>
+#include <ut_alld_bq241xx_v1.h>
+#include <ut_alld_bq27500_v1.h>
+#include <ut_alld_bq27500_v1_bq241xx_v1.h>
+#include <ut_alld_INA219_v1.h>
+#include <ut_alld_LED_v1.h>
+#include <ut_alld_PKxxxExxx_v1.h>
+#include <ut_alld_TPS6211x_v1.h>
+#include <ut_alld_TPS6211x_v1_INA219_v1.h>
+
+/**
+ * @brief   ADC unit test object.
+ */
+extern aos_unittest_t moduleUtAdcVsys;
+
+/**
+ * @brief   AT24C01BN-SH-B (EEPROM) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldAt24c01b;
+
+/**
+ * @brief   BQ24103A (battery charger) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldBq24103a;
+
+/**
+ * @brief   BQ27500 (fuel gauge) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldBq27500;
+
+/**
+ * @brief   BQ27500 (fuela gauge) in combination with BQ24103A (battery charger) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldBq27500Bq24103a;
+
+/**
+ * @brief   INA219 (power monitor) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldIna219;
+
+/**
+ * @brief   Status LED unit test object.
+ */
+extern aos_unittest_t moduleUtAlldLed;
+
+/**
+ * @brief   PKLCS1212E4001 (buzzer) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldPklcs1212e4001;
+
+/**
+ * @brief   TPS62113 (step-down converter) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldTps62113;
+
+/**
+ * @brief   TPS62113 (step-sown converter) in combination with INA219 (power monitor) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldTps62113Ina219;
+
+#if (BOARD_SENSORRING == BOARD_PROXIMITYSENSOR) || defined(__DOXYGEN__)
+
+#include <ut_alld_MPR121_v1.h>
+#include <ut_alld_PCA9544A_v1.h>
+#include <ut_alld_VCNL4020_v1.h>
+
+/**
+ * @brief   MPR121 (touch sensor) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldMpr121;
+
+/**
+ * @brief   PCA9544A (I2C multiplexer) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldPca9544a;
+
+/**
+ * @brief   VCNL4020 (proximity sensor) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldVcnl4020;
+
+#endif /* (BOARD_SENSORRING == BOARD_PROXIMITYSENSOR) */
+
+#if (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L0X) || defined(__DOXYGEN__)
+
+#include <ut_alld_PCAL6524_v1.h>
+#include <ut_alld_AT42QT1050_v1.h>
+
+/**
+ * @brief   PCAL6524 (GPIO extender) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldPcal6524;
+
+/**
+ * @brief   AT42QT1050 (touch sensor) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldAt42qt1050;
+
+#endif /* (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L0X) */
+
+#if (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L1X) || defined(__DOXYGEN__)
+
+#include <ut_alld_PCAL6524_v1.h>
+#include <ut_alld_AT42QT1050_v1.h>
+
+/**
+ * @brief   PCAL6524 (GPIO extender) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldPcal6524;
+
+/**
+ * @brief   AT42QT1050 (touch sensor) unit test object.
+ */
+extern aos_unittest_t moduleUtAlldAt42qt1050;
+
+#endif /* (BOARD_SENSORRING == BOARD_DISTANCESENSOR_VL53L1X) */
+
+#endif /* (AMIROOS_CFG_TESTS_ENABLE == true) */
+
+/** @} */
+
+#endif /* AMIROOS_MODULE_H */
+
+/** @} */
diff --git a/unittests/lld/inc/ut_lld_adc.h b/unittests/lld/inc/ut_lld_adc.h
index ceed031..cd3c5e8 100644
--- a/unittests/lld/inc/ut_lld_adc.h
+++ b/unittests/lld/inc/ut_lld_adc.h
@@ -21,7 +21,7 @@ along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
 #include <amiroos.h>
 
-#if ((AMIROOS_CFG_TESTS_ENABLE == TRUE) && defined(BOARD_POWERMANAGEMENT_1_1) && (HAL_USE_ADC == TRUE)) || defined(__DOXYGEN__)
+#if ((AMIROOS_CFG_TESTS_ENABLE == TRUE) && (defined(BOARD_POWERMANAGEMENT_1_1) || defined(BOARD_POWERMANAGEMENT_1_2)) && (HAL_USE_ADC == TRUE)) || defined(__DOXYGEN__)
 
 
 /******************************************************************************/
@@ -75,7 +75,7 @@ extern "C" {
 /* INLINE FUNCTIONS                                                           */
 /******************************************************************************/
 
-#endif /* (AMIROOS_CFG_TESTS_ENABLE == TRUE) && defined(BOARD_POWERMANAGEMENT_1_1) && (HAL_USE_ADC == TRUE) */
+#endif /* (AMIROOS_CFG_TESTS_ENABLE == TRUE) && (defined(BOARD_POWERMANAGEMENT_1_1) || defined(BOARD_POWERMANAGEMENT_1_2)) && (HAL_USE_ADC == TRUE) */
 
 #endif /* AMIROOS_UT_LLD_ADC_H */
 
diff --git a/unittests/lld/src/ut_lld_adc.c b/unittests/lld/src/ut_lld_adc.c
index 334fd39..1aef7c7 100644
--- a/unittests/lld/src/ut_lld_adc.c
+++ b/unittests/lld/src/ut_lld_adc.c
@@ -19,7 +19,7 @@ along with this program.  If not, see <http://www.gnu.org/licenses/>.
 #include <amiroos.h>
 #include <ut_lld_adc.h>
 
-#if ((AMIROOS_CFG_TESTS_ENABLE == TRUE) && defined(BOARD_POWERMANAGEMENT_1_1) && (HAL_USE_ADC == TRUE)) || defined(__DOXYGEN__)
+#if ((AMIROOS_CFG_TESTS_ENABLE == TRUE) && (defined(BOARD_POWERMANAGEMENT_1_1) || defined(BOARD_POWERMANAGEMENT_1_2)) && (HAL_USE_ADC == TRUE)) || defined(__DOXYGEN__)
 
 /******************************************************************************/
 /* LOCAL DEFINITIONS                                                          */
@@ -174,4 +174,4 @@ aos_utresult_t utAdcFunc(BaseSequentialStream* stream, aos_unittest_t* ut)
   return result;
 }
 
-#endif /* (AMIROOS_CFG_TESTS_ENABLE == TRUE) && defined(BOARD_POWERMANAGEMENT_1_1) && (HAL_USE_ADC == TRUE) */
+#endif /* (AMIROOS_CFG_TESTS_ENABLE == TRUE) && (defined(BOARD_POWERMANAGEMENT_1_1) || defined(BOARD_POWERMANAGEMENT_1_2)) && (HAL_USE_ADC == TRUE) */
