amiro-blt / Target / Modules / DiWheelDrive_1-1 / Boot / lib / STM32F10x_StdPeriph_Driver / inc / stm32f10x_sdio.h @ 367c0652
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1 | 69661903 | Thomas Schöpping | /**
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2 | ******************************************************************************
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3 | * @file stm32f10x_sdio.h
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4 | * @author MCD Application Team
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5 | * @version V3.5.0
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6 | * @date 11-March-2011
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7 | * @brief This file contains all the functions prototypes for the SDIO firmware
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8 | * library.
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9 | ******************************************************************************
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10 | * @attention
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11 | *
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12 | * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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13 | * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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14 | * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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15 | * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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16 | * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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17 | * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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18 | *
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19 | * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
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20 | ******************************************************************************
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21 | */
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22 | |||
23 | /* Define to prevent recursive inclusion -------------------------------------*/
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24 | #ifndef __STM32F10x_SDIO_H
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25 | #define __STM32F10x_SDIO_H
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26 | |||
27 | #ifdef __cplusplus
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28 | extern "C" { |
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29 | #endif
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30 | |||
31 | /* Includes ------------------------------------------------------------------*/
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32 | #include "stm32f10x.h" |
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33 | |||
34 | /** @addtogroup STM32F10x_StdPeriph_Driver
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35 | * @{
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36 | */
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37 | |||
38 | /** @addtogroup SDIO
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39 | * @{
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40 | */
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41 | |||
42 | /** @defgroup SDIO_Exported_Types
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43 | * @{
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44 | */
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45 | |||
46 | typedef struct |
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47 | { |
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48 | uint32_t SDIO_ClockEdge; /*!< Specifies the clock transition on which the bit capture is made.
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49 | This parameter can be a value of @ref SDIO_Clock_Edge */
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50 | |||
51 | uint32_t SDIO_ClockBypass; /*!< Specifies whether the SDIO Clock divider bypass is
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52 | enabled or disabled.
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53 | This parameter can be a value of @ref SDIO_Clock_Bypass */
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54 | |||
55 | uint32_t SDIO_ClockPowerSave; /*!< Specifies whether SDIO Clock output is enabled or
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56 | disabled when the bus is idle.
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57 | This parameter can be a value of @ref SDIO_Clock_Power_Save */
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58 | |||
59 | uint32_t SDIO_BusWide; /*!< Specifies the SDIO bus width.
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60 | This parameter can be a value of @ref SDIO_Bus_Wide */
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61 | |||
62 | uint32_t SDIO_HardwareFlowControl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled.
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63 | This parameter can be a value of @ref SDIO_Hardware_Flow_Control */
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64 | |||
65 | uint8_t SDIO_ClockDiv; /*!< Specifies the clock frequency of the SDIO controller.
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66 | This parameter can be a value between 0x00 and 0xFF. */
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67 | |||
68 | } SDIO_InitTypeDef; |
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69 | |||
70 | typedef struct |
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71 | { |
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72 | uint32_t SDIO_Argument; /*!< Specifies the SDIO command argument which is sent
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73 | to a card as part of a command message. If a command
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74 | contains an argument, it must be loaded into this register
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75 | before writing the command to the command register */
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76 | |||
77 | uint32_t SDIO_CmdIndex; /*!< Specifies the SDIO command index. It must be lower than 0x40. */
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78 | |||
79 | uint32_t SDIO_Response; /*!< Specifies the SDIO response type.
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80 | This parameter can be a value of @ref SDIO_Response_Type */
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81 | |||
82 | uint32_t SDIO_Wait; /*!< Specifies whether SDIO wait-for-interrupt request is enabled or disabled.
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83 | This parameter can be a value of @ref SDIO_Wait_Interrupt_State */
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84 | |||
85 | uint32_t SDIO_CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM)
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86 | is enabled or disabled.
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87 | This parameter can be a value of @ref SDIO_CPSM_State */
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88 | } SDIO_CmdInitTypeDef; |
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89 | |||
90 | typedef struct |
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91 | { |
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92 | uint32_t SDIO_DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */
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93 | |||
94 | uint32_t SDIO_DataLength; /*!< Specifies the number of data bytes to be transferred. */
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95 | |||
96 | uint32_t SDIO_DataBlockSize; /*!< Specifies the data block size for block transfer.
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97 | This parameter can be a value of @ref SDIO_Data_Block_Size */
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98 | |||
99 | uint32_t SDIO_TransferDir; /*!< Specifies the data transfer direction, whether the transfer
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100 | is a read or write.
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101 | This parameter can be a value of @ref SDIO_Transfer_Direction */
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102 | |||
103 | uint32_t SDIO_TransferMode; /*!< Specifies whether data transfer is in stream or block mode.
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104 | This parameter can be a value of @ref SDIO_Transfer_Type */
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105 | |||
106 | uint32_t SDIO_DPSM; /*!< Specifies whether SDIO Data path state machine (DPSM)
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107 | is enabled or disabled.
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108 | This parameter can be a value of @ref SDIO_DPSM_State */
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109 | } SDIO_DataInitTypeDef; |
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110 | |||
111 | /**
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112 | * @}
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113 | */
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114 | |||
115 | /** @defgroup SDIO_Exported_Constants
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116 | * @{
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117 | */
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118 | |||
119 | /** @defgroup SDIO_Clock_Edge
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120 | * @{
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121 | */
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122 | |||
123 | #define SDIO_ClockEdge_Rising ((uint32_t)0x00000000) |
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124 | #define SDIO_ClockEdge_Falling ((uint32_t)0x00002000) |
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125 | #define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_ClockEdge_Rising) || \
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126 | ((EDGE) == SDIO_ClockEdge_Falling)) |
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127 | /**
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128 | * @}
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129 | */
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130 | |||
131 | /** @defgroup SDIO_Clock_Bypass
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132 | * @{
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133 | */
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134 | |||
135 | #define SDIO_ClockBypass_Disable ((uint32_t)0x00000000) |
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136 | #define SDIO_ClockBypass_Enable ((uint32_t)0x00000400) |
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137 | #define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_ClockBypass_Disable) || \
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138 | ((BYPASS) == SDIO_ClockBypass_Enable)) |
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139 | /**
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140 | * @}
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141 | */
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142 | |||
143 | /** @defgroup SDIO_Clock_Power_Save
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144 | * @{
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145 | */
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146 | |||
147 | #define SDIO_ClockPowerSave_Disable ((uint32_t)0x00000000) |
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148 | #define SDIO_ClockPowerSave_Enable ((uint32_t)0x00000200) |
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149 | #define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_ClockPowerSave_Disable) || \
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150 | ((SAVE) == SDIO_ClockPowerSave_Enable)) |
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151 | /**
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152 | * @}
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153 | */
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154 | |||
155 | /** @defgroup SDIO_Bus_Wide
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156 | * @{
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157 | */
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158 | |||
159 | #define SDIO_BusWide_1b ((uint32_t)0x00000000) |
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160 | #define SDIO_BusWide_4b ((uint32_t)0x00000800) |
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161 | #define SDIO_BusWide_8b ((uint32_t)0x00001000) |
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162 | #define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BusWide_1b) || ((WIDE) == SDIO_BusWide_4b) || \
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163 | ((WIDE) == SDIO_BusWide_8b)) |
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164 | |||
165 | /**
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166 | * @}
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167 | */
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168 | |||
169 | /** @defgroup SDIO_Hardware_Flow_Control
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170 | * @{
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171 | */
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172 | |||
173 | #define SDIO_HardwareFlowControl_Disable ((uint32_t)0x00000000) |
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174 | #define SDIO_HardwareFlowControl_Enable ((uint32_t)0x00004000) |
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175 | #define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HardwareFlowControl_Disable) || \
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176 | ((CONTROL) == SDIO_HardwareFlowControl_Enable)) |
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177 | /**
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178 | * @}
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179 | */
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180 | |||
181 | /** @defgroup SDIO_Power_State
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182 | * @{
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183 | */
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184 | |||
185 | #define SDIO_PowerState_OFF ((uint32_t)0x00000000) |
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186 | #define SDIO_PowerState_ON ((uint32_t)0x00000003) |
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187 | #define IS_SDIO_POWER_STATE(STATE) (((STATE) == SDIO_PowerState_OFF) || ((STATE) == SDIO_PowerState_ON))
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188 | /**
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189 | * @}
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190 | */
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191 | |||
192 | |||
193 | /** @defgroup SDIO_Interrupt_sources
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194 | * @{
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195 | */
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196 | |||
197 | #define SDIO_IT_CCRCFAIL ((uint32_t)0x00000001) |
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198 | #define SDIO_IT_DCRCFAIL ((uint32_t)0x00000002) |
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199 | #define SDIO_IT_CTIMEOUT ((uint32_t)0x00000004) |
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200 | #define SDIO_IT_DTIMEOUT ((uint32_t)0x00000008) |
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201 | #define SDIO_IT_TXUNDERR ((uint32_t)0x00000010) |
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202 | #define SDIO_IT_RXOVERR ((uint32_t)0x00000020) |
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203 | #define SDIO_IT_CMDREND ((uint32_t)0x00000040) |
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204 | #define SDIO_IT_CMDSENT ((uint32_t)0x00000080) |
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205 | #define SDIO_IT_DATAEND ((uint32_t)0x00000100) |
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206 | #define SDIO_IT_STBITERR ((uint32_t)0x00000200) |
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207 | #define SDIO_IT_DBCKEND ((uint32_t)0x00000400) |
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208 | #define SDIO_IT_CMDACT ((uint32_t)0x00000800) |
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209 | #define SDIO_IT_TXACT ((uint32_t)0x00001000) |
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210 | #define SDIO_IT_RXACT ((uint32_t)0x00002000) |
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211 | #define SDIO_IT_TXFIFOHE ((uint32_t)0x00004000) |
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212 | #define SDIO_IT_RXFIFOHF ((uint32_t)0x00008000) |
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213 | #define SDIO_IT_TXFIFOF ((uint32_t)0x00010000) |
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214 | #define SDIO_IT_RXFIFOF ((uint32_t)0x00020000) |
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215 | #define SDIO_IT_TXFIFOE ((uint32_t)0x00040000) |
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216 | #define SDIO_IT_RXFIFOE ((uint32_t)0x00080000) |
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217 | #define SDIO_IT_TXDAVL ((uint32_t)0x00100000) |
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218 | #define SDIO_IT_RXDAVL ((uint32_t)0x00200000) |
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219 | #define SDIO_IT_SDIOIT ((uint32_t)0x00400000) |
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220 | #define SDIO_IT_CEATAEND ((uint32_t)0x00800000) |
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221 | #define IS_SDIO_IT(IT) ((((IT) & (uint32_t)0xFF000000) == 0x00) && ((IT) != (uint32_t)0x00)) |
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222 | /**
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223 | * @}
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224 | */
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225 | |||
226 | /** @defgroup SDIO_Command_Index
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227 | * @{
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228 | */
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229 | |||
230 | #define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40) |
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231 | /**
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232 | * @}
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233 | */
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234 | |||
235 | /** @defgroup SDIO_Response_Type
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236 | * @{
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237 | */
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238 | |||
239 | #define SDIO_Response_No ((uint32_t)0x00000000) |
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240 | #define SDIO_Response_Short ((uint32_t)0x00000040) |
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241 | #define SDIO_Response_Long ((uint32_t)0x000000C0) |
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242 | #define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_Response_No) || \
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243 | ((RESPONSE) == SDIO_Response_Short) || \ |
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244 | ((RESPONSE) == SDIO_Response_Long)) |
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245 | /**
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246 | * @}
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247 | */
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248 | |||
249 | /** @defgroup SDIO_Wait_Interrupt_State
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250 | * @{
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251 | */
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252 | |||
253 | #define SDIO_Wait_No ((uint32_t)0x00000000) /*!< SDIO No Wait, TimeOut is enabled */ |
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254 | #define SDIO_Wait_IT ((uint32_t)0x00000100) /*!< SDIO Wait Interrupt Request */ |
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255 | #define SDIO_Wait_Pend ((uint32_t)0x00000200) /*!< SDIO Wait End of transfer */ |
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256 | #define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_Wait_No) || ((WAIT) == SDIO_Wait_IT) || \
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257 | ((WAIT) == SDIO_Wait_Pend)) |
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258 | /**
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259 | * @}
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260 | */
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261 | |||
262 | /** @defgroup SDIO_CPSM_State
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263 | * @{
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264 | */
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265 | |||
266 | #define SDIO_CPSM_Disable ((uint32_t)0x00000000) |
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267 | #define SDIO_CPSM_Enable ((uint32_t)0x00000400) |
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268 | #define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_Enable) || ((CPSM) == SDIO_CPSM_Disable))
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269 | /**
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270 | * @}
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271 | */
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272 | |||
273 | /** @defgroup SDIO_Response_Registers
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274 | * @{
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275 | */
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276 | |||
277 | #define SDIO_RESP1 ((uint32_t)0x00000000) |
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278 | #define SDIO_RESP2 ((uint32_t)0x00000004) |
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279 | #define SDIO_RESP3 ((uint32_t)0x00000008) |
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280 | #define SDIO_RESP4 ((uint32_t)0x0000000C) |
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281 | #define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || ((RESP) == SDIO_RESP2) || \
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282 | ((RESP) == SDIO_RESP3) || ((RESP) == SDIO_RESP4)) |
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283 | /**
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284 | * @}
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285 | */
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286 | |||
287 | /** @defgroup SDIO_Data_Length
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288 | * @{
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289 | */
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290 | |||
291 | #define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF) |
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292 | /**
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293 | * @}
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294 | */
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295 | |||
296 | /** @defgroup SDIO_Data_Block_Size
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297 | * @{
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298 | */
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299 | |||
300 | #define SDIO_DataBlockSize_1b ((uint32_t)0x00000000) |
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301 | #define SDIO_DataBlockSize_2b ((uint32_t)0x00000010) |
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302 | #define SDIO_DataBlockSize_4b ((uint32_t)0x00000020) |
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303 | #define SDIO_DataBlockSize_8b ((uint32_t)0x00000030) |
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304 | #define SDIO_DataBlockSize_16b ((uint32_t)0x00000040) |
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305 | #define SDIO_DataBlockSize_32b ((uint32_t)0x00000050) |
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306 | #define SDIO_DataBlockSize_64b ((uint32_t)0x00000060) |
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307 | #define SDIO_DataBlockSize_128b ((uint32_t)0x00000070) |
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308 | #define SDIO_DataBlockSize_256b ((uint32_t)0x00000080) |
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309 | #define SDIO_DataBlockSize_512b ((uint32_t)0x00000090) |
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310 | #define SDIO_DataBlockSize_1024b ((uint32_t)0x000000A0) |
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311 | #define SDIO_DataBlockSize_2048b ((uint32_t)0x000000B0) |
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312 | #define SDIO_DataBlockSize_4096b ((uint32_t)0x000000C0) |
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313 | #define SDIO_DataBlockSize_8192b ((uint32_t)0x000000D0) |
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314 | #define SDIO_DataBlockSize_16384b ((uint32_t)0x000000E0) |
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315 | #define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DataBlockSize_1b) || \
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316 | ((SIZE) == SDIO_DataBlockSize_2b) || \ |
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317 | ((SIZE) == SDIO_DataBlockSize_4b) || \ |
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318 | ((SIZE) == SDIO_DataBlockSize_8b) || \ |
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319 | ((SIZE) == SDIO_DataBlockSize_16b) || \ |
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320 | ((SIZE) == SDIO_DataBlockSize_32b) || \ |
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321 | ((SIZE) == SDIO_DataBlockSize_64b) || \ |
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322 | ((SIZE) == SDIO_DataBlockSize_128b) || \ |
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323 | ((SIZE) == SDIO_DataBlockSize_256b) || \ |
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324 | ((SIZE) == SDIO_DataBlockSize_512b) || \ |
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325 | ((SIZE) == SDIO_DataBlockSize_1024b) || \ |
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326 | ((SIZE) == SDIO_DataBlockSize_2048b) || \ |
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327 | ((SIZE) == SDIO_DataBlockSize_4096b) || \ |
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328 | ((SIZE) == SDIO_DataBlockSize_8192b) || \ |
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329 | ((SIZE) == SDIO_DataBlockSize_16384b)) |
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330 | /**
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331 | * @}
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332 | */
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333 | |||
334 | /** @defgroup SDIO_Transfer_Direction
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335 | * @{
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336 | */
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337 | |||
338 | #define SDIO_TransferDir_ToCard ((uint32_t)0x00000000) |
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339 | #define SDIO_TransferDir_ToSDIO ((uint32_t)0x00000002) |
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340 | #define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TransferDir_ToCard) || \
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341 | ((DIR) == SDIO_TransferDir_ToSDIO)) |
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342 | /**
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343 | * @}
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344 | */
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345 | |||
346 | /** @defgroup SDIO_Transfer_Type
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347 | * @{
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348 | */
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349 | |||
350 | #define SDIO_TransferMode_Block ((uint32_t)0x00000000) |
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351 | #define SDIO_TransferMode_Stream ((uint32_t)0x00000004) |
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352 | #define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TransferMode_Stream) || \
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353 | ((MODE) == SDIO_TransferMode_Block)) |
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354 | /**
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355 | * @}
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356 | */
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357 | |||
358 | /** @defgroup SDIO_DPSM_State
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359 | * @{
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360 | */
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361 | |||
362 | #define SDIO_DPSM_Disable ((uint32_t)0x00000000) |
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363 | #define SDIO_DPSM_Enable ((uint32_t)0x00000001) |
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364 | #define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_Enable) || ((DPSM) == SDIO_DPSM_Disable))
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365 | /**
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366 | * @}
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367 | */
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368 | |||
369 | /** @defgroup SDIO_Flags
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370 | * @{
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371 | */
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372 | |||
373 | #define SDIO_FLAG_CCRCFAIL ((uint32_t)0x00000001) |
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374 | #define SDIO_FLAG_DCRCFAIL ((uint32_t)0x00000002) |
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375 | #define SDIO_FLAG_CTIMEOUT ((uint32_t)0x00000004) |
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376 | #define SDIO_FLAG_DTIMEOUT ((uint32_t)0x00000008) |
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377 | #define SDIO_FLAG_TXUNDERR ((uint32_t)0x00000010) |
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378 | #define SDIO_FLAG_RXOVERR ((uint32_t)0x00000020) |
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379 | #define SDIO_FLAG_CMDREND ((uint32_t)0x00000040) |
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380 | #define SDIO_FLAG_CMDSENT ((uint32_t)0x00000080) |
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381 | #define SDIO_FLAG_DATAEND ((uint32_t)0x00000100) |
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382 | #define SDIO_FLAG_STBITERR ((uint32_t)0x00000200) |
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383 | #define SDIO_FLAG_DBCKEND ((uint32_t)0x00000400) |
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384 | #define SDIO_FLAG_CMDACT ((uint32_t)0x00000800) |
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385 | #define SDIO_FLAG_TXACT ((uint32_t)0x00001000) |
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386 | #define SDIO_FLAG_RXACT ((uint32_t)0x00002000) |
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387 | #define SDIO_FLAG_TXFIFOHE ((uint32_t)0x00004000) |
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388 | #define SDIO_FLAG_RXFIFOHF ((uint32_t)0x00008000) |
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389 | #define SDIO_FLAG_TXFIFOF ((uint32_t)0x00010000) |
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390 | #define SDIO_FLAG_RXFIFOF ((uint32_t)0x00020000) |
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391 | #define SDIO_FLAG_TXFIFOE ((uint32_t)0x00040000) |
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392 | #define SDIO_FLAG_RXFIFOE ((uint32_t)0x00080000) |
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393 | #define SDIO_FLAG_TXDAVL ((uint32_t)0x00100000) |
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394 | #define SDIO_FLAG_RXDAVL ((uint32_t)0x00200000) |
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395 | #define SDIO_FLAG_SDIOIT ((uint32_t)0x00400000) |
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396 | #define SDIO_FLAG_CEATAEND ((uint32_t)0x00800000) |
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397 | #define IS_SDIO_FLAG(FLAG) (((FLAG) == SDIO_FLAG_CCRCFAIL) || \
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398 | ((FLAG) == SDIO_FLAG_DCRCFAIL) || \ |
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399 | ((FLAG) == SDIO_FLAG_CTIMEOUT) || \ |
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400 | ((FLAG) == SDIO_FLAG_DTIMEOUT) || \ |
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401 | ((FLAG) == SDIO_FLAG_TXUNDERR) || \ |
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402 | ((FLAG) == SDIO_FLAG_RXOVERR) || \ |
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403 | ((FLAG) == SDIO_FLAG_CMDREND) || \ |
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404 | ((FLAG) == SDIO_FLAG_CMDSENT) || \ |
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405 | ((FLAG) == SDIO_FLAG_DATAEND) || \ |
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406 | ((FLAG) == SDIO_FLAG_STBITERR) || \ |
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407 | ((FLAG) == SDIO_FLAG_DBCKEND) || \ |
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408 | ((FLAG) == SDIO_FLAG_CMDACT) || \ |
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409 | ((FLAG) == SDIO_FLAG_TXACT) || \ |
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410 | ((FLAG) == SDIO_FLAG_RXACT) || \ |
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411 | ((FLAG) == SDIO_FLAG_TXFIFOHE) || \ |
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412 | ((FLAG) == SDIO_FLAG_RXFIFOHF) || \ |
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413 | ((FLAG) == SDIO_FLAG_TXFIFOF) || \ |
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414 | ((FLAG) == SDIO_FLAG_RXFIFOF) || \ |
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415 | ((FLAG) == SDIO_FLAG_TXFIFOE) || \ |
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416 | ((FLAG) == SDIO_FLAG_RXFIFOE) || \ |
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417 | ((FLAG) == SDIO_FLAG_TXDAVL) || \ |
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418 | ((FLAG) == SDIO_FLAG_RXDAVL) || \ |
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419 | ((FLAG) == SDIO_FLAG_SDIOIT) || \ |
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420 | ((FLAG) == SDIO_FLAG_CEATAEND)) |
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421 | |||
422 | #define IS_SDIO_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFF3FF800) == 0x00) && ((FLAG) != (uint32_t)0x00)) |
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423 | |||
424 | #define IS_SDIO_GET_IT(IT) (((IT) == SDIO_IT_CCRCFAIL) || \
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425 | ((IT) == SDIO_IT_DCRCFAIL) || \ |
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426 | ((IT) == SDIO_IT_CTIMEOUT) || \ |
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427 | ((IT) == SDIO_IT_DTIMEOUT) || \ |
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428 | ((IT) == SDIO_IT_TXUNDERR) || \ |
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429 | ((IT) == SDIO_IT_RXOVERR) || \ |
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430 | ((IT) == SDIO_IT_CMDREND) || \ |
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431 | ((IT) == SDIO_IT_CMDSENT) || \ |
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432 | ((IT) == SDIO_IT_DATAEND) || \ |
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433 | ((IT) == SDIO_IT_STBITERR) || \ |
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434 | ((IT) == SDIO_IT_DBCKEND) || \ |
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435 | ((IT) == SDIO_IT_CMDACT) || \ |
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436 | ((IT) == SDIO_IT_TXACT) || \ |
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437 | ((IT) == SDIO_IT_RXACT) || \ |
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438 | ((IT) == SDIO_IT_TXFIFOHE) || \ |
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439 | ((IT) == SDIO_IT_RXFIFOHF) || \ |
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440 | ((IT) == SDIO_IT_TXFIFOF) || \ |
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441 | ((IT) == SDIO_IT_RXFIFOF) || \ |
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442 | ((IT) == SDIO_IT_TXFIFOE) || \ |
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443 | ((IT) == SDIO_IT_RXFIFOE) || \ |
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444 | ((IT) == SDIO_IT_TXDAVL) || \ |
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445 | ((IT) == SDIO_IT_RXDAVL) || \ |
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446 | ((IT) == SDIO_IT_SDIOIT) || \ |
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447 | ((IT) == SDIO_IT_CEATAEND)) |
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448 | |||
449 | #define IS_SDIO_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFF3FF800) == 0x00) && ((IT) != (uint32_t)0x00)) |
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450 | |||
451 | /**
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452 | * @}
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453 | */
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454 | |||
455 | /** @defgroup SDIO_Read_Wait_Mode
|
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456 | * @{
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457 | */
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458 | |||
459 | #define SDIO_ReadWaitMode_CLK ((uint32_t)0x00000001) |
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460 | #define SDIO_ReadWaitMode_DATA2 ((uint32_t)0x00000000) |
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461 | #define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_ReadWaitMode_CLK) || \
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462 | ((MODE) == SDIO_ReadWaitMode_DATA2)) |
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463 | /**
|
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464 | * @}
|
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465 | */
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466 | |||
467 | /**
|
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468 | * @}
|
||
469 | */
|
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470 | |||
471 | /** @defgroup SDIO_Exported_Macros
|
||
472 | * @{
|
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473 | */
|
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474 | |||
475 | /**
|
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476 | * @}
|
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477 | */
|
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478 | |||
479 | /** @defgroup SDIO_Exported_Functions
|
||
480 | * @{
|
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481 | */
|
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482 | |||
483 | void SDIO_DeInit(void); |
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484 | void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct);
|
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485 | void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct);
|
||
486 | void SDIO_ClockCmd(FunctionalState NewState);
|
||
487 | void SDIO_SetPowerState(uint32_t SDIO_PowerState);
|
||
488 | uint32_t SDIO_GetPowerState(void);
|
||
489 | void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState);
|
||
490 | void SDIO_DMACmd(FunctionalState NewState);
|
||
491 | void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct);
|
||
492 | void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct);
|
||
493 | uint8_t SDIO_GetCommandResponse(void);
|
||
494 | uint32_t SDIO_GetResponse(uint32_t SDIO_RESP); |
||
495 | void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct);
|
||
496 | void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct);
|
||
497 | uint32_t SDIO_GetDataCounter(void);
|
||
498 | uint32_t SDIO_ReadData(void);
|
||
499 | void SDIO_WriteData(uint32_t Data);
|
||
500 | uint32_t SDIO_GetFIFOCount(void);
|
||
501 | void SDIO_StartSDIOReadWait(FunctionalState NewState);
|
||
502 | void SDIO_StopSDIOReadWait(FunctionalState NewState);
|
||
503 | void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode);
|
||
504 | void SDIO_SetSDIOOperation(FunctionalState NewState);
|
||
505 | void SDIO_SendSDIOSuspendCmd(FunctionalState NewState);
|
||
506 | void SDIO_CommandCompletionCmd(FunctionalState NewState);
|
||
507 | void SDIO_CEATAITCmd(FunctionalState NewState);
|
||
508 | void SDIO_SendCEATACmd(FunctionalState NewState);
|
||
509 | FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG); |
||
510 | void SDIO_ClearFlag(uint32_t SDIO_FLAG);
|
||
511 | ITStatus SDIO_GetITStatus(uint32_t SDIO_IT); |
||
512 | void SDIO_ClearITPendingBit(uint32_t SDIO_IT);
|
||
513 | |||
514 | #ifdef __cplusplus
|
||
515 | } |
||
516 | #endif
|
||
517 | |||
518 | #endif /* __STM32F10x_SDIO_H */ |
||
519 | /**
|
||
520 | * @}
|
||
521 | */
|
||
522 | |||
523 | /**
|
||
524 | * @}
|
||
525 | */
|
||
526 | |||
527 | /**
|
||
528 | * @}
|
||
529 | */
|
||
530 | |||
531 | /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|