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1 69661903 Thomas Schöpping
/**************************************************************************//**
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 * @file     core_cmFunc.h
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 * @brief    CMSIS Cortex-M Core Function Access Header File
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 * @version  V3.01
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 * @date     06. March 2012
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 *
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 * @note
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 * Copyright (C) 2009-2012 ARM Limited. All rights reserved.
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 *
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 * @par
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 * ARM Limited (ARM) is supplying this software for use with Cortex-M
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 * processor based microcontrollers.  This file can be freely distributed
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 * within development tools that are supporting such ARM based processors.
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 *
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 * @par
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 * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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 *
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 ******************************************************************************/
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#ifndef __CORE_CMFUNC_H
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#define __CORE_CMFUNC_H
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/* ###########################  Core Function Access  ########################### */
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/** \ingroup  CMSIS_Core_FunctionInterface
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    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
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  @{
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 */
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#if   defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
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/* ARM armcc specific functions */
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#if (__ARMCC_VERSION < 400677)
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  #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
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#endif
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/* intrinsic void __enable_irq();     */
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/* intrinsic void __disable_irq();    */
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/** \brief  Get Control Register
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    This function returns the content of the Control Register.
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    \return               Control Register value
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 */
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__STATIC_INLINE uint32_t __get_CONTROL(void)
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{
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  register uint32_t __regControl         __ASM("control");
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  return(__regControl);
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}
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/** \brief  Set Control Register
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    This function writes the given value to the Control Register.
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    \param [in]    control  Control Register value to set
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 */
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__STATIC_INLINE void __set_CONTROL(uint32_t control)
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{
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  register uint32_t __regControl         __ASM("control");
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  __regControl = control;
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}
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/** \brief  Get IPSR Register
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    This function returns the content of the IPSR Register.
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    \return               IPSR Register value
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 */
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__STATIC_INLINE uint32_t __get_IPSR(void)
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{
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  register uint32_t __regIPSR          __ASM("ipsr");
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  return(__regIPSR);
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}
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82
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/** \brief  Get APSR Register
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    This function returns the content of the APSR Register.
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    \return               APSR Register value
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 */
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__STATIC_INLINE uint32_t __get_APSR(void)
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{
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  register uint32_t __regAPSR          __ASM("apsr");
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  return(__regAPSR);
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}
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/** \brief  Get xPSR Register
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    This function returns the content of the xPSR Register.
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    \return               xPSR Register value
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 */
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__STATIC_INLINE uint32_t __get_xPSR(void)
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{
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  register uint32_t __regXPSR          __ASM("xpsr");
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  return(__regXPSR);
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}
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/** \brief  Get Process Stack Pointer
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    This function returns the current value of the Process Stack Pointer (PSP).
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    \return               PSP Register value
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 */
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__STATIC_INLINE uint32_t __get_PSP(void)
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{
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  register uint32_t __regProcessStackPointer  __ASM("psp");
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  return(__regProcessStackPointer);
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}
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/** \brief  Set Process Stack Pointer
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    This function assigns the given value to the Process Stack Pointer (PSP).
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    \param [in]    topOfProcStack  Process Stack Pointer value to set
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 */
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__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
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{
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  register uint32_t __regProcessStackPointer  __ASM("psp");
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  __regProcessStackPointer = topOfProcStack;
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}
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/** \brief  Get Main Stack Pointer
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    This function returns the current value of the Main Stack Pointer (MSP).
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    \return               MSP Register value
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 */
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__STATIC_INLINE uint32_t __get_MSP(void)
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{
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  register uint32_t __regMainStackPointer     __ASM("msp");
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  return(__regMainStackPointer);
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}
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/** \brief  Set Main Stack Pointer
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    This function assigns the given value to the Main Stack Pointer (MSP).
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    \param [in]    topOfMainStack  Main Stack Pointer value to set
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 */
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__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
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{
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  register uint32_t __regMainStackPointer     __ASM("msp");
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  __regMainStackPointer = topOfMainStack;
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}
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/** \brief  Get Priority Mask
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    This function returns the current state of the priority mask bit from the Priority Mask Register.
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    \return               Priority Mask value
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 */
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__STATIC_INLINE uint32_t __get_PRIMASK(void)
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{
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  register uint32_t __regPriMask         __ASM("primask");
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  return(__regPriMask);
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}
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/** \brief  Set Priority Mask
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    This function assigns the given value to the Priority Mask Register.
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    \param [in]    priMask  Priority Mask
179
 */
180
__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
181
{
182
  register uint32_t __regPriMask         __ASM("primask");
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  __regPriMask = (priMask);
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}
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186
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#if       (__CORTEX_M >= 0x03)
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189
/** \brief  Enable FIQ
190

191
    This function enables FIQ interrupts by clearing the F-bit in the CPSR.
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    Can only be executed in Privileged modes.
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 */
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#define __enable_fault_irq                __enable_fiq
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/** \brief  Disable FIQ
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199
    This function disables FIQ interrupts by setting the F-bit in the CPSR.
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    Can only be executed in Privileged modes.
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 */
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#define __disable_fault_irq               __disable_fiq
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/** \brief  Get Base Priority
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    This function returns the current value of the Base Priority register.
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    \return               Base Priority register value
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 */
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__STATIC_INLINE uint32_t  __get_BASEPRI(void)
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{
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  register uint32_t __regBasePri         __ASM("basepri");
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  return(__regBasePri);
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}
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/** \brief  Set Base Priority
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    This function assigns the given value to the Base Priority register.
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    \param [in]    basePri  Base Priority value to set
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 */
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__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
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{
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  register uint32_t __regBasePri         __ASM("basepri");
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  __regBasePri = (basePri & 0xff);
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}
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/** \brief  Get Fault Mask
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    This function returns the current value of the Fault Mask register.
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    \return               Fault Mask register value
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 */
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__STATIC_INLINE uint32_t __get_FAULTMASK(void)
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{
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  register uint32_t __regFaultMask       __ASM("faultmask");
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  return(__regFaultMask);
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}
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/** \brief  Set Fault Mask
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246
    This function assigns the given value to the Fault Mask register.
247

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    \param [in]    faultMask  Fault Mask value to set
249
 */
250
__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
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{
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  register uint32_t __regFaultMask       __ASM("faultmask");
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  __regFaultMask = (faultMask & (uint32_t)1);
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}
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#endif /* (__CORTEX_M >= 0x03) */
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#if       (__CORTEX_M == 0x04)
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/** \brief  Get FPSCR
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    This function returns the current value of the Floating Point Status/Control register.
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    \return               Floating Point Status/Control register value
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 */
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__STATIC_INLINE uint32_t __get_FPSCR(void)
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{
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#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
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  register uint32_t __regfpscr         __ASM("fpscr");
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  return(__regfpscr);
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#else
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   return(0);
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#endif
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}
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/** \brief  Set FPSCR
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    This function assigns the given value to the Floating Point Status/Control register.
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282
    \param [in]    fpscr  Floating Point Status/Control value to set
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 */
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__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
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{
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#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
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  register uint32_t __regfpscr         __ASM("fpscr");
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  __regfpscr = (fpscr);
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#endif
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}
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#endif /* (__CORTEX_M == 0x04) */
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#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
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/* IAR iccarm specific functions */
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#include <cmsis_iar.h>
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#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
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/* TI CCS specific functions */
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#include <cmsis_ccs.h>
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#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
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/* GNU gcc specific functions */
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/** \brief  Enable IRQ Interrupts
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312
  This function enables IRQ interrupts by clearing the I-bit in the CPSR.
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  Can only be executed in Privileged modes.
314
 */
315
__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
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{
317
  __ASM volatile ("cpsie i");
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}
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/** \brief  Disable IRQ Interrupts
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323
  This function disables IRQ interrupts by setting the I-bit in the CPSR.
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  Can only be executed in Privileged modes.
325
 */
326
__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
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{
328
  __ASM volatile ("cpsid i");
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}
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/** \brief  Get Control Register
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334
    This function returns the content of the Control Register.
335

336
    \return               Control Register value
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 */
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__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
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{
340
  uint32_t result;
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342
  __ASM volatile ("MRS %0, control" : "=r" (result) );
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  return(result);
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}
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/** \brief  Set Control Register
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349
    This function writes the given value to the Control Register.
350

351
    \param [in]    control  Control Register value to set
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 */
353
__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
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{
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  __ASM volatile ("MSR control, %0" : : "r" (control) );
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}
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/** \brief  Get IPSR Register
360

361
    This function returns the content of the IPSR Register.
362

363
    \return               IPSR Register value
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 */
365
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
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{
367
  uint32_t result;
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369
  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
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  return(result);
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}
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/** \brief  Get APSR Register
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376
    This function returns the content of the APSR Register.
377

378
    \return               APSR Register value
379
 */
380
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
381
{
382
  uint32_t result;
383
384
  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
385
  return(result);
386
}
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/** \brief  Get xPSR Register
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391
    This function returns the content of the xPSR Register.
392

393
    \return               xPSR Register value
394
 */
395
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
396
{
397
  uint32_t result;
398
399
  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
400
  return(result);
401
}
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/** \brief  Get Process Stack Pointer
405

406
    This function returns the current value of the Process Stack Pointer (PSP).
407

408
    \return               PSP Register value
409
 */
410
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
411
{
412
  register uint32_t result;
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  __ASM volatile ("MRS %0, psp\n"  : "=r" (result) );
415
  return(result);
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}
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/** \brief  Set Process Stack Pointer
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421
    This function assigns the given value to the Process Stack Pointer (PSP).
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423
    \param [in]    topOfProcStack  Process Stack Pointer value to set
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 */
425
__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
426
{
427
  __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) );
428
}
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430
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/** \brief  Get Main Stack Pointer
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433
    This function returns the current value of the Main Stack Pointer (MSP).
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435
    \return               MSP Register value
436
 */
437
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
438
{
439
  register uint32_t result;
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441
  __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
442
  return(result);
443
}
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/** \brief  Set Main Stack Pointer
447

448
    This function assigns the given value to the Main Stack Pointer (MSP).
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450
    \param [in]    topOfMainStack  Main Stack Pointer value to set
451
 */
452
__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
453
{
454
  __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) );
455
}
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/** \brief  Get Priority Mask
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460
    This function returns the current state of the priority mask bit from the Priority Mask Register.
461

462
    \return               Priority Mask value
463
 */
464
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
465
{
466
  uint32_t result;
467
468
  __ASM volatile ("MRS %0, primask" : "=r" (result) );
469
  return(result);
470
}
471
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/** \brief  Set Priority Mask
474

475
    This function assigns the given value to the Priority Mask Register.
476

477
    \param [in]    priMask  Priority Mask
478
 */
479
__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
480
{
481
  __ASM volatile ("MSR primask, %0" : : "r" (priMask) );
482
}
483
484
485
#if       (__CORTEX_M >= 0x03)
486
487
/** \brief  Enable FIQ
488

489
    This function enables FIQ interrupts by clearing the F-bit in the CPSR.
490
    Can only be executed in Privileged modes.
491
 */
492
__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
493
{
494
  __ASM volatile ("cpsie f");
495
}
496
497
498
/** \brief  Disable FIQ
499

500
    This function disables FIQ interrupts by setting the F-bit in the CPSR.
501
    Can only be executed in Privileged modes.
502
 */
503
__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
504
{
505
  __ASM volatile ("cpsid f");
506
}
507
508
509
/** \brief  Get Base Priority
510

511
    This function returns the current value of the Base Priority register.
512

513
    \return               Base Priority register value
514
 */
515
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
516
{
517
  uint32_t result;
518
519
  __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
520
  return(result);
521
}
522
523
524
/** \brief  Set Base Priority
525

526
    This function assigns the given value to the Base Priority register.
527

528
    \param [in]    basePri  Base Priority value to set
529
 */
530
__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
531
{
532
  __ASM volatile ("MSR basepri, %0" : : "r" (value) );
533
}
534
535
536
/** \brief  Get Fault Mask
537

538
    This function returns the current value of the Fault Mask register.
539

540
    \return               Fault Mask register value
541
 */
542
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
543
{
544
  uint32_t result;
545
546
  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
547
  return(result);
548
}
549
550
551
/** \brief  Set Fault Mask
552

553
    This function assigns the given value to the Fault Mask register.
554

555
    \param [in]    faultMask  Fault Mask value to set
556
 */
557
__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
558
{
559
  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) );
560
}
561
562
#endif /* (__CORTEX_M >= 0x03) */
563
564
565
#if       (__CORTEX_M == 0x04)
566
567
/** \brief  Get FPSCR
568

569
    This function returns the current value of the Floating Point Status/Control register.
570

571
    \return               Floating Point Status/Control register value
572
 */
573
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
574
{
575
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
576
  uint32_t result;
577
578
  __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
579
  return(result);
580
#else
581
   return(0);
582
#endif
583
}
584
585
586
/** \brief  Set FPSCR
587

588
    This function assigns the given value to the Floating Point Status/Control register.
589

590
    \param [in]    fpscr  Floating Point Status/Control value to set
591
 */
592
__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
593
{
594
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
595
  __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) );
596
#endif
597
}
598
599
#endif /* (__CORTEX_M == 0x04) */
600
601
602
#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
603
/* TASKING carm specific functions */
604
605
/*
606
 * The CMSIS functions have been implemented as intrinsics in the compiler.
607
 * Please use "carm -?i" to get an up to date list of all instrinsics,
608
 * Including the CMSIS ones.
609
 */
610
611
#endif
612
613
/*@} end of CMSIS_Core_RegAccFunctions */
614
615
616
#endif /* __CORE_CMFUNC_H */