amiro-blt / Target / Modules / PowerManagement_1-1 / Boot / lib / stdperiphlib / STM32F4xx_StdPeriph_Driver / inc / stm32f4xx_spi.h @ 367c0652
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1 | 69661903 | Thomas Schöpping | /**
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2 | ******************************************************************************
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3 | * @file stm32f4xx_spi.h
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4 | * @author MCD Application Team
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5 | * @version V1.1.0
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6 | * @date 11-January-2013
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7 | * @brief This file contains all the functions prototypes for the SPI
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8 | * firmware library.
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9 | ******************************************************************************
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10 | * @attention
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11 | *
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12 | * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
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13 | *
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14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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15 | * You may not use this file except in compliance with the License.
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16 | * You may obtain a copy of the License at:
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17 | *
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18 | * http://www.st.com/software_license_agreement_liberty_v2
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19 | *
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20 | * Unless required by applicable law or agreed to in writing, software
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21 | * distributed under the License is distributed on an "AS IS" BASIS,
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22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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23 | * See the License for the specific language governing permissions and
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24 | * limitations under the License.
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25 | *
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26 | ******************************************************************************
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27 | */
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28 | |||
29 | /* Define to prevent recursive inclusion -------------------------------------*/
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30 | #ifndef __STM32F4xx_SPI_H
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31 | #define __STM32F4xx_SPI_H
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32 | |||
33 | #ifdef __cplusplus
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34 | extern "C" { |
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35 | #endif
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36 | |||
37 | /* Includes ------------------------------------------------------------------*/
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38 | #include "stm32f4xx.h" |
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39 | |||
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
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41 | * @{
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42 | */
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43 | |||
44 | /** @addtogroup SPI
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45 | * @{
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46 | */
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47 | |||
48 | /* Exported types ------------------------------------------------------------*/
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49 | |||
50 | /**
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51 | * @brief SPI Init structure definition
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52 | */
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53 | |||
54 | typedef struct |
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55 | { |
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56 | uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
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57 | This parameter can be a value of @ref SPI_data_direction */
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58 | |||
59 | uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
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60 | This parameter can be a value of @ref SPI_mode */
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61 | |||
62 | uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
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63 | This parameter can be a value of @ref SPI_data_size */
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64 | |||
65 | uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
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66 | This parameter can be a value of @ref SPI_Clock_Polarity */
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67 | |||
68 | uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
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69 | This parameter can be a value of @ref SPI_Clock_Phase */
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70 | |||
71 | uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
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72 | hardware (NSS pin) or by software using the SSI bit.
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73 | This parameter can be a value of @ref SPI_Slave_Select_management */
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74 | |||
75 | uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
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76 | used to configure the transmit and receive SCK clock.
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77 | This parameter can be a value of @ref SPI_BaudRate_Prescaler
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78 | @note The communication clock is derived from the master
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79 | clock. The slave clock does not need to be set. */
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80 | |||
81 | uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
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82 | This parameter can be a value of @ref SPI_MSB_LSB_transmission */
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83 | |||
84 | uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
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85 | }SPI_InitTypeDef; |
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86 | |||
87 | /**
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88 | * @brief I2S Init structure definition
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89 | */
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90 | |||
91 | typedef struct |
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92 | { |
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93 | |||
94 | uint16_t I2S_Mode; /*!< Specifies the I2S operating mode.
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95 | This parameter can be a value of @ref I2S_Mode */
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96 | |||
97 | uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication.
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98 | This parameter can be a value of @ref I2S_Standard */
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99 | |||
100 | uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication.
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101 | This parameter can be a value of @ref I2S_Data_Format */
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102 | |||
103 | uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
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104 | This parameter can be a value of @ref I2S_MCLK_Output */
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105 | |||
106 | uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
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107 | This parameter can be a value of @ref I2S_Audio_Frequency */
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108 | |||
109 | uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock.
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110 | This parameter can be a value of @ref I2S_Clock_Polarity */
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111 | }I2S_InitTypeDef; |
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112 | |||
113 | /* Exported constants --------------------------------------------------------*/
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114 | |||
115 | /** @defgroup SPI_Exported_Constants
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116 | * @{
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117 | */
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118 | |||
119 | #define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
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120 | ((PERIPH) == SPI2) || \ |
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121 | ((PERIPH) == SPI3) || \ |
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122 | ((PERIPH) == SPI4) || \ |
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123 | ((PERIPH) == SPI5) || \ |
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124 | ((PERIPH) == SPI6)) |
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125 | |||
126 | #define IS_SPI_ALL_PERIPH_EXT(PERIPH) (((PERIPH) == SPI1) || \
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127 | ((PERIPH) == SPI2) || \ |
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128 | ((PERIPH) == SPI3) || \ |
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129 | ((PERIPH) == SPI4) || \ |
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130 | ((PERIPH) == SPI5) || \ |
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131 | ((PERIPH) == SPI6) || \ |
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132 | ((PERIPH) == I2S2ext) || \ |
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133 | ((PERIPH) == I2S3ext)) |
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134 | |||
135 | #define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
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136 | ((PERIPH) == SPI3)) |
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137 | |||
138 | #define IS_SPI_23_PERIPH_EXT(PERIPH) (((PERIPH) == SPI2) || \
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139 | ((PERIPH) == SPI3) || \ |
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140 | ((PERIPH) == I2S2ext) || \ |
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141 | ((PERIPH) == I2S3ext)) |
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142 | |||
143 | #define IS_I2S_EXT_PERIPH(PERIPH) (((PERIPH) == I2S2ext) || \
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144 | ((PERIPH) == I2S3ext)) |
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145 | |||
146 | |||
147 | /** @defgroup SPI_data_direction
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148 | * @{
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149 | */
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150 | |||
151 | #define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000) |
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152 | #define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400) |
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153 | #define SPI_Direction_1Line_Rx ((uint16_t)0x8000) |
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154 | #define SPI_Direction_1Line_Tx ((uint16_t)0xC000) |
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155 | #define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
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156 | ((MODE) == SPI_Direction_2Lines_RxOnly) || \ |
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157 | ((MODE) == SPI_Direction_1Line_Rx) || \ |
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158 | ((MODE) == SPI_Direction_1Line_Tx)) |
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159 | /**
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160 | * @}
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161 | */
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162 | |||
163 | /** @defgroup SPI_mode
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164 | * @{
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165 | */
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166 | |||
167 | #define SPI_Mode_Master ((uint16_t)0x0104) |
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168 | #define SPI_Mode_Slave ((uint16_t)0x0000) |
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169 | #define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
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170 | ((MODE) == SPI_Mode_Slave)) |
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171 | /**
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172 | * @}
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173 | */
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174 | |||
175 | /** @defgroup SPI_data_size
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176 | * @{
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177 | */
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178 | |||
179 | #define SPI_DataSize_16b ((uint16_t)0x0800) |
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180 | #define SPI_DataSize_8b ((uint16_t)0x0000) |
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181 | #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
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182 | ((DATASIZE) == SPI_DataSize_8b)) |
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183 | /**
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184 | * @}
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185 | */
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186 | |||
187 | /** @defgroup SPI_Clock_Polarity
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188 | * @{
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189 | */
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190 | |||
191 | #define SPI_CPOL_Low ((uint16_t)0x0000) |
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192 | #define SPI_CPOL_High ((uint16_t)0x0002) |
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193 | #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
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194 | ((CPOL) == SPI_CPOL_High)) |
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195 | /**
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196 | * @}
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197 | */
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198 | |||
199 | /** @defgroup SPI_Clock_Phase
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200 | * @{
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201 | */
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202 | |||
203 | #define SPI_CPHA_1Edge ((uint16_t)0x0000) |
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204 | #define SPI_CPHA_2Edge ((uint16_t)0x0001) |
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205 | #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
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206 | ((CPHA) == SPI_CPHA_2Edge)) |
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207 | /**
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208 | * @}
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209 | */
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210 | |||
211 | /** @defgroup SPI_Slave_Select_management
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212 | * @{
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213 | */
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214 | |||
215 | #define SPI_NSS_Soft ((uint16_t)0x0200) |
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216 | #define SPI_NSS_Hard ((uint16_t)0x0000) |
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217 | #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
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218 | ((NSS) == SPI_NSS_Hard)) |
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219 | /**
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220 | * @}
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221 | */
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222 | |||
223 | /** @defgroup SPI_BaudRate_Prescaler
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224 | * @{
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225 | */
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226 | |||
227 | #define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000) |
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228 | #define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008) |
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229 | #define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010) |
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230 | #define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018) |
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231 | #define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020) |
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232 | #define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028) |
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233 | #define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030) |
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234 | #define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038) |
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235 | #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
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236 | ((PRESCALER) == SPI_BaudRatePrescaler_4) || \ |
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237 | ((PRESCALER) == SPI_BaudRatePrescaler_8) || \ |
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238 | ((PRESCALER) == SPI_BaudRatePrescaler_16) || \ |
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239 | ((PRESCALER) == SPI_BaudRatePrescaler_32) || \ |
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240 | ((PRESCALER) == SPI_BaudRatePrescaler_64) || \ |
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241 | ((PRESCALER) == SPI_BaudRatePrescaler_128) || \ |
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242 | ((PRESCALER) == SPI_BaudRatePrescaler_256)) |
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243 | /**
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244 | * @}
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245 | */
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246 | |||
247 | /** @defgroup SPI_MSB_LSB_transmission
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248 | * @{
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249 | */
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250 | |||
251 | #define SPI_FirstBit_MSB ((uint16_t)0x0000) |
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252 | #define SPI_FirstBit_LSB ((uint16_t)0x0080) |
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253 | #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
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254 | ((BIT) == SPI_FirstBit_LSB)) |
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255 | /**
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256 | * @}
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257 | */
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258 | |||
259 | /** @defgroup SPI_I2S_Mode
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260 | * @{
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261 | */
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262 | |||
263 | #define I2S_Mode_SlaveTx ((uint16_t)0x0000) |
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264 | #define I2S_Mode_SlaveRx ((uint16_t)0x0100) |
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265 | #define I2S_Mode_MasterTx ((uint16_t)0x0200) |
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266 | #define I2S_Mode_MasterRx ((uint16_t)0x0300) |
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267 | #define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
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268 | ((MODE) == I2S_Mode_SlaveRx) || \ |
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269 | ((MODE) == I2S_Mode_MasterTx)|| \ |
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270 | ((MODE) == I2S_Mode_MasterRx)) |
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271 | /**
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272 | * @}
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273 | */
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274 | |||
275 | |||
276 | /** @defgroup SPI_I2S_Standard
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277 | * @{
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278 | */
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279 | |||
280 | #define I2S_Standard_Phillips ((uint16_t)0x0000) |
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281 | #define I2S_Standard_MSB ((uint16_t)0x0010) |
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282 | #define I2S_Standard_LSB ((uint16_t)0x0020) |
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283 | #define I2S_Standard_PCMShort ((uint16_t)0x0030) |
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284 | #define I2S_Standard_PCMLong ((uint16_t)0x00B0) |
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285 | #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
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286 | ((STANDARD) == I2S_Standard_MSB) || \ |
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287 | ((STANDARD) == I2S_Standard_LSB) || \ |
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288 | ((STANDARD) == I2S_Standard_PCMShort) || \ |
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289 | ((STANDARD) == I2S_Standard_PCMLong)) |
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290 | /**
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291 | * @}
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292 | */
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293 | |||
294 | /** @defgroup SPI_I2S_Data_Format
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295 | * @{
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296 | */
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297 | |||
298 | #define I2S_DataFormat_16b ((uint16_t)0x0000) |
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299 | #define I2S_DataFormat_16bextended ((uint16_t)0x0001) |
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300 | #define I2S_DataFormat_24b ((uint16_t)0x0003) |
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301 | #define I2S_DataFormat_32b ((uint16_t)0x0005) |
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302 | #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
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303 | ((FORMAT) == I2S_DataFormat_16bextended) || \ |
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304 | ((FORMAT) == I2S_DataFormat_24b) || \ |
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305 | ((FORMAT) == I2S_DataFormat_32b)) |
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306 | /**
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307 | * @}
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308 | */
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309 | |||
310 | /** @defgroup SPI_I2S_MCLK_Output
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311 | * @{
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312 | */
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313 | |||
314 | #define I2S_MCLKOutput_Enable ((uint16_t)0x0200) |
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315 | #define I2S_MCLKOutput_Disable ((uint16_t)0x0000) |
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316 | #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
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317 | ((OUTPUT) == I2S_MCLKOutput_Disable)) |
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318 | /**
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319 | * @}
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320 | */
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321 | |||
322 | /** @defgroup SPI_I2S_Audio_Frequency
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323 | * @{
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324 | */
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325 | |||
326 | #define I2S_AudioFreq_192k ((uint32_t)192000) |
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327 | #define I2S_AudioFreq_96k ((uint32_t)96000) |
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328 | #define I2S_AudioFreq_48k ((uint32_t)48000) |
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329 | #define I2S_AudioFreq_44k ((uint32_t)44100) |
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330 | #define I2S_AudioFreq_32k ((uint32_t)32000) |
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331 | #define I2S_AudioFreq_22k ((uint32_t)22050) |
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332 | #define I2S_AudioFreq_16k ((uint32_t)16000) |
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333 | #define I2S_AudioFreq_11k ((uint32_t)11025) |
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334 | #define I2S_AudioFreq_8k ((uint32_t)8000) |
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335 | #define I2S_AudioFreq_Default ((uint32_t)2) |
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336 | |||
337 | #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
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338 | ((FREQ) <= I2S_AudioFreq_192k)) || \ |
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339 | ((FREQ) == I2S_AudioFreq_Default)) |
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340 | /**
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341 | * @}
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342 | */
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343 | |||
344 | /** @defgroup SPI_I2S_Clock_Polarity
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345 | * @{
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346 | */
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347 | |||
348 | #define I2S_CPOL_Low ((uint16_t)0x0000) |
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349 | #define I2S_CPOL_High ((uint16_t)0x0008) |
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350 | #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
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351 | ((CPOL) == I2S_CPOL_High)) |
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352 | /**
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353 | * @}
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354 | */
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355 | |||
356 | /** @defgroup SPI_I2S_DMA_transfer_requests
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357 | * @{
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358 | */
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359 | |||
360 | #define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002) |
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361 | #define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001) |
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362 | #define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00)) |
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363 | /**
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364 | * @}
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365 | */
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366 | |||
367 | /** @defgroup SPI_NSS_internal_software_management
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368 | * @{
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369 | */
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370 | |||
371 | #define SPI_NSSInternalSoft_Set ((uint16_t)0x0100) |
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372 | #define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF) |
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373 | #define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
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374 | ((INTERNAL) == SPI_NSSInternalSoft_Reset)) |
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375 | /**
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376 | * @}
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377 | */
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378 | |||
379 | /** @defgroup SPI_CRC_Transmit_Receive
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380 | * @{
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381 | */
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382 | |||
383 | #define SPI_CRC_Tx ((uint8_t)0x00) |
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384 | #define SPI_CRC_Rx ((uint8_t)0x01) |
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385 | #define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
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386 | /**
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387 | * @}
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388 | */
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389 | |||
390 | /** @defgroup SPI_direction_transmit_receive
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391 | * @{
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392 | */
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393 | |||
394 | #define SPI_Direction_Rx ((uint16_t)0xBFFF) |
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395 | #define SPI_Direction_Tx ((uint16_t)0x4000) |
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396 | #define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
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397 | ((DIRECTION) == SPI_Direction_Tx)) |
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398 | /**
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399 | * @}
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400 | */
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401 | |||
402 | /** @defgroup SPI_I2S_interrupts_definition
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403 | * @{
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404 | */
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405 | |||
406 | #define SPI_I2S_IT_TXE ((uint8_t)0x71) |
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407 | #define SPI_I2S_IT_RXNE ((uint8_t)0x60) |
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408 | #define SPI_I2S_IT_ERR ((uint8_t)0x50) |
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409 | #define I2S_IT_UDR ((uint8_t)0x53) |
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410 | #define SPI_I2S_IT_TIFRFE ((uint8_t)0x58) |
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411 | |||
412 | #define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
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413 | ((IT) == SPI_I2S_IT_RXNE) || \ |
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414 | ((IT) == SPI_I2S_IT_ERR)) |
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415 | |||
416 | #define SPI_I2S_IT_OVR ((uint8_t)0x56) |
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417 | #define SPI_IT_MODF ((uint8_t)0x55) |
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418 | #define SPI_IT_CRCERR ((uint8_t)0x54) |
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419 | |||
420 | #define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
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421 | |||
422 | #define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE)|| ((IT) == SPI_I2S_IT_TXE) || \
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423 | ((IT) == SPI_IT_CRCERR) || ((IT) == SPI_IT_MODF) || \ |
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424 | ((IT) == SPI_I2S_IT_OVR) || ((IT) == I2S_IT_UDR) ||\ |
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425 | ((IT) == SPI_I2S_IT_TIFRFE)) |
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426 | /**
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427 | * @}
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428 | */
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429 | |||
430 | /** @defgroup SPI_I2S_flags_definition
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431 | * @{
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432 | */
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433 | |||
434 | #define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001) |
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435 | #define SPI_I2S_FLAG_TXE ((uint16_t)0x0002) |
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436 | #define I2S_FLAG_CHSIDE ((uint16_t)0x0004) |
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437 | #define I2S_FLAG_UDR ((uint16_t)0x0008) |
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438 | #define SPI_FLAG_CRCERR ((uint16_t)0x0010) |
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439 | #define SPI_FLAG_MODF ((uint16_t)0x0020) |
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440 | #define SPI_I2S_FLAG_OVR ((uint16_t)0x0040) |
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441 | #define SPI_I2S_FLAG_BSY ((uint16_t)0x0080) |
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442 | #define SPI_I2S_FLAG_TIFRFE ((uint16_t)0x0100) |
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443 | |||
444 | #define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
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445 | #define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
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446 | ((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \ |
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447 | ((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \ |
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448 | ((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE)|| \ |
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449 | ((FLAG) == SPI_I2S_FLAG_TIFRFE)) |
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450 | /**
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451 | * @}
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452 | */
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453 | |||
454 | /** @defgroup SPI_CRC_polynomial
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455 | * @{
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456 | */
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457 | |||
458 | #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1) |
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459 | /**
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460 | * @}
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461 | */
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462 | |||
463 | /** @defgroup SPI_I2S_Legacy
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464 | * @{
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465 | */
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466 | |||
467 | #define SPI_DMAReq_Tx SPI_I2S_DMAReq_Tx
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468 | #define SPI_DMAReq_Rx SPI_I2S_DMAReq_Rx
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469 | #define SPI_IT_TXE SPI_I2S_IT_TXE
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470 | #define SPI_IT_RXNE SPI_I2S_IT_RXNE
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471 | #define SPI_IT_ERR SPI_I2S_IT_ERR
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472 | #define SPI_IT_OVR SPI_I2S_IT_OVR
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473 | #define SPI_FLAG_RXNE SPI_I2S_FLAG_RXNE
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474 | #define SPI_FLAG_TXE SPI_I2S_FLAG_TXE
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475 | #define SPI_FLAG_OVR SPI_I2S_FLAG_OVR
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476 | #define SPI_FLAG_BSY SPI_I2S_FLAG_BSY
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477 | #define SPI_DeInit SPI_I2S_DeInit
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478 | #define SPI_ITConfig SPI_I2S_ITConfig
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479 | #define SPI_DMACmd SPI_I2S_DMACmd
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480 | #define SPI_SendData SPI_I2S_SendData
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481 | #define SPI_ReceiveData SPI_I2S_ReceiveData
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482 | #define SPI_GetFlagStatus SPI_I2S_GetFlagStatus
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483 | #define SPI_ClearFlag SPI_I2S_ClearFlag
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484 | #define SPI_GetITStatus SPI_I2S_GetITStatus
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485 | #define SPI_ClearITPendingBit SPI_I2S_ClearITPendingBit
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486 | /**
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487 | * @}
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488 | */
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489 | |||
490 | /**
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491 | * @}
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492 | */
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493 | |||
494 | /* Exported macro ------------------------------------------------------------*/
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495 | /* Exported functions --------------------------------------------------------*/
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496 | |||
497 | /* Function used to set the SPI configuration to the default reset state *****/
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498 | void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
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499 | |||
500 | /* Initialization and Configuration functions *********************************/
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501 | void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
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502 | void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
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503 | void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
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504 | void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
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505 | void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
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506 | void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
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507 | void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
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508 | void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
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509 | void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
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510 | void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
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511 | void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
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512 | |||
513 | void I2S_FullDuplexConfig(SPI_TypeDef* I2Sxext, I2S_InitTypeDef* I2S_InitStruct);
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514 | |||
515 | /* Data transfers functions ***************************************************/
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516 | void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
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517 | uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx); |
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518 | |||
519 | /* Hardware CRC Calculation functions *****************************************/
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520 | void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
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521 | void SPI_TransmitCRC(SPI_TypeDef* SPIx);
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522 | uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC); |
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523 | uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx); |
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524 | |||
525 | /* DMA transfers management functions *****************************************/
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526 | void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
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527 | |||
528 | /* Interrupts and flags management functions **********************************/
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529 | void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
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530 | FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG); |
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531 | void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
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532 | ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT); |
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533 | void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
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||
534 | |||
535 | #ifdef __cplusplus
|
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536 | } |
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537 | #endif
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538 | |||
539 | #endif /*__STM32F4xx_SPI_H */ |
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540 | |||
541 | /**
|
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542 | * @}
|
||
543 | */
|
||
544 | |||
545 | /**
|
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546 | * @}
|
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547 | */
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548 | |||
549 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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