amiro-blt / Target / Modules / PowerManagement_1-1 / Boot / lib / stdperiphlib / STM32F4xx_StdPeriph_Driver / src / misc.c @ 367c0652
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1 | 69661903 | Thomas Schöpping | /**
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2 | ******************************************************************************
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3 | * @file misc.c
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4 | * @author MCD Application Team
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5 | * @version V1.1.0
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6 | * @date 11-January-2013
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7 | * @brief This file provides all the miscellaneous firmware functions (add-on
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8 | * to CMSIS functions).
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9 | *
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10 | * @verbatim
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11 | *
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12 | * ===================================================================
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13 | * How to configure Interrupts using driver
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14 | * ===================================================================
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15 | *
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16 | * This section provide functions allowing to configure the NVIC interrupts (IRQ).
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17 | * The Cortex-M4 exceptions are managed by CMSIS functions.
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18 | *
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19 | * 1. Configure the NVIC Priority Grouping using NVIC_PriorityGroupConfig()
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20 | * function according to the following table.
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21 |
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22 | * The table below gives the allowed values of the pre-emption priority and subpriority according
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23 | * to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function
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24 | * ==========================================================================================================================
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25 | * NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description
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26 | * ==========================================================================================================================
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27 | * NVIC_PriorityGroup_0 | 0 | 0-15 | 0 bits for pre-emption priority
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28 | * | | | 4 bits for subpriority
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29 | * --------------------------------------------------------------------------------------------------------------------------
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30 | * NVIC_PriorityGroup_1 | 0-1 | 0-7 | 1 bits for pre-emption priority
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31 | * | | | 3 bits for subpriority
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32 | * --------------------------------------------------------------------------------------------------------------------------
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33 | * NVIC_PriorityGroup_2 | 0-3 | 0-3 | 2 bits for pre-emption priority
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34 | * | | | 2 bits for subpriority
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35 | * --------------------------------------------------------------------------------------------------------------------------
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36 | * NVIC_PriorityGroup_3 | 0-7 | 0-1 | 3 bits for pre-emption priority
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37 | * | | | 1 bits for subpriority
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38 | * --------------------------------------------------------------------------------------------------------------------------
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39 | * NVIC_PriorityGroup_4 | 0-15 | 0 | 4 bits for pre-emption priority
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40 | * | | | 0 bits for subpriority
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41 | * ==========================================================================================================================
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42 | *
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43 | * 2. Enable and Configure the priority of the selected IRQ Channels using NVIC_Init()
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44 | *
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45 | * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
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46 | * The pending IRQ priority will be managed only by the subpriority.
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47 | *
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48 | * @note IRQ priority order (sorted by highest to lowest priority):
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49 | * - Lowest pre-emption priority
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50 | * - Lowest subpriority
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51 | * - Lowest hardware priority (IRQ number)
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52 | *
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53 | * @endverbatim
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54 | *
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55 | ******************************************************************************
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56 | * @attention
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57 | *
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58 | * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
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59 | *
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60 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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61 | * You may not use this file except in compliance with the License.
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62 | * You may obtain a copy of the License at:
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63 | *
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64 | * http://www.st.com/software_license_agreement_liberty_v2
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65 | *
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66 | * Unless required by applicable law or agreed to in writing, software
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67 | * distributed under the License is distributed on an "AS IS" BASIS,
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68 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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69 | * See the License for the specific language governing permissions and
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70 | * limitations under the License.
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71 | *
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72 | ******************************************************************************
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73 | */
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74 | |||
75 | /* Includes ------------------------------------------------------------------*/
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76 | #include "misc.h" |
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77 | |||
78 | /** @addtogroup STM32F4xx_StdPeriph_Driver
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79 | * @{
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80 | */
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81 | |||
82 | /** @defgroup MISC
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83 | * @brief MISC driver modules
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84 | * @{
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85 | */
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86 | |||
87 | /* Private typedef -----------------------------------------------------------*/
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88 | /* Private define ------------------------------------------------------------*/
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89 | #define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000) |
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90 | |||
91 | /* Private macro -------------------------------------------------------------*/
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92 | /* Private variables ---------------------------------------------------------*/
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93 | /* Private function prototypes -----------------------------------------------*/
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94 | /* Private functions ---------------------------------------------------------*/
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95 | |||
96 | /** @defgroup MISC_Private_Functions
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97 | * @{
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98 | */
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99 | |||
100 | /**
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101 | * @brief Configures the priority grouping: pre-emption priority and subpriority.
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102 | * @param NVIC_PriorityGroup: specifies the priority grouping bits length.
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103 | * This parameter can be one of the following values:
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104 | * @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority
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105 | * 4 bits for subpriority
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106 | * @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority
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107 | * 3 bits for subpriority
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108 | * @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority
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109 | * 2 bits for subpriority
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110 | * @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority
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111 | * 1 bits for subpriority
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112 | * @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority
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113 | * 0 bits for subpriority
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114 | * @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
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115 | * The pending IRQ priority will be managed only by the subpriority.
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116 | * @retval None
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117 | */
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118 | void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
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119 | { |
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120 | /* Check the parameters */
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121 | assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup)); |
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122 | |||
123 | /* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
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124 | SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup; |
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125 | } |
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126 | |||
127 | /**
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128 | * @brief Initializes the NVIC peripheral according to the specified
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129 | * parameters in the NVIC_InitStruct.
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130 | * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
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131 | * function should be called before.
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132 | * @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
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133 | * the configuration information for the specified NVIC peripheral.
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134 | * @retval None
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135 | */
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136 | void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
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137 | { |
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138 | uint8_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F; |
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139 | |||
140 | /* Check the parameters */
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141 | assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd)); |
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142 | assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority)); |
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143 | assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority)); |
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144 | |||
145 | if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
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146 | { |
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147 | /* Compute the Corresponding IRQ Priority --------------------------------*/
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148 | tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08; |
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149 | tmppre = (0x4 - tmppriority);
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150 | tmpsub = tmpsub >> tmppriority; |
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151 | |||
152 | tmppriority = NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre; |
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153 | tmppriority |= (uint8_t)(NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub); |
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154 | |||
155 | tmppriority = tmppriority << 0x04;
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156 | |||
157 | NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority; |
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158 | |||
159 | /* Enable the Selected IRQ Channels --------------------------------------*/
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160 | NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
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161 | (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); |
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162 | } |
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163 | else
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164 | { |
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165 | /* Disable the Selected IRQ Channels -------------------------------------*/
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166 | NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
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167 | (uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); |
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168 | } |
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169 | } |
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170 | |||
171 | /**
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172 | * @brief Sets the vector table location and Offset.
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173 | * @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory.
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174 | * This parameter can be one of the following values:
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175 | * @arg NVIC_VectTab_RAM: Vector Table in internal SRAM.
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176 | * @arg NVIC_VectTab_FLASH: Vector Table in internal FLASH.
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177 | * @param Offset: Vector Table base offset field. This value must be a multiple of 0x200.
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178 | * @retval None
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179 | */
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180 | void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
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181 | { |
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182 | /* Check the parameters */
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183 | assert_param(IS_NVIC_VECTTAB(NVIC_VectTab)); |
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184 | assert_param(IS_NVIC_OFFSET(Offset)); |
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185 | |||
186 | SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
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187 | } |
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188 | |||
189 | /**
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190 | * @brief Selects the condition for the system to enter low power mode.
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191 | * @param LowPowerMode: Specifies the new mode for the system to enter low power mode.
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192 | * This parameter can be one of the following values:
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193 | * @arg NVIC_LP_SEVONPEND: Low Power SEV on Pend.
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194 | * @arg NVIC_LP_SLEEPDEEP: Low Power DEEPSLEEP request.
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195 | * @arg NVIC_LP_SLEEPONEXIT: Low Power Sleep on Exit.
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196 | * @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE.
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197 | * @retval None
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198 | */
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199 | void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
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200 | { |
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201 | /* Check the parameters */
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202 | assert_param(IS_NVIC_LP(LowPowerMode)); |
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203 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
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204 | |||
205 | if (NewState != DISABLE)
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206 | { |
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207 | SCB->SCR |= LowPowerMode; |
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208 | } |
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209 | else
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210 | { |
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211 | SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode); |
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212 | } |
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213 | } |
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214 | |||
215 | /**
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216 | * @brief Configures the SysTick clock source.
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217 | * @param SysTick_CLKSource: specifies the SysTick clock source.
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218 | * This parameter can be one of the following values:
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219 | * @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
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220 | * @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
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221 | * @retval None
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222 | */
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223 | void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
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224 | { |
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225 | /* Check the parameters */
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226 | assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource)); |
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227 | if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
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228 | { |
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229 | SysTick->CTRL |= SysTick_CLKSource_HCLK; |
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230 | } |
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231 | else
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232 | { |
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233 | SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8; |
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234 | } |
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235 | } |
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236 | |||
237 | /**
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238 | * @}
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239 | */
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240 | |||
241 | /**
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242 | * @}
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243 | */
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244 | |||
245 | /**
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246 | * @}
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247 | */
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248 | |||
249 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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