amiro-blt / Target / Modules / PowerManagement_1-1 / Boot / lib / stdperiphlib / STM32F4xx_StdPeriph_Driver / src / stm32f4xx_gpio.c @ 367c0652
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1 | 69661903 | Thomas Schöpping | /**
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2 | ******************************************************************************
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3 | * @file stm32f4xx_gpio.c
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4 | * @author MCD Application Team
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5 | * @version V1.1.0
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6 | * @date 11-January-2013
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7 | * @brief This file provides firmware functions to manage the following
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8 | * functionalities of the GPIO peripheral:
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9 | * + Initialization and Configuration
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10 | * + GPIO Read and Write
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11 | * + GPIO Alternate functions configuration
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12 | *
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13 | @verbatim
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14 | ===============================================================================
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15 | ##### How to use this driver #####
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16 | ===============================================================================
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17 | [..]
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18 | (#) Enable the GPIO AHB clock using the following function
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19 | RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOx, ENABLE);
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20 |
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21 | (#) Configure the GPIO pin(s) using GPIO_Init()
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22 | Four possible configuration are available for each pin:
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23 | (++) Input: Floating, Pull-up, Pull-down.
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24 | (++) Output: Push-Pull (Pull-up, Pull-down or no Pull)
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25 | Open Drain (Pull-up, Pull-down or no Pull). In output mode, the speed
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26 | is configurable: 2 MHz, 25 MHz, 50 MHz or 100 MHz.
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27 | (++) Alternate Function: Push-Pull (Pull-up, Pull-down or no Pull) Open
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28 | Drain (Pull-up, Pull-down or no Pull).
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29 | (++) Analog: required mode when a pin is to be used as ADC channel or DAC
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30 | output.
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31 |
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32 | (#) Peripherals alternate function:
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33 | (++) For ADC and DAC, configure the desired pin in analog mode using
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34 | GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AN;
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35 | (+++) For other peripherals (TIM, USART...):
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36 | (+++) Connect the pin to the desired peripherals' Alternate
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37 | Function (AF) using GPIO_PinAFConfig() function
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38 | (+++) Configure the desired pin in alternate function mode using
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39 | GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF
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40 | (+++) Select the type, pull-up/pull-down and output speed via
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41 | GPIO_PuPd, GPIO_OType and GPIO_Speed members
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42 | (+++) Call GPIO_Init() function
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43 |
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44 | (#) To get the level of a pin configured in input mode use GPIO_ReadInputDataBit()
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45 |
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46 | (#) To set/reset the level of a pin configured in output mode use
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47 | GPIO_SetBits()/GPIO_ResetBits()
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48 |
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49 | (#) During and just after reset, the alternate functions are not
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50 | active and the GPIO pins are configured in input floating mode (except JTAG
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51 | pins).
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52 |
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53 | (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
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54 | (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
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55 | priority over the GPIO function.
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56 |
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57 | (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
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58 | general purpose PH0 and PH1, respectively, when the HSE oscillator is off.
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59 | The HSE has priority over the GPIO function.
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60 |
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61 | @endverbatim
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62 | *
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63 | ******************************************************************************
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64 | * @attention
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65 | *
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66 | * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
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67 | *
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68 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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69 | * You may not use this file except in compliance with the License.
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70 | * You may obtain a copy of the License at:
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71 | *
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72 | * http://www.st.com/software_license_agreement_liberty_v2
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73 | *
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74 | * Unless required by applicable law or agreed to in writing, software
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75 | * distributed under the License is distributed on an "AS IS" BASIS,
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76 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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77 | * See the License for the specific language governing permissions and
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78 | * limitations under the License.
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79 | *
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80 | ******************************************************************************
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81 | */
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82 | |||
83 | /* Includes ------------------------------------------------------------------*/
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84 | #include "stm32f4xx_gpio.h" |
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85 | #include "stm32f4xx_rcc.h" |
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86 | |||
87 | /** @addtogroup STM32F4xx_StdPeriph_Driver
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88 | * @{
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89 | */
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90 | |||
91 | /** @defgroup GPIO
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92 | * @brief GPIO driver modules
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93 | * @{
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94 | */
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95 | |||
96 | /* Private typedef -----------------------------------------------------------*/
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97 | /* Private define ------------------------------------------------------------*/
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98 | /* Private macro -------------------------------------------------------------*/
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99 | /* Private variables ---------------------------------------------------------*/
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100 | /* Private function prototypes -----------------------------------------------*/
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101 | /* Private functions ---------------------------------------------------------*/
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102 | |||
103 | /** @defgroup GPIO_Private_Functions
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104 | * @{
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105 | */
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106 | |||
107 | /** @defgroup GPIO_Group1 Initialization and Configuration
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108 | * @brief Initialization and Configuration
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109 | *
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110 | @verbatim
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111 | ===============================================================================
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112 | ##### Initialization and Configuration #####
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113 | ===============================================================================
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114 | |||
115 | @endverbatim
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116 | * @{
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117 | */
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118 | |||
119 | /**
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120 | * @brief De-initializes the GPIOx peripheral registers to their default reset values.
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121 | * @note By default, The GPIO pins are configured in input floating mode (except JTAG pins).
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122 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral for
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123 | * STM32F40xx/41xx and STM32F427x/437x devices.
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124 | * @retval None
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125 | */
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126 | void GPIO_DeInit(GPIO_TypeDef* GPIOx)
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127 | { |
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128 | /* Check the parameters */
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129 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
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130 | |||
131 | if (GPIOx == GPIOA)
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132 | { |
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133 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOA, ENABLE); |
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134 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOA, DISABLE); |
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135 | } |
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136 | else if (GPIOx == GPIOB) |
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137 | { |
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138 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOB, ENABLE); |
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139 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOB, DISABLE); |
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140 | } |
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141 | else if (GPIOx == GPIOC) |
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142 | { |
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143 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOC, ENABLE); |
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144 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOC, DISABLE); |
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145 | } |
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146 | else if (GPIOx == GPIOD) |
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147 | { |
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148 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOD, ENABLE); |
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149 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOD, DISABLE); |
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150 | } |
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151 | else if (GPIOx == GPIOE) |
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152 | { |
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153 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOE, ENABLE); |
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154 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOE, DISABLE); |
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155 | } |
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156 | else if (GPIOx == GPIOF) |
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157 | { |
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158 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOF, ENABLE); |
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159 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOF, DISABLE); |
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160 | } |
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161 | else if (GPIOx == GPIOG) |
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162 | { |
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163 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOG, ENABLE); |
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164 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOG, DISABLE); |
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165 | } |
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166 | else if (GPIOx == GPIOH) |
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167 | { |
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168 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOH, ENABLE); |
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169 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOH, DISABLE); |
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170 | } |
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171 | else
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172 | { |
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173 | if (GPIOx == GPIOI)
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174 | { |
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175 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOI, ENABLE); |
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176 | RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOI, DISABLE); |
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177 | } |
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178 | } |
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179 | } |
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180 | |||
181 | /**
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182 | * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_InitStruct.
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183 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral for
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184 | * STM32F40xx/41xx and STM32F427x/437x devices.
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185 | * @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that contains
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186 | * the configuration information for the specified GPIO peripheral.
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187 | * @retval None
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188 | */
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189 | void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
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190 | { |
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191 | uint32_t pinpos = 0x00, pos = 0x00 , currentpin = 0x00; |
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192 | |||
193 | /* Check the parameters */
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194 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
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195 | assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin)); |
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196 | assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode)); |
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197 | assert_param(IS_GPIO_PUPD(GPIO_InitStruct->GPIO_PuPd)); |
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198 | |||
199 | /* ------------------------- Configure the port pins ---------------- */
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200 | /*-- GPIO Mode Configuration --*/
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201 | for (pinpos = 0x00; pinpos < 0x10; pinpos++) |
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202 | { |
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203 | pos = ((uint32_t)0x01) << pinpos;
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204 | /* Get the port pins position */
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205 | currentpin = (GPIO_InitStruct->GPIO_Pin) & pos; |
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206 | |||
207 | if (currentpin == pos)
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208 | { |
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209 | GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (pinpos * 2));
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210 | GPIOx->MODER |= (((uint32_t)GPIO_InitStruct->GPIO_Mode) << (pinpos * 2));
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211 | |||
212 | if ((GPIO_InitStruct->GPIO_Mode == GPIO_Mode_OUT) || (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_AF))
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213 | { |
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214 | /* Check Speed mode parameters */
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215 | assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed)); |
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216 | |||
217 | /* Speed mode configuration */
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218 | GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (pinpos * 2));
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219 | GPIOx->OSPEEDR |= ((uint32_t)(GPIO_InitStruct->GPIO_Speed) << (pinpos * 2));
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220 | |||
221 | /* Check Output mode parameters */
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222 | assert_param(IS_GPIO_OTYPE(GPIO_InitStruct->GPIO_OType)); |
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223 | |||
224 | /* Output mode configuration*/
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225 | GPIOx->OTYPER &= ~((GPIO_OTYPER_OT_0) << ((uint16_t)pinpos)) ; |
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226 | GPIOx->OTYPER |= (uint16_t)(((uint16_t)GPIO_InitStruct->GPIO_OType) << ((uint16_t)pinpos)); |
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227 | } |
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228 | |||
229 | /* Pull-up Pull down resistor configuration*/
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230 | GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << ((uint16_t)pinpos * 2));
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231 | GPIOx->PUPDR |= (((uint32_t)GPIO_InitStruct->GPIO_PuPd) << (pinpos * 2));
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232 | } |
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233 | } |
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234 | } |
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235 | |||
236 | /**
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237 | * @brief Fills each GPIO_InitStruct member with its default value.
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238 | * @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will be initialized.
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239 | * @retval None
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240 | */
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241 | void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
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242 | { |
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243 | /* Reset GPIO init structure parameters values */
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244 | GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All; |
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245 | GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN; |
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246 | GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz; |
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247 | GPIO_InitStruct->GPIO_OType = GPIO_OType_PP; |
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248 | GPIO_InitStruct->GPIO_PuPd = GPIO_PuPd_NOPULL; |
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249 | } |
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250 | |||
251 | /**
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252 | * @brief Locks GPIO Pins configuration registers.
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253 | * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
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254 | * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
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255 | * @note The configuration of the locked GPIO pins can no longer be modified
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256 | * until the next reset.
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257 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral for
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258 | * STM32F40xx/41xx and STM32F427x/437x devices.
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259 | * @param GPIO_Pin: specifies the port bit to be locked.
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260 | * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
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261 | * @retval None
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262 | */
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263 | void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
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264 | { |
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265 | __IO uint32_t tmp = 0x00010000;
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266 | |||
267 | /* Check the parameters */
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268 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
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269 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
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270 | |||
271 | tmp |= GPIO_Pin; |
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272 | /* Set LCKK bit */
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273 | GPIOx->LCKR = tmp; |
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274 | /* Reset LCKK bit */
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275 | GPIOx->LCKR = GPIO_Pin; |
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276 | /* Set LCKK bit */
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277 | GPIOx->LCKR = tmp; |
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278 | /* Read LCKK bit*/
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279 | tmp = GPIOx->LCKR; |
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280 | /* Read LCKK bit*/
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281 | tmp = GPIOx->LCKR; |
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282 | } |
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283 | |||
284 | /**
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285 | * @}
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286 | */
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287 | |||
288 | /** @defgroup GPIO_Group2 GPIO Read and Write
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289 | * @brief GPIO Read and Write
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290 | *
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291 | @verbatim
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292 | ===============================================================================
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293 | ##### GPIO Read and Write #####
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294 | ===============================================================================
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295 | |||
296 | @endverbatim
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297 | * @{
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298 | */
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299 | |||
300 | /**
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301 | * @brief Reads the specified input port pin.
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302 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral for
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303 | * STM32F40xx/41xx and STM32F427x/437x devices.
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304 | * @param GPIO_Pin: specifies the port bit to read.
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305 | * This parameter can be GPIO_Pin_x where x can be (0..15).
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306 | * @retval The input port pin value.
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307 | */
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308 | uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
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309 | { |
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310 | uint8_t bitstatus = 0x00;
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311 | |||
312 | /* Check the parameters */
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313 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
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314 | assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); |
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315 | |||
316 | if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
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317 | { |
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318 | bitstatus = (uint8_t)Bit_SET; |
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319 | } |
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320 | else
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321 | { |
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322 | bitstatus = (uint8_t)Bit_RESET; |
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323 | } |
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324 | return bitstatus;
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325 | } |
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326 | |||
327 | /**
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328 | * @brief Reads the specified GPIO input data port.
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329 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral for
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330 | * STM32F40xx/41xx and STM32F427x/437x devices.
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331 | * @retval GPIO input data port value.
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332 | */
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333 | uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx) |
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334 | { |
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335 | /* Check the parameters */
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336 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
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337 | |||
338 | return ((uint16_t)GPIOx->IDR);
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339 | } |
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340 | |||
341 | /**
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342 | * @brief Reads the specified output data port bit.
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343 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral for
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344 | * STM32F40xx/41xx and STM32F427x/437x devices.
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345 | * @param GPIO_Pin: specifies the port bit to read.
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346 | * This parameter can be GPIO_Pin_x where x can be (0..15).
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347 | * @retval The output port pin value.
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348 | */
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349 | uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) |
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350 | { |
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351 | uint8_t bitstatus = 0x00;
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352 | |||
353 | /* Check the parameters */
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354 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
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355 | assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); |
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356 | |||
357 | if (((GPIOx->ODR) & GPIO_Pin) != (uint32_t)Bit_RESET)
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358 | { |
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359 | bitstatus = (uint8_t)Bit_SET; |
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360 | } |
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361 | else
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362 | { |
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363 | bitstatus = (uint8_t)Bit_RESET; |
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364 | } |
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365 | return bitstatus;
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366 | } |
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367 | |||
368 | /**
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369 | * @brief Reads the specified GPIO output data port.
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370 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral for
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371 | * STM32F40xx/41xx and STM32F427x/437x devices.
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372 | * @retval GPIO output data port value.
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373 | */
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374 | uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx) |
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375 | { |
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376 | /* Check the parameters */
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377 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
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378 | |||
379 | return ((uint16_t)GPIOx->ODR);
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380 | } |
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381 | |||
382 | /**
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383 | * @brief Sets the selected data port bits.
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384 | * @note This functions uses GPIOx_BSRR register to allow atomic read/modify
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385 | * accesses. In this way, there is no risk of an IRQ occurring between
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386 | * the read and the modify access.
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387 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral for
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388 | * STM32F40xx/41xx and STM32F427x/437x devices.
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389 | * @param GPIO_Pin: specifies the port bits to be written.
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390 | * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
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391 | * @retval None
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392 | */
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393 | void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
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394 | { |
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395 | /* Check the parameters */
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396 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
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397 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
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398 | |||
399 | GPIOx->BSRRL = GPIO_Pin; |
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400 | } |
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401 | |||
402 | /**
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403 | * @brief Clears the selected data port bits.
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404 | * @note This functions uses GPIOx_BSRR register to allow atomic read/modify
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405 | * accesses. In this way, there is no risk of an IRQ occurring between
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406 | * the read and the modify access.
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407 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral for
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408 | * STM32F40xx/41xx and STM32F427x/437x devices.
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409 | * @param GPIO_Pin: specifies the port bits to be written.
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410 | * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
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411 | * @retval None
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412 | */
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413 | void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
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414 | { |
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415 | /* Check the parameters */
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416 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
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417 | assert_param(IS_GPIO_PIN(GPIO_Pin)); |
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418 | |||
419 | GPIOx->BSRRH = GPIO_Pin; |
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420 | } |
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421 | |||
422 | /**
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423 | * @brief Sets or clears the selected data port bit.
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424 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral for
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425 | * STM32F40xx/41xx and STM32F427x/437x devices.
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426 | * @param GPIO_Pin: specifies the port bit to be written.
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427 | * This parameter can be one of GPIO_Pin_x where x can be (0..15).
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428 | * @param BitVal: specifies the value to be written to the selected bit.
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429 | * This parameter can be one of the BitAction enum values:
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430 | * @arg Bit_RESET: to clear the port pin
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431 | * @arg Bit_SET: to set the port pin
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432 | * @retval None
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433 | */
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434 | void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
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435 | { |
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436 | /* Check the parameters */
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437 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
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438 | assert_param(IS_GET_GPIO_PIN(GPIO_Pin)); |
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439 | assert_param(IS_GPIO_BIT_ACTION(BitVal)); |
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440 | |||
441 | if (BitVal != Bit_RESET)
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442 | { |
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443 | GPIOx->BSRRL = GPIO_Pin; |
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444 | } |
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445 | else
|
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446 | { |
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447 | GPIOx->BSRRH = GPIO_Pin ; |
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448 | } |
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449 | } |
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450 | |||
451 | /**
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452 | * @brief Writes data to the specified GPIO data port.
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453 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral for
|
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454 | * STM32F40xx/41xx and STM32F427x/437x devices.
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455 | * @param PortVal: specifies the value to be written to the port output data register.
|
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456 | * @retval None
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457 | */
|
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458 | void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
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459 | { |
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460 | /* Check the parameters */
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461 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
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462 | |||
463 | GPIOx->ODR = PortVal; |
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464 | } |
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465 | |||
466 | /**
|
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467 | * @brief Toggles the specified GPIO pins..
|
||
468 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral for
|
||
469 | * STM32F40xx/41xx and STM32F427x/437x devices.
|
||
470 | * @param GPIO_Pin: Specifies the pins to be toggled.
|
||
471 | * @retval None
|
||
472 | */
|
||
473 | void GPIO_ToggleBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
|
||
474 | { |
||
475 | /* Check the parameters */
|
||
476 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
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477 | |||
478 | GPIOx->ODR ^= GPIO_Pin; |
||
479 | } |
||
480 | |||
481 | /**
|
||
482 | * @}
|
||
483 | */
|
||
484 | |||
485 | /** @defgroup GPIO_Group3 GPIO Alternate functions configuration function
|
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486 | * @brief GPIO Alternate functions configuration function
|
||
487 | *
|
||
488 | @verbatim
|
||
489 | ===============================================================================
|
||
490 | ##### GPIO Alternate functions configuration function #####
|
||
491 | ===============================================================================
|
||
492 | |||
493 | @endverbatim
|
||
494 | * @{
|
||
495 | */
|
||
496 | |||
497 | /**
|
||
498 | * @brief Changes the mapping of the specified pin.
|
||
499 | * @param GPIOx: where x can be (A..I) to select the GPIO peripheral for
|
||
500 | * STM32F40xx/41xx and STM32F427x/437x devices.
|
||
501 | * @param GPIO_PinSource: specifies the pin for the Alternate function.
|
||
502 | * This parameter can be GPIO_PinSourcex where x can be (0..15).
|
||
503 | * @param GPIO_AFSelection: selects the pin to used as Alternate function.
|
||
504 | * This parameter can be one of the following values:
|
||
505 | * @arg GPIO_AF_RTC_50Hz: Connect RTC_50Hz pin to AF0 (default after reset)
|
||
506 | * @arg GPIO_AF_MCO: Connect MCO pin (MCO1 and MCO2) to AF0 (default after reset)
|
||
507 | * @arg GPIO_AF_TAMPER: Connect TAMPER pins (TAMPER_1 and TAMPER_2) to AF0 (default after reset)
|
||
508 | * @arg GPIO_AF_SWJ: Connect SWJ pins (SWD and JTAG)to AF0 (default after reset)
|
||
509 | * @arg GPIO_AF_TRACE: Connect TRACE pins to AF0 (default after reset)
|
||
510 | * @arg GPIO_AF_TIM1: Connect TIM1 pins to AF1
|
||
511 | * @arg GPIO_AF_TIM2: Connect TIM2 pins to AF1
|
||
512 | * @arg GPIO_AF_TIM3: Connect TIM3 pins to AF2
|
||
513 | * @arg GPIO_AF_TIM4: Connect TIM4 pins to AF2
|
||
514 | * @arg GPIO_AF_TIM5: Connect TIM5 pins to AF2
|
||
515 | * @arg GPIO_AF_TIM8: Connect TIM8 pins to AF3
|
||
516 | * @arg GPIO_AF_TIM9: Connect TIM9 pins to AF3
|
||
517 | * @arg GPIO_AF_TIM10: Connect TIM10 pins to AF3
|
||
518 | * @arg GPIO_AF_TIM11: Connect TIM11 pins to AF3
|
||
519 | * @arg GPIO_AF_I2C1: Connect I2C1 pins to AF4
|
||
520 | * @arg GPIO_AF_I2C2: Connect I2C2 pins to AF4
|
||
521 | * @arg GPIO_AF_I2C3: Connect I2C3 pins to AF4
|
||
522 | * @arg GPIO_AF_SPI1: Connect SPI1 pins to AF5
|
||
523 | * @arg GPIO_AF_SPI2: Connect SPI2/I2S2 pins to AF5
|
||
524 | * @arg GPIO_AF_SPI4: Connect SPI4 pins to AF5
|
||
525 | * @arg GPIO_AF_SPI5: Connect SPI5 pins to AF5
|
||
526 | * @arg GPIO_AF_SPI6: Connect SPI6 pins to AF5
|
||
527 | * @arg GPIO_AF_SPI3: Connect SPI3/I2S3 pins to AF6
|
||
528 | * @arg GPIO_AF_I2S3ext: Connect I2S3ext pins to AF7
|
||
529 | * @arg GPIO_AF_USART1: Connect USART1 pins to AF7
|
||
530 | * @arg GPIO_AF_USART2: Connect USART2 pins to AF7
|
||
531 | * @arg GPIO_AF_USART3: Connect USART3 pins to AF7
|
||
532 | * @arg GPIO_AF_UART4: Connect UART4 pins to AF8
|
||
533 | * @arg GPIO_AF_UART5: Connect UART5 pins to AF8
|
||
534 | * @arg GPIO_AF_USART6: Connect USART6 pins to AF8
|
||
535 | * @arg GPIO_AF_UART7: Connect UART7 pins to AF8
|
||
536 | * @arg GPIO_AF_UART8: Connect UART8 pins to AF8
|
||
537 | * @arg GPIO_AF_CAN1: Connect CAN1 pins to AF9
|
||
538 | * @arg GPIO_AF_CAN2: Connect CAN2 pins to AF9
|
||
539 | * @arg GPIO_AF_TIM12: Connect TIM12 pins to AF9
|
||
540 | * @arg GPIO_AF_TIM13: Connect TIM13 pins to AF9
|
||
541 | * @arg GPIO_AF_TIM14: Connect TIM14 pins to AF9
|
||
542 | * @arg GPIO_AF_OTG_FS: Connect OTG_FS pins to AF10
|
||
543 | * @arg GPIO_AF_OTG_HS: Connect OTG_HS pins to AF10
|
||
544 | * @arg GPIO_AF_ETH: Connect ETHERNET pins to AF11
|
||
545 | * @arg GPIO_AF_FSMC: Connect FSMC pins to AF12
|
||
546 | * @arg GPIO_AF_OTG_HS_FS: Connect OTG HS (configured in FS) pins to AF12
|
||
547 | * @arg GPIO_AF_SDIO: Connect SDIO pins to AF12
|
||
548 | * @arg GPIO_AF_DCMI: Connect DCMI pins to AF13
|
||
549 | * @arg GPIO_AF_EVENTOUT: Connect EVENTOUT pins to AF15
|
||
550 | * @retval None
|
||
551 | */
|
||
552 | void GPIO_PinAFConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF)
|
||
553 | { |
||
554 | uint32_t temp = 0x00;
|
||
555 | uint32_t temp_2 = 0x00;
|
||
556 | |||
557 | /* Check the parameters */
|
||
558 | assert_param(IS_GPIO_ALL_PERIPH(GPIOx)); |
||
559 | assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource)); |
||
560 | assert_param(IS_GPIO_AF(GPIO_AF)); |
||
561 | |||
562 | temp = ((uint32_t)(GPIO_AF) << ((uint32_t)((uint32_t)GPIO_PinSource & (uint32_t)0x07) * 4)) ; |
||
563 | GPIOx->AFR[GPIO_PinSource >> 0x03] &= ~((uint32_t)0xF << ((uint32_t)((uint32_t)GPIO_PinSource & (uint32_t)0x07) * 4)) ; |
||
564 | temp_2 = GPIOx->AFR[GPIO_PinSource >> 0x03] | temp;
|
||
565 | GPIOx->AFR[GPIO_PinSource >> 0x03] = temp_2;
|
||
566 | } |
||
567 | |||
568 | /**
|
||
569 | * @}
|
||
570 | */
|
||
571 | |||
572 | /**
|
||
573 | * @}
|
||
574 | */
|
||
575 | |||
576 | /**
|
||
577 | * @}
|
||
578 | */
|
||
579 | |||
580 | /**
|
||
581 | * @}
|
||
582 | */
|
||
583 | |||
584 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|