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amiro-blt / Target / Modules / PowerManagement_1-1 / Boot / lib / stdperiphlib / STM32F4xx_StdPeriph_Driver / src / stm32f4xx_wwdg.c @ 367c0652

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1 69661903 Thomas Schöpping
/**
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  ******************************************************************************
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  * @file    stm32f4xx_wwdg.c
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  * @author  MCD Application Team
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  * @version V1.1.0
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  * @date    11-January-2013
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  * @brief   This file provides firmware functions to manage the following 
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  *          functionalities of the Window watchdog (WWDG) peripheral:           
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  *           + Prescaler, Refresh window and Counter configuration
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  *           + WWDG activation
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  *           + Interrupts and flags management
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  *             
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 @verbatim    
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 ===============================================================================
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                           ##### WWDG features #####
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 ===============================================================================
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    [..]                                      
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        Once enabled the WWDG generates a system reset on expiry of a programmed
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        time period, unless the program refreshes the counter (downcounter) 
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        before to reach 0x3F value (i.e. a reset is generated when the counter
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        value rolls over from 0x40 to 0x3F). 
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        An MCU reset is also generated if the counter value is refreshed
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        before the counter has reached the refresh window value. This 
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        implies that the counter must be refreshed in a limited window.
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        Once enabled the WWDG cannot be disabled except by a system reset.                          
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        WWDGRST flag in RCC_CSR register can be used to inform when a WWDG
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        reset occurs.
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        The WWDG counter input clock is derived from the APB clock divided 
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        by a programmable prescaler.
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        WWDG counter clock = PCLK1 / Prescaler
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        WWDG timeout = (WWDG counter clock) * (counter value)
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        Min-max timeout value @42 MHz(PCLK1): ~97.5 us / ~49.9 ms
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                      ##### How to use this driver #####
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 ===============================================================================
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    [..]
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      (#) Enable WWDG clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE) function
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      (#) Configure the WWDG prescaler using WWDG_SetPrescaler() function
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      (#) Configure the WWDG refresh window using WWDG_SetWindowValue() function
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      (#) Set the WWDG counter value and start it using WWDG_Enable() function.
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          When the WWDG is enabled the counter value should be configured to 
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          a value greater than 0x40 to prevent generating an immediate reset.     
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      (#) Optionally you can enable the Early wakeup interrupt which is 
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          generated when the counter reach 0x40.
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          Once enabled this interrupt cannot be disabled except by a system reset.
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      (#) Then the application program must refresh the WWDG counter at regular
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          intervals during normal operation to prevent an MCU reset, using
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          WWDG_SetCounter() function. This operation must occur only when
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          the counter value is lower than the refresh window value, 
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          programmed using WWDG_SetWindowValue().         
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    @endverbatim                               
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  ******************************************************************************
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  * @attention
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  *
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  * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
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  *
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  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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  * You may not use this file except in compliance with the License.
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  * You may obtain a copy of the License at:
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  *
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  *        http://www.st.com/software_license_agreement_liberty_v2
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  *
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  * Unless required by applicable law or agreed to in writing, software 
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  * distributed under the License is distributed on an "AS IS" BASIS, 
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  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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  * See the License for the specific language governing permissions and
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  * limitations under the License.
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  *
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  ******************************************************************************
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  */
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx_wwdg.h"
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#include "stm32f4xx_rcc.h"
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/** @addtogroup STM32F4xx_StdPeriph_Driver
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  * @{
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  */
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/** @defgroup WWDG 
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  * @brief WWDG driver modules
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  * @{
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  */
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* ----------- WWDG registers bit address in the alias region ----------- */
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#define WWDG_OFFSET       (WWDG_BASE - PERIPH_BASE)
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/* Alias word address of EWI bit */
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#define CFR_OFFSET        (WWDG_OFFSET + 0x04)
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#define EWI_BitNumber     0x09
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#define CFR_EWI_BB        (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4))
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/* --------------------- WWDG registers bit mask ------------------------ */
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/* CFR register bit mask */
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#define CFR_WDGTB_MASK    ((uint32_t)0xFFFFFE7F)
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#define CFR_W_MASK        ((uint32_t)0xFFFFFF80)
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#define BIT_MASK          ((uint8_t)0x7F)
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/** @defgroup WWDG_Private_Functions
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  * @{
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  */
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/** @defgroup WWDG_Group1 Prescaler, Refresh window and Counter configuration functions
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 *  @brief   Prescaler, Refresh window and Counter configuration functions 
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 *
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@verbatim   
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 ===============================================================================
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    ##### Prescaler, Refresh window and Counter configuration functions #####
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 ===============================================================================  
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@endverbatim
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  * @{
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  */
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/**
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  * @brief  Deinitializes the WWDG peripheral registers to their default reset values.
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  * @param  None
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  * @retval None
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  */
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void WWDG_DeInit(void)
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{
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  RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
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  RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);
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}
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/**
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  * @brief  Sets the WWDG Prescaler.
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  * @param  WWDG_Prescaler: specifies the WWDG Prescaler.
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  *   This parameter can be one of the following values:
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  *     @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
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  *     @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
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  *     @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
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  *     @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
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  * @retval None
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  */
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void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
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{
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  uint32_t tmpreg = 0;
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  /* Check the parameters */
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  assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
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  /* Clear WDGTB[1:0] bits */
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  tmpreg = WWDG->CFR & CFR_WDGTB_MASK;
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  /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
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  tmpreg |= WWDG_Prescaler;
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  /* Store the new value */
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  WWDG->CFR = tmpreg;
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}
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/**
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  * @brief  Sets the WWDG window value.
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  * @param  WindowValue: specifies the window value to be compared to the downcounter.
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  *   This parameter value must be lower than 0x80.
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  * @retval None
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  */
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void WWDG_SetWindowValue(uint8_t WindowValue)
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{
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  __IO uint32_t tmpreg = 0;
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  /* Check the parameters */
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  assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));
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  /* Clear W[6:0] bits */
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  tmpreg = WWDG->CFR & CFR_W_MASK;
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  /* Set W[6:0] bits according to WindowValue value */
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  tmpreg |= WindowValue & (uint32_t) BIT_MASK;
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  /* Store the new value */
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  WWDG->CFR = tmpreg;
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}
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/**
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  * @brief  Enables the WWDG Early Wakeup interrupt(EWI).
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  * @note   Once enabled this interrupt cannot be disabled except by a system reset.
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  * @param  None
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  * @retval None
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  */
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void WWDG_EnableIT(void)
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{
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  *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE;
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}
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/**
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  * @brief  Sets the WWDG counter value.
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  * @param  Counter: specifies the watchdog counter value.
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  *   This parameter must be a number between 0x40 and 0x7F (to prevent generating
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  *   an immediate reset) 
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  * @retval None
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  */
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void WWDG_SetCounter(uint8_t Counter)
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{
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  /* Check the parameters */
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  assert_param(IS_WWDG_COUNTER(Counter));
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  /* Write to T[6:0] bits to configure the counter value, no need to do
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     a read-modify-write; writing a 0 to WDGA bit does nothing */
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  WWDG->CR = Counter & BIT_MASK;
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}
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/**
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  * @}
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  */
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/** @defgroup WWDG_Group2 WWDG activation functions
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 *  @brief   WWDG activation functions 
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 *
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@verbatim   
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 ===============================================================================
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                    ##### WWDG activation function #####
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 ===============================================================================  
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@endverbatim
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  * @{
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  */
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/**
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  * @brief  Enables WWDG and load the counter value.                  
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  * @param  Counter: specifies the watchdog counter value.
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  *   This parameter must be a number between 0x40 and 0x7F (to prevent generating
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  *   an immediate reset)
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  * @retval None
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  */
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void WWDG_Enable(uint8_t Counter)
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{
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  /* Check the parameters */
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  assert_param(IS_WWDG_COUNTER(Counter));
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  WWDG->CR = WWDG_CR_WDGA | Counter;
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}
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/**
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  * @}
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  */
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/** @defgroup WWDG_Group3 Interrupts and flags management functions
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 *  @brief   Interrupts and flags management functions 
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 *
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@verbatim   
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 ===============================================================================
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            ##### Interrupts and flags management functions #####
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 ===============================================================================  
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@endverbatim
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  * @{
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  */
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/**
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  * @brief  Checks whether the Early Wakeup interrupt flag is set or not.
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  * @param  None
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  * @retval The new state of the Early Wakeup interrupt flag (SET or RESET)
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  */
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FlagStatus WWDG_GetFlagStatus(void)
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{
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  FlagStatus bitstatus = RESET;
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  if ((WWDG->SR) != (uint32_t)RESET)
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  {
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    bitstatus = SET;
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  }
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  else
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  {
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    bitstatus = RESET;
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  }
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  return bitstatus;
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}
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/**
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  * @brief  Clears Early Wakeup interrupt flag.
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  * @param  None
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  * @retval None
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  */
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void WWDG_ClearFlag(void)
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{
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  WWDG->SR = (uint32_t)RESET;
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}
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/**
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  * @}
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  */
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/**
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  * @}
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  */
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/**
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  * @}
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  */
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/**
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  * @}
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  */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/