amiro-blt / Target / Modules / DiWheelDrive_1-1 / Boot / lib / CMSIS / CM3 / DeviceSupport / ST / STM32F10x / startup / gcc_ride7 / startup_stm32f10x_hd.s @ 367c0652
History | View | Annotate | Download (12.9 KB)
1 |
/** |
---|---|
2 |
****************************************************************************** |
3 |
* @file startup_stm32f10x_hd.s |
4 |
* @author MCD Application Team |
5 |
* @version V3.5.0 |
6 |
* @date 11-March-2011 |
7 |
* @brief STM32F10x High Density Devices vector table for RIDE7 toolchain. |
8 |
* This module performs: |
9 |
* - Set the initial SP |
10 |
* - Set the initial PC == Reset_Handler, |
11 |
* - Set the vector table entries with the exceptions ISR address |
12 |
* - Configure the clock system and the external SRAM mounted on |
13 |
* STM3210E-EVAL board to be used as data memory (optional, |
14 |
* to be enabled by user) |
15 |
* - Branches to main in the C library (which eventually |
16 |
* calls main()). |
17 |
* After Reset the Cortex-M3 processor is in Thread mode, |
18 |
* priority is Privileged, and the Stack is set to Main. |
19 |
****************************************************************************** |
20 |
* @attention |
21 |
* |
22 |
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
23 |
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
24 |
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
25 |
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
26 |
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
27 |
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
28 |
* |
29 |
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> |
30 |
****************************************************************************** |
31 |
*/ |
32 |
|
33 |
.syntax unified |
34 |
.cpu cortex-m3 |
35 |
.fpu softvfp |
36 |
.thumb |
37 |
|
38 |
.global g_pfnVectors |
39 |
.global Default_Handler |
40 |
|
41 |
/* start address for the initialization values of the .data section. |
42 |
defined in linker script */ |
43 |
.word _sidata |
44 |
/* start address for the .data section. defined in linker script */ |
45 |
.word _sdata |
46 |
/* end address for the .data section. defined in linker script */ |
47 |
.word _edata |
48 |
/* start address for the .bss section. defined in linker script */ |
49 |
.word _sbss |
50 |
/* end address for the .bss section. defined in linker script */ |
51 |
.word _ebss |
52 |
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ |
53 |
|
54 |
.equ BootRAM, 0xF1E0F85F |
55 |
/** |
56 |
* @brief This is the code that gets called when the processor first |
57 |
* starts execution following a reset event. Only the absolutely |
58 |
* necessary set is performed, after which the application |
59 |
* supplied main() routine is called. |
60 |
* @param None |
61 |
* @retval : None |
62 |
*/ |
63 |
|
64 |
.section .text.Reset_Handler |
65 |
.weak Reset_Handler |
66 |
.type Reset_Handler, %function |
67 |
Reset_Handler: |
68 |
|
69 |
/* Copy the data segment initializers from flash to SRAM */ |
70 |
movs r1, #0 |
71 |
b LoopCopyDataInit |
72 |
|
73 |
CopyDataInit: |
74 |
ldr r3, =_sidata |
75 |
ldr r3, [r3, r1] |
76 |
str r3, [r0, r1] |
77 |
adds r1, r1, #4 |
78 |
|
79 |
LoopCopyDataInit: |
80 |
ldr r0, =_sdata |
81 |
ldr r3, =_edata |
82 |
adds r2, r0, r1 |
83 |
cmp r2, r3 |
84 |
bcc CopyDataInit |
85 |
ldr r2, =_sbss |
86 |
b LoopFillZerobss |
87 |
/* Zero fill the bss segment. */ |
88 |
FillZerobss: |
89 |
movs r3, #0 |
90 |
str r3, [r2], #4 |
91 |
|
92 |
LoopFillZerobss: |
93 |
ldr r3, = _ebss |
94 |
cmp r2, r3 |
95 |
bcc FillZerobss |
96 |
/* Call the clock system intitialization function.*/ |
97 |
bl SystemInit |
98 |
/* Call the application's entry point.*/ |
99 |
bl main |
100 |
bx lr |
101 |
.size Reset_Handler, .-Reset_Handler |
102 |
|
103 |
/** |
104 |
* @brief This is the code that gets called when the processor receives an |
105 |
* unexpected interrupt. This simply enters an infinite loop, preserving |
106 |
* the system state for examination by a debugger. |
107 |
* @param None |
108 |
* @retval None |
109 |
*/ |
110 |
.section .text.Default_Handler,"ax",%progbits |
111 |
Default_Handler: |
112 |
Infinite_Loop: |
113 |
b Infinite_Loop |
114 |
.size Default_Handler, .-Default_Handler |
115 |
/****************************************************************************** |
116 |
* |
117 |
* The minimal vector table for a Cortex M3. Note that the proper constructs |
118 |
* must be placed on this to ensure that it ends up at physical address |
119 |
* 0x0000.0000. |
120 |
* |
121 |
*******************************************************************************/ |
122 |
.section .isr_vector,"a",%progbits |
123 |
.type g_pfnVectors, %object |
124 |
.size g_pfnVectors, .-g_pfnVectors |
125 |
|
126 |
|
127 |
g_pfnVectors: |
128 |
.word _estack |
129 |
.word Reset_Handler |
130 |
.word NMI_Handler |
131 |
.word HardFault_Handler |
132 |
.word MemManage_Handler |
133 |
.word BusFault_Handler |
134 |
.word UsageFault_Handler |
135 |
.word 0 |
136 |
.word 0 |
137 |
.word 0 |
138 |
.word 0 |
139 |
.word SVC_Handler |
140 |
.word DebugMon_Handler |
141 |
.word 0 |
142 |
.word PendSV_Handler |
143 |
.word SysTick_Handler |
144 |
.word WWDG_IRQHandler |
145 |
.word PVD_IRQHandler |
146 |
.word TAMPER_IRQHandler |
147 |
.word RTC_IRQHandler |
148 |
.word FLASH_IRQHandler |
149 |
.word RCC_IRQHandler |
150 |
.word EXTI0_IRQHandler |
151 |
.word EXTI1_IRQHandler |
152 |
.word EXTI2_IRQHandler |
153 |
.word EXTI3_IRQHandler |
154 |
.word EXTI4_IRQHandler |
155 |
.word DMA1_Channel1_IRQHandler |
156 |
.word DMA1_Channel2_IRQHandler |
157 |
.word DMA1_Channel3_IRQHandler |
158 |
.word DMA1_Channel4_IRQHandler |
159 |
.word DMA1_Channel5_IRQHandler |
160 |
.word DMA1_Channel6_IRQHandler |
161 |
.word DMA1_Channel7_IRQHandler |
162 |
.word ADC1_2_IRQHandler |
163 |
.word USB_HP_CAN1_TX_IRQHandler |
164 |
.word USB_LP_CAN1_RX0_IRQHandler |
165 |
.word CAN1_RX1_IRQHandler |
166 |
.word CAN1_SCE_IRQHandler |
167 |
.word EXTI9_5_IRQHandler |
168 |
.word TIM1_BRK_IRQHandler |
169 |
.word TIM1_UP_IRQHandler |
170 |
.word TIM1_TRG_COM_IRQHandler |
171 |
.word TIM1_CC_IRQHandler |
172 |
.word TIM2_IRQHandler |
173 |
.word TIM3_IRQHandler |
174 |
.word TIM4_IRQHandler |
175 |
.word I2C1_EV_IRQHandler |
176 |
.word I2C1_ER_IRQHandler |
177 |
.word I2C2_EV_IRQHandler |
178 |
.word I2C2_ER_IRQHandler |
179 |
.word SPI1_IRQHandler |
180 |
.word SPI2_IRQHandler |
181 |
.word USART1_IRQHandler |
182 |
.word USART2_IRQHandler |
183 |
.word USART3_IRQHandler |
184 |
.word EXTI15_10_IRQHandler |
185 |
.word RTCAlarm_IRQHandler |
186 |
.word USBWakeUp_IRQHandler |
187 |
.word TIM8_BRK_IRQHandler |
188 |
.word TIM8_UP_IRQHandler |
189 |
.word TIM8_TRG_COM_IRQHandler |
190 |
.word TIM8_CC_IRQHandler |
191 |
.word ADC3_IRQHandler |
192 |
.word FSMC_IRQHandler |
193 |
.word SDIO_IRQHandler |
194 |
.word TIM5_IRQHandler |
195 |
.word SPI3_IRQHandler |
196 |
.word UART4_IRQHandler |
197 |
.word UART5_IRQHandler |
198 |
.word TIM6_IRQHandler |
199 |
.word TIM7_IRQHandler |
200 |
.word DMA2_Channel1_IRQHandler |
201 |
.word DMA2_Channel2_IRQHandler |
202 |
.word DMA2_Channel3_IRQHandler |
203 |
.word DMA2_Channel4_5_IRQHandler |
204 |
.word 0 |
205 |
.word 0 |
206 |
.word 0 |
207 |
.word 0 |
208 |
.word 0 |
209 |
.word 0 |
210 |
.word 0 |
211 |
.word 0 |
212 |
.word 0 |
213 |
.word 0 |
214 |
.word 0 |
215 |
.word 0 |
216 |
.word 0 |
217 |
.word 0 |
218 |
.word 0 |
219 |
.word 0 |
220 |
.word 0 |
221 |
.word 0 |
222 |
.word 0 |
223 |
.word 0 |
224 |
.word 0 |
225 |
.word 0 |
226 |
.word 0 |
227 |
.word 0 |
228 |
.word 0 |
229 |
.word 0 |
230 |
.word 0 |
231 |
.word 0 |
232 |
.word 0 |
233 |
.word 0 |
234 |
.word 0 |
235 |
.word 0 |
236 |
.word 0 |
237 |
.word 0 |
238 |
.word 0 |
239 |
.word 0 |
240 |
.word 0 |
241 |
.word 0 |
242 |
.word 0 |
243 |
.word 0 |
244 |
.word 0 |
245 |
.word 0 |
246 |
.word 0 |
247 |
.word 0 |
248 |
.word BootRAM /* @0x1E0. This is for boot in RAM mode for |
249 |
STM32F10x High Density devices. */ |
250 |
/******************************************************************************* |
251 |
* |
252 |
* Provide weak aliases for each Exception handler to the Default_Handler. |
253 |
* As they are weak aliases, any function with the same name will override |
254 |
* this definition. |
255 |
* |
256 |
*******************************************************************************/ |
257 |
|
258 |
.weak NMI_Handler |
259 |
.thumb_set NMI_Handler,Default_Handler |
260 |
|
261 |
.weak HardFault_Handler |
262 |
.thumb_set HardFault_Handler,Default_Handler |
263 |
|
264 |
.weak MemManage_Handler |
265 |
.thumb_set MemManage_Handler,Default_Handler |
266 |
|
267 |
.weak BusFault_Handler |
268 |
.thumb_set BusFault_Handler,Default_Handler |
269 |
|
270 |
.weak UsageFault_Handler |
271 |
.thumb_set UsageFault_Handler,Default_Handler |
272 |
|
273 |
.weak SVC_Handler |
274 |
.thumb_set SVC_Handler,Default_Handler |
275 |
|
276 |
.weak DebugMon_Handler |
277 |
.thumb_set DebugMon_Handler,Default_Handler |
278 |
|
279 |
.weak PendSV_Handler |
280 |
.thumb_set PendSV_Handler,Default_Handler |
281 |
|
282 |
.weak SysTick_Handler |
283 |
.thumb_set SysTick_Handler,Default_Handler |
284 |
|
285 |
.weak WWDG_IRQHandler |
286 |
.thumb_set WWDG_IRQHandler,Default_Handler |
287 |
|
288 |
.weak PVD_IRQHandler |
289 |
.thumb_set PVD_IRQHandler,Default_Handler |
290 |
|
291 |
.weak TAMPER_IRQHandler |
292 |
.thumb_set TAMPER_IRQHandler,Default_Handler |
293 |
|
294 |
.weak RTC_IRQHandler |
295 |
.thumb_set RTC_IRQHandler,Default_Handler |
296 |
|
297 |
.weak FLASH_IRQHandler |
298 |
.thumb_set FLASH_IRQHandler,Default_Handler |
299 |
|
300 |
.weak RCC_IRQHandler |
301 |
.thumb_set RCC_IRQHandler,Default_Handler |
302 |
|
303 |
.weak EXTI0_IRQHandler |
304 |
.thumb_set EXTI0_IRQHandler,Default_Handler |
305 |
|
306 |
.weak EXTI1_IRQHandler |
307 |
.thumb_set EXTI1_IRQHandler,Default_Handler |
308 |
|
309 |
.weak EXTI2_IRQHandler |
310 |
.thumb_set EXTI2_IRQHandler,Default_Handler |
311 |
|
312 |
.weak EXTI3_IRQHandler |
313 |
.thumb_set EXTI3_IRQHandler,Default_Handler |
314 |
|
315 |
.weak EXTI4_IRQHandler |
316 |
.thumb_set EXTI4_IRQHandler,Default_Handler |
317 |
|
318 |
.weak DMA1_Channel1_IRQHandler |
319 |
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler |
320 |
|
321 |
.weak DMA1_Channel2_IRQHandler |
322 |
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler |
323 |
|
324 |
.weak DMA1_Channel3_IRQHandler |
325 |
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler |
326 |
|
327 |
.weak DMA1_Channel4_IRQHandler |
328 |
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler |
329 |
|
330 |
.weak DMA1_Channel5_IRQHandler |
331 |
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler |
332 |
|
333 |
.weak DMA1_Channel6_IRQHandler |
334 |
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler |
335 |
|
336 |
.weak DMA1_Channel7_IRQHandler |
337 |
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler |
338 |
|
339 |
.weak ADC1_2_IRQHandler |
340 |
.thumb_set ADC1_2_IRQHandler,Default_Handler |
341 |
|
342 |
.weak USB_HP_CAN1_TX_IRQHandler |
343 |
.thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler |
344 |
|
345 |
.weak USB_LP_CAN1_RX0_IRQHandler |
346 |
.thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler |
347 |
|
348 |
.weak CAN1_RX1_IRQHandler |
349 |
.thumb_set CAN1_RX1_IRQHandler,Default_Handler |
350 |
|
351 |
.weak CAN1_SCE_IRQHandler |
352 |
.thumb_set CAN1_SCE_IRQHandler,Default_Handler |
353 |
|
354 |
.weak EXTI9_5_IRQHandler |
355 |
.thumb_set EXTI9_5_IRQHandler,Default_Handler |
356 |
|
357 |
.weak TIM1_BRK_IRQHandler |
358 |
.thumb_set TIM1_BRK_IRQHandler,Default_Handler |
359 |
|
360 |
.weak TIM1_UP_IRQHandler |
361 |
.thumb_set TIM1_UP_IRQHandler,Default_Handler |
362 |
|
363 |
.weak TIM1_TRG_COM_IRQHandler |
364 |
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler |
365 |
|
366 |
.weak TIM1_CC_IRQHandler |
367 |
.thumb_set TIM1_CC_IRQHandler,Default_Handler |
368 |
|
369 |
.weak TIM2_IRQHandler |
370 |
.thumb_set TIM2_IRQHandler,Default_Handler |
371 |
|
372 |
.weak TIM3_IRQHandler |
373 |
.thumb_set TIM3_IRQHandler,Default_Handler |
374 |
|
375 |
.weak TIM4_IRQHandler |
376 |
.thumb_set TIM4_IRQHandler,Default_Handler |
377 |
|
378 |
.weak I2C1_EV_IRQHandler |
379 |
.thumb_set I2C1_EV_IRQHandler,Default_Handler |
380 |
|
381 |
.weak I2C1_ER_IRQHandler |
382 |
.thumb_set I2C1_ER_IRQHandler,Default_Handler |
383 |
|
384 |
.weak I2C2_EV_IRQHandler |
385 |
.thumb_set I2C2_EV_IRQHandler,Default_Handler |
386 |
|
387 |
.weak I2C2_ER_IRQHandler |
388 |
.thumb_set I2C2_ER_IRQHandler,Default_Handler |
389 |
|
390 |
.weak SPI1_IRQHandler |
391 |
.thumb_set SPI1_IRQHandler,Default_Handler |
392 |
|
393 |
.weak SPI2_IRQHandler |
394 |
.thumb_set SPI2_IRQHandler,Default_Handler |
395 |
|
396 |
.weak USART1_IRQHandler |
397 |
.thumb_set USART1_IRQHandler,Default_Handler |
398 |
|
399 |
.weak USART2_IRQHandler |
400 |
.thumb_set USART2_IRQHandler,Default_Handler |
401 |
|
402 |
.weak USART3_IRQHandler |
403 |
.thumb_set USART3_IRQHandler,Default_Handler |
404 |
|
405 |
.weak EXTI15_10_IRQHandler |
406 |
.thumb_set EXTI15_10_IRQHandler,Default_Handler |
407 |
|
408 |
.weak RTCAlarm_IRQHandler |
409 |
.thumb_set RTCAlarm_IRQHandler,Default_Handler |
410 |
|
411 |
.weak USBWakeUp_IRQHandler |
412 |
.thumb_set USBWakeUp_IRQHandler,Default_Handler |
413 |
|
414 |
.weak TIM8_BRK_IRQHandler |
415 |
.thumb_set TIM8_BRK_IRQHandler,Default_Handler |
416 |
|
417 |
.weak TIM8_UP_IRQHandler |
418 |
.thumb_set TIM8_UP_IRQHandler,Default_Handler |
419 |
|
420 |
.weak TIM8_TRG_COM_IRQHandler |
421 |
.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler |
422 |
|
423 |
.weak TIM8_CC_IRQHandler |
424 |
.thumb_set TIM8_CC_IRQHandler,Default_Handler |
425 |
|
426 |
.weak ADC3_IRQHandler |
427 |
.thumb_set ADC3_IRQHandler,Default_Handler |
428 |
|
429 |
.weak FSMC_IRQHandler |
430 |
.thumb_set FSMC_IRQHandler,Default_Handler |
431 |
|
432 |
.weak SDIO_IRQHandler |
433 |
.thumb_set SDIO_IRQHandler,Default_Handler |
434 |
|
435 |
.weak TIM5_IRQHandler |
436 |
.thumb_set TIM5_IRQHandler,Default_Handler |
437 |
|
438 |
.weak SPI3_IRQHandler |
439 |
.thumb_set SPI3_IRQHandler,Default_Handler |
440 |
|
441 |
.weak UART4_IRQHandler |
442 |
.thumb_set UART4_IRQHandler,Default_Handler |
443 |
|
444 |
.weak UART5_IRQHandler |
445 |
.thumb_set UART5_IRQHandler,Default_Handler |
446 |
|
447 |
.weak TIM6_IRQHandler |
448 |
.thumb_set TIM6_IRQHandler,Default_Handler |
449 |
|
450 |
.weak TIM7_IRQHandler |
451 |
.thumb_set TIM7_IRQHandler,Default_Handler |
452 |
|
453 |
.weak DMA2_Channel1_IRQHandler |
454 |
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler |
455 |
|
456 |
.weak DMA2_Channel2_IRQHandler |
457 |
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler |
458 |
|
459 |
.weak DMA2_Channel3_IRQHandler |
460 |
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler |
461 |
|
462 |
.weak DMA2_Channel4_5_IRQHandler |
463 |
.thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler |
464 |
|
465 |
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |