amiro-blt / Target / Modules / DiWheelDrive_1-1 / Boot / lib / STM32F10x_StdPeriph_Driver / src / stm32f10x_wwdg.c @ 367c0652
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/**
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******************************************************************************
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* @file stm32f10x_wwdg.c
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* @author MCD Application Team
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* @version V3.5.0
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* @date 11-March-2011
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* @brief This file provides all the WWDG firmware functions.
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******************************************************************************
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* @attention
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f10x_wwdg.h" |
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#include "stm32f10x_rcc.h" |
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/** @addtogroup STM32F10x_StdPeriph_Driver
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* @{
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*/
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/** @defgroup WWDG
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* @brief WWDG driver modules
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* @{
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*/
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/** @defgroup WWDG_Private_TypesDefinitions
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup WWDG_Private_Defines
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* @{
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*/
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/* ----------- WWDG registers bit address in the alias region ----------- */
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#define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)
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/* Alias word address of EWI bit */
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#define CFR_OFFSET (WWDG_OFFSET + 0x04) |
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#define EWI_BitNumber 0x09 |
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#define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4)) |
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/* --------------------- WWDG registers bit mask ------------------------ */
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/* CR register bit mask */
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#define CR_WDGA_Set ((uint32_t)0x00000080) |
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/* CFR register bit mask */
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#define CFR_WDGTB_Mask ((uint32_t)0xFFFFFE7F) |
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#define CFR_W_Mask ((uint32_t)0xFFFFFF80) |
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#define BIT_Mask ((uint8_t)0x7F) |
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/**
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* @}
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*/
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/** @defgroup WWDG_Private_Macros
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup WWDG_Private_Variables
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup WWDG_Private_FunctionPrototypes
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup WWDG_Private_Functions
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* @{
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*/
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/**
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* @brief Deinitializes the WWDG peripheral registers to their default reset values.
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* @param None
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* @retval None
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*/
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void WWDG_DeInit(void) |
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{ |
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE); |
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE); |
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} |
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/**
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* @brief Sets the WWDG Prescaler.
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* @param WWDG_Prescaler: specifies the WWDG Prescaler.
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* This parameter can be one of the following values:
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* @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
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* @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
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* @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
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* @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
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* @retval None
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*/
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void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
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{ |
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uint32_t tmpreg = 0;
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/* Check the parameters */
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assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler)); |
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/* Clear WDGTB[1:0] bits */
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tmpreg = WWDG->CFR & CFR_WDGTB_Mask; |
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/* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
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tmpreg |= WWDG_Prescaler; |
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/* Store the new value */
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WWDG->CFR = tmpreg; |
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} |
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/**
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* @brief Sets the WWDG window value.
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* @param WindowValue: specifies the window value to be compared to the downcounter.
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* This parameter value must be lower than 0x80.
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* @retval None
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*/
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void WWDG_SetWindowValue(uint8_t WindowValue)
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{ |
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__IO uint32_t tmpreg = 0;
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/* Check the parameters */
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assert_param(IS_WWDG_WINDOW_VALUE(WindowValue)); |
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/* Clear W[6:0] bits */
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tmpreg = WWDG->CFR & CFR_W_Mask; |
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/* Set W[6:0] bits according to WindowValue value */
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tmpreg |= WindowValue & (uint32_t) BIT_Mask; |
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/* Store the new value */
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WWDG->CFR = tmpreg; |
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} |
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/**
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* @brief Enables the WWDG Early Wakeup interrupt(EWI).
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* @param None
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* @retval None
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*/
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void WWDG_EnableIT(void) |
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{ |
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*(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE; |
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} |
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/**
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* @brief Sets the WWDG counter value.
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* @param Counter: specifies the watchdog counter value.
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* This parameter must be a number between 0x40 and 0x7F.
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* @retval None
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*/
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void WWDG_SetCounter(uint8_t Counter)
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{ |
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/* Check the parameters */
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assert_param(IS_WWDG_COUNTER(Counter)); |
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/* Write to T[6:0] bits to configure the counter value, no need to do
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a read-modify-write; writing a 0 to WDGA bit does nothing */
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WWDG->CR = Counter & BIT_Mask; |
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} |
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/**
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* @brief Enables WWDG and load the counter value.
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* @param Counter: specifies the watchdog counter value.
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* This parameter must be a number between 0x40 and 0x7F.
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* @retval None
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*/
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void WWDG_Enable(uint8_t Counter)
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{ |
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/* Check the parameters */
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assert_param(IS_WWDG_COUNTER(Counter)); |
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WWDG->CR = CR_WDGA_Set | Counter; |
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} |
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/**
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* @brief Checks whether the Early Wakeup interrupt flag is set or not.
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* @param None
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* @retval The new state of the Early Wakeup interrupt flag (SET or RESET)
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*/
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FlagStatus WWDG_GetFlagStatus(void)
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return (FlagStatus)(WWDG->SR);
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} |
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/**
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* @brief Clears Early Wakeup interrupt flag.
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* @param None
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* @retval None
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*/
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void WWDG_ClearFlag(void) |
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{ |
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WWDG->SR = (uint32_t)RESET; |
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} |
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
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