Statistics
| Branch: | Tag: | Revision:

amiro-blt / Target / Modules / LightRing_1-0 / Boot / lib / CMSIS / CM3 / DeviceSupport / ST / STM32F10x / startup / TrueSTUDIO / startup_stm32f10x_cl.s @ 367c0652

History | View | Annotate | Download (12.309 KB)

1
/**
2
  ******************************************************************************
3
  * @file      startup_stm32f10x_cl.s
4
  * @author    MCD Application Team
5
  * @version   V3.5.0
6
  * @date      11-March-2011
7
  * @brief     STM32F10x Connectivity line Devices vector table for Atollic
8
  *            toolchain.
9
  *            This module performs:
10
  *                - Set the initial SP
11
  *                - Set the initial PC == Reset_Handler,
12
  *                - Set the vector table entries with the exceptions ISR
13
  *                  address.
14
  *                - Configure the clock system
15
  *                - Branches to main in the C library (which eventually
16
  *                  calls main()).
17
  *            After Reset the Cortex-M3 processor is in Thread mode,
18
  *            priority is Privileged, and the Stack is set to Main.
19
  ******************************************************************************
20
  * @attention
21
  *
22
  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
23
  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
24
  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
25
  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
26
  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
27
  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
28
  *
29
  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
30
  ******************************************************************************
31
  */
32

    
33
  .syntax unified
34
	.cpu cortex-m3
35
	.fpu softvfp
36
	.thumb
37

    
38
.global	g_pfnVectors
39
.global	Default_Handler
40

    
41
/* start address for the initialization values of the .data section.
42
defined in linker script */
43
.word	_sidata
44
/* start address for the .data section. defined in linker script */
45
.word	_sdata
46
/* end address for the .data section. defined in linker script */
47
.word	_edata
48
/* start address for the .bss section. defined in linker script */
49
.word	_sbss
50
/* end address for the .bss section. defined in linker script */
51
.word	_ebss
52

    
53
.equ  BootRAM, 0xF1E0F85F
54
/**
55
 * @brief  This is the code that gets called when the processor first
56
 *          starts execution following a reset event. Only the absolutely
57
 *          necessary set is performed, after which the application
58
 *          supplied main() routine is called.
59
 * @param  None
60
 * @retval : None
61
*/
62

    
63
    .section	.text.Reset_Handler
64
	.weak	Reset_Handler
65
	.type	Reset_Handler, %function
66
Reset_Handler:
67

    
68
/* Copy the data segment initializers from flash to SRAM */
69
  movs	r1, #0
70
  b	LoopCopyDataInit
71

    
72
CopyDataInit:
73
	ldr	r3, =_sidata
74
	ldr	r3, [r3, r1]
75
	str	r3, [r0, r1]
76
	adds	r1, r1, #4
77

    
78
LoopCopyDataInit:
79
	ldr	r0, =_sdata
80
	ldr	r3, =_edata
81
	adds	r2, r0, r1
82
	cmp	r2, r3
83
	bcc	CopyDataInit
84
	ldr	r2, =_sbss
85
	b	LoopFillZerobss
86

    
87
/* Zero fill the bss segment. */
88
FillZerobss:
89
	movs	r3, #0
90
	str	r3, [r2], #4
91

    
92
LoopFillZerobss:
93
	ldr	r3, = _ebss
94
	cmp	r2, r3
95
	bcc	FillZerobss
96

    
97
/* Call the clock system intitialization function.*/
98
  	bl  SystemInit
99
/* Call static constructors */
100
    bl __libc_init_array
101
/* Call the application's entry point.*/
102
	bl	main
103
	bx	lr
104
.size	Reset_Handler, .-Reset_Handler
105

    
106
/**
107
 * @brief  This is the code that gets called when the processor receives an
108
 *         unexpected interrupt.  This simply enters an infinite loop, preserving
109
 *         the system state for examination by a debugger.
110
 *
111
 * @param  None
112
 * @retval : None
113
*/
114
    .section	.text.Default_Handler,"ax",%progbits
115
Default_Handler:
116
Infinite_Loop:
117
	b	Infinite_Loop
118
	.size	Default_Handler, .-Default_Handler
119

    
120
/******************************************************************************
121
*
122
* The minimal vector table for a Cortex M3.  Note that the proper constructs
123
* must be placed on this to ensure that it ends up at physical address
124
* 0x0000.0000.
125
*
126
******************************************************************************/
127
 	.section	.isr_vector,"a",%progbits
128
	.type	g_pfnVectors, %object
129
	.size	g_pfnVectors, .-g_pfnVectors
130

    
131

    
132
g_pfnVectors:
133
	.word	_estack
134
	.word	Reset_Handler
135
	.word	NMI_Handler
136
	.word	HardFault_Handler
137
	.word	MemManage_Handler
138
	.word	BusFault_Handler
139
	.word	UsageFault_Handler
140
	.word	0
141
	.word	0
142
	.word	0
143
	.word	0
144
	.word	SVC_Handler
145
	.word	DebugMon_Handler
146
	.word	0
147
	.word	PendSV_Handler
148
	.word	SysTick_Handler
149
	.word	WWDG_IRQHandler
150
	.word	PVD_IRQHandler
151
	.word	TAMPER_IRQHandler
152
	.word	RTC_IRQHandler
153
	.word	FLASH_IRQHandler
154
	.word	RCC_IRQHandler
155
	.word	EXTI0_IRQHandler
156
	.word	EXTI1_IRQHandler
157
	.word	EXTI2_IRQHandler
158
	.word	EXTI3_IRQHandler
159
	.word	EXTI4_IRQHandler
160
	.word	DMA1_Channel1_IRQHandler
161
	.word	DMA1_Channel2_IRQHandler
162
	.word	DMA1_Channel3_IRQHandler
163
	.word	DMA1_Channel4_IRQHandler
164
	.word	DMA1_Channel5_IRQHandler
165
	.word	DMA1_Channel6_IRQHandler
166
	.word	DMA1_Channel7_IRQHandler
167
	.word	ADC1_2_IRQHandler
168
  .word CAN1_TX_IRQHandler
169
  .word CAN1_RX0_IRQHandler
170
 	.word	CAN1_RX1_IRQHandler
171
	.word	CAN1_SCE_IRQHandler
172
	.word	EXTI9_5_IRQHandler
173
	.word	TIM1_BRK_IRQHandler
174
	.word	TIM1_UP_IRQHandler
175
	.word	TIM1_TRG_COM_IRQHandler
176
	.word	TIM1_CC_IRQHandler
177
	.word	TIM2_IRQHandler
178
	.word	TIM3_IRQHandler
179
	.word	TIM4_IRQHandler
180
	.word	I2C1_EV_IRQHandler
181
	.word	I2C1_ER_IRQHandler
182
	.word	I2C2_EV_IRQHandler
183
	.word	I2C2_ER_IRQHandler
184
	.word	SPI1_IRQHandler
185
	.word	SPI2_IRQHandler
186
	.word	USART1_IRQHandler
187
	.word	USART2_IRQHandler
188
	.word	USART3_IRQHandler
189
	.word	EXTI15_10_IRQHandler
190
	.word	RTCAlarm_IRQHandler
191
	.word	OTG_FS_WKUP_IRQHandler
192
  .word	0
193
	.word	0
194
	.word	0
195
	.word	0
196
	.word	0
197
	.word	0
198
	.word	0
199
	.word TIM5_IRQHandler
200
  .word SPI3_IRQHandler
201
  .word UART4_IRQHandler
202
  .word UART5_IRQHandler
203
  .word TIM6_IRQHandler
204
  .word TIM7_IRQHandler
205
  .word DMA2_Channel1_IRQHandler
206
  .word DMA2_Channel2_IRQHandler
207
  .word DMA2_Channel3_IRQHandler
208
  .word DMA2_Channel4_IRQHandler
209
  .word DMA2_Channel5_IRQHandler
210
  .word ETH_IRQHandler
211
  .word ETH_WKUP_IRQHandler
212
  .word CAN2_TX_IRQHandler
213
  .word CAN2_RX0_IRQHandler
214
  .word CAN2_RX1_IRQHandler
215
  .word CAN2_SCE_IRQHandler
216
  .word OTG_FS_IRQHandler
217
  .word 0
218
  .word 0
219
  .word 0
220
  .word 0
221
  .word 0
222
  .word 0
223
  .word 0
224
  .word 0
225
  .word 0
226
  .word 0
227
  .word 0
228
  .word 0
229
  .word 0
230
  .word 0
231
  .word 0
232
  .word 0
233
  .word 0
234
  .word 0
235
  .word 0
236
  .word 0
237
  .word 0
238
  .word 0
239
  .word 0
240
  .word 0
241
  .word 0
242
  .word 0
243
  .word 0
244
  .word 0
245
  .word 0
246
  .word 0
247
  .word 0
248
  .word 0
249
  .word 0
250
  .word 0
251
  .word 0
252
  .word 0
253
  .word BootRAM     /* @0x1E0. This is for boot in RAM mode for
254
                         STM32F10x Connectivity line Devices. */
255

    
256
/*******************************************************************************
257
*
258
* Provide weak aliases for each Exception handler to the Default_Handler.
259
* As they are weak aliases, any function with the same name will override
260
* this definition.
261
*
262
*******************************************************************************/
263
  .weak	NMI_Handler
264
	.thumb_set NMI_Handler,Default_Handler
265

    
266
  .weak	HardFault_Handler
267
	.thumb_set HardFault_Handler,Default_Handler
268

    
269
  .weak	MemManage_Handler
270
	.thumb_set MemManage_Handler,Default_Handler
271

    
272
  .weak	BusFault_Handler
273
	.thumb_set BusFault_Handler,Default_Handler
274

    
275
	.weak	UsageFault_Handler
276
	.thumb_set UsageFault_Handler,Default_Handler
277

    
278
	.weak	SVC_Handler
279
	.thumb_set SVC_Handler,Default_Handler
280

    
281
	.weak	DebugMon_Handler
282
	.thumb_set DebugMon_Handler,Default_Handler
283

    
284
	.weak	PendSV_Handler
285
	.thumb_set PendSV_Handler,Default_Handler
286

    
287
	.weak	SysTick_Handler
288
	.thumb_set SysTick_Handler,Default_Handler
289

    
290
	.weak	WWDG_IRQHandler
291
	.thumb_set WWDG_IRQHandler,Default_Handler
292

    
293
	.weak	PVD_IRQHandler
294
	.thumb_set PVD_IRQHandler,Default_Handler
295

    
296
	.weak	TAMPER_IRQHandler
297
	.thumb_set TAMPER_IRQHandler,Default_Handler
298

    
299
	.weak	RTC_IRQHandler
300
	.thumb_set RTC_IRQHandler,Default_Handler
301

    
302
	.weak	FLASH_IRQHandler
303
	.thumb_set FLASH_IRQHandler,Default_Handler
304

    
305
	.weak	RCC_IRQHandler
306
	.thumb_set RCC_IRQHandler,Default_Handler
307

    
308
	.weak	EXTI0_IRQHandler
309
	.thumb_set EXTI0_IRQHandler,Default_Handler
310

    
311
	.weak	EXTI1_IRQHandler
312
	.thumb_set EXTI1_IRQHandler,Default_Handler
313

    
314
	.weak	EXTI2_IRQHandler
315
	.thumb_set EXTI2_IRQHandler,Default_Handler
316

    
317
	.weak	EXTI3_IRQHandler
318
	.thumb_set EXTI3_IRQHandler,Default_Handler
319

    
320
	.weak	EXTI4_IRQHandler
321
	.thumb_set EXTI4_IRQHandler,Default_Handler
322

    
323
	.weak	DMA1_Channel1_IRQHandler
324
	.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
325

    
326
	.weak	DMA1_Channel2_IRQHandler
327
	.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
328

    
329
	.weak	DMA1_Channel3_IRQHandler
330
	.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
331

    
332
	.weak	DMA1_Channel4_IRQHandler
333
	.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
334

    
335
	.weak	DMA1_Channel5_IRQHandler
336
	.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
337

    
338
	.weak	DMA1_Channel6_IRQHandler
339
	.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
340

    
341
	.weak	DMA1_Channel7_IRQHandler
342
	.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
343

    
344
	.weak	ADC1_2_IRQHandler
345
	.thumb_set ADC1_2_IRQHandler,Default_Handler
346

    
347
	.weak	CAN1_TX_IRQHandler
348
	.thumb_set CAN1_TX_IRQHandler,Default_Handler
349

    
350
	.weak	CAN1_RX0_IRQHandler
351
	.thumb_set CAN1_RX0_IRQHandler,Default_Handler
352

    
353
	.weak	CAN1_RX1_IRQHandler
354
	.thumb_set CAN1_RX1_IRQHandler,Default_Handler
355

    
356
	.weak	CAN1_SCE_IRQHandler
357
	.thumb_set CAN1_SCE_IRQHandler,Default_Handler
358

    
359
	.weak	EXTI9_5_IRQHandler
360
	.thumb_set EXTI9_5_IRQHandler,Default_Handler
361

    
362
	.weak	TIM1_BRK_IRQHandler
363
	.thumb_set TIM1_BRK_IRQHandler,Default_Handler
364

    
365
	.weak	TIM1_UP_IRQHandler
366
	.thumb_set TIM1_UP_IRQHandler,Default_Handler
367

    
368
	.weak	TIM1_TRG_COM_IRQHandler
369
	.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
370

    
371
	.weak	TIM1_CC_IRQHandler
372
	.thumb_set TIM1_CC_IRQHandler,Default_Handler
373

    
374
	.weak	TIM2_IRQHandler
375
	.thumb_set TIM2_IRQHandler,Default_Handler
376

    
377
	.weak	TIM3_IRQHandler
378
	.thumb_set TIM3_IRQHandler,Default_Handler
379

    
380
	.weak	TIM4_IRQHandler
381
	.thumb_set TIM4_IRQHandler,Default_Handler
382

    
383
	.weak	I2C1_EV_IRQHandler
384
	.thumb_set I2C1_EV_IRQHandler,Default_Handler
385

    
386
	.weak	I2C1_ER_IRQHandler
387
	.thumb_set I2C1_ER_IRQHandler,Default_Handler
388

    
389
	.weak	I2C2_EV_IRQHandler
390
	.thumb_set I2C2_EV_IRQHandler,Default_Handler
391

    
392
	.weak	I2C2_ER_IRQHandler
393
	.thumb_set I2C2_ER_IRQHandler,Default_Handler
394

    
395
	.weak	SPI1_IRQHandler
396
	.thumb_set SPI1_IRQHandler,Default_Handler
397

    
398
	.weak	SPI2_IRQHandler
399
	.thumb_set SPI2_IRQHandler,Default_Handler
400

    
401
	.weak	USART1_IRQHandler
402
	.thumb_set USART1_IRQHandler,Default_Handler
403

    
404
	.weak	USART2_IRQHandler
405
	.thumb_set USART2_IRQHandler,Default_Handler
406

    
407
	.weak	USART3_IRQHandler
408
	.thumb_set USART3_IRQHandler,Default_Handler
409

    
410
	.weak	EXTI15_10_IRQHandler
411
	.thumb_set EXTI15_10_IRQHandler,Default_Handler
412

    
413
	.weak	RTCAlarm_IRQHandler
414
	.thumb_set RTCAlarm_IRQHandler,Default_Handler
415

    
416
	.weak	OTG_FS_WKUP_IRQHandler
417
	.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
418

    
419
	.weak	TIM5_IRQHandler
420
	.thumb_set TIM5_IRQHandler,Default_Handler
421

    
422
	.weak	SPI3_IRQHandler
423
	.thumb_set SPI3_IRQHandler,Default_Handler
424

    
425
	.weak	UART4_IRQHandler
426
	.thumb_set UART4_IRQHandler,Default_Handler
427

    
428
	.weak	UART5_IRQHandler
429
	.thumb_set UART5_IRQHandler,Default_Handler
430

    
431
	.weak	TIM6_IRQHandler
432
	.thumb_set TIM6_IRQHandler,Default_Handler
433

    
434
	.weak	TIM7_IRQHandler
435
	.thumb_set TIM7_IRQHandler,Default_Handler
436

    
437
	.weak	DMA2_Channel1_IRQHandler
438
	.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
439

    
440
	.weak	DMA2_Channel2_IRQHandler
441
	.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
442

    
443
	.weak	DMA2_Channel3_IRQHandler
444
	.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
445

    
446
	.weak	DMA2_Channel4_IRQHandler
447
	.thumb_set DMA2_Channel4_IRQHandler,Default_Handler
448

    
449
	.weak	DMA2_Channel5_IRQHandler
450
	.thumb_set DMA2_Channel5_IRQHandler,Default_Handler
451

    
452
	.weak	ETH_IRQHandler
453
	.thumb_set ETH_IRQHandler,Default_Handler
454

    
455
	.weak	ETH_WKUP_IRQHandler
456
	.thumb_set ETH_WKUP_IRQHandler,Default_Handler
457

    
458
	.weak	CAN2_TX_IRQHandler
459
	.thumb_set CAN2_TX_IRQHandler,Default_Handler
460

    
461
	.weak	CAN2_RX0_IRQHandler
462
	.thumb_set CAN2_RX0_IRQHandler,Default_Handler
463

    
464
	.weak	CAN2_RX1_IRQHandler
465
	.thumb_set CAN2_RX1_IRQHandler,Default_Handler
466

    
467
	.weak	CAN2_SCE_IRQHandler
468
	.thumb_set CAN2_SCE_IRQHandler,Default_Handler
469

    
470
	.weak	OTG_FS_IRQHandler
471
	.thumb_set OTG_FS_IRQHandler ,Default_Handler
472

    
473
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/