amiro-blt / Target / Modules / LightRing_1-0 / Boot / lib / CMSIS / CM3 / DeviceSupport / ST / STM32F10x / startup / TrueSTUDIO / startup_stm32f10x_hd.s @ 367c0652
History | View | Annotate | Download (12.3 KB)
| 1 |
/** |
|---|---|
| 2 |
****************************************************************************** |
| 3 |
* @file startup_stm32f10x_hd.s |
| 4 |
* @author MCD Application Team |
| 5 |
* @version V3.5.0 |
| 6 |
* @date 11-March-2011 |
| 7 |
* @brief STM32F10x High Density Devices vector table for Atollic toolchain. |
| 8 |
* This module performs: |
| 9 |
* - Set the initial SP |
| 10 |
* - Set the initial PC == Reset_Handler, |
| 11 |
* - Set the vector table entries with the exceptions ISR address, |
| 12 |
* - Configure the clock system |
| 13 |
* - Configure external SRAM mounted on STM3210E-EVAL board |
| 14 |
* to be used as data memory (optional, to be enabled by user) |
| 15 |
* - Branches to main in the C library (which eventually |
| 16 |
* calls main()). |
| 17 |
* After Reset the Cortex-M3 processor is in Thread mode, |
| 18 |
* priority is Privileged, and the Stack is set to Main. |
| 19 |
****************************************************************************** |
| 20 |
* @attention |
| 21 |
* |
| 22 |
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS |
| 23 |
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE |
| 24 |
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY |
| 25 |
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING |
| 26 |
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE |
| 27 |
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. |
| 28 |
* |
| 29 |
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> |
| 30 |
****************************************************************************** |
| 31 |
*/ |
| 32 |
|
| 33 |
.syntax unified |
| 34 |
.cpu cortex-m3 |
| 35 |
.fpu softvfp |
| 36 |
.thumb |
| 37 |
|
| 38 |
.global g_pfnVectors |
| 39 |
.global Default_Handler |
| 40 |
|
| 41 |
/* start address for the initialization values of the .data section. |
| 42 |
defined in linker script */ |
| 43 |
.word _sidata |
| 44 |
/* start address for the .data section. defined in linker script */ |
| 45 |
.word _sdata |
| 46 |
/* end address for the .data section. defined in linker script */ |
| 47 |
.word _edata |
| 48 |
/* start address for the .bss section. defined in linker script */ |
| 49 |
.word _sbss |
| 50 |
/* end address for the .bss section. defined in linker script */ |
| 51 |
.word _ebss |
| 52 |
|
| 53 |
.equ BootRAM, 0xF1E0F85F |
| 54 |
/** |
| 55 |
* @brief This is the code that gets called when the processor first |
| 56 |
* starts execution following a reset event. Only the absolutely |
| 57 |
* necessary set is performed, after which the application |
| 58 |
* supplied main() routine is called. |
| 59 |
* @param None |
| 60 |
* @retval : None |
| 61 |
*/ |
| 62 |
|
| 63 |
.section .text.Reset_Handler |
| 64 |
.weak Reset_Handler |
| 65 |
.type Reset_Handler, %function |
| 66 |
Reset_Handler: |
| 67 |
|
| 68 |
/* Copy the data segment initializers from flash to SRAM */ |
| 69 |
movs r1, #0 |
| 70 |
b LoopCopyDataInit |
| 71 |
|
| 72 |
CopyDataInit: |
| 73 |
ldr r3, =_sidata |
| 74 |
ldr r3, [r3, r1] |
| 75 |
str r3, [r0, r1] |
| 76 |
adds r1, r1, #4 |
| 77 |
|
| 78 |
LoopCopyDataInit: |
| 79 |
ldr r0, =_sdata |
| 80 |
ldr r3, =_edata |
| 81 |
adds r2, r0, r1 |
| 82 |
cmp r2, r3 |
| 83 |
bcc CopyDataInit |
| 84 |
ldr r2, =_sbss |
| 85 |
b LoopFillZerobss |
| 86 |
/* Zero fill the bss segment. */ |
| 87 |
FillZerobss: |
| 88 |
movs r3, #0 |
| 89 |
str r3, [r2], #4 |
| 90 |
|
| 91 |
LoopFillZerobss: |
| 92 |
ldr r3, = _ebss |
| 93 |
cmp r2, r3 |
| 94 |
bcc FillZerobss |
| 95 |
|
| 96 |
/* Call the clock system intitialization function.*/ |
| 97 |
bl SystemInit |
| 98 |
/* Call static constructors */ |
| 99 |
bl __libc_init_array |
| 100 |
/* Call the application's entry point.*/ |
| 101 |
bl main |
| 102 |
bx lr |
| 103 |
.size Reset_Handler, .-Reset_Handler |
| 104 |
|
| 105 |
/** |
| 106 |
* @brief This is the code that gets called when the processor receives an |
| 107 |
* unexpected interrupt. This simply enters an infinite loop, preserving |
| 108 |
* the system state for examination by a debugger. |
| 109 |
* |
| 110 |
* @param None |
| 111 |
* @retval : None |
| 112 |
*/ |
| 113 |
.section .text.Default_Handler,"ax",%progbits |
| 114 |
Default_Handler: |
| 115 |
Infinite_Loop: |
| 116 |
b Infinite_Loop |
| 117 |
.size Default_Handler, .-Default_Handler |
| 118 |
/****************************************************************************** |
| 119 |
* |
| 120 |
* The minimal vector table for a Cortex M3. Note that the proper constructs |
| 121 |
* must be placed on this to ensure that it ends up at physical address |
| 122 |
* 0x0000.0000. |
| 123 |
* |
| 124 |
******************************************************************************/ |
| 125 |
.section .isr_vector,"a",%progbits |
| 126 |
.type g_pfnVectors, %object |
| 127 |
.size g_pfnVectors, .-g_pfnVectors |
| 128 |
|
| 129 |
|
| 130 |
g_pfnVectors: |
| 131 |
.word _estack |
| 132 |
.word Reset_Handler |
| 133 |
.word NMI_Handler |
| 134 |
.word HardFault_Handler |
| 135 |
.word MemManage_Handler |
| 136 |
.word BusFault_Handler |
| 137 |
.word UsageFault_Handler |
| 138 |
.word 0 |
| 139 |
.word 0 |
| 140 |
.word 0 |
| 141 |
.word 0 |
| 142 |
.word SVC_Handler |
| 143 |
.word DebugMon_Handler |
| 144 |
.word 0 |
| 145 |
.word PendSV_Handler |
| 146 |
.word SysTick_Handler |
| 147 |
.word WWDG_IRQHandler |
| 148 |
.word PVD_IRQHandler |
| 149 |
.word TAMPER_IRQHandler |
| 150 |
.word RTC_IRQHandler |
| 151 |
.word FLASH_IRQHandler |
| 152 |
.word RCC_IRQHandler |
| 153 |
.word EXTI0_IRQHandler |
| 154 |
.word EXTI1_IRQHandler |
| 155 |
.word EXTI2_IRQHandler |
| 156 |
.word EXTI3_IRQHandler |
| 157 |
.word EXTI4_IRQHandler |
| 158 |
.word DMA1_Channel1_IRQHandler |
| 159 |
.word DMA1_Channel2_IRQHandler |
| 160 |
.word DMA1_Channel3_IRQHandler |
| 161 |
.word DMA1_Channel4_IRQHandler |
| 162 |
.word DMA1_Channel5_IRQHandler |
| 163 |
.word DMA1_Channel6_IRQHandler |
| 164 |
.word DMA1_Channel7_IRQHandler |
| 165 |
.word ADC1_2_IRQHandler |
| 166 |
.word USB_HP_CAN1_TX_IRQHandler |
| 167 |
.word USB_LP_CAN1_RX0_IRQHandler |
| 168 |
.word CAN1_RX1_IRQHandler |
| 169 |
.word CAN1_SCE_IRQHandler |
| 170 |
.word EXTI9_5_IRQHandler |
| 171 |
.word TIM1_BRK_IRQHandler |
| 172 |
.word TIM1_UP_IRQHandler |
| 173 |
.word TIM1_TRG_COM_IRQHandler |
| 174 |
.word TIM1_CC_IRQHandler |
| 175 |
.word TIM2_IRQHandler |
| 176 |
.word TIM3_IRQHandler |
| 177 |
.word TIM4_IRQHandler |
| 178 |
.word I2C1_EV_IRQHandler |
| 179 |
.word I2C1_ER_IRQHandler |
| 180 |
.word I2C2_EV_IRQHandler |
| 181 |
.word I2C2_ER_IRQHandler |
| 182 |
.word SPI1_IRQHandler |
| 183 |
.word SPI2_IRQHandler |
| 184 |
.word USART1_IRQHandler |
| 185 |
.word USART2_IRQHandler |
| 186 |
.word USART3_IRQHandler |
| 187 |
.word EXTI15_10_IRQHandler |
| 188 |
.word RTCAlarm_IRQHandler |
| 189 |
.word USBWakeUp_IRQHandler |
| 190 |
.word TIM8_BRK_IRQHandler |
| 191 |
.word TIM8_UP_IRQHandler |
| 192 |
.word TIM8_TRG_COM_IRQHandler |
| 193 |
.word TIM8_CC_IRQHandler |
| 194 |
.word ADC3_IRQHandler |
| 195 |
.word FSMC_IRQHandler |
| 196 |
.word SDIO_IRQHandler |
| 197 |
.word TIM5_IRQHandler |
| 198 |
.word SPI3_IRQHandler |
| 199 |
.word UART4_IRQHandler |
| 200 |
.word UART5_IRQHandler |
| 201 |
.word TIM6_IRQHandler |
| 202 |
.word TIM7_IRQHandler |
| 203 |
.word DMA2_Channel1_IRQHandler |
| 204 |
.word DMA2_Channel2_IRQHandler |
| 205 |
.word DMA2_Channel3_IRQHandler |
| 206 |
.word DMA2_Channel4_5_IRQHandler |
| 207 |
.word 0 |
| 208 |
.word 0 |
| 209 |
.word 0 |
| 210 |
.word 0 |
| 211 |
.word 0 |
| 212 |
.word 0 |
| 213 |
.word 0 |
| 214 |
.word 0 |
| 215 |
.word 0 |
| 216 |
.word 0 |
| 217 |
.word 0 |
| 218 |
.word 0 |
| 219 |
.word 0 |
| 220 |
.word 0 |
| 221 |
.word 0 |
| 222 |
.word 0 |
| 223 |
.word 0 |
| 224 |
.word 0 |
| 225 |
.word 0 |
| 226 |
.word 0 |
| 227 |
.word 0 |
| 228 |
.word 0 |
| 229 |
.word 0 |
| 230 |
.word 0 |
| 231 |
.word 0 |
| 232 |
.word 0 |
| 233 |
.word 0 |
| 234 |
.word 0 |
| 235 |
.word 0 |
| 236 |
.word 0 |
| 237 |
.word 0 |
| 238 |
.word 0 |
| 239 |
.word 0 |
| 240 |
.word 0 |
| 241 |
.word 0 |
| 242 |
.word 0 |
| 243 |
.word 0 |
| 244 |
.word 0 |
| 245 |
.word 0 |
| 246 |
.word 0 |
| 247 |
.word 0 |
| 248 |
.word 0 |
| 249 |
.word 0 |
| 250 |
.word 0 |
| 251 |
.word BootRAM /* @0x1E0. This is for boot in RAM mode for |
| 252 |
STM32F10x High Density devices. */ |
| 253 |
|
| 254 |
/******************************************************************************* |
| 255 |
* |
| 256 |
* Provide weak aliases for each Exception handler to the Default_Handler. |
| 257 |
* As they are weak aliases, any function with the same name will override |
| 258 |
* this definition. |
| 259 |
* |
| 260 |
*******************************************************************************/ |
| 261 |
|
| 262 |
.weak NMI_Handler |
| 263 |
.thumb_set NMI_Handler,Default_Handler |
| 264 |
|
| 265 |
.weak HardFault_Handler |
| 266 |
.thumb_set HardFault_Handler,Default_Handler |
| 267 |
|
| 268 |
.weak MemManage_Handler |
| 269 |
.thumb_set MemManage_Handler,Default_Handler |
| 270 |
|
| 271 |
.weak BusFault_Handler |
| 272 |
.thumb_set BusFault_Handler,Default_Handler |
| 273 |
|
| 274 |
.weak UsageFault_Handler |
| 275 |
.thumb_set UsageFault_Handler,Default_Handler |
| 276 |
|
| 277 |
.weak SVC_Handler |
| 278 |
.thumb_set SVC_Handler,Default_Handler |
| 279 |
|
| 280 |
.weak DebugMon_Handler |
| 281 |
.thumb_set DebugMon_Handler,Default_Handler |
| 282 |
|
| 283 |
.weak PendSV_Handler |
| 284 |
.thumb_set PendSV_Handler,Default_Handler |
| 285 |
|
| 286 |
.weak SysTick_Handler |
| 287 |
.thumb_set SysTick_Handler,Default_Handler |
| 288 |
|
| 289 |
.weak WWDG_IRQHandler |
| 290 |
.thumb_set WWDG_IRQHandler,Default_Handler |
| 291 |
|
| 292 |
.weak PVD_IRQHandler |
| 293 |
.thumb_set PVD_IRQHandler,Default_Handler |
| 294 |
|
| 295 |
.weak TAMPER_IRQHandler |
| 296 |
.thumb_set TAMPER_IRQHandler,Default_Handler |
| 297 |
|
| 298 |
.weak RTC_IRQHandler |
| 299 |
.thumb_set RTC_IRQHandler,Default_Handler |
| 300 |
|
| 301 |
.weak FLASH_IRQHandler |
| 302 |
.thumb_set FLASH_IRQHandler,Default_Handler |
| 303 |
|
| 304 |
.weak RCC_IRQHandler |
| 305 |
.thumb_set RCC_IRQHandler,Default_Handler |
| 306 |
|
| 307 |
.weak EXTI0_IRQHandler |
| 308 |
.thumb_set EXTI0_IRQHandler,Default_Handler |
| 309 |
|
| 310 |
.weak EXTI1_IRQHandler |
| 311 |
.thumb_set EXTI1_IRQHandler,Default_Handler |
| 312 |
|
| 313 |
.weak EXTI2_IRQHandler |
| 314 |
.thumb_set EXTI2_IRQHandler,Default_Handler |
| 315 |
|
| 316 |
.weak EXTI3_IRQHandler |
| 317 |
.thumb_set EXTI3_IRQHandler,Default_Handler |
| 318 |
|
| 319 |
.weak EXTI4_IRQHandler |
| 320 |
.thumb_set EXTI4_IRQHandler,Default_Handler |
| 321 |
|
| 322 |
.weak DMA1_Channel1_IRQHandler |
| 323 |
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler |
| 324 |
|
| 325 |
.weak DMA1_Channel2_IRQHandler |
| 326 |
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler |
| 327 |
|
| 328 |
.weak DMA1_Channel3_IRQHandler |
| 329 |
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler |
| 330 |
|
| 331 |
.weak DMA1_Channel4_IRQHandler |
| 332 |
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler |
| 333 |
|
| 334 |
.weak DMA1_Channel5_IRQHandler |
| 335 |
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler |
| 336 |
|
| 337 |
.weak DMA1_Channel6_IRQHandler |
| 338 |
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler |
| 339 |
|
| 340 |
.weak DMA1_Channel7_IRQHandler |
| 341 |
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler |
| 342 |
|
| 343 |
.weak ADC1_2_IRQHandler |
| 344 |
.thumb_set ADC1_2_IRQHandler,Default_Handler |
| 345 |
|
| 346 |
.weak USB_HP_CAN1_TX_IRQHandler |
| 347 |
.thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler |
| 348 |
|
| 349 |
.weak USB_LP_CAN1_RX0_IRQHandler |
| 350 |
.thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler |
| 351 |
|
| 352 |
.weak CAN1_RX1_IRQHandler |
| 353 |
.thumb_set CAN1_RX1_IRQHandler,Default_Handler |
| 354 |
|
| 355 |
.weak CAN1_SCE_IRQHandler |
| 356 |
.thumb_set CAN1_SCE_IRQHandler,Default_Handler |
| 357 |
|
| 358 |
.weak EXTI9_5_IRQHandler |
| 359 |
.thumb_set EXTI9_5_IRQHandler,Default_Handler |
| 360 |
|
| 361 |
.weak TIM1_BRK_IRQHandler |
| 362 |
.thumb_set TIM1_BRK_IRQHandler,Default_Handler |
| 363 |
|
| 364 |
.weak TIM1_UP_IRQHandler |
| 365 |
.thumb_set TIM1_UP_IRQHandler,Default_Handler |
| 366 |
|
| 367 |
.weak TIM1_TRG_COM_IRQHandler |
| 368 |
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler |
| 369 |
|
| 370 |
.weak TIM1_CC_IRQHandler |
| 371 |
.thumb_set TIM1_CC_IRQHandler,Default_Handler |
| 372 |
|
| 373 |
.weak TIM2_IRQHandler |
| 374 |
.thumb_set TIM2_IRQHandler,Default_Handler |
| 375 |
|
| 376 |
.weak TIM3_IRQHandler |
| 377 |
.thumb_set TIM3_IRQHandler,Default_Handler |
| 378 |
|
| 379 |
.weak TIM4_IRQHandler |
| 380 |
.thumb_set TIM4_IRQHandler,Default_Handler |
| 381 |
|
| 382 |
.weak I2C1_EV_IRQHandler |
| 383 |
.thumb_set I2C1_EV_IRQHandler,Default_Handler |
| 384 |
|
| 385 |
.weak I2C1_ER_IRQHandler |
| 386 |
.thumb_set I2C1_ER_IRQHandler,Default_Handler |
| 387 |
|
| 388 |
.weak I2C2_EV_IRQHandler |
| 389 |
.thumb_set I2C2_EV_IRQHandler,Default_Handler |
| 390 |
|
| 391 |
.weak I2C2_ER_IRQHandler |
| 392 |
.thumb_set I2C2_ER_IRQHandler,Default_Handler |
| 393 |
|
| 394 |
.weak SPI1_IRQHandler |
| 395 |
.thumb_set SPI1_IRQHandler,Default_Handler |
| 396 |
|
| 397 |
.weak SPI2_IRQHandler |
| 398 |
.thumb_set SPI2_IRQHandler,Default_Handler |
| 399 |
|
| 400 |
.weak USART1_IRQHandler |
| 401 |
.thumb_set USART1_IRQHandler,Default_Handler |
| 402 |
|
| 403 |
.weak USART2_IRQHandler |
| 404 |
.thumb_set USART2_IRQHandler,Default_Handler |
| 405 |
|
| 406 |
.weak USART3_IRQHandler |
| 407 |
.thumb_set USART3_IRQHandler,Default_Handler |
| 408 |
|
| 409 |
.weak EXTI15_10_IRQHandler |
| 410 |
.thumb_set EXTI15_10_IRQHandler,Default_Handler |
| 411 |
|
| 412 |
.weak RTCAlarm_IRQHandler |
| 413 |
.thumb_set RTCAlarm_IRQHandler,Default_Handler |
| 414 |
|
| 415 |
.weak USBWakeUp_IRQHandler |
| 416 |
.thumb_set USBWakeUp_IRQHandler,Default_Handler |
| 417 |
|
| 418 |
.weak TIM8_BRK_IRQHandler |
| 419 |
.thumb_set TIM8_BRK_IRQHandler,Default_Handler |
| 420 |
|
| 421 |
.weak TIM8_UP_IRQHandler |
| 422 |
.thumb_set TIM8_UP_IRQHandler,Default_Handler |
| 423 |
|
| 424 |
.weak TIM8_TRG_COM_IRQHandler |
| 425 |
.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler |
| 426 |
|
| 427 |
.weak TIM8_CC_IRQHandler |
| 428 |
.thumb_set TIM8_CC_IRQHandler,Default_Handler |
| 429 |
|
| 430 |
.weak ADC3_IRQHandler |
| 431 |
.thumb_set ADC3_IRQHandler,Default_Handler |
| 432 |
|
| 433 |
.weak FSMC_IRQHandler |
| 434 |
.thumb_set FSMC_IRQHandler,Default_Handler |
| 435 |
|
| 436 |
.weak SDIO_IRQHandler |
| 437 |
.thumb_set SDIO_IRQHandler,Default_Handler |
| 438 |
|
| 439 |
.weak TIM5_IRQHandler |
| 440 |
.thumb_set TIM5_IRQHandler,Default_Handler |
| 441 |
|
| 442 |
.weak SPI3_IRQHandler |
| 443 |
.thumb_set SPI3_IRQHandler,Default_Handler |
| 444 |
|
| 445 |
.weak UART4_IRQHandler |
| 446 |
.thumb_set UART4_IRQHandler,Default_Handler |
| 447 |
|
| 448 |
.weak UART5_IRQHandler |
| 449 |
.thumb_set UART5_IRQHandler,Default_Handler |
| 450 |
|
| 451 |
.weak TIM6_IRQHandler |
| 452 |
.thumb_set TIM6_IRQHandler,Default_Handler |
| 453 |
|
| 454 |
.weak TIM7_IRQHandler |
| 455 |
.thumb_set TIM7_IRQHandler,Default_Handler |
| 456 |
|
| 457 |
.weak DMA2_Channel1_IRQHandler |
| 458 |
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler |
| 459 |
|
| 460 |
.weak DMA2_Channel2_IRQHandler |
| 461 |
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler |
| 462 |
|
| 463 |
.weak DMA2_Channel3_IRQHandler |
| 464 |
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler |
| 465 |
|
| 466 |
.weak DMA2_Channel4_5_IRQHandler |
| 467 |
.thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler |
| 468 |
|
| 469 |
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |