amiro-blt / Target / Demo / ARMCM4_STM32F405_Power_Management_GCC / Boot / lib / stdperiphlib / STM32F4xx_StdPeriph_Driver / inc / stm32f4xx_sdio.h @ 69661903
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1 | 69661903 | Thomas Schöpping | /**
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2 | ******************************************************************************
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3 | * @file stm32f4xx_sdio.h
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4 | * @author MCD Application Team
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5 | * @version V1.1.0
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6 | * @date 11-January-2013
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7 | * @brief This file contains all the functions prototypes for the SDIO firmware
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8 | * library.
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9 | ******************************************************************************
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10 | * @attention
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11 | *
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12 | * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
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13 | *
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14 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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15 | * You may not use this file except in compliance with the License.
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16 | * You may obtain a copy of the License at:
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17 | *
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18 | * http://www.st.com/software_license_agreement_liberty_v2
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19 | *
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20 | * Unless required by applicable law or agreed to in writing, software
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21 | * distributed under the License is distributed on an "AS IS" BASIS,
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22 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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23 | * See the License for the specific language governing permissions and
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24 | * limitations under the License.
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25 | *
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26 | ******************************************************************************
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27 | */
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28 | |||
29 | /* Define to prevent recursive inclusion -------------------------------------*/
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30 | #ifndef __STM32F4xx_SDIO_H
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31 | #define __STM32F4xx_SDIO_H
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32 | |||
33 | #ifdef __cplusplus
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34 | extern "C" { |
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35 | #endif
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36 | |||
37 | /* Includes ------------------------------------------------------------------*/
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38 | #include "stm32f4xx.h" |
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39 | |||
40 | /** @addtogroup STM32F4xx_StdPeriph_Driver
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41 | * @{
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42 | */
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43 | |||
44 | /** @addtogroup SDIO
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45 | * @{
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46 | */
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47 | |||
48 | /* Exported types ------------------------------------------------------------*/
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49 | |||
50 | typedef struct |
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51 | { |
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52 | uint32_t SDIO_ClockEdge; /*!< Specifies the clock transition on which the bit capture is made.
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53 | This parameter can be a value of @ref SDIO_Clock_Edge */
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54 | |||
55 | uint32_t SDIO_ClockBypass; /*!< Specifies whether the SDIO Clock divider bypass is
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56 | enabled or disabled.
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57 | This parameter can be a value of @ref SDIO_Clock_Bypass */
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58 | |||
59 | uint32_t SDIO_ClockPowerSave; /*!< Specifies whether SDIO Clock output is enabled or
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60 | disabled when the bus is idle.
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61 | This parameter can be a value of @ref SDIO_Clock_Power_Save */
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62 | |||
63 | uint32_t SDIO_BusWide; /*!< Specifies the SDIO bus width.
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64 | This parameter can be a value of @ref SDIO_Bus_Wide */
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65 | |||
66 | uint32_t SDIO_HardwareFlowControl; /*!< Specifies whether the SDIO hardware flow control is enabled or disabled.
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67 | This parameter can be a value of @ref SDIO_Hardware_Flow_Control */
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68 | |||
69 | uint8_t SDIO_ClockDiv; /*!< Specifies the clock frequency of the SDIO controller.
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70 | This parameter can be a value between 0x00 and 0xFF. */
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71 | |||
72 | } SDIO_InitTypeDef; |
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73 | |||
74 | typedef struct |
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75 | { |
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76 | uint32_t SDIO_Argument; /*!< Specifies the SDIO command argument which is sent
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77 | to a card as part of a command message. If a command
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78 | contains an argument, it must be loaded into this register
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79 | before writing the command to the command register */
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80 | |||
81 | uint32_t SDIO_CmdIndex; /*!< Specifies the SDIO command index. It must be lower than 0x40. */
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82 | |||
83 | uint32_t SDIO_Response; /*!< Specifies the SDIO response type.
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84 | This parameter can be a value of @ref SDIO_Response_Type */
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85 | |||
86 | uint32_t SDIO_Wait; /*!< Specifies whether SDIO wait for interrupt request is enabled or disabled.
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87 | This parameter can be a value of @ref SDIO_Wait_Interrupt_State */
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88 | |||
89 | uint32_t SDIO_CPSM; /*!< Specifies whether SDIO Command path state machine (CPSM)
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90 | is enabled or disabled.
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91 | This parameter can be a value of @ref SDIO_CPSM_State */
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92 | } SDIO_CmdInitTypeDef; |
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93 | |||
94 | typedef struct |
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95 | { |
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96 | uint32_t SDIO_DataTimeOut; /*!< Specifies the data timeout period in card bus clock periods. */
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97 | |||
98 | uint32_t SDIO_DataLength; /*!< Specifies the number of data bytes to be transferred. */
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99 | |||
100 | uint32_t SDIO_DataBlockSize; /*!< Specifies the data block size for block transfer.
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101 | This parameter can be a value of @ref SDIO_Data_Block_Size */
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102 | |||
103 | uint32_t SDIO_TransferDir; /*!< Specifies the data transfer direction, whether the transfer
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104 | is a read or write.
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105 | This parameter can be a value of @ref SDIO_Transfer_Direction */
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106 | |||
107 | uint32_t SDIO_TransferMode; /*!< Specifies whether data transfer is in stream or block mode.
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108 | This parameter can be a value of @ref SDIO_Transfer_Type */
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109 | |||
110 | uint32_t SDIO_DPSM; /*!< Specifies whether SDIO Data path state machine (DPSM)
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111 | is enabled or disabled.
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112 | This parameter can be a value of @ref SDIO_DPSM_State */
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113 | } SDIO_DataInitTypeDef; |
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114 | |||
115 | |||
116 | /* Exported constants --------------------------------------------------------*/
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117 | |||
118 | /** @defgroup SDIO_Exported_Constants
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119 | * @{
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120 | */
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121 | |||
122 | /** @defgroup SDIO_Clock_Edge
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123 | * @{
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124 | */
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125 | |||
126 | #define SDIO_ClockEdge_Rising ((uint32_t)0x00000000) |
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127 | #define SDIO_ClockEdge_Falling ((uint32_t)0x00002000) |
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128 | #define IS_SDIO_CLOCK_EDGE(EDGE) (((EDGE) == SDIO_ClockEdge_Rising) || \
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129 | ((EDGE) == SDIO_ClockEdge_Falling)) |
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130 | /**
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131 | * @}
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132 | */
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133 | |||
134 | /** @defgroup SDIO_Clock_Bypass
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135 | * @{
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136 | */
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137 | |||
138 | #define SDIO_ClockBypass_Disable ((uint32_t)0x00000000) |
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139 | #define SDIO_ClockBypass_Enable ((uint32_t)0x00000400) |
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140 | #define IS_SDIO_CLOCK_BYPASS(BYPASS) (((BYPASS) == SDIO_ClockBypass_Disable) || \
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141 | ((BYPASS) == SDIO_ClockBypass_Enable)) |
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142 | /**
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143 | * @}
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144 | */
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145 | |||
146 | /** @defgroup SDIO_Clock_Power_Save
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147 | * @{
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148 | */
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149 | |||
150 | #define SDIO_ClockPowerSave_Disable ((uint32_t)0x00000000) |
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151 | #define SDIO_ClockPowerSave_Enable ((uint32_t)0x00000200) |
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152 | #define IS_SDIO_CLOCK_POWER_SAVE(SAVE) (((SAVE) == SDIO_ClockPowerSave_Disable) || \
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153 | ((SAVE) == SDIO_ClockPowerSave_Enable)) |
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154 | /**
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155 | * @}
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156 | */
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157 | |||
158 | /** @defgroup SDIO_Bus_Wide
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159 | * @{
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160 | */
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161 | |||
162 | #define SDIO_BusWide_1b ((uint32_t)0x00000000) |
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163 | #define SDIO_BusWide_4b ((uint32_t)0x00000800) |
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164 | #define SDIO_BusWide_8b ((uint32_t)0x00001000) |
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165 | #define IS_SDIO_BUS_WIDE(WIDE) (((WIDE) == SDIO_BusWide_1b) || ((WIDE) == SDIO_BusWide_4b) || \
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166 | ((WIDE) == SDIO_BusWide_8b)) |
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167 | |||
168 | /**
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169 | * @}
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170 | */
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171 | |||
172 | /** @defgroup SDIO_Hardware_Flow_Control
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173 | * @{
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174 | */
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175 | |||
176 | #define SDIO_HardwareFlowControl_Disable ((uint32_t)0x00000000) |
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177 | #define SDIO_HardwareFlowControl_Enable ((uint32_t)0x00004000) |
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178 | #define IS_SDIO_HARDWARE_FLOW_CONTROL(CONTROL) (((CONTROL) == SDIO_HardwareFlowControl_Disable) || \
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179 | ((CONTROL) == SDIO_HardwareFlowControl_Enable)) |
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180 | /**
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181 | * @}
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182 | */
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183 | |||
184 | /** @defgroup SDIO_Power_State
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185 | * @{
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186 | */
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187 | |||
188 | #define SDIO_PowerState_OFF ((uint32_t)0x00000000) |
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189 | #define SDIO_PowerState_ON ((uint32_t)0x00000003) |
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190 | #define IS_SDIO_POWER_STATE(STATE) (((STATE) == SDIO_PowerState_OFF) || ((STATE) == SDIO_PowerState_ON))
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191 | /**
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192 | * @}
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193 | */
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194 | |||
195 | |||
196 | /** @defgroup SDIO_Interrupt_sources
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197 | * @{
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198 | */
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199 | |||
200 | #define SDIO_IT_CCRCFAIL ((uint32_t)0x00000001) |
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201 | #define SDIO_IT_DCRCFAIL ((uint32_t)0x00000002) |
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202 | #define SDIO_IT_CTIMEOUT ((uint32_t)0x00000004) |
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203 | #define SDIO_IT_DTIMEOUT ((uint32_t)0x00000008) |
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204 | #define SDIO_IT_TXUNDERR ((uint32_t)0x00000010) |
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205 | #define SDIO_IT_RXOVERR ((uint32_t)0x00000020) |
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206 | #define SDIO_IT_CMDREND ((uint32_t)0x00000040) |
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207 | #define SDIO_IT_CMDSENT ((uint32_t)0x00000080) |
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208 | #define SDIO_IT_DATAEND ((uint32_t)0x00000100) |
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209 | #define SDIO_IT_STBITERR ((uint32_t)0x00000200) |
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210 | #define SDIO_IT_DBCKEND ((uint32_t)0x00000400) |
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211 | #define SDIO_IT_CMDACT ((uint32_t)0x00000800) |
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212 | #define SDIO_IT_TXACT ((uint32_t)0x00001000) |
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213 | #define SDIO_IT_RXACT ((uint32_t)0x00002000) |
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214 | #define SDIO_IT_TXFIFOHE ((uint32_t)0x00004000) |
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215 | #define SDIO_IT_RXFIFOHF ((uint32_t)0x00008000) |
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216 | #define SDIO_IT_TXFIFOF ((uint32_t)0x00010000) |
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217 | #define SDIO_IT_RXFIFOF ((uint32_t)0x00020000) |
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218 | #define SDIO_IT_TXFIFOE ((uint32_t)0x00040000) |
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219 | #define SDIO_IT_RXFIFOE ((uint32_t)0x00080000) |
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220 | #define SDIO_IT_TXDAVL ((uint32_t)0x00100000) |
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221 | #define SDIO_IT_RXDAVL ((uint32_t)0x00200000) |
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222 | #define SDIO_IT_SDIOIT ((uint32_t)0x00400000) |
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223 | #define SDIO_IT_CEATAEND ((uint32_t)0x00800000) |
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224 | #define IS_SDIO_IT(IT) ((((IT) & (uint32_t)0xFF000000) == 0x00) && ((IT) != (uint32_t)0x00)) |
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225 | /**
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226 | * @}
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227 | */
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228 | |||
229 | /** @defgroup SDIO_Command_Index
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230 | * @{
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231 | */
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232 | |||
233 | #define IS_SDIO_CMD_INDEX(INDEX) ((INDEX) < 0x40) |
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234 | /**
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235 | * @}
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236 | */
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237 | |||
238 | /** @defgroup SDIO_Response_Type
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239 | * @{
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240 | */
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241 | |||
242 | #define SDIO_Response_No ((uint32_t)0x00000000) |
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243 | #define SDIO_Response_Short ((uint32_t)0x00000040) |
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244 | #define SDIO_Response_Long ((uint32_t)0x000000C0) |
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245 | #define IS_SDIO_RESPONSE(RESPONSE) (((RESPONSE) == SDIO_Response_No) || \
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246 | ((RESPONSE) == SDIO_Response_Short) || \ |
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247 | ((RESPONSE) == SDIO_Response_Long)) |
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248 | /**
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249 | * @}
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250 | */
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251 | |||
252 | /** @defgroup SDIO_Wait_Interrupt_State
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253 | * @{
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254 | */
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255 | |||
256 | #define SDIO_Wait_No ((uint32_t)0x00000000) /*!< SDIO No Wait, TimeOut is enabled */ |
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257 | #define SDIO_Wait_IT ((uint32_t)0x00000100) /*!< SDIO Wait Interrupt Request */ |
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258 | #define SDIO_Wait_Pend ((uint32_t)0x00000200) /*!< SDIO Wait End of transfer */ |
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259 | #define IS_SDIO_WAIT(WAIT) (((WAIT) == SDIO_Wait_No) || ((WAIT) == SDIO_Wait_IT) || \
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260 | ((WAIT) == SDIO_Wait_Pend)) |
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261 | /**
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262 | * @}
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263 | */
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264 | |||
265 | /** @defgroup SDIO_CPSM_State
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266 | * @{
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267 | */
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268 | |||
269 | #define SDIO_CPSM_Disable ((uint32_t)0x00000000) |
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270 | #define SDIO_CPSM_Enable ((uint32_t)0x00000400) |
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271 | #define IS_SDIO_CPSM(CPSM) (((CPSM) == SDIO_CPSM_Enable) || ((CPSM) == SDIO_CPSM_Disable))
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272 | /**
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273 | * @}
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274 | */
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275 | |||
276 | /** @defgroup SDIO_Response_Registers
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277 | * @{
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278 | */
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279 | |||
280 | #define SDIO_RESP1 ((uint32_t)0x00000000) |
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281 | #define SDIO_RESP2 ((uint32_t)0x00000004) |
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282 | #define SDIO_RESP3 ((uint32_t)0x00000008) |
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283 | #define SDIO_RESP4 ((uint32_t)0x0000000C) |
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284 | #define IS_SDIO_RESP(RESP) (((RESP) == SDIO_RESP1) || ((RESP) == SDIO_RESP2) || \
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285 | ((RESP) == SDIO_RESP3) || ((RESP) == SDIO_RESP4)) |
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286 | /**
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287 | * @}
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288 | */
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289 | |||
290 | /** @defgroup SDIO_Data_Length
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291 | * @{
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292 | */
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293 | |||
294 | #define IS_SDIO_DATA_LENGTH(LENGTH) ((LENGTH) <= 0x01FFFFFF) |
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295 | /**
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296 | * @}
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297 | */
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298 | |||
299 | /** @defgroup SDIO_Data_Block_Size
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300 | * @{
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301 | */
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302 | |||
303 | #define SDIO_DataBlockSize_1b ((uint32_t)0x00000000) |
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304 | #define SDIO_DataBlockSize_2b ((uint32_t)0x00000010) |
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305 | #define SDIO_DataBlockSize_4b ((uint32_t)0x00000020) |
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306 | #define SDIO_DataBlockSize_8b ((uint32_t)0x00000030) |
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307 | #define SDIO_DataBlockSize_16b ((uint32_t)0x00000040) |
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308 | #define SDIO_DataBlockSize_32b ((uint32_t)0x00000050) |
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309 | #define SDIO_DataBlockSize_64b ((uint32_t)0x00000060) |
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310 | #define SDIO_DataBlockSize_128b ((uint32_t)0x00000070) |
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311 | #define SDIO_DataBlockSize_256b ((uint32_t)0x00000080) |
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312 | #define SDIO_DataBlockSize_512b ((uint32_t)0x00000090) |
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313 | #define SDIO_DataBlockSize_1024b ((uint32_t)0x000000A0) |
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314 | #define SDIO_DataBlockSize_2048b ((uint32_t)0x000000B0) |
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315 | #define SDIO_DataBlockSize_4096b ((uint32_t)0x000000C0) |
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316 | #define SDIO_DataBlockSize_8192b ((uint32_t)0x000000D0) |
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317 | #define SDIO_DataBlockSize_16384b ((uint32_t)0x000000E0) |
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318 | #define IS_SDIO_BLOCK_SIZE(SIZE) (((SIZE) == SDIO_DataBlockSize_1b) || \
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319 | ((SIZE) == SDIO_DataBlockSize_2b) || \ |
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320 | ((SIZE) == SDIO_DataBlockSize_4b) || \ |
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321 | ((SIZE) == SDIO_DataBlockSize_8b) || \ |
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322 | ((SIZE) == SDIO_DataBlockSize_16b) || \ |
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323 | ((SIZE) == SDIO_DataBlockSize_32b) || \ |
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324 | ((SIZE) == SDIO_DataBlockSize_64b) || \ |
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325 | ((SIZE) == SDIO_DataBlockSize_128b) || \ |
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326 | ((SIZE) == SDIO_DataBlockSize_256b) || \ |
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327 | ((SIZE) == SDIO_DataBlockSize_512b) || \ |
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328 | ((SIZE) == SDIO_DataBlockSize_1024b) || \ |
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329 | ((SIZE) == SDIO_DataBlockSize_2048b) || \ |
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330 | ((SIZE) == SDIO_DataBlockSize_4096b) || \ |
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331 | ((SIZE) == SDIO_DataBlockSize_8192b) || \ |
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332 | ((SIZE) == SDIO_DataBlockSize_16384b)) |
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333 | /**
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334 | * @}
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335 | */
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336 | |||
337 | /** @defgroup SDIO_Transfer_Direction
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338 | * @{
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339 | */
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340 | |||
341 | #define SDIO_TransferDir_ToCard ((uint32_t)0x00000000) |
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342 | #define SDIO_TransferDir_ToSDIO ((uint32_t)0x00000002) |
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343 | #define IS_SDIO_TRANSFER_DIR(DIR) (((DIR) == SDIO_TransferDir_ToCard) || \
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344 | ((DIR) == SDIO_TransferDir_ToSDIO)) |
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345 | /**
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346 | * @}
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347 | */
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348 | |||
349 | /** @defgroup SDIO_Transfer_Type
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350 | * @{
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351 | */
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352 | |||
353 | #define SDIO_TransferMode_Block ((uint32_t)0x00000000) |
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354 | #define SDIO_TransferMode_Stream ((uint32_t)0x00000004) |
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355 | #define IS_SDIO_TRANSFER_MODE(MODE) (((MODE) == SDIO_TransferMode_Stream) || \
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356 | ((MODE) == SDIO_TransferMode_Block)) |
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357 | /**
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358 | * @}
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359 | */
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360 | |||
361 | /** @defgroup SDIO_DPSM_State
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362 | * @{
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363 | */
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364 | |||
365 | #define SDIO_DPSM_Disable ((uint32_t)0x00000000) |
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366 | #define SDIO_DPSM_Enable ((uint32_t)0x00000001) |
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367 | #define IS_SDIO_DPSM(DPSM) (((DPSM) == SDIO_DPSM_Enable) || ((DPSM) == SDIO_DPSM_Disable))
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368 | /**
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369 | * @}
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370 | */
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371 | |||
372 | /** @defgroup SDIO_Flags
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373 | * @{
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374 | */
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375 | |||
376 | #define SDIO_FLAG_CCRCFAIL ((uint32_t)0x00000001) |
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377 | #define SDIO_FLAG_DCRCFAIL ((uint32_t)0x00000002) |
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378 | #define SDIO_FLAG_CTIMEOUT ((uint32_t)0x00000004) |
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379 | #define SDIO_FLAG_DTIMEOUT ((uint32_t)0x00000008) |
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380 | #define SDIO_FLAG_TXUNDERR ((uint32_t)0x00000010) |
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381 | #define SDIO_FLAG_RXOVERR ((uint32_t)0x00000020) |
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382 | #define SDIO_FLAG_CMDREND ((uint32_t)0x00000040) |
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383 | #define SDIO_FLAG_CMDSENT ((uint32_t)0x00000080) |
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384 | #define SDIO_FLAG_DATAEND ((uint32_t)0x00000100) |
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385 | #define SDIO_FLAG_STBITERR ((uint32_t)0x00000200) |
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386 | #define SDIO_FLAG_DBCKEND ((uint32_t)0x00000400) |
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387 | #define SDIO_FLAG_CMDACT ((uint32_t)0x00000800) |
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388 | #define SDIO_FLAG_TXACT ((uint32_t)0x00001000) |
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389 | #define SDIO_FLAG_RXACT ((uint32_t)0x00002000) |
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390 | #define SDIO_FLAG_TXFIFOHE ((uint32_t)0x00004000) |
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391 | #define SDIO_FLAG_RXFIFOHF ((uint32_t)0x00008000) |
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392 | #define SDIO_FLAG_TXFIFOF ((uint32_t)0x00010000) |
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393 | #define SDIO_FLAG_RXFIFOF ((uint32_t)0x00020000) |
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394 | #define SDIO_FLAG_TXFIFOE ((uint32_t)0x00040000) |
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395 | #define SDIO_FLAG_RXFIFOE ((uint32_t)0x00080000) |
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396 | #define SDIO_FLAG_TXDAVL ((uint32_t)0x00100000) |
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397 | #define SDIO_FLAG_RXDAVL ((uint32_t)0x00200000) |
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398 | #define SDIO_FLAG_SDIOIT ((uint32_t)0x00400000) |
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399 | #define SDIO_FLAG_CEATAEND ((uint32_t)0x00800000) |
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400 | #define IS_SDIO_FLAG(FLAG) (((FLAG) == SDIO_FLAG_CCRCFAIL) || \
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401 | ((FLAG) == SDIO_FLAG_DCRCFAIL) || \ |
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402 | ((FLAG) == SDIO_FLAG_CTIMEOUT) || \ |
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403 | ((FLAG) == SDIO_FLAG_DTIMEOUT) || \ |
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404 | ((FLAG) == SDIO_FLAG_TXUNDERR) || \ |
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405 | ((FLAG) == SDIO_FLAG_RXOVERR) || \ |
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406 | ((FLAG) == SDIO_FLAG_CMDREND) || \ |
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407 | ((FLAG) == SDIO_FLAG_CMDSENT) || \ |
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408 | ((FLAG) == SDIO_FLAG_DATAEND) || \ |
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409 | ((FLAG) == SDIO_FLAG_STBITERR) || \ |
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410 | ((FLAG) == SDIO_FLAG_DBCKEND) || \ |
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411 | ((FLAG) == SDIO_FLAG_CMDACT) || \ |
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412 | ((FLAG) == SDIO_FLAG_TXACT) || \ |
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413 | ((FLAG) == SDIO_FLAG_RXACT) || \ |
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414 | ((FLAG) == SDIO_FLAG_TXFIFOHE) || \ |
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415 | ((FLAG) == SDIO_FLAG_RXFIFOHF) || \ |
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416 | ((FLAG) == SDIO_FLAG_TXFIFOF) || \ |
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417 | ((FLAG) == SDIO_FLAG_RXFIFOF) || \ |
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418 | ((FLAG) == SDIO_FLAG_TXFIFOE) || \ |
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419 | ((FLAG) == SDIO_FLAG_RXFIFOE) || \ |
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420 | ((FLAG) == SDIO_FLAG_TXDAVL) || \ |
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421 | ((FLAG) == SDIO_FLAG_RXDAVL) || \ |
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422 | ((FLAG) == SDIO_FLAG_SDIOIT) || \ |
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423 | ((FLAG) == SDIO_FLAG_CEATAEND)) |
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424 | |||
425 | #define IS_SDIO_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFF3FF800) == 0x00) && ((FLAG) != (uint32_t)0x00)) |
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426 | |||
427 | #define IS_SDIO_GET_IT(IT) (((IT) == SDIO_IT_CCRCFAIL) || \
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428 | ((IT) == SDIO_IT_DCRCFAIL) || \ |
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429 | ((IT) == SDIO_IT_CTIMEOUT) || \ |
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430 | ((IT) == SDIO_IT_DTIMEOUT) || \ |
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431 | ((IT) == SDIO_IT_TXUNDERR) || \ |
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432 | ((IT) == SDIO_IT_RXOVERR) || \ |
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433 | ((IT) == SDIO_IT_CMDREND) || \ |
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434 | ((IT) == SDIO_IT_CMDSENT) || \ |
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435 | ((IT) == SDIO_IT_DATAEND) || \ |
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436 | ((IT) == SDIO_IT_STBITERR) || \ |
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437 | ((IT) == SDIO_IT_DBCKEND) || \ |
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438 | ((IT) == SDIO_IT_CMDACT) || \ |
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439 | ((IT) == SDIO_IT_TXACT) || \ |
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440 | ((IT) == SDIO_IT_RXACT) || \ |
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441 | ((IT) == SDIO_IT_TXFIFOHE) || \ |
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442 | ((IT) == SDIO_IT_RXFIFOHF) || \ |
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443 | ((IT) == SDIO_IT_TXFIFOF) || \ |
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444 | ((IT) == SDIO_IT_RXFIFOF) || \ |
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445 | ((IT) == SDIO_IT_TXFIFOE) || \ |
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446 | ((IT) == SDIO_IT_RXFIFOE) || \ |
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447 | ((IT) == SDIO_IT_TXDAVL) || \ |
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448 | ((IT) == SDIO_IT_RXDAVL) || \ |
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449 | ((IT) == SDIO_IT_SDIOIT) || \ |
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450 | ((IT) == SDIO_IT_CEATAEND)) |
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451 | |||
452 | #define IS_SDIO_CLEAR_IT(IT) ((((IT) & (uint32_t)0xFF3FF800) == 0x00) && ((IT) != (uint32_t)0x00)) |
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453 | |||
454 | /**
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455 | * @}
|
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456 | */
|
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457 | |||
458 | /** @defgroup SDIO_Read_Wait_Mode
|
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459 | * @{
|
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460 | */
|
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461 | |||
462 | #define SDIO_ReadWaitMode_CLK ((uint32_t)0x00000000) |
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463 | #define SDIO_ReadWaitMode_DATA2 ((uint32_t)0x00000001) |
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464 | #define IS_SDIO_READWAIT_MODE(MODE) (((MODE) == SDIO_ReadWaitMode_CLK) || \
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465 | ((MODE) == SDIO_ReadWaitMode_DATA2)) |
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466 | /**
|
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467 | * @}
|
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468 | */
|
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469 | |||
470 | /**
|
||
471 | * @}
|
||
472 | */
|
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473 | |||
474 | /* Exported macro ------------------------------------------------------------*/
|
||
475 | /* Exported functions --------------------------------------------------------*/
|
||
476 | /* Function used to set the SDIO configuration to the default reset state ****/
|
||
477 | void SDIO_DeInit(void); |
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478 | |||
479 | /* Initialization and Configuration functions *********************************/
|
||
480 | void SDIO_Init(SDIO_InitTypeDef* SDIO_InitStruct);
|
||
481 | void SDIO_StructInit(SDIO_InitTypeDef* SDIO_InitStruct);
|
||
482 | void SDIO_ClockCmd(FunctionalState NewState);
|
||
483 | void SDIO_SetPowerState(uint32_t SDIO_PowerState);
|
||
484 | uint32_t SDIO_GetPowerState(void);
|
||
485 | |||
486 | /* Command path state machine (CPSM) management functions *********************/
|
||
487 | void SDIO_SendCommand(SDIO_CmdInitTypeDef *SDIO_CmdInitStruct);
|
||
488 | void SDIO_CmdStructInit(SDIO_CmdInitTypeDef* SDIO_CmdInitStruct);
|
||
489 | uint8_t SDIO_GetCommandResponse(void);
|
||
490 | uint32_t SDIO_GetResponse(uint32_t SDIO_RESP); |
||
491 | |||
492 | /* Data path state machine (DPSM) management functions ************************/
|
||
493 | void SDIO_DataConfig(SDIO_DataInitTypeDef* SDIO_DataInitStruct);
|
||
494 | void SDIO_DataStructInit(SDIO_DataInitTypeDef* SDIO_DataInitStruct);
|
||
495 | uint32_t SDIO_GetDataCounter(void);
|
||
496 | uint32_t SDIO_ReadData(void);
|
||
497 | void SDIO_WriteData(uint32_t Data);
|
||
498 | uint32_t SDIO_GetFIFOCount(void);
|
||
499 | |||
500 | /* SDIO IO Cards mode management functions ************************************/
|
||
501 | void SDIO_StartSDIOReadWait(FunctionalState NewState);
|
||
502 | void SDIO_StopSDIOReadWait(FunctionalState NewState);
|
||
503 | void SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode);
|
||
504 | void SDIO_SetSDIOOperation(FunctionalState NewState);
|
||
505 | void SDIO_SendSDIOSuspendCmd(FunctionalState NewState);
|
||
506 | |||
507 | /* CE-ATA mode management functions *******************************************/
|
||
508 | void SDIO_CommandCompletionCmd(FunctionalState NewState);
|
||
509 | void SDIO_CEATAITCmd(FunctionalState NewState);
|
||
510 | void SDIO_SendCEATACmd(FunctionalState NewState);
|
||
511 | |||
512 | /* DMA transfers management functions *****************************************/
|
||
513 | void SDIO_DMACmd(FunctionalState NewState);
|
||
514 | |||
515 | /* Interrupts and flags management functions **********************************/
|
||
516 | void SDIO_ITConfig(uint32_t SDIO_IT, FunctionalState NewState);
|
||
517 | FlagStatus SDIO_GetFlagStatus(uint32_t SDIO_FLAG); |
||
518 | void SDIO_ClearFlag(uint32_t SDIO_FLAG);
|
||
519 | ITStatus SDIO_GetITStatus(uint32_t SDIO_IT); |
||
520 | void SDIO_ClearITPendingBit(uint32_t SDIO_IT);
|
||
521 | |||
522 | #ifdef __cplusplus
|
||
523 | } |
||
524 | #endif
|
||
525 | |||
526 | #endif /* __STM32F4xx_SDIO_H */ |
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527 | |||
528 | /**
|
||
529 | * @}
|
||
530 | */
|
||
531 | |||
532 | /**
|
||
533 | * @}
|
||
534 | */
|
||
535 | |||
536 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|