amiro-blt / Target / Demo / ARMCM4_STM32F405_Power_Management_GCC / Boot / lib / stdperiphlib / STM32F4xx_StdPeriph_Driver / src / stm32f4xx_flash.c @ 69661903
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1 | 69661903 | Thomas Schöpping | /**
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2 | ******************************************************************************
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3 | * @file stm32f4xx_flash.c
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4 | * @author MCD Application Team
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5 | * @version V1.1.0
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6 | * @date 11-January-2013
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7 | * @brief This file provides firmware functions to manage the following
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8 | * functionalities of the FLASH peripheral:
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9 | * + FLASH Interface configuration
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10 | * + FLASH Memory Programming
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11 | * + Option Bytes Programming
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12 | * + Interrupts and flags management
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13 | *
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14 | @verbatim
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15 | ===============================================================================
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16 | ##### How to use this driver #####
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17 | ===============================================================================
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18 | [..]
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19 | This driver provides functions to configure and program the FLASH memory
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20 | of all STM32F4xx devices. These functions are split in 4 groups:
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21 |
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22 | (#) FLASH Interface configuration functions: this group includes the
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23 | management of the following features:
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24 | (++) Set the latency
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25 | (++) Enable/Disable the prefetch buffer
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26 | (++) Enable/Disable the Instruction cache and the Data cache
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27 | (++) Reset the Instruction cache and the Data cache
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28 |
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29 | (#) FLASH Memory Programming functions: this group includes all needed
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30 | functions to erase and program the main memory:
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31 | (++) Lock and Unlock the FLASH interface
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32 | (++) Erase function: Erase sector, erase all sectors
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33 | (++) Program functions: byte, half word, word and double word
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34 |
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35 | (#) Option Bytes Programming functions: this group includes all needed
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36 | functions to manage the Option Bytes:
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37 | (++) Set/Reset the write protection
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38 | (++) Set the Read protection Level
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39 | (++) Set the BOR level
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40 | (++) Program the user Option Bytes
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41 | (++) Launch the Option Bytes loader
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42 |
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43 | (#) Interrupts and flags management functions: this group
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44 | includes all needed functions to:
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45 | (++) Enable/Disable the FLASH interrupt sources
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46 | (++) Get flags status
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47 | (++) Clear flags
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48 | (++) Get FLASH operation status
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49 | (++) Wait for last FLASH operation
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50 | @endverbatim
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51 | ******************************************************************************
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52 | * @attention
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53 | *
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54 | * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
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55 | *
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56 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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57 | * You may not use this file except in compliance with the License.
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58 | * You may obtain a copy of the License at:
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59 | *
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60 | * http://www.st.com/software_license_agreement_liberty_v2
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61 | *
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62 | * Unless required by applicable law or agreed to in writing, software
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63 | * distributed under the License is distributed on an "AS IS" BASIS,
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64 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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65 | * See the License for the specific language governing permissions and
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66 | * limitations under the License.
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67 | *
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68 | ******************************************************************************
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69 | */
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70 | |||
71 | /* Includes ------------------------------------------------------------------*/
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72 | #include "stm32f4xx_flash.h" |
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73 | |||
74 | /** @addtogroup STM32F4xx_StdPeriph_Driver
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75 | * @{
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76 | */
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77 | |||
78 | /** @defgroup FLASH
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79 | * @brief FLASH driver modules
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80 | * @{
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81 | */
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82 | |||
83 | /* Private typedef -----------------------------------------------------------*/
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84 | /* Private define ------------------------------------------------------------*/
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85 | #define SECTOR_MASK ((uint32_t)0xFFFFFF07) |
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86 | |||
87 | /* Private macro -------------------------------------------------------------*/
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88 | /* Private variables ---------------------------------------------------------*/
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89 | /* Private function prototypes -----------------------------------------------*/
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90 | /* Private functions ---------------------------------------------------------*/
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91 | |||
92 | /** @defgroup FLASH_Private_Functions
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93 | * @{
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94 | */
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95 | |||
96 | /** @defgroup FLASH_Group1 FLASH Interface configuration functions
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97 | * @brief FLASH Interface configuration functions
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98 | *
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99 | |||
100 | @verbatim
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101 | ===============================================================================
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102 | ##### FLASH Interface configuration functions #####
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103 | ===============================================================================
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104 | [..]
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105 | This group includes the following functions:
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106 | (+) void FLASH_SetLatency(uint32_t FLASH_Latency)
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107 | To correctly read data from FLASH memory, the number of wait states (LATENCY)
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108 | must be correctly programmed according to the frequency of the CPU clock
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109 | (HCLK) and the supply voltage of the device.
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110 | +-------------------------------------------------------------------------------------+
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111 | | Latency | HCLK clock frequency (MHz) |
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112 | | |---------------------------------------------------------------------|
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113 | | | voltage range | voltage range | voltage range | voltage range |
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114 | | | 2.7 V - 3.6 V | 2.4 V - 2.7 V | 2.1 V - 2.4 V | 1.8 V - 2.1 V |
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115 | |---------------|----------------|----------------|-----------------|-----------------|
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116 | |0WS(1CPU cycle)|0 < HCLK <= 30 |0 < HCLK <= 24 |0 < HCLK <= 22 |0 < HCLK <= 20 |
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117 | |---------------|----------------|----------------|-----------------|-----------------|
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118 | |1WS(2CPU cycle)|30 < HCLK <= 60 |24 < HCLK <= 48 |22 < HCLK <= 44 |20 < HCLK <= 40 |
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119 | |---------------|----------------|----------------|-----------------|-----------------|
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120 | |2WS(3CPU cycle)|60 < HCLK <= 90 |48 < HCLK <= 72 |44 < HCLK <= 66 |40 < HCLK <= 60 |
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121 | |---------------|----------------|----------------|-----------------|-----------------|
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122 | |3WS(4CPU cycle)|90 < HCLK <= 120|72 < HCLK <= 96 |66 < HCLK <= 88 |60 < HCLK <= 80 |
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123 | |---------------|----------------|----------------|-----------------|-----------------|
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124 | |4WS(5CPU cycle)|120< HCLK <= 150|96 < HCLK <= 120|88 < HCLK <= 110 |80 < HCLK <= 100 |
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125 | |---------------|----------------|----------------|-----------------|-----------------|
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126 | |5WS(6CPU cycle)|120< HCLK <= 168|120< HCLK <= 144|110 < HCLK <= 132|100 < HCLK <= 120|
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127 | |---------------|----------------|----------------|-----------------|-----------------|
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128 | |6WS(7CPU cycle)| NA |144< HCLK <= 168|132 < HCLK <= 154|120 < HCLK <= 140|
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129 | |---------------|----------------|----------------|-----------------|-----------------|
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130 | |7WS(8CPU cycle)| NA | NA |154 < HCLK <= 168|140 < HCLK <= 160|
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131 | +-------------------------------------------------------------------------------------+
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132 |
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133 | [..]
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134 | +-------------------------------------------------------------------------------------------------------------------+
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135 | | | voltage range | voltage range | voltage range | voltage range | voltage range 2.7 V - 3.6 V |
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136 | | | 2.7 V - 3.6 V | 2.4 V - 2.7 V | 2.1 V - 2.4 V | 1.8 V - 2.1 V | with External Vpp = 9V |
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137 | |---------------|----------------|----------------|-----------------|-----------------|-----------------------------|
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138 | |Max Parallelism| x32 | x16 | x8 | x64 |
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139 | |---------------|----------------|----------------|-----------------|-----------------|-----------------------------|
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140 | |PSIZE[1:0] | 10 | 01 | 00 | 11 |
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141 | +-------------------------------------------------------------------------------------------------------------------+
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142 | -@- When VOS bit (in PWR_CR register) is reset to 0 , the maximum value of HCLK is 144 MHz.
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143 | You can use PWR_MainRegulatorModeConfig() function to set or reset this bit.
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144 | -@- On STM32F40xx/41xx devices:
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145 | (++) when VOS = '0', the maximum value of fHCLK = 144MHz.
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146 | (++) when VOS = '1', the maximum value of fHCLK = 168MHz.
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147 | [..]
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148 | On STM32F427x/437x devices:
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149 | (++) when VOS[1:0] = '0x01', the maximum value of fHCLK is 120MHz.
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150 | (++) when VOS[1:0] = '0x10', the maximum value of fHCLK is 144MHz.
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151 | (++) when VOS[1:0] = '0x11', the maximum value of f is 168MHz
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152 | You can use PWR_MainRegulatorModeConfig() function to control VOS bits.
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153 |
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154 | (+) void FLASH_PrefetchBufferCmd(FunctionalState NewState)
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155 | (+) void FLASH_InstructionCacheCmd(FunctionalState NewState)
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156 | (+) void FLASH_DataCacheCmd(FunctionalState NewState)
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157 | (+) void FLASH_InstructionCacheReset(void)
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158 | (+) void FLASH_DataCacheReset(void)
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159 |
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160 | [..]
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161 | The unlock sequence is not needed for these functions.
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162 |
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163 | @endverbatim
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164 | * @{
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165 | */
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166 | |||
167 | /**
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168 | * @brief Sets the code latency value.
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169 | * @param FLASH_Latency: specifies the FLASH Latency value.
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170 | * This parameter can be one of the following values:
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171 | * @arg FLASH_Latency_0: FLASH Zero Latency cycle
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172 | * @arg FLASH_Latency_1: FLASH One Latency cycle
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173 | * @arg FLASH_Latency_2: FLASH Two Latency cycles
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174 | * @arg FLASH_Latency_3: FLASH Three Latency cycles
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175 | * @arg FLASH_Latency_4: FLASH Four Latency cycles
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176 | * @arg FLASH_Latency_5: FLASH Five Latency cycles
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177 | * @arg FLASH_Latency_6: FLASH Six Latency cycles
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178 | * @arg FLASH_Latency_7: FLASH Seven Latency cycles
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179 | * For STM32F40xx/41xx and STM32F427x/437x devices this parameter can be
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180 | * a value between FLASH_Latency_0 and FLASH_Latency_7.
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181 | * @retval None
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182 | */
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183 | void FLASH_SetLatency(uint32_t FLASH_Latency)
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184 | { |
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185 | /* Check the parameters */
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186 | assert_param(IS_FLASH_LATENCY(FLASH_Latency)); |
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187 | |||
188 | /* Perform Byte access to FLASH_ACR[8:0] to set the Latency value */
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189 | *(__IO uint8_t *)ACR_BYTE0_ADDRESS = (uint8_t)FLASH_Latency; |
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190 | } |
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191 | |||
192 | /**
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193 | * @brief Enables or disables the Prefetch Buffer.
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194 | * @param NewState: new state of the Prefetch Buffer.
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195 | * This parameter can be: ENABLE or DISABLE.
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196 | * @retval None
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197 | */
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198 | void FLASH_PrefetchBufferCmd(FunctionalState NewState)
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199 | { |
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200 | /* Check the parameters */
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201 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
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202 | |||
203 | /* Enable or disable the Prefetch Buffer */
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204 | if(NewState != DISABLE)
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205 | { |
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206 | FLASH->ACR |= FLASH_ACR_PRFTEN; |
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207 | } |
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208 | else
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209 | { |
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210 | FLASH->ACR &= (~FLASH_ACR_PRFTEN); |
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211 | } |
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212 | } |
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213 | |||
214 | /**
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215 | * @brief Enables or disables the Instruction Cache feature.
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216 | * @param NewState: new state of the Instruction Cache.
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217 | * This parameter can be: ENABLE or DISABLE.
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218 | * @retval None
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219 | */
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220 | void FLASH_InstructionCacheCmd(FunctionalState NewState)
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221 | { |
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222 | /* Check the parameters */
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223 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
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224 | |||
225 | if(NewState != DISABLE)
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226 | { |
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227 | FLASH->ACR |= FLASH_ACR_ICEN; |
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228 | } |
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229 | else
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230 | { |
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231 | FLASH->ACR &= (~FLASH_ACR_ICEN); |
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232 | } |
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233 | } |
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234 | |||
235 | /**
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236 | * @brief Enables or disables the Data Cache feature.
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237 | * @param NewState: new state of the Data Cache.
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238 | * This parameter can be: ENABLE or DISABLE.
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239 | * @retval None
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240 | */
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241 | void FLASH_DataCacheCmd(FunctionalState NewState)
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242 | { |
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243 | /* Check the parameters */
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244 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
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245 | |||
246 | if(NewState != DISABLE)
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247 | { |
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248 | FLASH->ACR |= FLASH_ACR_DCEN; |
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249 | } |
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250 | else
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251 | { |
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252 | FLASH->ACR &= (~FLASH_ACR_DCEN); |
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253 | } |
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254 | } |
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255 | |||
256 | /**
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257 | * @brief Resets the Instruction Cache.
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258 | * @note This function must be used only when the Instruction Cache is disabled.
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259 | * @param None
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260 | * @retval None
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261 | */
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262 | void FLASH_InstructionCacheReset(void) |
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263 | { |
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264 | FLASH->ACR |= FLASH_ACR_ICRST; |
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265 | } |
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266 | |||
267 | /**
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268 | * @brief Resets the Data Cache.
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269 | * @note This function must be used only when the Data Cache is disabled.
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270 | * @param None
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271 | * @retval None
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272 | */
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273 | void FLASH_DataCacheReset(void) |
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274 | { |
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275 | FLASH->ACR |= FLASH_ACR_DCRST; |
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276 | } |
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277 | |||
278 | /**
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279 | * @}
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280 | */
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281 | |||
282 | /** @defgroup FLASH_Group2 FLASH Memory Programming functions
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283 | * @brief FLASH Memory Programming functions
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284 | *
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285 | @verbatim
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286 | ===============================================================================
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287 | ##### FLASH Memory Programming functions #####
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288 | ===============================================================================
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289 | [..]
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290 | This group includes the following functions:
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291 | (+) void FLASH_Unlock(void)
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292 | (+) void FLASH_Lock(void)
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293 | (+) FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange)
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294 | (+) FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange)
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295 | (+) FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data)
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296 | (+) FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data)
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297 | (+) FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data)
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298 | (+) FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data)
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299 | [..]
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300 | Any operation of erase or program should follow these steps:
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301 | (#) Call the FLASH_Unlock() function to enable the FLASH control register access
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302 | |||
303 | (#) Call the desired function to erase sector(s) or program data
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304 | |||
305 | (#) Call the FLASH_Lock() function to disable the FLASH control register access
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306 | (recommended to protect the FLASH memory against possible unwanted operation)
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307 |
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308 | @endverbatim
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309 | * @{
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310 | */
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311 | |||
312 | /**
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313 | * @brief Unlocks the FLASH control register access
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314 | * @param None
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315 | * @retval None
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316 | */
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317 | void FLASH_Unlock(void) |
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318 | { |
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319 | if((FLASH->CR & FLASH_CR_LOCK) != RESET)
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320 | { |
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321 | /* Authorize the FLASH Registers access */
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322 | FLASH->KEYR = FLASH_KEY1; |
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323 | FLASH->KEYR = FLASH_KEY2; |
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324 | } |
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325 | } |
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326 | |||
327 | /**
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328 | * @brief Locks the FLASH control register access
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329 | * @param None
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330 | * @retval None
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331 | */
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332 | void FLASH_Lock(void) |
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333 | { |
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334 | /* Set the LOCK Bit to lock the FLASH Registers access */
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335 | FLASH->CR |= FLASH_CR_LOCK; |
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336 | } |
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337 | |||
338 | /**
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339 | * @brief Erases a specified FLASH Sector.
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340 | *
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341 | * @note If an erase and a program operations are requested simustaneously,
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342 | * the erase operation is performed before the program one.
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343 | *
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344 | * @param FLASH_Sector: The Sector number to be erased.
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345 | * For STM32F40xx/41xx devices this parameter can be a value between
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346 | * FLASH_Sector_0 and FLASH_Sector_11.
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347 | * For STM32F427x/437x devices this parameter can be a value between
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348 | * FLASH_Sector_0 and FLASH_Sector_23.
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349 | *
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350 | * @param VoltageRange: The device voltage range which defines the erase parallelism.
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351 | * This parameter can be one of the following values:
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352 | * @arg VoltageRange_1: when the device voltage range is 1.8V to 2.1V,
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353 | * the operation will be done by byte (8-bit)
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354 | * @arg VoltageRange_2: when the device voltage range is 2.1V to 2.7V,
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355 | * the operation will be done by half word (16-bit)
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356 | * @arg VoltageRange_3: when the device voltage range is 2.7V to 3.6V,
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357 | * the operation will be done by word (32-bit)
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358 | * @arg VoltageRange_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
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359 | * the operation will be done by double word (64-bit)
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360 | *
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361 | * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PROGRAM,
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362 | * FLASH_ERROR_WRP, FLASH_ERROR_OPERATION or FLASH_COMPLETE.
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363 | */
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364 | FLASH_Status FLASH_EraseSector(uint32_t FLASH_Sector, uint8_t VoltageRange) |
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365 | { |
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366 | uint32_t tmp_psize = 0x0;
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367 | FLASH_Status status = FLASH_COMPLETE; |
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368 | |||
369 | /* Check the parameters */
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370 | assert_param(IS_FLASH_SECTOR(FLASH_Sector)); |
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371 | assert_param(IS_VOLTAGERANGE(VoltageRange)); |
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372 | |||
373 | if(VoltageRange == VoltageRange_1)
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374 | { |
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375 | tmp_psize = FLASH_PSIZE_BYTE; |
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376 | } |
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377 | else if(VoltageRange == VoltageRange_2) |
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378 | { |
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379 | tmp_psize = FLASH_PSIZE_HALF_WORD; |
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380 | } |
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381 | else if(VoltageRange == VoltageRange_3) |
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382 | { |
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383 | tmp_psize = FLASH_PSIZE_WORD; |
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384 | } |
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385 | else
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386 | { |
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387 | tmp_psize = FLASH_PSIZE_DOUBLE_WORD; |
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388 | } |
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389 | /* Wait for last operation to be completed */
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390 | status = FLASH_WaitForLastOperation(); |
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391 | |||
392 | if(status == FLASH_COMPLETE)
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393 | { |
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394 | /* if the previous operation is completed, proceed to erase the sector */
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395 | FLASH->CR &= CR_PSIZE_MASK; |
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396 | FLASH->CR |= tmp_psize; |
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397 | FLASH->CR &= SECTOR_MASK; |
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398 | FLASH->CR |= FLASH_CR_SER | FLASH_Sector; |
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399 | FLASH->CR |= FLASH_CR_STRT; |
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400 | |||
401 | /* Wait for last operation to be completed */
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402 | status = FLASH_WaitForLastOperation(); |
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403 | |||
404 | /* if the erase operation is completed, disable the SER Bit */
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405 | FLASH->CR &= (~FLASH_CR_SER); |
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406 | FLASH->CR &= SECTOR_MASK; |
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407 | } |
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408 | /* Return the Erase Status */
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409 | return status;
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410 | } |
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411 | |||
412 | /**
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413 | * @brief Erases all FLASH Sectors.
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414 | *
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415 | * @note If an erase and a program operations are requested simustaneously,
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416 | * the erase operation is performed before the program one.
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417 | *
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418 | * @param VoltageRange: The device voltage range which defines the erase parallelism.
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419 | * This parameter can be one of the following values:
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420 | * @arg VoltageRange_1: when the device voltage range is 1.8V to 2.1V,
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421 | * the operation will be done by byte (8-bit)
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422 | * @arg VoltageRange_2: when the device voltage range is 2.1V to 2.7V,
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423 | * the operation will be done by half word (16-bit)
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424 | * @arg VoltageRange_3: when the device voltage range is 2.7V to 3.6V,
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425 | * the operation will be done by word (32-bit)
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426 | * @arg VoltageRange_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
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427 | * the operation will be done by double word (64-bit)
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428 | *
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429 | * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PROGRAM,
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430 | * FLASH_ERROR_WRP, FLASH_ERROR_OPERATION or FLASH_COMPLETE.
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431 | */
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432 | FLASH_Status FLASH_EraseAllSectors(uint8_t VoltageRange) |
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433 | { |
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434 | #if defined (STM32F427X) || (STM32F40XX)
|
||
435 | uint32_t tmp_psize = 0x0;
|
||
436 | #endif
|
||
437 | FLASH_Status status = FLASH_COMPLETE; |
||
438 | |||
439 | /* Wait for last operation to be completed */
|
||
440 | status = FLASH_WaitForLastOperation(); |
||
441 | assert_param(IS_VOLTAGERANGE(VoltageRange)); |
||
442 | |||
443 | #if defined (STM32F427X) || (STM32F40XX)
|
||
444 | if(VoltageRange == VoltageRange_1)
|
||
445 | { |
||
446 | tmp_psize = FLASH_PSIZE_BYTE; |
||
447 | } |
||
448 | else if(VoltageRange == VoltageRange_2) |
||
449 | { |
||
450 | tmp_psize = FLASH_PSIZE_HALF_WORD; |
||
451 | } |
||
452 | else if(VoltageRange == VoltageRange_3) |
||
453 | { |
||
454 | tmp_psize = FLASH_PSIZE_WORD; |
||
455 | } |
||
456 | else
|
||
457 | { |
||
458 | tmp_psize = FLASH_PSIZE_DOUBLE_WORD; |
||
459 | } |
||
460 | #endif
|
||
461 | if(status == FLASH_COMPLETE)
|
||
462 | { |
||
463 | /* if the previous operation is completed, proceed to erase all sectors */
|
||
464 | #if defined (STM32F427X)
|
||
465 | FLASH->CR &= CR_PSIZE_MASK; |
||
466 | FLASH->CR |= tmp_psize; |
||
467 | FLASH->CR |= (FLASH_CR_MER1 | FLASH_CR_MER2); |
||
468 | FLASH->CR |= FLASH_CR_STRT; |
||
469 | |||
470 | /* Wait for last operation to be completed */
|
||
471 | status = FLASH_WaitForLastOperation(); |
||
472 | |||
473 | /* if the erase operation is completed, disable the MER Bit */
|
||
474 | FLASH->CR &= ~(FLASH_CR_MER1 | FLASH_CR_MER2); |
||
475 | #endif /* STM32F427X */ |
||
476 | |||
477 | #ifdef STM32F40XX
|
||
478 | FLASH->CR &= CR_PSIZE_MASK; |
||
479 | FLASH->CR |= tmp_psize; |
||
480 | FLASH->CR |= FLASH_CR_MER; |
||
481 | FLASH->CR |= FLASH_CR_STRT; |
||
482 | |||
483 | /* Wait for last operation to be completed */
|
||
484 | status = FLASH_WaitForLastOperation(); |
||
485 | |||
486 | /* if the erase operation is completed, disable the MER Bit */
|
||
487 | FLASH->CR &= (~FLASH_CR_MER); |
||
488 | #endif /* STM32F40XX */ |
||
489 | |||
490 | } |
||
491 | /* Return the Erase Status */
|
||
492 | return status;
|
||
493 | } |
||
494 | |||
495 | /**
|
||
496 | * @brief Programs a double word (64-bit) at a specified address.
|
||
497 | * @note This function must be used when the device voltage range is from
|
||
498 | * 2.7V to 3.6V and an External Vpp is present.
|
||
499 | *
|
||
500 | * @note If an erase and a program operations are requested simustaneously,
|
||
501 | * the erase operation is performed before the program one.
|
||
502 | *
|
||
503 | * @param Address: specifies the address to be programmed.
|
||
504 | * @param Data: specifies the data to be programmed.
|
||
505 | * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PROGRAM,
|
||
506 | * FLASH_ERROR_WRP, FLASH_ERROR_OPERATION or FLASH_COMPLETE.
|
||
507 | */
|
||
508 | FLASH_Status FLASH_ProgramDoubleWord(uint32_t Address, uint64_t Data) |
||
509 | { |
||
510 | FLASH_Status status = FLASH_COMPLETE; |
||
511 | |||
512 | /* Check the parameters */
|
||
513 | assert_param(IS_FLASH_ADDRESS(Address)); |
||
514 | |||
515 | /* Wait for last operation to be completed */
|
||
516 | status = FLASH_WaitForLastOperation(); |
||
517 | |||
518 | if(status == FLASH_COMPLETE)
|
||
519 | { |
||
520 | /* if the previous operation is completed, proceed to program the new data */
|
||
521 | FLASH->CR &= CR_PSIZE_MASK; |
||
522 | FLASH->CR |= FLASH_PSIZE_DOUBLE_WORD; |
||
523 | FLASH->CR |= FLASH_CR_PG; |
||
524 | |||
525 | *(__IO uint64_t*)Address = Data; |
||
526 | |||
527 | /* Wait for last operation to be completed */
|
||
528 | status = FLASH_WaitForLastOperation(); |
||
529 | |||
530 | /* if the program operation is completed, disable the PG Bit */
|
||
531 | FLASH->CR &= (~FLASH_CR_PG); |
||
532 | } |
||
533 | /* Return the Program Status */
|
||
534 | return status;
|
||
535 | } |
||
536 | |||
537 | /**
|
||
538 | * @brief Programs a word (32-bit) at a specified address.
|
||
539 | *
|
||
540 | * @note This function must be used when the device voltage range is from 2.7V to 3.6V.
|
||
541 | *
|
||
542 | * @note If an erase and a program operations are requested simustaneously,
|
||
543 | * the erase operation is performed before the program one.
|
||
544 | *
|
||
545 | * @param Address: specifies the address to be programmed.
|
||
546 | * This parameter can be any address in Program memory zone or in OTP zone.
|
||
547 | * @param Data: specifies the data to be programmed.
|
||
548 | * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PROGRAM,
|
||
549 | * FLASH_ERROR_WRP, FLASH_ERROR_OPERATION or FLASH_COMPLETE.
|
||
550 | */
|
||
551 | FLASH_Status FLASH_ProgramWord(uint32_t Address, uint32_t Data) |
||
552 | { |
||
553 | FLASH_Status status = FLASH_COMPLETE; |
||
554 | |||
555 | /* Check the parameters */
|
||
556 | assert_param(IS_FLASH_ADDRESS(Address)); |
||
557 | |||
558 | /* Wait for last operation to be completed */
|
||
559 | status = FLASH_WaitForLastOperation(); |
||
560 | |||
561 | if(status == FLASH_COMPLETE)
|
||
562 | { |
||
563 | /* if the previous operation is completed, proceed to program the new data */
|
||
564 | FLASH->CR &= CR_PSIZE_MASK; |
||
565 | FLASH->CR |= FLASH_PSIZE_WORD; |
||
566 | FLASH->CR |= FLASH_CR_PG; |
||
567 | |||
568 | *(__IO uint32_t*)Address = Data; |
||
569 | |||
570 | /* Wait for last operation to be completed */
|
||
571 | status = FLASH_WaitForLastOperation(); |
||
572 | |||
573 | /* if the program operation is completed, disable the PG Bit */
|
||
574 | FLASH->CR &= (~FLASH_CR_PG); |
||
575 | } |
||
576 | /* Return the Program Status */
|
||
577 | return status;
|
||
578 | } |
||
579 | |||
580 | /**
|
||
581 | * @brief Programs a half word (16-bit) at a specified address.
|
||
582 | * @note This function must be used when the device voltage range is from 2.1V to 3.6V.
|
||
583 | *
|
||
584 | * @note If an erase and a program operations are requested simustaneously,
|
||
585 | * the erase operation is performed before the program one.
|
||
586 | *
|
||
587 | * @param Address: specifies the address to be programmed.
|
||
588 | * This parameter can be any address in Program memory zone or in OTP zone.
|
||
589 | * @param Data: specifies the data to be programmed.
|
||
590 | * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PROGRAM,
|
||
591 | * FLASH_ERROR_WRP, FLASH_ERROR_OPERATION or FLASH_COMPLETE.
|
||
592 | */
|
||
593 | FLASH_Status FLASH_ProgramHalfWord(uint32_t Address, uint16_t Data) |
||
594 | { |
||
595 | FLASH_Status status = FLASH_COMPLETE; |
||
596 | |||
597 | /* Check the parameters */
|
||
598 | assert_param(IS_FLASH_ADDRESS(Address)); |
||
599 | |||
600 | /* Wait for last operation to be completed */
|
||
601 | status = FLASH_WaitForLastOperation(); |
||
602 | |||
603 | if(status == FLASH_COMPLETE)
|
||
604 | { |
||
605 | /* if the previous operation is completed, proceed to program the new data */
|
||
606 | FLASH->CR &= CR_PSIZE_MASK; |
||
607 | FLASH->CR |= FLASH_PSIZE_HALF_WORD; |
||
608 | FLASH->CR |= FLASH_CR_PG; |
||
609 | |||
610 | *(__IO uint16_t*)Address = Data; |
||
611 | |||
612 | /* Wait for last operation to be completed */
|
||
613 | status = FLASH_WaitForLastOperation(); |
||
614 | |||
615 | /* if the program operation is completed, disable the PG Bit */
|
||
616 | FLASH->CR &= (~FLASH_CR_PG); |
||
617 | } |
||
618 | /* Return the Program Status */
|
||
619 | return status;
|
||
620 | } |
||
621 | |||
622 | /**
|
||
623 | * @brief Programs a byte (8-bit) at a specified address.
|
||
624 | * @note This function can be used within all the device supply voltage ranges.
|
||
625 | *
|
||
626 | * @note If an erase and a program operations are requested simustaneously,
|
||
627 | * the erase operation is performed before the program one.
|
||
628 | *
|
||
629 | * @param Address: specifies the address to be programmed.
|
||
630 | * This parameter can be any address in Program memory zone or in OTP zone.
|
||
631 | * @param Data: specifies the data to be programmed.
|
||
632 | * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PROGRAM,
|
||
633 | * FLASH_ERROR_WRP, FLASH_ERROR_OPERATION or FLASH_COMPLETE.
|
||
634 | */
|
||
635 | FLASH_Status FLASH_ProgramByte(uint32_t Address, uint8_t Data) |
||
636 | { |
||
637 | FLASH_Status status = FLASH_COMPLETE; |
||
638 | |||
639 | /* Check the parameters */
|
||
640 | assert_param(IS_FLASH_ADDRESS(Address)); |
||
641 | |||
642 | /* Wait for last operation to be completed */
|
||
643 | status = FLASH_WaitForLastOperation(); |
||
644 | |||
645 | if(status == FLASH_COMPLETE)
|
||
646 | { |
||
647 | /* if the previous operation is completed, proceed to program the new data */
|
||
648 | FLASH->CR &= CR_PSIZE_MASK; |
||
649 | FLASH->CR |= FLASH_PSIZE_BYTE; |
||
650 | FLASH->CR |= FLASH_CR_PG; |
||
651 | |||
652 | *(__IO uint8_t*)Address = Data; |
||
653 | |||
654 | /* Wait for last operation to be completed */
|
||
655 | status = FLASH_WaitForLastOperation(); |
||
656 | |||
657 | /* if the program operation is completed, disable the PG Bit */
|
||
658 | FLASH->CR &= (~FLASH_CR_PG); |
||
659 | } |
||
660 | |||
661 | /* Return the Program Status */
|
||
662 | return status;
|
||
663 | } |
||
664 | |||
665 | /**
|
||
666 | * @}
|
||
667 | */
|
||
668 | |||
669 | /** @defgroup FLASH_Group3 Option Bytes Programming functions
|
||
670 | * @brief Option Bytes Programming functions
|
||
671 | *
|
||
672 | @verbatim
|
||
673 | ===============================================================================
|
||
674 | ##### Option Bytes Programming functions #####
|
||
675 | ===============================================================================
|
||
676 | [..]
|
||
677 | This group includes the following functions:
|
||
678 | (+) void FLASH_OB_Unlock(void)
|
||
679 | (+) void FLASH_OB_Lock(void)
|
||
680 | (+) void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState)
|
||
681 | (+) void FLASH_OB_WRP1Config(uint32_t OB_WRP, FunctionalState NewState)
|
||
682 | (+) void FLASH_OB_RDPConfig(uint8_t OB_RDP)
|
||
683 | (+) void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY)
|
||
684 | (+) void FLASH_OB_BORConfig(uint8_t OB_BOR)
|
||
685 | (+) FLASH_Status FLASH_ProgramOTP(uint32_t Address, uint32_t Data)
|
||
686 | (+) FLASH_Status FLASH_OB_Launch(void)
|
||
687 | (+) uint32_t FLASH_OB_GetUser(void)
|
||
688 | (+) uint8_t FLASH_OB_GetWRP(void)
|
||
689 | (+) uint8_t FLASH_OB_GetWRP1(void)
|
||
690 | (+) uint8_t FLASH_OB_GetRDP(void)
|
||
691 | (+) uint8_t FLASH_OB_GetBOR(void)
|
||
692 | [..]
|
||
693 | Any operation of erase or program should follow these steps:
|
||
694 | (#) Call the FLASH_OB_Unlock() function to enable the FLASH option control
|
||
695 | register access
|
||
696 | |||
697 | (#) Call one or several functions to program the desired Option Bytes:
|
||
698 | (++) void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState)
|
||
699 | => to Enable/Disable the desired sector write protection
|
||
700 | (++) void FLASH_OB_RDPConfig(uint8_t OB_RDP) => to set the desired read
|
||
701 | Protection Level
|
||
702 | (++) void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY)
|
||
703 | => to configure the user Option Bytes.
|
||
704 | (++) void FLASH_OB_BORConfig(uint8_t OB_BOR) => to set the BOR Level
|
||
705 | |||
706 | (#) Once all needed Option Bytes to be programmed are correctly written,
|
||
707 | call the FLASH_OB_Launch() function to launch the Option Bytes
|
||
708 | programming process.
|
||
709 |
|
||
710 | -@- When changing the IWDG mode from HW to SW or from SW to HW, a system
|
||
711 | reset is needed to make the change effective.
|
||
712 | |||
713 | (#) Call the FLASH_OB_Lock() function to disable the FLASH option control
|
||
714 | register access (recommended to protect the Option Bytes against
|
||
715 | possible unwanted operations)
|
||
716 |
|
||
717 | @endverbatim
|
||
718 | * @{
|
||
719 | */
|
||
720 | |||
721 | /**
|
||
722 | * @brief Unlocks the FLASH Option Control Registers access.
|
||
723 | * @param None
|
||
724 | * @retval None
|
||
725 | */
|
||
726 | void FLASH_OB_Unlock(void) |
||
727 | { |
||
728 | if((FLASH->OPTCR & FLASH_OPTCR_OPTLOCK) != RESET)
|
||
729 | { |
||
730 | /* Authorizes the Option Byte register programming */
|
||
731 | FLASH->OPTKEYR = FLASH_OPT_KEY1; |
||
732 | FLASH->OPTKEYR = FLASH_OPT_KEY2; |
||
733 | } |
||
734 | } |
||
735 | |||
736 | /**
|
||
737 | * @brief Locks the FLASH Option Control Registers access.
|
||
738 | * @param None
|
||
739 | * @retval None
|
||
740 | */
|
||
741 | void FLASH_OB_Lock(void) |
||
742 | { |
||
743 | /* Set the OPTLOCK Bit to lock the FLASH Option Byte Registers access */
|
||
744 | FLASH->OPTCR |= FLASH_OPTCR_OPTLOCK; |
||
745 | } |
||
746 | |||
747 | /**
|
||
748 | * @brief Enables or disables the write protection of the desired sectors
|
||
749 | *
|
||
750 | * @note When the memory read protection level is selected (RDP level = 1),
|
||
751 | * it is not possible to program or erase the flash sector i if CortexM4
|
||
752 | * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
|
||
753 | * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
|
||
754 | *
|
||
755 | * @param OB_WRP: specifies the sector(s) to be write protected or unprotected.
|
||
756 | * This parameter can be one of the following values:
|
||
757 | * @arg OB_WRP: A value between OB_WRP_Sector0 and OB_WRP_Sector11
|
||
758 | * @arg OB_WRP_Sector_All
|
||
759 | * @param Newstate: new state of the Write Protection.
|
||
760 | * This parameter can be: ENABLE or DISABLE.
|
||
761 | * @retval None
|
||
762 | */
|
||
763 | void FLASH_OB_WRPConfig(uint32_t OB_WRP, FunctionalState NewState)
|
||
764 | { |
||
765 | FLASH_Status status = FLASH_COMPLETE; |
||
766 | |||
767 | /* Check the parameters */
|
||
768 | assert_param(IS_OB_WRP(OB_WRP)); |
||
769 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
||
770 | |||
771 | status = FLASH_WaitForLastOperation(); |
||
772 | |||
773 | if(status == FLASH_COMPLETE)
|
||
774 | { |
||
775 | if(NewState != DISABLE)
|
||
776 | { |
||
777 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~OB_WRP); |
||
778 | } |
||
779 | else
|
||
780 | { |
||
781 | *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)OB_WRP; |
||
782 | } |
||
783 | } |
||
784 | } |
||
785 | |||
786 | /**
|
||
787 | * @brief Enables or disables the write protection of the desired sectors
|
||
788 | * @note This function can be used only for STM32F427x/437x devices.
|
||
789 | * @note When the memory read out protection is selected (RDP level = 1),
|
||
790 | * it is not possible to program or erase the flash sector i if CortexM4
|
||
791 | * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
|
||
792 | * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
|
||
793 | *
|
||
794 | * @param OB_WRP: specifies the sector(s) to be write protected or unprotected.
|
||
795 | * This parameter can be one of the following values:
|
||
796 | * @arg OB_WRP: A value between OB_WRP_Sector12 and OB_WRP_Sector23
|
||
797 | * @arg OB_WRP_Sector_All
|
||
798 | * @param Newstate: new state of the Write Protection.
|
||
799 | * This parameter can be: ENABLE or DISABLE.
|
||
800 | * @retval None
|
||
801 | */
|
||
802 | void FLASH_OB_WRP1Config(uint32_t OB_WRP, FunctionalState NewState)
|
||
803 | { |
||
804 | FLASH_Status status = FLASH_COMPLETE; |
||
805 | |||
806 | /* Check the parameters */
|
||
807 | assert_param(IS_OB_WRP(OB_WRP)); |
||
808 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
||
809 | |||
810 | status = FLASH_WaitForLastOperation(); |
||
811 | |||
812 | if(status == FLASH_COMPLETE)
|
||
813 | { |
||
814 | if(NewState != DISABLE)
|
||
815 | { |
||
816 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~OB_WRP); |
||
817 | } |
||
818 | else
|
||
819 | { |
||
820 | *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)OB_WRP; |
||
821 | } |
||
822 | } |
||
823 | } |
||
824 | |||
825 | /**
|
||
826 | * @brief Sets the read protection level.
|
||
827 | * @param OB_RDP: specifies the read protection level.
|
||
828 | * This parameter can be one of the following values:
|
||
829 | * @arg OB_RDP_Level_0: No protection
|
||
830 | * @arg OB_RDP_Level_1: Read protection of the memory
|
||
831 | * @arg OB_RDP_Level_2: Full chip protection
|
||
832 | *
|
||
833 | * !!!Warning!!! When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
|
||
834 | *
|
||
835 | * @retval None
|
||
836 | */
|
||
837 | void FLASH_OB_RDPConfig(uint8_t OB_RDP)
|
||
838 | { |
||
839 | FLASH_Status status = FLASH_COMPLETE; |
||
840 | |||
841 | /* Check the parameters */
|
||
842 | assert_param(IS_OB_RDP(OB_RDP)); |
||
843 | |||
844 | status = FLASH_WaitForLastOperation(); |
||
845 | |||
846 | if(status == FLASH_COMPLETE)
|
||
847 | { |
||
848 | *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = OB_RDP; |
||
849 | |||
850 | } |
||
851 | } |
||
852 | |||
853 | /**
|
||
854 | * @brief Programs the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
|
||
855 | * @param OB_IWDG: Selects the IWDG mode
|
||
856 | * This parameter can be one of the following values:
|
||
857 | * @arg OB_IWDG_SW: Software IWDG selected
|
||
858 | * @arg OB_IWDG_HW: Hardware IWDG selected
|
||
859 | * @param OB_STOP: Reset event when entering STOP mode.
|
||
860 | * This parameter can be one of the following values:
|
||
861 | * @arg OB_STOP_NoRST: No reset generated when entering in STOP
|
||
862 | * @arg OB_STOP_RST: Reset generated when entering in STOP
|
||
863 | * @param OB_STDBY: Reset event when entering Standby mode.
|
||
864 | * This parameter can be one of the following values:
|
||
865 | * @arg OB_STDBY_NoRST: No reset generated when entering in STANDBY
|
||
866 | * @arg OB_STDBY_RST: Reset generated when entering in STANDBY
|
||
867 | * @retval None
|
||
868 | */
|
||
869 | void FLASH_OB_UserConfig(uint8_t OB_IWDG, uint8_t OB_STOP, uint8_t OB_STDBY)
|
||
870 | { |
||
871 | uint8_t optiontmp = 0xFF;
|
||
872 | FLASH_Status status = FLASH_COMPLETE; |
||
873 | |||
874 | /* Check the parameters */
|
||
875 | assert_param(IS_OB_IWDG_SOURCE(OB_IWDG)); |
||
876 | assert_param(IS_OB_STOP_SOURCE(OB_STOP)); |
||
877 | assert_param(IS_OB_STDBY_SOURCE(OB_STDBY)); |
||
878 | |||
879 | /* Wait for last operation to be completed */
|
||
880 | status = FLASH_WaitForLastOperation(); |
||
881 | |||
882 | if(status == FLASH_COMPLETE)
|
||
883 | { |
||
884 | /* Mask OPTLOCK, OPTSTRT and BOR_LEV bits */
|
||
885 | optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0F);
|
||
886 | |||
887 | /* Update User Option Byte */
|
||
888 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = OB_IWDG | (uint8_t)(OB_STDBY | (uint8_t)(OB_STOP | ((uint8_t)optiontmp))); |
||
889 | } |
||
890 | } |
||
891 | |||
892 | /**
|
||
893 | * @brief Sets the BOR Level.
|
||
894 | * @param OB_BOR: specifies the Option Bytes BOR Reset Level.
|
||
895 | * This parameter can be one of the following values:
|
||
896 | * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
|
||
897 | * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
|
||
898 | * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
|
||
899 | * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
|
||
900 | * @retval None
|
||
901 | */
|
||
902 | void FLASH_OB_BORConfig(uint8_t OB_BOR)
|
||
903 | { |
||
904 | /* Check the parameters */
|
||
905 | assert_param(IS_OB_BOR(OB_BOR)); |
||
906 | |||
907 | /* Set the BOR Level */
|
||
908 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV); |
||
909 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= OB_BOR; |
||
910 | |||
911 | } |
||
912 | |||
913 | /**
|
||
914 | * @brief Launch the option byte loading.
|
||
915 | * @param None
|
||
916 | * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PROGRAM,
|
||
917 | * FLASH_ERROR_WRP, FLASH_ERROR_OPERATION or FLASH_COMPLETE.
|
||
918 | */
|
||
919 | FLASH_Status FLASH_OB_Launch(void)
|
||
920 | { |
||
921 | FLASH_Status status = FLASH_COMPLETE; |
||
922 | |||
923 | /* Set the OPTSTRT bit in OPTCR register */
|
||
924 | *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= FLASH_OPTCR_OPTSTRT; |
||
925 | |||
926 | /* Wait for last operation to be completed */
|
||
927 | status = FLASH_WaitForLastOperation(); |
||
928 | |||
929 | return status;
|
||
930 | } |
||
931 | |||
932 | /**
|
||
933 | * @brief Returns the FLASH User Option Bytes values.
|
||
934 | * @param None
|
||
935 | * @retval The FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1)
|
||
936 | * and RST_STDBY(Bit2).
|
||
937 | */
|
||
938 | uint8_t FLASH_OB_GetUser(void)
|
||
939 | { |
||
940 | /* Return the User Option Byte */
|
||
941 | return (uint8_t)(FLASH->OPTCR >> 5); |
||
942 | } |
||
943 | |||
944 | /**
|
||
945 | * @brief Returns the FLASH Write Protection Option Bytes value.
|
||
946 | * @param None
|
||
947 | * @retval The FLASH Write Protection Option Bytes value
|
||
948 | */
|
||
949 | uint16_t FLASH_OB_GetWRP(void)
|
||
950 | { |
||
951 | /* Return the FLASH write protection Register value */
|
||
952 | return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
|
||
953 | } |
||
954 | |||
955 | /**
|
||
956 | * @brief Returns the FLASH Write Protection Option Bytes value.
|
||
957 | * @note This function can be used only for STM32F427x/437x devices.
|
||
958 | * @param None
|
||
959 | * @retval The FLASH Write Protection Option Bytes value
|
||
960 | */
|
||
961 | uint16_t FLASH_OB_GetWRP1(void)
|
||
962 | { |
||
963 | /* Return the FLASH write protection Register value */
|
||
964 | return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
|
||
965 | } |
||
966 | |||
967 | /**
|
||
968 | * @brief Returns the FLASH Read Protection level.
|
||
969 | * @param None
|
||
970 | * @retval FLASH ReadOut Protection Status:
|
||
971 | * - SET, when OB_RDP_Level_1 or OB_RDP_Level_2 is set
|
||
972 | * - RESET, when OB_RDP_Level_0 is set
|
||
973 | */
|
||
974 | FlagStatus FLASH_OB_GetRDP(void)
|
||
975 | { |
||
976 | FlagStatus readstatus = RESET; |
||
977 | |||
978 | if ((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) != (uint8_t)OB_RDP_Level_0))
|
||
979 | { |
||
980 | readstatus = SET; |
||
981 | } |
||
982 | else
|
||
983 | { |
||
984 | readstatus = RESET; |
||
985 | } |
||
986 | return readstatus;
|
||
987 | } |
||
988 | |||
989 | /**
|
||
990 | * @brief Returns the FLASH BOR level.
|
||
991 | * @param None
|
||
992 | * @retval The FLASH BOR level:
|
||
993 | * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
|
||
994 | * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
|
||
995 | * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
|
||
996 | * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
|
||
997 | */
|
||
998 | uint8_t FLASH_OB_GetBOR(void)
|
||
999 | { |
||
1000 | /* Return the FLASH BOR level */
|
||
1001 | return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C); |
||
1002 | } |
||
1003 | |||
1004 | /**
|
||
1005 | * @}
|
||
1006 | */
|
||
1007 | |||
1008 | /** @defgroup FLASH_Group4 Interrupts and flags management functions
|
||
1009 | * @brief Interrupts and flags management functions
|
||
1010 | *
|
||
1011 | @verbatim
|
||
1012 | ===============================================================================
|
||
1013 | ##### Interrupts and flags management functions #####
|
||
1014 | ===============================================================================
|
||
1015 | @endverbatim
|
||
1016 | * @{
|
||
1017 | */
|
||
1018 | |||
1019 | /**
|
||
1020 | * @brief Enables or disables the specified FLASH interrupts.
|
||
1021 | * @param FLASH_IT: specifies the FLASH interrupt sources to be enabled or disabled.
|
||
1022 | * This parameter can be any combination of the following values:
|
||
1023 | * @arg FLASH_IT_ERR: FLASH Error Interrupt
|
||
1024 | * @arg FLASH_IT_EOP: FLASH end of operation Interrupt
|
||
1025 | * @retval None
|
||
1026 | */
|
||
1027 | void FLASH_ITConfig(uint32_t FLASH_IT, FunctionalState NewState)
|
||
1028 | { |
||
1029 | /* Check the parameters */
|
||
1030 | assert_param(IS_FLASH_IT(FLASH_IT)); |
||
1031 | assert_param(IS_FUNCTIONAL_STATE(NewState)); |
||
1032 | |||
1033 | if(NewState != DISABLE)
|
||
1034 | { |
||
1035 | /* Enable the interrupt sources */
|
||
1036 | FLASH->CR |= FLASH_IT; |
||
1037 | } |
||
1038 | else
|
||
1039 | { |
||
1040 | /* Disable the interrupt sources */
|
||
1041 | FLASH->CR &= ~(uint32_t)FLASH_IT; |
||
1042 | } |
||
1043 | } |
||
1044 | |||
1045 | /**
|
||
1046 | * @brief Checks whether the specified FLASH flag is set or not.
|
||
1047 | * @param FLASH_FLAG: specifies the FLASH flag to check.
|
||
1048 | * This parameter can be one of the following values:
|
||
1049 | * @arg FLASH_FLAG_EOP: FLASH End of Operation flag
|
||
1050 | * @arg FLASH_FLAG_OPERR: FLASH operation Error flag
|
||
1051 | * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag
|
||
1052 | * @arg FLASH_FLAG_PGAERR: FLASH Programming Alignment error flag
|
||
1053 | * @arg FLASH_FLAG_PGPERR: FLASH Programming Parallelism error flag
|
||
1054 | * @arg FLASH_FLAG_PGSERR: FLASH Programming Sequence error flag
|
||
1055 | * @arg FLASH_FLAG_BSY: FLASH Busy flag
|
||
1056 | * @retval The new state of FLASH_FLAG (SET or RESET).
|
||
1057 | */
|
||
1058 | FlagStatus FLASH_GetFlagStatus(uint32_t FLASH_FLAG) |
||
1059 | { |
||
1060 | FlagStatus bitstatus = RESET; |
||
1061 | /* Check the parameters */
|
||
1062 | assert_param(IS_FLASH_GET_FLAG(FLASH_FLAG)); |
||
1063 | |||
1064 | if((FLASH->SR & FLASH_FLAG) != (uint32_t)RESET)
|
||
1065 | { |
||
1066 | bitstatus = SET; |
||
1067 | } |
||
1068 | else
|
||
1069 | { |
||
1070 | bitstatus = RESET; |
||
1071 | } |
||
1072 | /* Return the new state of FLASH_FLAG (SET or RESET) */
|
||
1073 | return bitstatus;
|
||
1074 | } |
||
1075 | |||
1076 | /**
|
||
1077 | * @brief Clears the FLASH's pending flags.
|
||
1078 | * @param FLASH_FLAG: specifies the FLASH flags to clear.
|
||
1079 | * This parameter can be any combination of the following values:
|
||
1080 | * @arg FLASH_FLAG_EOP: FLASH End of Operation flag
|
||
1081 | * @arg FLASH_FLAG_OPERR: FLASH operation Error flag
|
||
1082 | * @arg FLASH_FLAG_WRPERR: FLASH Write protected error flag
|
||
1083 | * @arg FLASH_FLAG_PGAERR: FLASH Programming Alignment error flag
|
||
1084 | * @arg FLASH_FLAG_PGPERR: FLASH Programming Parallelism error flag
|
||
1085 | * @arg FLASH_FLAG_PGSERR: FLASH Programming Sequence error flag
|
||
1086 | * @retval None
|
||
1087 | */
|
||
1088 | void FLASH_ClearFlag(uint32_t FLASH_FLAG)
|
||
1089 | { |
||
1090 | /* Check the parameters */
|
||
1091 | assert_param(IS_FLASH_CLEAR_FLAG(FLASH_FLAG)); |
||
1092 | |||
1093 | /* Clear the flags */
|
||
1094 | FLASH->SR = FLASH_FLAG; |
||
1095 | } |
||
1096 | |||
1097 | /**
|
||
1098 | * @brief Returns the FLASH Status.
|
||
1099 | * @param None
|
||
1100 | * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PROGRAM,
|
||
1101 | * FLASH_ERROR_WRP, FLASH_ERROR_OPERATION or FLASH_COMPLETE.
|
||
1102 | */
|
||
1103 | FLASH_Status FLASH_GetStatus(void)
|
||
1104 | { |
||
1105 | FLASH_Status flashstatus = FLASH_COMPLETE; |
||
1106 | |||
1107 | if((FLASH->SR & FLASH_FLAG_BSY) == FLASH_FLAG_BSY)
|
||
1108 | { |
||
1109 | flashstatus = FLASH_BUSY; |
||
1110 | } |
||
1111 | else
|
||
1112 | { |
||
1113 | if((FLASH->SR & FLASH_FLAG_WRPERR) != (uint32_t)0x00) |
||
1114 | { |
||
1115 | flashstatus = FLASH_ERROR_WRP; |
||
1116 | } |
||
1117 | else
|
||
1118 | { |
||
1119 | if((FLASH->SR & (uint32_t)0xEF) != (uint32_t)0x00) |
||
1120 | { |
||
1121 | flashstatus = FLASH_ERROR_PROGRAM; |
||
1122 | } |
||
1123 | else
|
||
1124 | { |
||
1125 | if((FLASH->SR & FLASH_FLAG_OPERR) != (uint32_t)0x00) |
||
1126 | { |
||
1127 | flashstatus = FLASH_ERROR_OPERATION; |
||
1128 | } |
||
1129 | else
|
||
1130 | { |
||
1131 | flashstatus = FLASH_COMPLETE; |
||
1132 | } |
||
1133 | } |
||
1134 | } |
||
1135 | } |
||
1136 | /* Return the FLASH Status */
|
||
1137 | return flashstatus;
|
||
1138 | } |
||
1139 | |||
1140 | /**
|
||
1141 | * @brief Waits for a FLASH operation to complete.
|
||
1142 | * @param None
|
||
1143 | * @retval FLASH Status: The returned value can be: FLASH_BUSY, FLASH_ERROR_PROGRAM,
|
||
1144 | * FLASH_ERROR_WRP, FLASH_ERROR_OPERATION or FLASH_COMPLETE.
|
||
1145 | */
|
||
1146 | FLASH_Status FLASH_WaitForLastOperation(void)
|
||
1147 | { |
||
1148 | __IO FLASH_Status status = FLASH_COMPLETE; |
||
1149 | |||
1150 | /* Check for the FLASH Status */
|
||
1151 | status = FLASH_GetStatus(); |
||
1152 | |||
1153 | /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
|
||
1154 | Even if the FLASH operation fails, the BUSY flag will be reset and an error
|
||
1155 | flag will be set */
|
||
1156 | while(status == FLASH_BUSY)
|
||
1157 | { |
||
1158 | status = FLASH_GetStatus(); |
||
1159 | } |
||
1160 | /* Return the operation status */
|
||
1161 | return status;
|
||
1162 | } |
||
1163 | |||
1164 | /**
|
||
1165 | * @}
|
||
1166 | */
|
||
1167 | |||
1168 | /**
|
||
1169 | * @}
|
||
1170 | */
|
||
1171 | |||
1172 | /**
|
||
1173 | * @}
|
||
1174 | */
|
||
1175 | |||
1176 | /**
|
||
1177 | * @}
|
||
1178 | */
|
||
1179 | |||
1180 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|