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amiro-blt / Target / Demo / ARMCM4_STM32F405_Power_Management_GCC / Boot / lib / stdperiphlib / STM32F4xx_StdPeriph_Driver / src / stm32f4xx_gpio.c @ 69661903

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1 69661903 Thomas Schöpping
/**
2
  ******************************************************************************
3
  * @file    stm32f4xx_gpio.c
4
  * @author  MCD Application Team
5
  * @version V1.1.0
6
  * @date    11-January-2013
7
  * @brief   This file provides firmware functions to manage the following 
8
  *          functionalities of the GPIO peripheral:           
9
  *           + Initialization and Configuration
10
  *           + GPIO Read and Write
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  *           + GPIO Alternate functions configuration
12
  * 
13
@verbatim  
14
 ===============================================================================
15
                      ##### How to use this driver #####
16
 ===============================================================================       
17
 [..]             
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   (#) Enable the GPIO AHB clock using the following function
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       RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOx, ENABLE);
20
               
21
   (#) Configure the GPIO pin(s) using GPIO_Init()
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       Four possible configuration are available for each pin:
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       (++) Input: Floating, Pull-up, Pull-down.
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       (++) Output: Push-Pull (Pull-up, Pull-down or no Pull)
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            Open Drain (Pull-up, Pull-down or no Pull). In output mode, the speed 
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            is configurable: 2 MHz, 25 MHz, 50 MHz or 100 MHz.
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       (++) Alternate Function: Push-Pull (Pull-up, Pull-down or no Pull) Open 
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            Drain (Pull-up, Pull-down or no Pull).
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       (++) Analog: required mode when a pin is to be used as ADC channel or DAC 
30
            output.
31
   
32
   (#) Peripherals alternate function:
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       (++) For ADC and DAC, configure the desired pin in analog mode using 
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            GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AN;
35
            (+++) For other peripherals (TIM, USART...):
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            (+++) Connect the pin to the desired peripherals' Alternate 
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                     Function (AF) using GPIO_PinAFConfig() function
38
            (+++) Configure the desired pin in alternate function mode using
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                     GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF
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            (+++) Select the type, pull-up/pull-down and output speed via 
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                     GPIO_PuPd, GPIO_OType and GPIO_Speed members
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            (+++) Call GPIO_Init() function
43
          
44
   (#) To get the level of a pin configured in input mode use GPIO_ReadInputDataBit()
45
            
46
   (#) To set/reset the level of a pin configured in output mode use 
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       GPIO_SetBits()/GPIO_ResetBits()
48
                 
49
   (#) During and just after reset, the alternate functions are not 
50
       active and the GPIO pins are configured in input floating mode (except JTAG
51
       pins).
52
  
53
   (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose 
54
       (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has 
55
       priority over the GPIO function.
56
  
57
   (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as 
58
       general purpose PH0 and PH1, respectively, when the HSE oscillator is off. 
59
       The HSE has priority over the GPIO function.
60
               
61
@endverbatim        
62
  *
63
  ******************************************************************************
64
  * @attention
65
  *
66
  * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
67
  *
68
  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
69
  * You may not use this file except in compliance with the License.
70
  * You may obtain a copy of the License at:
71
  *
72
  *        http://www.st.com/software_license_agreement_liberty_v2
73
  *
74
  * Unless required by applicable law or agreed to in writing, software 
75
  * distributed under the License is distributed on an "AS IS" BASIS, 
76
  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
77
  * See the License for the specific language governing permissions and
78
  * limitations under the License.
79
  *
80
  ******************************************************************************
81
  */
82
83
/* Includes ------------------------------------------------------------------*/
84
#include "stm32f4xx_gpio.h"
85
#include "stm32f4xx_rcc.h"
86
87
/** @addtogroup STM32F4xx_StdPeriph_Driver
88
  * @{
89
  */
90
91
/** @defgroup GPIO 
92
  * @brief GPIO driver modules
93
  * @{
94
  */ 
95
96
/* Private typedef -----------------------------------------------------------*/
97
/* Private define ------------------------------------------------------------*/
98
/* Private macro -------------------------------------------------------------*/
99
/* Private variables ---------------------------------------------------------*/
100
/* Private function prototypes -----------------------------------------------*/
101
/* Private functions ---------------------------------------------------------*/
102
103
/** @defgroup GPIO_Private_Functions
104
  * @{
105
  */ 
106
107
/** @defgroup GPIO_Group1 Initialization and Configuration
108
 *  @brief   Initialization and Configuration
109
 *
110
@verbatim   
111
 ===============================================================================
112
                 ##### Initialization and Configuration #####
113
 ===============================================================================  
114

115
@endverbatim
116
  * @{
117
  */
118
119
/**
120
  * @brief  De-initializes the GPIOx peripheral registers to their default reset values.
121
  * @note   By default, The GPIO pins are configured in input floating mode (except JTAG pins).
122
  * @param  GPIOx: where x can be (A..I) to select the GPIO peripheral for 
123
  *                STM32F40xx/41xx and STM32F427x/437x devices. 
124
  * @retval None
125
  */
126
void GPIO_DeInit(GPIO_TypeDef* GPIOx)
127
{
128
  /* Check the parameters */
129
  assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
130
131
  if (GPIOx == GPIOA)
132
  {
133
    RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOA, ENABLE);
134
    RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOA, DISABLE);
135
  }
136
  else if (GPIOx == GPIOB)
137
  {
138
    RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOB, ENABLE);
139
    RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOB, DISABLE);
140
  }
141
  else if (GPIOx == GPIOC)
142
  {
143
    RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOC, ENABLE);
144
    RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOC, DISABLE);
145
  }
146
  else if (GPIOx == GPIOD)
147
  {
148
    RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOD, ENABLE);
149
    RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOD, DISABLE);
150
  }
151
  else if (GPIOx == GPIOE)
152
  {
153
    RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOE, ENABLE);
154
    RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOE, DISABLE);
155
  }
156
  else if (GPIOx == GPIOF)
157
  {
158
    RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOF, ENABLE);
159
    RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOF, DISABLE);
160
  }
161
  else if (GPIOx == GPIOG)
162
  {
163
    RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOG, ENABLE);
164
    RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOG, DISABLE);
165
  }
166
  else if (GPIOx == GPIOH)
167
  {
168
    RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOH, ENABLE);
169
    RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOH, DISABLE);
170
  }
171
  else
172
  {
173
    if (GPIOx == GPIOI)
174
    {
175
      RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOI, ENABLE);
176
      RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_GPIOI, DISABLE);
177
    }
178
  }
179
}
180
181
/**
182
  * @brief  Initializes the GPIOx peripheral according to the specified parameters in the GPIO_InitStruct.
183
  * @param  GPIOx: where x can be (A..I) to select the GPIO peripheral for 
184
  *                STM32F40xx/41xx and STM32F427x/437x devices. 
185
  * @param  GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that contains
186
  *         the configuration information for the specified GPIO peripheral.
187
  * @retval None
188
  */
189
void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
190
{
191
  uint32_t pinpos = 0x00, pos = 0x00 , currentpin = 0x00;
192
193
  /* Check the parameters */
194
  assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
195
  assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));
196
  assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
197
  assert_param(IS_GPIO_PUPD(GPIO_InitStruct->GPIO_PuPd));
198
199
  /* ------------------------- Configure the port pins ---------------- */
200
  /*-- GPIO Mode Configuration --*/
201
  for (pinpos = 0x00; pinpos < 0x10; pinpos++)
202
  {
203
    pos = ((uint32_t)0x01) << pinpos;
204
    /* Get the port pins position */
205
    currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
206
207
    if (currentpin == pos)
208
    {
209
      GPIOx->MODER  &= ~(GPIO_MODER_MODER0 << (pinpos * 2));
210
      GPIOx->MODER |= (((uint32_t)GPIO_InitStruct->GPIO_Mode) << (pinpos * 2));
211
212
      if ((GPIO_InitStruct->GPIO_Mode == GPIO_Mode_OUT) || (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_AF))
213
      {
214
        /* Check Speed mode parameters */
215
        assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
216
217
        /* Speed mode configuration */
218
        GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (pinpos * 2));
219
        GPIOx->OSPEEDR |= ((uint32_t)(GPIO_InitStruct->GPIO_Speed) << (pinpos * 2));
220
221
        /* Check Output mode parameters */
222
        assert_param(IS_GPIO_OTYPE(GPIO_InitStruct->GPIO_OType));
223
224
        /* Output mode configuration*/
225
        GPIOx->OTYPER  &= ~((GPIO_OTYPER_OT_0) << ((uint16_t)pinpos)) ;
226
        GPIOx->OTYPER |= (uint16_t)(((uint16_t)GPIO_InitStruct->GPIO_OType) << ((uint16_t)pinpos));
227
      }
228
229
      /* Pull-up Pull down resistor configuration*/
230
      GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << ((uint16_t)pinpos * 2));
231
      GPIOx->PUPDR |= (((uint32_t)GPIO_InitStruct->GPIO_PuPd) << (pinpos * 2));
232
    }
233
  }
234
}
235
236
/**
237
  * @brief  Fills each GPIO_InitStruct member with its default value.
238
  * @param  GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will be initialized.
239
  * @retval None
240
  */
241
void GPIO_StructInit(GPIO_InitTypeDef* GPIO_InitStruct)
242
{
243
  /* Reset GPIO init structure parameters values */
244
  GPIO_InitStruct->GPIO_Pin  = GPIO_Pin_All;
245
  GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN;
246
  GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
247
  GPIO_InitStruct->GPIO_OType = GPIO_OType_PP;
248
  GPIO_InitStruct->GPIO_PuPd = GPIO_PuPd_NOPULL;
249
}
250
251
/**
252
  * @brief  Locks GPIO Pins configuration registers.
253
  * @note   The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
254
  *         GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
255
  * @note   The configuration of the locked GPIO pins can no longer be modified
256
  *         until the next reset.
257
  * @param  GPIOx: where x can be (A..I) to select the GPIO peripheral for 
258
  *                STM32F40xx/41xx and STM32F427x/437x devices.
259
  * @param  GPIO_Pin: specifies the port bit to be locked.
260
  *          This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
261
  * @retval None
262
  */
263
void GPIO_PinLockConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
264
{
265
  __IO uint32_t tmp = 0x00010000;
266
267
  /* Check the parameters */
268
  assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
269
  assert_param(IS_GPIO_PIN(GPIO_Pin));
270
271
  tmp |= GPIO_Pin;
272
  /* Set LCKK bit */
273
  GPIOx->LCKR = tmp;
274
  /* Reset LCKK bit */
275
  GPIOx->LCKR =  GPIO_Pin;
276
  /* Set LCKK bit */
277
  GPIOx->LCKR = tmp;
278
  /* Read LCKK bit*/
279
  tmp = GPIOx->LCKR;
280
  /* Read LCKK bit*/
281
  tmp = GPIOx->LCKR;
282
}
283
284
/**
285
  * @}
286
  */
287
288
/** @defgroup GPIO_Group2 GPIO Read and Write
289
 *  @brief   GPIO Read and Write
290
 *
291
@verbatim   
292
 ===============================================================================
293
                         ##### GPIO Read and Write #####
294
 ===============================================================================  
295

296
@endverbatim
297
  * @{
298
  */
299
300
/**
301
  * @brief  Reads the specified input port pin.
302
  * @param  GPIOx: where x can be (A..I) to select the GPIO peripheral for 
303
  *                STM32F40xx/41xx and STM32F427x/437x devices.
304
  * @param  GPIO_Pin: specifies the port bit to read.
305
  *         This parameter can be GPIO_Pin_x where x can be (0..15).
306
  * @retval The input port pin value.
307
  */
308
uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
309
{
310
  uint8_t bitstatus = 0x00;
311
312
  /* Check the parameters */
313
  assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
314
  assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
315
316
  if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
317
  {
318
    bitstatus = (uint8_t)Bit_SET;
319
  }
320
  else
321
  {
322
    bitstatus = (uint8_t)Bit_RESET;
323
  }
324
  return bitstatus;
325
}
326
327
/**
328
  * @brief  Reads the specified GPIO input data port.
329
  * @param  GPIOx: where x can be (A..I) to select the GPIO peripheral for 
330
  *                STM32F40xx/41xx and STM32F427x/437x devices. 
331
  * @retval GPIO input data port value.
332
  */
333
uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx)
334
{
335
  /* Check the parameters */
336
  assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
337
338
  return ((uint16_t)GPIOx->IDR);
339
}
340
341
/**
342
  * @brief  Reads the specified output data port bit.
343
  * @param  GPIOx: where x can be (A..I) to select the GPIO peripheral for 
344
  *                STM32F40xx/41xx and STM32F427x/437x devices. 
345
  * @param  GPIO_Pin: specifies the port bit to read.
346
  *          This parameter can be GPIO_Pin_x where x can be (0..15).
347
  * @retval The output port pin value.
348
  */
349
uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
350
{
351
  uint8_t bitstatus = 0x00;
352
353
  /* Check the parameters */
354
  assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
355
  assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
356
357
  if (((GPIOx->ODR) & GPIO_Pin) != (uint32_t)Bit_RESET)
358
  {
359
    bitstatus = (uint8_t)Bit_SET;
360
  }
361
  else
362
  {
363
    bitstatus = (uint8_t)Bit_RESET;
364
  }
365
  return bitstatus;
366
}
367
368
/**
369
  * @brief  Reads the specified GPIO output data port.
370
  * @param  GPIOx: where x can be (A..I) to select the GPIO peripheral for 
371
  *                STM32F40xx/41xx and STM32F427x/437x devices.  
372
  * @retval GPIO output data port value.
373
  */
374
uint16_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx)
375
{
376
  /* Check the parameters */
377
  assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
378
379
  return ((uint16_t)GPIOx->ODR);
380
}
381
382
/**
383
  * @brief  Sets the selected data port bits.
384
  * @note   This functions uses GPIOx_BSRR register to allow atomic read/modify 
385
  *         accesses. In this way, there is no risk of an IRQ occurring between
386
  *         the read and the modify access.
387
  * @param  GPIOx: where x can be (A..I) to select the GPIO peripheral for 
388
  *                STM32F40xx/41xx and STM32F427x/437x devices.  
389
  * @param  GPIO_Pin: specifies the port bits to be written.
390
  *          This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
391
  * @retval None
392
  */
393
void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
394
{
395
  /* Check the parameters */
396
  assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
397
  assert_param(IS_GPIO_PIN(GPIO_Pin));
398
399
  GPIOx->BSRRL = GPIO_Pin;
400
}
401
402
/**
403
  * @brief  Clears the selected data port bits.
404
  * @note   This functions uses GPIOx_BSRR register to allow atomic read/modify 
405
  *         accesses. In this way, there is no risk of an IRQ occurring between
406
  *         the read and the modify access.
407
  * @param  GPIOx: where x can be (A..I) to select the GPIO peripheral for 
408
  *                STM32F40xx/41xx and STM32F427x/437x devices. 
409
  * @param  GPIO_Pin: specifies the port bits to be written.
410
  *          This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
411
  * @retval None
412
  */
413
void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
414
{
415
  /* Check the parameters */
416
  assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
417
  assert_param(IS_GPIO_PIN(GPIO_Pin));
418
419
  GPIOx->BSRRH = GPIO_Pin;
420
}
421
422
/**
423
  * @brief  Sets or clears the selected data port bit.
424
  * @param  GPIOx: where x can be (A..I) to select the GPIO peripheral for 
425
  *                STM32F40xx/41xx and STM32F427x/437x devices.  
426
  * @param  GPIO_Pin: specifies the port bit to be written.
427
  *          This parameter can be one of GPIO_Pin_x where x can be (0..15).
428
  * @param  BitVal: specifies the value to be written to the selected bit.
429
  *          This parameter can be one of the BitAction enum values:
430
  *            @arg Bit_RESET: to clear the port pin
431
  *            @arg Bit_SET: to set the port pin
432
  * @retval None
433
  */
434
void GPIO_WriteBit(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
435
{
436
  /* Check the parameters */
437
  assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
438
  assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
439
  assert_param(IS_GPIO_BIT_ACTION(BitVal));
440
441
  if (BitVal != Bit_RESET)
442
  {
443
    GPIOx->BSRRL = GPIO_Pin;
444
  }
445
  else
446
  {
447
    GPIOx->BSRRH = GPIO_Pin ;
448
  }
449
}
450
451
/**
452
  * @brief  Writes data to the specified GPIO data port.
453
  * @param  GPIOx: where x can be (A..I) to select the GPIO peripheral for 
454
  *                STM32F40xx/41xx and STM32F427x/437x devices.  
455
  * @param  PortVal: specifies the value to be written to the port output data register.
456
  * @retval None
457
  */
458
void GPIO_Write(GPIO_TypeDef* GPIOx, uint16_t PortVal)
459
{
460
  /* Check the parameters */
461
  assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
462
463
  GPIOx->ODR = PortVal;
464
}
465
466
/**
467
  * @brief  Toggles the specified GPIO pins..
468
  * @param  GPIOx: where x can be (A..I) to select the GPIO peripheral for 
469
  *                STM32F40xx/41xx and STM32F427x/437x devices.  
470
  * @param  GPIO_Pin: Specifies the pins to be toggled.
471
  * @retval None
472
  */
473
void GPIO_ToggleBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
474
{
475
  /* Check the parameters */
476
  assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
477
478
  GPIOx->ODR ^= GPIO_Pin;
479
}
480
481
/**
482
  * @}
483
  */
484
485
/** @defgroup GPIO_Group3 GPIO Alternate functions configuration function
486
 *  @brief   GPIO Alternate functions configuration function
487
 *
488
@verbatim   
489
 ===============================================================================
490
           ##### GPIO Alternate functions configuration function #####
491
 ===============================================================================  
492

493
@endverbatim
494
  * @{
495
  */
496
497
/**
498
  * @brief  Changes the mapping of the specified pin.
499
  * @param  GPIOx: where x can be (A..I) to select the GPIO peripheral for 
500
  *                STM32F40xx/41xx and STM32F427x/437x devices. 
501
  * @param  GPIO_PinSource: specifies the pin for the Alternate function.
502
  *         This parameter can be GPIO_PinSourcex where x can be (0..15).
503
  * @param  GPIO_AFSelection: selects the pin to used as Alternate function.
504
  *          This parameter can be one of the following values:
505
  *            @arg GPIO_AF_RTC_50Hz: Connect RTC_50Hz pin to AF0 (default after reset) 
506
  *            @arg GPIO_AF_MCO: Connect MCO pin (MCO1 and MCO2) to AF0 (default after reset) 
507
  *            @arg GPIO_AF_TAMPER: Connect TAMPER pins (TAMPER_1 and TAMPER_2) to AF0 (default after reset) 
508
  *            @arg GPIO_AF_SWJ: Connect SWJ pins (SWD and JTAG)to AF0 (default after reset) 
509
  *            @arg GPIO_AF_TRACE: Connect TRACE pins to AF0 (default after reset)
510
  *            @arg GPIO_AF_TIM1: Connect TIM1 pins to AF1
511
  *            @arg GPIO_AF_TIM2: Connect TIM2 pins to AF1
512
  *            @arg GPIO_AF_TIM3: Connect TIM3 pins to AF2
513
  *            @arg GPIO_AF_TIM4: Connect TIM4 pins to AF2
514
  *            @arg GPIO_AF_TIM5: Connect TIM5 pins to AF2
515
  *            @arg GPIO_AF_TIM8: Connect TIM8 pins to AF3
516
  *            @arg GPIO_AF_TIM9: Connect TIM9 pins to AF3
517
  *            @arg GPIO_AF_TIM10: Connect TIM10 pins to AF3
518
  *            @arg GPIO_AF_TIM11: Connect TIM11 pins to AF3
519
  *            @arg GPIO_AF_I2C1: Connect I2C1 pins to AF4
520
  *            @arg GPIO_AF_I2C2: Connect I2C2 pins to AF4
521
  *            @arg GPIO_AF_I2C3: Connect I2C3 pins to AF4
522
  *            @arg GPIO_AF_SPI1: Connect SPI1 pins to AF5
523
  *            @arg GPIO_AF_SPI2: Connect SPI2/I2S2 pins to AF5
524
  *            @arg GPIO_AF_SPI4: Connect SPI4 pins to AF5 
525
  *            @arg GPIO_AF_SPI5: Connect SPI5 pins to AF5 
526
  *            @arg GPIO_AF_SPI6: Connect SPI6 pins to AF5       
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  *            @arg GPIO_AF_SPI3: Connect SPI3/I2S3 pins to AF6
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  *            @arg GPIO_AF_I2S3ext: Connect I2S3ext pins to AF7
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  *            @arg GPIO_AF_USART1: Connect USART1 pins to AF7
530
  *            @arg GPIO_AF_USART2: Connect USART2 pins to AF7
531
  *            @arg GPIO_AF_USART3: Connect USART3 pins to AF7
532
  *            @arg GPIO_AF_UART4: Connect UART4 pins to AF8
533
  *            @arg GPIO_AF_UART5: Connect UART5 pins to AF8
534
  *            @arg GPIO_AF_USART6: Connect USART6 pins to AF8
535
  *            @arg GPIO_AF_UART7: Connect UART7 pins to AF8
536
  *            @arg GPIO_AF_UART8: Connect UART8 pins to AF8
537
  *            @arg GPIO_AF_CAN1: Connect CAN1 pins to AF9
538
  *            @arg GPIO_AF_CAN2: Connect CAN2 pins to AF9
539
  *            @arg GPIO_AF_TIM12: Connect TIM12 pins to AF9
540
  *            @arg GPIO_AF_TIM13: Connect TIM13 pins to AF9
541
  *            @arg GPIO_AF_TIM14: Connect TIM14 pins to AF9
542
  *            @arg GPIO_AF_OTG_FS: Connect OTG_FS pins to AF10
543
  *            @arg GPIO_AF_OTG_HS: Connect OTG_HS pins to AF10
544
  *            @arg GPIO_AF_ETH: Connect ETHERNET pins to AF11
545
  *            @arg GPIO_AF_FSMC: Connect FSMC pins to AF12   
546
  *            @arg GPIO_AF_OTG_HS_FS: Connect OTG HS (configured in FS) pins to AF12
547
  *            @arg GPIO_AF_SDIO: Connect SDIO pins to AF12
548
  *            @arg GPIO_AF_DCMI: Connect DCMI pins to AF13 
549
  *            @arg GPIO_AF_EVENTOUT: Connect EVENTOUT pins to AF15
550
  * @retval None
551
  */
552
void GPIO_PinAFConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF)
553
{
554
  uint32_t temp = 0x00;
555
  uint32_t temp_2 = 0x00;
556
  
557
  /* Check the parameters */
558
  assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
559
  assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));
560
  assert_param(IS_GPIO_AF(GPIO_AF));
561
  
562
  temp = ((uint32_t)(GPIO_AF) << ((uint32_t)((uint32_t)GPIO_PinSource & (uint32_t)0x07) * 4)) ;
563
  GPIOx->AFR[GPIO_PinSource >> 0x03] &= ~((uint32_t)0xF << ((uint32_t)((uint32_t)GPIO_PinSource & (uint32_t)0x07) * 4)) ;
564
  temp_2 = GPIOx->AFR[GPIO_PinSource >> 0x03] | temp;
565
  GPIOx->AFR[GPIO_PinSource >> 0x03] = temp_2;
566
}
567
568
/**
569
  * @}
570
  */ 
571
572
/**
573
  * @}
574
  */
575
576
/**
577
  * @}
578
  */ 
579
580
/**
581
  * @}
582
  */ 
583
584
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/