amiro-blt / Target / Demo / ARMCM4_STM32F405_Power_Management_GCC / Boot / lib / stdperiphlib / STM32F4xx_StdPeriph_Driver / src / stm32f4xx_wwdg.c @ 69661903
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1 | 69661903 | Thomas Schöpping | /**
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2 | ******************************************************************************
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3 | * @file stm32f4xx_wwdg.c
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4 | * @author MCD Application Team
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5 | * @version V1.1.0
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6 | * @date 11-January-2013
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7 | * @brief This file provides firmware functions to manage the following
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8 | * functionalities of the Window watchdog (WWDG) peripheral:
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9 | * + Prescaler, Refresh window and Counter configuration
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10 | * + WWDG activation
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11 | * + Interrupts and flags management
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12 | *
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13 | @verbatim
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14 | ===============================================================================
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15 | ##### WWDG features #####
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16 | ===============================================================================
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17 | [..]
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18 | Once enabled the WWDG generates a system reset on expiry of a programmed
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19 | time period, unless the program refreshes the counter (downcounter)
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20 | before to reach 0x3F value (i.e. a reset is generated when the counter
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21 | value rolls over from 0x40 to 0x3F).
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22 | An MCU reset is also generated if the counter value is refreshed
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23 | before the counter has reached the refresh window value. This
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24 | implies that the counter must be refreshed in a limited window.
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25 |
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26 | Once enabled the WWDG cannot be disabled except by a system reset.
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27 |
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28 | WWDGRST flag in RCC_CSR register can be used to inform when a WWDG
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29 | reset occurs.
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30 |
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31 | The WWDG counter input clock is derived from the APB clock divided
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32 | by a programmable prescaler.
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33 |
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34 | WWDG counter clock = PCLK1 / Prescaler
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35 | WWDG timeout = (WWDG counter clock) * (counter value)
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36 |
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37 | Min-max timeout value @42 MHz(PCLK1): ~97.5 us / ~49.9 ms
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38 |
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39 | ##### How to use this driver #####
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40 | ===============================================================================
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41 | [..]
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42 | (#) Enable WWDG clock using RCC_APB1PeriphClockCmd(RCC_APB1Periph_WWDG, ENABLE) function
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43 |
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44 | (#) Configure the WWDG prescaler using WWDG_SetPrescaler() function
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45 |
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46 | (#) Configure the WWDG refresh window using WWDG_SetWindowValue() function
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47 |
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48 | (#) Set the WWDG counter value and start it using WWDG_Enable() function.
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49 | When the WWDG is enabled the counter value should be configured to
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50 | a value greater than 0x40 to prevent generating an immediate reset.
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51 |
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52 | (#) Optionally you can enable the Early wakeup interrupt which is
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53 | generated when the counter reach 0x40.
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54 | Once enabled this interrupt cannot be disabled except by a system reset.
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55 |
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56 | (#) Then the application program must refresh the WWDG counter at regular
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57 | intervals during normal operation to prevent an MCU reset, using
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58 | WWDG_SetCounter() function. This operation must occur only when
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59 | the counter value is lower than the refresh window value,
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60 | programmed using WWDG_SetWindowValue().
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61 |
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62 | @endverbatim
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63 | ******************************************************************************
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64 | * @attention
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65 | *
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66 | * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
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67 | *
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68 | * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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69 | * You may not use this file except in compliance with the License.
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70 | * You may obtain a copy of the License at:
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71 | *
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72 | * http://www.st.com/software_license_agreement_liberty_v2
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73 | *
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74 | * Unless required by applicable law or agreed to in writing, software
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75 | * distributed under the License is distributed on an "AS IS" BASIS,
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76 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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77 | * See the License for the specific language governing permissions and
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78 | * limitations under the License.
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79 | *
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80 | ******************************************************************************
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81 | */
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82 | |||
83 | /* Includes ------------------------------------------------------------------*/
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84 | #include "stm32f4xx_wwdg.h" |
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85 | #include "stm32f4xx_rcc.h" |
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86 | |||
87 | /** @addtogroup STM32F4xx_StdPeriph_Driver
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88 | * @{
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89 | */
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90 | |||
91 | /** @defgroup WWDG
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92 | * @brief WWDG driver modules
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93 | * @{
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94 | */
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95 | |||
96 | /* Private typedef -----------------------------------------------------------*/
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97 | /* Private define ------------------------------------------------------------*/
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98 | |||
99 | /* ----------- WWDG registers bit address in the alias region ----------- */
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100 | #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)
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101 | /* Alias word address of EWI bit */
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102 | #define CFR_OFFSET (WWDG_OFFSET + 0x04) |
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103 | #define EWI_BitNumber 0x09 |
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104 | #define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4)) |
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105 | |||
106 | /* --------------------- WWDG registers bit mask ------------------------ */
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107 | /* CFR register bit mask */
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108 | #define CFR_WDGTB_MASK ((uint32_t)0xFFFFFE7F) |
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109 | #define CFR_W_MASK ((uint32_t)0xFFFFFF80) |
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110 | #define BIT_MASK ((uint8_t)0x7F) |
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111 | |||
112 | /* Private macro -------------------------------------------------------------*/
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113 | /* Private variables ---------------------------------------------------------*/
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114 | /* Private function prototypes -----------------------------------------------*/
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115 | /* Private functions ---------------------------------------------------------*/
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116 | |||
117 | /** @defgroup WWDG_Private_Functions
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118 | * @{
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119 | */
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120 | |||
121 | /** @defgroup WWDG_Group1 Prescaler, Refresh window and Counter configuration functions
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122 | * @brief Prescaler, Refresh window and Counter configuration functions
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123 | *
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124 | @verbatim
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125 | ===============================================================================
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126 | ##### Prescaler, Refresh window and Counter configuration functions #####
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127 | ===============================================================================
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128 | |||
129 | @endverbatim
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130 | * @{
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131 | */
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132 | |||
133 | /**
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134 | * @brief Deinitializes the WWDG peripheral registers to their default reset values.
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135 | * @param None
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136 | * @retval None
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137 | */
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138 | void WWDG_DeInit(void) |
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139 | { |
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140 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE); |
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141 | RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE); |
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142 | } |
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143 | |||
144 | /**
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145 | * @brief Sets the WWDG Prescaler.
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146 | * @param WWDG_Prescaler: specifies the WWDG Prescaler.
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147 | * This parameter can be one of the following values:
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148 | * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
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149 | * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
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150 | * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
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151 | * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
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152 | * @retval None
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153 | */
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154 | void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
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155 | { |
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156 | uint32_t tmpreg = 0;
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157 | /* Check the parameters */
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158 | assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler)); |
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159 | /* Clear WDGTB[1:0] bits */
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160 | tmpreg = WWDG->CFR & CFR_WDGTB_MASK; |
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161 | /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
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162 | tmpreg |= WWDG_Prescaler; |
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163 | /* Store the new value */
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164 | WWDG->CFR = tmpreg; |
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165 | } |
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166 | |||
167 | /**
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168 | * @brief Sets the WWDG window value.
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169 | * @param WindowValue: specifies the window value to be compared to the downcounter.
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170 | * This parameter value must be lower than 0x80.
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171 | * @retval None
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172 | */
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173 | void WWDG_SetWindowValue(uint8_t WindowValue)
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174 | { |
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175 | __IO uint32_t tmpreg = 0;
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176 | |||
177 | /* Check the parameters */
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178 | assert_param(IS_WWDG_WINDOW_VALUE(WindowValue)); |
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179 | /* Clear W[6:0] bits */
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180 | |||
181 | tmpreg = WWDG->CFR & CFR_W_MASK; |
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182 | |||
183 | /* Set W[6:0] bits according to WindowValue value */
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184 | tmpreg |= WindowValue & (uint32_t) BIT_MASK; |
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185 | |||
186 | /* Store the new value */
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187 | WWDG->CFR = tmpreg; |
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188 | } |
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189 | |||
190 | /**
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191 | * @brief Enables the WWDG Early Wakeup interrupt(EWI).
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192 | * @note Once enabled this interrupt cannot be disabled except by a system reset.
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193 | * @param None
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194 | * @retval None
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195 | */
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196 | void WWDG_EnableIT(void) |
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197 | { |
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198 | *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE; |
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199 | } |
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200 | |||
201 | /**
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202 | * @brief Sets the WWDG counter value.
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203 | * @param Counter: specifies the watchdog counter value.
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204 | * This parameter must be a number between 0x40 and 0x7F (to prevent generating
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205 | * an immediate reset)
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206 | * @retval None
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207 | */
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208 | void WWDG_SetCounter(uint8_t Counter)
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209 | { |
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210 | /* Check the parameters */
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211 | assert_param(IS_WWDG_COUNTER(Counter)); |
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212 | /* Write to T[6:0] bits to configure the counter value, no need to do
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213 | a read-modify-write; writing a 0 to WDGA bit does nothing */
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214 | WWDG->CR = Counter & BIT_MASK; |
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215 | } |
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216 | /**
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217 | * @}
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218 | */
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219 | |||
220 | /** @defgroup WWDG_Group2 WWDG activation functions
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221 | * @brief WWDG activation functions
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222 | *
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223 | @verbatim
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224 | ===============================================================================
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225 | ##### WWDG activation function #####
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226 | ===============================================================================
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227 | |||
228 | @endverbatim
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229 | * @{
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230 | */
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231 | |||
232 | /**
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233 | * @brief Enables WWDG and load the counter value.
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234 | * @param Counter: specifies the watchdog counter value.
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235 | * This parameter must be a number between 0x40 and 0x7F (to prevent generating
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236 | * an immediate reset)
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237 | * @retval None
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238 | */
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239 | void WWDG_Enable(uint8_t Counter)
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240 | { |
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241 | /* Check the parameters */
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242 | assert_param(IS_WWDG_COUNTER(Counter)); |
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243 | WWDG->CR = WWDG_CR_WDGA | Counter; |
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244 | } |
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245 | /**
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246 | * @}
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247 | */
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248 | |||
249 | /** @defgroup WWDG_Group3 Interrupts and flags management functions
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250 | * @brief Interrupts and flags management functions
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251 | *
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252 | @verbatim
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253 | ===============================================================================
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254 | ##### Interrupts and flags management functions #####
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255 | ===============================================================================
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256 | |||
257 | @endverbatim
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258 | * @{
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259 | */
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260 | |||
261 | /**
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262 | * @brief Checks whether the Early Wakeup interrupt flag is set or not.
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263 | * @param None
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264 | * @retval The new state of the Early Wakeup interrupt flag (SET or RESET)
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265 | */
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266 | FlagStatus WWDG_GetFlagStatus(void)
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267 | { |
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268 | FlagStatus bitstatus = RESET; |
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269 | |||
270 | if ((WWDG->SR) != (uint32_t)RESET)
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271 | { |
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272 | bitstatus = SET; |
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273 | } |
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274 | else
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275 | { |
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276 | bitstatus = RESET; |
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277 | } |
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278 | return bitstatus;
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279 | } |
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280 | |||
281 | /**
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282 | * @brief Clears Early Wakeup interrupt flag.
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283 | * @param None
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284 | * @retval None
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285 | */
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286 | void WWDG_ClearFlag(void) |
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287 | { |
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288 | WWDG->SR = (uint32_t)RESET; |
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289 | } |
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290 | |||
291 | /**
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292 | * @}
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293 | */
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294 | |||
295 | /**
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296 | * @}
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297 | */
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298 | |||
299 | /**
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300 | * @}
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301 | */
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302 | |||
303 | /**
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304 | * @}
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305 | */
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306 | |||
307 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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