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amiro-blt / Target / Demo / ARMCM3_STM32F103_LightRing_GCC / Boot / lib / STM32F10x_StdPeriph_Driver / src / stm32f10x_i2c.c @ 69661903

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/**
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  ******************************************************************************
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  * @file    stm32f10x_i2c.c
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  * @author  MCD Application Team
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  * @version V3.5.0
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  * @date    11-March-2011
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  * @brief   This file provides all the I2C firmware functions.
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  ******************************************************************************
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  * @attention
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  *
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  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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  *
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  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
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  ******************************************************************************
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  */
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f10x_i2c.h"
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#include "stm32f10x_rcc.h"
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/** @addtogroup STM32F10x_StdPeriph_Driver
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  * @{
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  */
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/** @defgroup I2C 
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  * @brief I2C driver modules
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  * @{
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  */ 
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/** @defgroup I2C_Private_TypesDefinitions
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  * @{
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  */
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/**
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  * @}
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  */
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/** @defgroup I2C_Private_Defines
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  * @{
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  */
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/* I2C SPE mask */
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#define CR1_PE_Set              ((uint16_t)0x0001)
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#define CR1_PE_Reset            ((uint16_t)0xFFFE)
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/* I2C START mask */
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#define CR1_START_Set           ((uint16_t)0x0100)
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#define CR1_START_Reset         ((uint16_t)0xFEFF)
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/* I2C STOP mask */
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#define CR1_STOP_Set            ((uint16_t)0x0200)
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#define CR1_STOP_Reset          ((uint16_t)0xFDFF)
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/* I2C ACK mask */
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#define CR1_ACK_Set             ((uint16_t)0x0400)
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#define CR1_ACK_Reset           ((uint16_t)0xFBFF)
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/* I2C ENGC mask */
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#define CR1_ENGC_Set            ((uint16_t)0x0040)
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#define CR1_ENGC_Reset          ((uint16_t)0xFFBF)
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/* I2C SWRST mask */
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#define CR1_SWRST_Set           ((uint16_t)0x8000)
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#define CR1_SWRST_Reset         ((uint16_t)0x7FFF)
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/* I2C PEC mask */
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#define CR1_PEC_Set             ((uint16_t)0x1000)
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#define CR1_PEC_Reset           ((uint16_t)0xEFFF)
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/* I2C ENPEC mask */
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#define CR1_ENPEC_Set           ((uint16_t)0x0020)
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#define CR1_ENPEC_Reset         ((uint16_t)0xFFDF)
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/* I2C ENARP mask */
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#define CR1_ENARP_Set           ((uint16_t)0x0010)
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#define CR1_ENARP_Reset         ((uint16_t)0xFFEF)
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/* I2C NOSTRETCH mask */
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#define CR1_NOSTRETCH_Set       ((uint16_t)0x0080)
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#define CR1_NOSTRETCH_Reset     ((uint16_t)0xFF7F)
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/* I2C registers Masks */
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#define CR1_CLEAR_Mask          ((uint16_t)0xFBF5)
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/* I2C DMAEN mask */
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#define CR2_DMAEN_Set           ((uint16_t)0x0800)
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#define CR2_DMAEN_Reset         ((uint16_t)0xF7FF)
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/* I2C LAST mask */
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#define CR2_LAST_Set            ((uint16_t)0x1000)
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#define CR2_LAST_Reset          ((uint16_t)0xEFFF)
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/* I2C FREQ mask */
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#define CR2_FREQ_Reset          ((uint16_t)0xFFC0)
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/* I2C ADD0 mask */
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#define OAR1_ADD0_Set           ((uint16_t)0x0001)
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#define OAR1_ADD0_Reset         ((uint16_t)0xFFFE)
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/* I2C ENDUAL mask */
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#define OAR2_ENDUAL_Set         ((uint16_t)0x0001)
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#define OAR2_ENDUAL_Reset       ((uint16_t)0xFFFE)
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/* I2C ADD2 mask */
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#define OAR2_ADD2_Reset         ((uint16_t)0xFF01)
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/* I2C F/S mask */
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#define CCR_FS_Set              ((uint16_t)0x8000)
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/* I2C CCR mask */
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#define CCR_CCR_Set             ((uint16_t)0x0FFF)
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/* I2C FLAG mask */
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#define FLAG_Mask               ((uint32_t)0x00FFFFFF)
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/* I2C Interrupt Enable mask */
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#define ITEN_Mask               ((uint32_t)0x07000000)
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/**
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  * @}
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  */
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/** @defgroup I2C_Private_Macros
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  * @{
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  */
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/**
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  * @}
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  */
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/** @defgroup I2C_Private_Variables
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  * @{
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  */
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/**
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  * @}
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  */
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/** @defgroup I2C_Private_FunctionPrototypes
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  * @{
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  */
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/**
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  * @}
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  */
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/** @defgroup I2C_Private_Functions
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  * @{
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  */
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/**
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  * @brief  Deinitializes the I2Cx peripheral registers to their default reset values.
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  * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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  * @retval None
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  */
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void I2C_DeInit(I2C_TypeDef* I2Cx)
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{
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  /* Check the parameters */
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  assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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  if (I2Cx == I2C1)
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  {
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    /* Enable I2C1 reset state */
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    RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE);
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    /* Release I2C1 from reset state */
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    RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE);
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  }
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  else
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  {
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    /* Enable I2C2 reset state */
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    RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE);
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    /* Release I2C2 from reset state */
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    RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE);
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  }
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}
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/**
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  * @brief  Initializes the I2Cx peripheral according to the specified 
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  *   parameters in the I2C_InitStruct.
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  * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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  * @param  I2C_InitStruct: pointer to a I2C_InitTypeDef structure that
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  *   contains the configuration information for the specified I2C peripheral.
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  * @retval None
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  */
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void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)
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{
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  uint16_t tmpreg = 0, freqrange = 0;
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  uint16_t result = 0x04;
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  uint32_t pclk1 = 8000000;
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  RCC_ClocksTypeDef  rcc_clocks;
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  /* Check the parameters */
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  assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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  assert_param(IS_I2C_CLOCK_SPEED(I2C_InitStruct->I2C_ClockSpeed));
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  assert_param(IS_I2C_MODE(I2C_InitStruct->I2C_Mode));
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  assert_param(IS_I2C_DUTY_CYCLE(I2C_InitStruct->I2C_DutyCycle));
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  assert_param(IS_I2C_OWN_ADDRESS1(I2C_InitStruct->I2C_OwnAddress1));
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  assert_param(IS_I2C_ACK_STATE(I2C_InitStruct->I2C_Ack));
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  assert_param(IS_I2C_ACKNOWLEDGE_ADDRESS(I2C_InitStruct->I2C_AcknowledgedAddress));
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/*---------------------------- I2Cx CR2 Configuration ------------------------*/
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  /* Get the I2Cx CR2 value */
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  tmpreg = I2Cx->CR2;
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  /* Clear frequency FREQ[5:0] bits */
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  tmpreg &= CR2_FREQ_Reset;
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  /* Get pclk1 frequency value */
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  RCC_GetClocksFreq(&rcc_clocks);
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  pclk1 = rcc_clocks.PCLK1_Frequency;
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  /* Set frequency bits depending on pclk1 value */
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  freqrange = (uint16_t)(pclk1 / 1000000);
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  tmpreg |= freqrange;
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  /* Write to I2Cx CR2 */
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  I2Cx->CR2 = tmpreg;
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/*---------------------------- I2Cx CCR Configuration ------------------------*/
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  /* Disable the selected I2C peripheral to configure TRISE */
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  I2Cx->CR1 &= CR1_PE_Reset;
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  /* Reset tmpreg value */
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  /* Clear F/S, DUTY and CCR[11:0] bits */
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  tmpreg = 0;
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  /* Configure speed in standard mode */
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  if (I2C_InitStruct->I2C_ClockSpeed <= 100000)
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  {
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    /* Standard mode speed calculate */
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    result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed << 1));
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    /* Test if CCR value is under 0x4*/
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    if (result < 0x04)
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    {
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      /* Set minimum allowed value */
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      result = 0x04;  
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    }
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    /* Set speed value for standard mode */
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    tmpreg |= result;          
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    /* Set Maximum Rise Time for standard mode */
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    I2Cx->TRISE = freqrange + 1; 
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  }
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  /* Configure speed in fast mode */
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  else /*(I2C_InitStruct->I2C_ClockSpeed <= 400000)*/
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  {
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    if (I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_2)
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    {
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      /* Fast mode speed calculate: Tlow/Thigh = 2 */
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      result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 3));
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    }
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    else /*I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_16_9*/
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    {
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      /* Fast mode speed calculate: Tlow/Thigh = 16/9 */
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      result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 25));
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      /* Set DUTY bit */
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      result |= I2C_DutyCycle_16_9;
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    }
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    /* Test if CCR value is under 0x1*/
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    if ((result & CCR_CCR_Set) == 0)
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    {
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      /* Set minimum allowed value */
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      result |= (uint16_t)0x0001;  
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    }
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    /* Set speed value and set F/S bit for fast mode */
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    tmpreg |= (uint16_t)(result | CCR_FS_Set);
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    /* Set Maximum Rise Time for fast mode */
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    I2Cx->TRISE = (uint16_t)(((freqrange * (uint16_t)300) / (uint16_t)1000) + (uint16_t)1);  
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  }
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  /* Write to I2Cx CCR */
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  I2Cx->CCR = tmpreg;
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  /* Enable the selected I2C peripheral */
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  I2Cx->CR1 |= CR1_PE_Set;
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/*---------------------------- I2Cx CR1 Configuration ------------------------*/
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  /* Get the I2Cx CR1 value */
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  tmpreg = I2Cx->CR1;
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  /* Clear ACK, SMBTYPE and  SMBUS bits */
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  tmpreg &= CR1_CLEAR_Mask;
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  /* Configure I2Cx: mode and acknowledgement */
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  /* Set SMBTYPE and SMBUS bits according to I2C_Mode value */
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  /* Set ACK bit according to I2C_Ack value */
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  tmpreg |= (uint16_t)((uint32_t)I2C_InitStruct->I2C_Mode | I2C_InitStruct->I2C_Ack);
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  /* Write to I2Cx CR1 */
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  I2Cx->CR1 = tmpreg;
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/*---------------------------- I2Cx OAR1 Configuration -----------------------*/
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  /* Set I2Cx Own Address1 and acknowledged address */
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  I2Cx->OAR1 = (I2C_InitStruct->I2C_AcknowledgedAddress | I2C_InitStruct->I2C_OwnAddress1);
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}
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/**
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  * @brief  Fills each I2C_InitStruct member with its default value.
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  * @param  I2C_InitStruct: pointer to an I2C_InitTypeDef structure which will be initialized.
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  * @retval None
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  */
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void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct)
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{
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/*---------------- Reset I2C init structure parameters values ----------------*/
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  /* initialize the I2C_ClockSpeed member */
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  I2C_InitStruct->I2C_ClockSpeed = 5000;
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  /* Initialize the I2C_Mode member */
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  I2C_InitStruct->I2C_Mode = I2C_Mode_I2C;
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  /* Initialize the I2C_DutyCycle member */
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  I2C_InitStruct->I2C_DutyCycle = I2C_DutyCycle_2;
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  /* Initialize the I2C_OwnAddress1 member */
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  I2C_InitStruct->I2C_OwnAddress1 = 0;
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  /* Initialize the I2C_Ack member */
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  I2C_InitStruct->I2C_Ack = I2C_Ack_Disable;
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  /* Initialize the I2C_AcknowledgedAddress member */
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  I2C_InitStruct->I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
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}
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/**
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  * @brief  Enables or disables the specified I2C peripheral.
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  * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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  * @param  NewState: new state of the I2Cx peripheral. 
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  *   This parameter can be: ENABLE or DISABLE.
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  * @retval None
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  */
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void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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{
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  /* Check the parameters */
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  assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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  assert_param(IS_FUNCTIONAL_STATE(NewState));
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  if (NewState != DISABLE)
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  {
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    /* Enable the selected I2C peripheral */
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    I2Cx->CR1 |= CR1_PE_Set;
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  }
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  else
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  {
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    /* Disable the selected I2C peripheral */
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    I2Cx->CR1 &= CR1_PE_Reset;
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  }
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}
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/**
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  * @brief  Enables or disables the specified I2C DMA requests.
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  * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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  * @param  NewState: new state of the I2C DMA transfer.
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  *   This parameter can be: ENABLE or DISABLE.
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  * @retval None
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  */
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void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
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{
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  /* Check the parameters */
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  assert_param(IS_I2C_ALL_PERIPH(I2Cx));
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  assert_param(IS_FUNCTIONAL_STATE(NewState));
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  if (NewState != DISABLE)
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  {
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    /* Enable the selected I2C DMA requests */
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    I2Cx->CR2 |= CR2_DMAEN_Set;
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  }
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  else
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  {
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    /* Disable the selected I2C DMA requests */
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    I2Cx->CR2 &= CR2_DMAEN_Reset;
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  }
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}
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/**
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  * @brief  Specifies if the next DMA transfer will be the last one.
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  * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.
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  * @param  NewState: new state of the I2C DMA last transfer.
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  *   This parameter can be: ENABLE or DISABLE.
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  * @retval None
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  */
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void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)