AMiRo-OS

/**

  ******************************************************************************

  * @file    stm32f10x_i2c.c

  * @author  MCD Application Team

  * @version V3.5.0

  * @date    11-March-2011

  * @brief   This file provides all the I2C firmware functions.

  ******************************************************************************

  * @attention

  *

  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS

  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE

  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY

  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING

  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE

  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.

  *

  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>

  ******************************************************************************

  */

/* Includes ------------------------------------------------------------------*/

#include "stm32f10x_i2c.h"

#include "stm32f10x_rcc.h"

/** @addtogroup STM32F10x_StdPeriph_Driver

  * @{

  */

/** @defgroup I2C 

  * @brief I2C driver modules

  * @{

  */ 

/** @defgroup I2C_Private_TypesDefinitions

  * @{

  */

/**

  * @}

  */

/** @defgroup I2C_Private_Defines

  * @{

  */

/* I2C SPE mask */

#define CR1_PE_Set              ((uint16_t)0x0001)

#define CR1_PE_Reset            ((uint16_t)0xFFFE)

/* I2C START mask */

#define CR1_START_Set           ((uint16_t)0x0100)

#define CR1_START_Reset         ((uint16_t)0xFEFF)

/* I2C STOP mask */

#define CR1_STOP_Set            ((uint16_t)0x0200)

#define CR1_STOP_Reset          ((uint16_t)0xFDFF)

/* I2C ACK mask */

#define CR1_ACK_Set             ((uint16_t)0x0400)

#define CR1_ACK_Reset           ((uint16_t)0xFBFF)

/* I2C ENGC mask */

#define CR1_ENGC_Set            ((uint16_t)0x0040)

#define CR1_ENGC_Reset          ((uint16_t)0xFFBF)

/* I2C SWRST mask */

#define CR1_SWRST_Set           ((uint16_t)0x8000)

#define CR1_SWRST_Reset         ((uint16_t)0x7FFF)

/* I2C PEC mask */

#define CR1_PEC_Set             ((uint16_t)0x1000)

#define CR1_PEC_Reset           ((uint16_t)0xEFFF)

/* I2C ENPEC mask */

#define CR1_ENPEC_Set           ((uint16_t)0x0020)

#define CR1_ENPEC_Reset         ((uint16_t)0xFFDF)

/* I2C ENARP mask */

#define CR1_ENARP_Set           ((uint16_t)0x0010)

#define CR1_ENARP_Reset         ((uint16_t)0xFFEF)

/* I2C NOSTRETCH mask */

#define CR1_NOSTRETCH_Set       ((uint16_t)0x0080)

#define CR1_NOSTRETCH_Reset     ((uint16_t)0xFF7F)

/* I2C registers Masks */

#define CR1_CLEAR_Mask          ((uint16_t)0xFBF5)

/* I2C DMAEN mask */

#define CR2_DMAEN_Set           ((uint16_t)0x0800)

#define CR2_DMAEN_Reset         ((uint16_t)0xF7FF)

/* I2C LAST mask */

#define CR2_LAST_Set            ((uint16_t)0x1000)

#define CR2_LAST_Reset          ((uint16_t)0xEFFF)

/* I2C FREQ mask */

#define CR2_FREQ_Reset          ((uint16_t)0xFFC0)

/* I2C ADD0 mask */

#define OAR1_ADD0_Set           ((uint16_t)0x0001)

#define OAR1_ADD0_Reset         ((uint16_t)0xFFFE)

/* I2C ENDUAL mask */

#define OAR2_ENDUAL_Set         ((uint16_t)0x0001)

#define OAR2_ENDUAL_Reset       ((uint16_t)0xFFFE)

/* I2C ADD2 mask */

#define OAR2_ADD2_Reset         ((uint16_t)0xFF01)

/* I2C F/S mask */

#define CCR_FS_Set              ((uint16_t)0x8000)

/* I2C CCR mask */

#define CCR_CCR_Set             ((uint16_t)0x0FFF)

/* I2C FLAG mask */

#define FLAG_Mask               ((uint32_t)0x00FFFFFF)

/* I2C Interrupt Enable mask */

#define ITEN_Mask               ((uint32_t)0x07000000)

/**

  * @}

  */

/** @defgroup I2C_Private_Macros

  * @{

  */

/**

  * @}

  */

/** @defgroup I2C_Private_Variables

  * @{

  */

/**

  * @}

  */

/** @defgroup I2C_Private_FunctionPrototypes

  * @{

  */

/**

  * @}

  */

/** @defgroup I2C_Private_Functions

  * @{

  */

/**

  * @brief  Deinitializes the I2Cx peripheral registers to their default reset values.

  * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.

  * @retval None

  */

void I2C_DeInit(I2C_TypeDef* I2Cx)

{

  /* Check the parameters */

  assert_param(IS_I2C_ALL_PERIPH(I2Cx));

  if (I2Cx == I2C1)

  {

    /* Enable I2C1 reset state */

    RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE);

    /* Release I2C1 from reset state */

    RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE);

  }

  else

  {

    /* Enable I2C2 reset state */

    RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE);

    /* Release I2C2 from reset state */

    RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE);

  }

}

/**

  * @brief  Initializes the I2Cx peripheral according to the specified 

  *   parameters in the I2C_InitStruct.

  * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.

  * @param  I2C_InitStruct: pointer to a I2C_InitTypeDef structure that

  *   contains the configuration information for the specified I2C peripheral.

  * @retval None

  */

void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)

{

  uint16_t tmpreg = 0, freqrange = 0;

  uint16_t result = 0x04;

  uint32_t pclk1 = 8000000;

  RCC_ClocksTypeDef  rcc_clocks;

  /* Check the parameters */

  assert_param(IS_I2C_ALL_PERIPH(I2Cx));

  assert_param(IS_I2C_CLOCK_SPEED(I2C_InitStruct->I2C_ClockSpeed));

  assert_param(IS_I2C_MODE(I2C_InitStruct->I2C_Mode));

  assert_param(IS_I2C_DUTY_CYCLE(I2C_InitStruct->I2C_DutyCycle));

  assert_param(IS_I2C_OWN_ADDRESS1(I2C_InitStruct->I2C_OwnAddress1));

  assert_param(IS_I2C_ACK_STATE(I2C_InitStruct->I2C_Ack));

  assert_param(IS_I2C_ACKNOWLEDGE_ADDRESS(I2C_InitStruct->I2C_AcknowledgedAddress));

/*---------------------------- I2Cx CR2 Configuration ------------------------*/

  /* Get the I2Cx CR2 value */

  tmpreg = I2Cx->CR2;

  /* Clear frequency FREQ[5:0] bits */

  tmpreg &= CR2_FREQ_Reset;

  /* Get pclk1 frequency value */

  RCC_GetClocksFreq(&rcc_clocks);

  pclk1 = rcc_clocks.PCLK1_Frequency;

  /* Set frequency bits depending on pclk1 value */

  freqrange = (uint16_t)(pclk1 / 1000000);

  tmpreg |= freqrange;

  /* Write to I2Cx CR2 */

  I2Cx->CR2 = tmpreg;

/*---------------------------- I2Cx CCR Configuration ------------------------*/

  /* Disable the selected I2C peripheral to configure TRISE */

  I2Cx->CR1 &= CR1_PE_Reset;

  /* Reset tmpreg value */

  /* Clear F/S, DUTY and CCR[11:0] bits */

  tmpreg = 0;

  /* Configure speed in standard mode */

  if (I2C_InitStruct->I2C_ClockSpeed <= 100000)

  {

    /* Standard mode speed calculate */

    result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed << 1));

    /* Test if CCR value is under 0x4*/

    if (result < 0x04)

    {

      /* Set minimum allowed value */

      result = 0x04;  

    }

    /* Set speed value for standard mode */

    tmpreg |= result;          

    /* Set Maximum Rise Time for standard mode */

    I2Cx->TRISE = freqrange + 1; 

  }

  /* Configure speed in fast mode */

  else /*(I2C_InitStruct->I2C_ClockSpeed <= 400000)*/

  {

    if (I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_2)

    {

      /* Fast mode speed calculate: Tlow/Thigh = 2 */

      result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 3));

    }

    else /*I2C_InitStruct->I2C_DutyCycle == I2C_DutyCycle_16_9*/

    {

      /* Fast mode speed calculate: Tlow/Thigh = 16/9 */

      result = (uint16_t)(pclk1 / (I2C_InitStruct->I2C_ClockSpeed * 25));

      /* Set DUTY bit */

      result |= I2C_DutyCycle_16_9;

    }

    /* Test if CCR value is under 0x1*/

    if ((result & CCR_CCR_Set) == 0)

    {

      /* Set minimum allowed value */

      result |= (uint16_t)0x0001;  

    }

    /* Set speed value and set F/S bit for fast mode */

    tmpreg |= (uint16_t)(result | CCR_FS_Set);

    /* Set Maximum Rise Time for fast mode */

    I2Cx->TRISE = (uint16_t)(((freqrange * (uint16_t)300) / (uint16_t)1000) + (uint16_t)1);  

  }

  /* Write to I2Cx CCR */

  I2Cx->CCR = tmpreg;

  /* Enable the selected I2C peripheral */

  I2Cx->CR1 |= CR1_PE_Set;

/*---------------------------- I2Cx CR1 Configuration ------------------------*/

  /* Get the I2Cx CR1 value */

  tmpreg = I2Cx->CR1;

  /* Clear ACK, SMBTYPE and  SMBUS bits */

  tmpreg &= CR1_CLEAR_Mask;

  /* Configure I2Cx: mode and acknowledgement */

  /* Set SMBTYPE and SMBUS bits according to I2C_Mode value */

  /* Set ACK bit according to I2C_Ack value */

  tmpreg |= (uint16_t)((uint32_t)I2C_InitStruct->I2C_Mode | I2C_InitStruct->I2C_Ack);

  /* Write to I2Cx CR1 */

  I2Cx->CR1 = tmpreg;

/*---------------------------- I2Cx OAR1 Configuration -----------------------*/

  /* Set I2Cx Own Address1 and acknowledged address */

  I2Cx->OAR1 = (I2C_InitStruct->I2C_AcknowledgedAddress | I2C_InitStruct->I2C_OwnAddress1);

}

/**

  * @brief  Fills each I2C_InitStruct member with its default value.

  * @param  I2C_InitStruct: pointer to an I2C_InitTypeDef structure which will be initialized.

  * @retval None

  */

void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct)

{

/*---------------- Reset I2C init structure parameters values ----------------*/

  /* initialize the I2C_ClockSpeed member */

  I2C_InitStruct->I2C_ClockSpeed = 5000;

  /* Initialize the I2C_Mode member */

  I2C_InitStruct->I2C_Mode = I2C_Mode_I2C;

  /* Initialize the I2C_DutyCycle member */

  I2C_InitStruct->I2C_DutyCycle = I2C_DutyCycle_2;

  /* Initialize the I2C_OwnAddress1 member */

  I2C_InitStruct->I2C_OwnAddress1 = 0;

  /* Initialize the I2C_Ack member */

  I2C_InitStruct->I2C_Ack = I2C_Ack_Disable;

  /* Initialize the I2C_AcknowledgedAddress member */

  I2C_InitStruct->I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;

}

/**

  * @brief  Enables or disables the specified I2C peripheral.

  * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.

  * @param  NewState: new state of the I2Cx peripheral. 

  *   This parameter can be: ENABLE or DISABLE.

  * @retval None

  */

void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState)

{

  /* Check the parameters */

  assert_param(IS_I2C_ALL_PERIPH(I2Cx));

  assert_param(IS_FUNCTIONAL_STATE(NewState));

  if (NewState != DISABLE)

  {

    /* Enable the selected I2C peripheral */

    I2Cx->CR1 |= CR1_PE_Set;

  }

  else

  {

    /* Disable the selected I2C peripheral */

    I2Cx->CR1 &= CR1_PE_Reset;

  }

}

/**

  * @brief  Enables or disables the specified I2C DMA requests.

  * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.

  * @param  NewState: new state of the I2C DMA transfer.

  *   This parameter can be: ENABLE or DISABLE.

  * @retval None

  */

void I2C_DMACmd(I2C_TypeDef* I2Cx, FunctionalState NewState)

{

  /* Check the parameters */

  assert_param(IS_I2C_ALL_PERIPH(I2Cx));

  assert_param(IS_FUNCTIONAL_STATE(NewState));

  if (NewState != DISABLE)

  {

    /* Enable the selected I2C DMA requests */

    I2Cx->CR2 |= CR2_DMAEN_Set;

  }

  else

  {

    /* Disable the selected I2C DMA requests */

    I2Cx->CR2 &= CR2_DMAEN_Reset;

  }

}

/**

  * @brief  Specifies if the next DMA transfer will be the last one.

  * @param  I2Cx: where x can be 1 or 2 to select the I2C peripheral.

  * @param  NewState: new state of the I2C DMA last transfer.

  *   This parameter can be: ENABLE or DISABLE.

  * @retval None

  */

void I2C_DMALastTransferCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)