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/**************************************************************************//**
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 * @file     core_cmInstr.h
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 * @brief    CMSIS Cortex-M Core Instruction Access Header File
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 * @version  V3.01
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 * @date     06. March 2012
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 *
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 * @note
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 * Copyright (C) 2009-2012 ARM Limited. All rights reserved.
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 *
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 * @par
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 * ARM Limited (ARM) is supplying this software for use with Cortex-M
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 * processor based microcontrollers.  This file can be freely distributed
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 * within development tools that are supporting such ARM based processors.
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 *
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 * @par
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 * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
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 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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 *
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 ******************************************************************************/
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#ifndef __CORE_CMINSTR_H
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#define __CORE_CMINSTR_H
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/* ##########################  Core Instruction Access  ######################### */
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/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
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  Access to dedicated instructions
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  @{
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*/
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#if   defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
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/* ARM armcc specific functions */
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#if (__ARMCC_VERSION < 400677)
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  #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
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#endif
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41

    
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/** \brief  No Operation
43

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    No Operation does nothing. This instruction can be used for code alignment purposes.
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 */
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#define __NOP                             __nop
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/** \brief  Wait For Interrupt
50

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    Wait For Interrupt is a hint instruction that suspends execution
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    until one of a number of events occurs.
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 */
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#define __WFI                             __wfi
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/** \brief  Wait For Event
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    Wait For Event is a hint instruction that permits the processor to enter
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    a low-power state until one of a number of events occurs.
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 */
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#define __WFE                             __wfe
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/** \brief  Send Event
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    Send Event is a hint instruction. It causes an event to be signaled to the CPU.
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 */
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#define __SEV                             __sev
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/** \brief  Instruction Synchronization Barrier
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    Instruction Synchronization Barrier flushes the pipeline in the processor,
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    so that all instructions following the ISB are fetched from cache or
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    memory, after the instruction has been completed.
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 */
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#define __ISB()                           __isb(0xF)
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/** \brief  Data Synchronization Barrier
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    This function acts as a special kind of Data Memory Barrier.
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    It completes when all explicit memory accesses before this instruction complete.
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 */
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#define __DSB()                           __dsb(0xF)
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/** \brief  Data Memory Barrier
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    This function ensures the apparent order of the explicit memory operations before
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    and after the instruction, without ensuring their completion.
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 */
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#define __DMB()                           __dmb(0xF)
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/** \brief  Reverse byte order (32 bit)
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    This function reverses the byte order in integer value.
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    \param [in]    value  Value to reverse
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    \return               Reversed value
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 */
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#define __REV                             __rev
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/** \brief  Reverse byte order (16 bit)
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    This function reverses the byte order in two unsigned short values.
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    \param [in]    value  Value to reverse
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    \return               Reversed value
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 */
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__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
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{
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  rev16 r0, r0
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  bx lr
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}
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/** \brief  Reverse byte order in signed short value
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    This function reverses the byte order in a signed short value with sign extension to integer.
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    \param [in]    value  Value to reverse
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    \return               Reversed value
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 */
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__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
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{
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  revsh r0, r0
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  bx lr
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}
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/** \brief  Rotate Right in unsigned value (32 bit)
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    This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
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    \param [in]    value  Value to rotate
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    \param [in]    value  Number of Bits to rotate
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    \return               Rotated value
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 */
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#define __ROR                             __ror
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#if       (__CORTEX_M >= 0x03)
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/** \brief  Reverse bit order of value
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    This function reverses the bit order of the given value.
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    \param [in]    value  Value to reverse
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    \return               Reversed value
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 */
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#define __RBIT                            __rbit
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/** \brief  LDR Exclusive (8 bit)
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    This function performs a exclusive LDR command for 8 bit value.
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    \param [in]    ptr  Pointer to data
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    \return             value of type uint8_t at (*ptr)
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 */
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#define __LDREXB(ptr)                     ((uint8_t ) __ldrex(ptr))
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/** \brief  LDR Exclusive (16 bit)
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    This function performs a exclusive LDR command for 16 bit values.
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    \param [in]    ptr  Pointer to data
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    \return        value of type uint16_t at (*ptr)
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 */
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#define __LDREXH(ptr)                     ((uint16_t) __ldrex(ptr))
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/** \brief  LDR Exclusive (32 bit)
179

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    This function performs a exclusive LDR command for 32 bit values.
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    \param [in]    ptr  Pointer to data
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    \return        value of type uint32_t at (*ptr)
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 */
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#define __LDREXW(ptr)                     ((uint32_t ) __ldrex(ptr))
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/** \brief  STR Exclusive (8 bit)
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    This function performs a exclusive STR command for 8 bit values.
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    \param [in]  value  Value to store
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    \param [in]    ptr  Pointer to location
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    \return          0  Function succeeded
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    \return          1  Function failed
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 */
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#define __STREXB(value, ptr)              __strex(value, ptr)
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/** \brief  STR Exclusive (16 bit)
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    This function performs a exclusive STR command for 16 bit values.
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    \param [in]  value  Value to store
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    \param [in]    ptr  Pointer to location
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    \return          0  Function succeeded
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    \return          1  Function failed
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 */
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#define __STREXH(value, ptr)              __strex(value, ptr)
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/** \brief  STR Exclusive (32 bit)
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    This function performs a exclusive STR command for 32 bit values.
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    \param [in]  value  Value to store
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    \param [in]    ptr  Pointer to location
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    \return          0  Function succeeded
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    \return          1  Function failed
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 */
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#define __STREXW(value, ptr)              __strex(value, ptr)
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/** \brief  Remove the exclusive lock
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    This function removes the exclusive lock which is created by LDREX.
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 */
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#define __CLREX                           __clrex
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/** \brief  Signed Saturate
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    This function saturates a signed value.
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    \param [in]  value  Value to be saturated
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    \param [in]    sat  Bit position to saturate to (1..32)
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    \return             Saturated value
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 */
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#define __SSAT                            __ssat
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/** \brief  Unsigned Saturate
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    This function saturates an unsigned value.
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    \param [in]  value  Value to be saturated
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    \param [in]    sat  Bit position to saturate to (0..31)
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    \return             Saturated value
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 */
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#define __USAT                            __usat
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/** \brief  Count leading zeros
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    This function counts the number of leading zeros of a data value.
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    \param [in]  value  Value to count the leading zeros
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    \return             number of leading zeros in value
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 */
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#define __CLZ                             __clz
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#endif /* (__CORTEX_M >= 0x03) */
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#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
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/* IAR iccarm specific functions */
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#include <cmsis_iar.h>
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#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
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/* TI CCS specific functions */
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#include <cmsis_ccs.h>
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279
#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
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/* GNU gcc specific functions */
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/** \brief  No Operation
283

284
    No Operation does nothing. This instruction can be used for code alignment purposes.
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 */
286
__attribute__( ( always_inline ) ) __STATIC_INLINE void __NOP(void)
287
{
288
  __ASM volatile ("nop");
289
}
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/** \brief  Wait For Interrupt
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294
    Wait For Interrupt is a hint instruction that suspends execution
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    until one of a number of events occurs.
296
 */
297
__attribute__( ( always_inline ) ) __STATIC_INLINE void __WFI(void)
298
{
299
  __ASM volatile ("wfi");
300
}
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/** \brief  Wait For Event
304

305
    Wait For Event is a hint instruction that permits the processor to enter
306
    a low-power state until one of a number of events occurs.
307
 */
308
__attribute__( ( always_inline ) ) __STATIC_INLINE void __WFE(void)
309
{
310
  __ASM volatile ("wfe");
311
}
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/** \brief  Send Event
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316
    Send Event is a hint instruction. It causes an event to be signaled to the CPU.
317
 */
318
__attribute__( ( always_inline ) ) __STATIC_INLINE void __SEV(void)
319
{
320
  __ASM volatile ("sev");
321
}
322

    
323

    
324
/** \brief  Instruction Synchronization Barrier
325

326
    Instruction Synchronization Barrier flushes the pipeline in the processor,
327
    so that all instructions following the ISB are fetched from cache or
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    memory, after the instruction has been completed.
329
 */
330
__attribute__( ( always_inline ) ) __STATIC_INLINE void __ISB(void)
331
{
332
  __ASM volatile ("isb");
333
}
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/** \brief  Data Synchronization Barrier
337

338
    This function acts as a special kind of Data Memory Barrier.
339
    It completes when all explicit memory accesses before this instruction complete.
340
 */
341
__attribute__( ( always_inline ) ) __STATIC_INLINE void __DSB(void)
342
{
343
  __ASM volatile ("dsb");
344
}
345

    
346

    
347
/** \brief  Data Memory Barrier
348

349
    This function ensures the apparent order of the explicit memory operations before
350
    and after the instruction, without ensuring their completion.
351
 */
352
__attribute__( ( always_inline ) ) __STATIC_INLINE void __DMB(void)
353
{
354
  __ASM volatile ("dmb");
355
}
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357

    
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/** \brief  Reverse byte order (32 bit)
359

360
    This function reverses the byte order in integer value.
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362
    \param [in]    value  Value to reverse
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    \return               Reversed value
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 */
365
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV(uint32_t value)
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{
367
  uint32_t result;
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369
  __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
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  return(result);
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}
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/** \brief  Reverse byte order (16 bit)
375

376
    This function reverses the byte order in two unsigned short values.
377

378
    \param [in]    value  Value to reverse
379
    \return               Reversed value
380
 */
381
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __REV16(uint32_t value)
382
{
383
  uint32_t result;
384

    
385
  __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
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  return(result);
387
}
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389

    
390
/** \brief  Reverse byte order in signed short value
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392
    This function reverses the byte order in a signed short value with sign extension to integer.
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    \param [in]    value  Value to reverse
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    \return               Reversed value
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 */
397
__attribute__( ( always_inline ) ) __STATIC_INLINE int32_t __REVSH(int32_t value)
398
{
399
  uint32_t result;
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401
  __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
402
  return(result);
403
}
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/** \brief  Rotate Right in unsigned value (32 bit)
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408
    This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
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410
    \param [in]    value  Value to rotate
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    \param [in]    value  Number of Bits to rotate
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    \return               Rotated value
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 */
414
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
415
{
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417
  __ASM volatile ("ror %0, %0, %1" : "+r" (op1) : "r" (op2) );
418
  return(op1);
419
}
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422
#if       (__CORTEX_M >= 0x03)
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424
/** \brief  Reverse bit order of value
425

426
    This function reverses the bit order of the given value.
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428
    \param [in]    value  Value to reverse
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    \return               Reversed value
430
 */
431
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
432
{
433
  uint32_t result;
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435
   __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
436
   return(result);
437
}
438

    
439

    
440
/** \brief  LDR Exclusive (8 bit)
441

442
    This function performs a exclusive LDR command for 8 bit value.
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444
    \param [in]    ptr  Pointer to data
445
    \return             value of type uint8_t at (*ptr)
446
 */
447
__attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
448
{
449
    uint8_t result;
450

    
451
   __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
452
   return(result);
453
}
454

    
455

    
456
/** \brief  LDR Exclusive (16 bit)
457

458
    This function performs a exclusive LDR command for 16 bit values.
459

460
    \param [in]    ptr  Pointer to data
461
    \return        value of type uint16_t at (*ptr)
462
 */
463
__attribute__( ( always_inline ) ) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
464
{
465
    uint16_t result;
466

    
467
   __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
468
   return(result);
469
}
470

    
471

    
472
/** \brief  LDR Exclusive (32 bit)
473

474
    This function performs a exclusive LDR command for 32 bit values.
475

476
    \param [in]    ptr  Pointer to data
477
    \return        value of type uint32_t at (*ptr)
478
 */
479
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
480
{
481
    uint32_t result;
482

    
483
   __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
484
   return(result);
485
}
486

    
487

    
488
/** \brief  STR Exclusive (8 bit)
489

490
    This function performs a exclusive STR command for 8 bit values.
491

492
    \param [in]  value  Value to store
493
    \param [in]    ptr  Pointer to location
494
    \return          0  Function succeeded
495
    \return          1  Function failed
496
 */
497
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
498
{
499
   uint32_t result;
500

    
501
   __ASM volatile ("strexb %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
502
   return(result);
503
}
504

    
505

    
506
/** \brief  STR Exclusive (16 bit)
507

508
    This function performs a exclusive STR command for 16 bit values.
509

510
    \param [in]  value  Value to store
511
    \param [in]    ptr  Pointer to location
512
    \return          0  Function succeeded
513
    \return          1  Function failed
514
 */
515
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
516
{
517
   uint32_t result;
518

    
519
   __ASM volatile ("strexh %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
520
   return(result);
521
}
522

    
523

    
524
/** \brief  STR Exclusive (32 bit)
525

526
    This function performs a exclusive STR command for 32 bit values.
527

528
    \param [in]  value  Value to store
529
    \param [in]    ptr  Pointer to location
530
    \return          0  Function succeeded
531
    \return          1  Function failed
532
 */
533
__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
534
{
535
   uint32_t result;
536

    
537
   __ASM volatile ("strex %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value) );
538
   return(result);
539
}
540

    
541

    
542
/** \brief  Remove the exclusive lock
543

544
    This function removes the exclusive lock which is created by LDREX.
545

546
 */
547
__attribute__( ( always_inline ) ) __STATIC_INLINE void __CLREX(void)
548
{
549
  __ASM volatile ("clrex");
550
}
551

    
552

    
553
/** \brief  Signed Saturate
554

555
    This function saturates a signed value.
556

557
    \param [in]  value  Value to be saturated
558
    \param [in]    sat  Bit position to saturate to (1..32)
559
    \return             Saturated value
560
 */
561
#define __SSAT(ARG1,ARG2) \
562
({                          \
563
  uint32_t __RES, __ARG1 = (ARG1); \
564
  __ASM ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
565
  __RES; \
566
 })
567

    
568

    
569
/** \brief  Unsigned Saturate
570

571
    This function saturates an unsigned value.
572

573
    \param [in]  value  Value to be saturated
574
    \param [in]    sat  Bit position to saturate to (0..31)
575
    \return             Saturated value
576
 */
577
#define __USAT(ARG1,ARG2) \
578
({                          \
579
  uint32_t __RES, __ARG1 = (ARG1); \
580
  __ASM ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
581
  __RES; \
582
 })
583

    
584

    
585
/** \brief  Count leading zeros
586

587
    This function counts the number of leading zeros of a data value.
588

589
    \param [in]  value  Value to count the leading zeros
590
    \return             number of leading zeros in value
591
 */
592
__attribute__( ( always_inline ) ) __STATIC_INLINE uint8_t __CLZ(uint32_t value)
593
{
594
  uint8_t result;
595

    
596
  __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
597
  return(result);
598
}
599

    
600
#endif /* (__CORTEX_M >= 0x03) */
601

    
602

    
603

    
604

    
605
#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
606
/* TASKING carm specific functions */
607

    
608
/*
609
 * The CMSIS functions have been implemented as intrinsics in the compiler.
610
 * Please use "carm -?i" to get an up to date list of all intrinsics,
611
 * Including the CMSIS ones.
612
 */
613

    
614
#endif
615

    
616
/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
617

    
618
#endif /* __CORE_CMINSTR_H */