amiro-blt / Target / Demo / ARMCM4_STM32F405_Power_Management_GCC / Boot / lib / stdperiphlib / STM32F4xx_StdPeriph_Driver / src / misc.c @ 69661903
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/**
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******************************************************************************
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* @file misc.c
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* @author MCD Application Team
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* @version V1.1.0
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* @date 11-January-2013
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* @brief This file provides all the miscellaneous firmware functions (add-on
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* to CMSIS functions).
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*
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* @verbatim
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*
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* ===================================================================
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* How to configure Interrupts using driver
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* ===================================================================
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*
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* This section provide functions allowing to configure the NVIC interrupts (IRQ).
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* The Cortex-M4 exceptions are managed by CMSIS functions.
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*
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* 1. Configure the NVIC Priority Grouping using NVIC_PriorityGroupConfig()
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* function according to the following table.
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* The table below gives the allowed values of the pre-emption priority and subpriority according
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* to the Priority Grouping configuration performed by NVIC_PriorityGroupConfig function
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* ==========================================================================================================================
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* NVIC_PriorityGroup | NVIC_IRQChannelPreemptionPriority | NVIC_IRQChannelSubPriority | Description
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* ==========================================================================================================================
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* NVIC_PriorityGroup_0 | 0 | 0-15 | 0 bits for pre-emption priority
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* | | | 4 bits for subpriority
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* --------------------------------------------------------------------------------------------------------------------------
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* NVIC_PriorityGroup_1 | 0-1 | 0-7 | 1 bits for pre-emption priority
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* | | | 3 bits for subpriority
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* --------------------------------------------------------------------------------------------------------------------------
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* NVIC_PriorityGroup_2 | 0-3 | 0-3 | 2 bits for pre-emption priority
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* | | | 2 bits for subpriority
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* --------------------------------------------------------------------------------------------------------------------------
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* NVIC_PriorityGroup_3 | 0-7 | 0-1 | 3 bits for pre-emption priority
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* | | | 1 bits for subpriority
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* --------------------------------------------------------------------------------------------------------------------------
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* NVIC_PriorityGroup_4 | 0-15 | 0 | 4 bits for pre-emption priority
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* | | | 0 bits for subpriority
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* ==========================================================================================================================
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*
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* 2. Enable and Configure the priority of the selected IRQ Channels using NVIC_Init()
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*
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* @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
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* The pending IRQ priority will be managed only by the subpriority.
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*
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* @note IRQ priority order (sorted by highest to lowest priority):
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* - Lowest pre-emption priority
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* - Lowest subpriority
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* - Lowest hardware priority (IRQ number)
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*
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* @endverbatim
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*
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "misc.h" |
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/** @addtogroup STM32F4xx_StdPeriph_Driver
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* @{
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*/
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/** @defgroup MISC
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* @brief MISC driver modules
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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#define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000) |
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/** @defgroup MISC_Private_Functions
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* @{
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*/
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/**
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* @brief Configures the priority grouping: pre-emption priority and subpriority.
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* @param NVIC_PriorityGroup: specifies the priority grouping bits length.
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* This parameter can be one of the following values:
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* @arg NVIC_PriorityGroup_0: 0 bits for pre-emption priority
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* 4 bits for subpriority
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* @arg NVIC_PriorityGroup_1: 1 bits for pre-emption priority
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* 3 bits for subpriority
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* @arg NVIC_PriorityGroup_2: 2 bits for pre-emption priority
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* 2 bits for subpriority
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* @arg NVIC_PriorityGroup_3: 3 bits for pre-emption priority
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* 1 bits for subpriority
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* @arg NVIC_PriorityGroup_4: 4 bits for pre-emption priority
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* 0 bits for subpriority
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* @note When the NVIC_PriorityGroup_0 is selected, IRQ pre-emption is no more possible.
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* The pending IRQ priority will be managed only by the subpriority.
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* @retval None
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*/
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void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
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{ |
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/* Check the parameters */
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assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup)); |
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/* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
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SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup; |
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} |
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/**
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* @brief Initializes the NVIC peripheral according to the specified
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* parameters in the NVIC_InitStruct.
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* @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig()
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* function should be called before.
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* @param NVIC_InitStruct: pointer to a NVIC_InitTypeDef structure that contains
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* the configuration information for the specified NVIC peripheral.
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* @retval None
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*/
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void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
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{ |
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uint8_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F; |
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/* Check the parameters */
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assert_param(IS_FUNCTIONAL_STATE(NVIC_InitStruct->NVIC_IRQChannelCmd)); |
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assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority)); |
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assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority)); |
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if (NVIC_InitStruct->NVIC_IRQChannelCmd != DISABLE)
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{ |
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/* Compute the Corresponding IRQ Priority --------------------------------*/
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tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08; |
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tmppre = (0x4 - tmppriority);
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tmpsub = tmpsub >> tmppriority; |
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tmppriority = NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre; |
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tmppriority |= (uint8_t)(NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub); |
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tmppriority = tmppriority << 0x04;
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NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority; |
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/* Enable the Selected IRQ Channels --------------------------------------*/
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NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
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(uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); |
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} |
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else
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{ |
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/* Disable the Selected IRQ Channels -------------------------------------*/
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NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
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(uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F); |
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} |
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} |
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/**
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* @brief Sets the vector table location and Offset.
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* @param NVIC_VectTab: specifies if the vector table is in RAM or FLASH memory.
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* This parameter can be one of the following values:
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* @arg NVIC_VectTab_RAM: Vector Table in internal SRAM.
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* @arg NVIC_VectTab_FLASH: Vector Table in internal FLASH.
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* @param Offset: Vector Table base offset field. This value must be a multiple of 0x200.
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* @retval None
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*/
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void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
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{ |
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/* Check the parameters */
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assert_param(IS_NVIC_VECTTAB(NVIC_VectTab)); |
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assert_param(IS_NVIC_OFFSET(Offset)); |
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SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
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} |
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/**
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* @brief Selects the condition for the system to enter low power mode.
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* @param LowPowerMode: Specifies the new mode for the system to enter low power mode.
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* This parameter can be one of the following values:
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* @arg NVIC_LP_SEVONPEND: Low Power SEV on Pend.
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* @arg NVIC_LP_SLEEPDEEP: Low Power DEEPSLEEP request.
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* @arg NVIC_LP_SLEEPONEXIT: Low Power Sleep on Exit.
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* @param NewState: new state of LP condition. This parameter can be: ENABLE or DISABLE.
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* @retval None
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*/
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void NVIC_SystemLPConfig(uint8_t LowPowerMode, FunctionalState NewState)
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{ |
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/* Check the parameters */
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assert_param(IS_NVIC_LP(LowPowerMode)); |
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assert_param(IS_FUNCTIONAL_STATE(NewState)); |
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if (NewState != DISABLE)
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{ |
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SCB->SCR |= LowPowerMode; |
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} |
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else
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{ |
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SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode); |
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} |
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} |
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/**
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* @brief Configures the SysTick clock source.
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* @param SysTick_CLKSource: specifies the SysTick clock source.
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* This parameter can be one of the following values:
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* @arg SysTick_CLKSource_HCLK_Div8: AHB clock divided by 8 selected as SysTick clock source.
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* @arg SysTick_CLKSource_HCLK: AHB clock selected as SysTick clock source.
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* @retval None
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*/
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void SysTick_CLKSourceConfig(uint32_t SysTick_CLKSource)
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{ |
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/* Check the parameters */
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assert_param(IS_SYSTICK_CLK_SOURCE(SysTick_CLKSource)); |
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if (SysTick_CLKSource == SysTick_CLKSource_HCLK)
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{ |
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SysTick->CTRL |= SysTick_CLKSource_HCLK; |
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} |
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else
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{ |
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SysTick->CTRL &= SysTick_CLKSource_HCLK_Div8; |
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} |
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} |
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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