amiro-blt / Target / Demo / ARMCM4_STM32F405_Power_Management_GCC / Boot / lib / stdperiphlib / STM32F4xx_StdPeriph_Driver / src / stm32f4xx_tim.c @ 69661903
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/**
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******************************************************************************
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* @file stm32f4xx_tim.c
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* @author MCD Application Team
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* @version V1.1.0
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* @date 11-January-2013
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* @brief This file provides firmware functions to manage the following
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* functionalities of the TIM peripheral:
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* + TimeBase management
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* + Output Compare management
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* + Input Capture management
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* + Advanced-control timers (TIM1 and TIM8) specific features
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* + Interrupts, DMA and flags management
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* + Clocks management
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* + Synchronization management
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* + Specific interface management
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* + Specific remapping management
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*
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@verbatim
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===============================================================================
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##### How to use this driver #####
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===============================================================================
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[..]
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This driver provides functions to configure and program the TIM
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of all STM32F4xx devices.
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These functions are split in 9 groups:
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(#) TIM TimeBase management: this group includes all needed functions
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to configure the TM Timebase unit:
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(++) Set/Get Prescaler
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(++) Set/Get Autoreload
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(++) Counter modes configuration
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(++) Set Clock division
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(++) Select the One Pulse mode
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(++) Update Request Configuration
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(++) Update Disable Configuration
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(++) Auto-Preload Configuration
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(++) Enable/Disable the counter
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(#) TIM Output Compare management: this group includes all needed
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functions to configure the Capture/Compare unit used in Output
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compare mode:
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(++) Configure each channel, independently, in Output Compare mode
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(++) Select the output compare modes
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(++) Select the Polarities of each channel
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(++) Set/Get the Capture/Compare register values
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(++) Select the Output Compare Fast mode
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(++) Select the Output Compare Forced mode
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(++) Output Compare-Preload Configuration
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(++) Clear Output Compare Reference
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(++) Select the OCREF Clear signal
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(++) Enable/Disable the Capture/Compare Channels
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(#) TIM Input Capture management: this group includes all needed
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functions to configure the Capture/Compare unit used in
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Input Capture mode:
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(++) Configure each channel in input capture mode
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(++) Configure Channel1/2 in PWM Input mode
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(++) Set the Input Capture Prescaler
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(++) Get the Capture/Compare values
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(#) Advanced-control timers (TIM1 and TIM8) specific features
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(++) Configures the Break input, dead time, Lock level, the OSSI,
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the OSSR State and the AOE(automatic output enable)
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(++) Enable/Disable the TIM peripheral Main Outputs
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(++) Select the Commutation event
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(++) Set/Reset the Capture Compare Preload Control bit
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(#) TIM interrupts, DMA and flags management
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(++) Enable/Disable interrupt sources
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(++) Get flags status
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(++) Clear flags/ Pending bits
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(++) Enable/Disable DMA requests
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(++) Configure DMA burst mode
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(++) Select CaptureCompare DMA request
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(#) TIM clocks management: this group includes all needed functions
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to configure the clock controller unit:
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(++) Select internal/External clock
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(++) Select the external clock mode: ETR(Mode1/Mode2), TIx or ITRx
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(#) TIM synchronization management: this group includes all needed
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functions to configure the Synchronization unit:
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(++) Select Input Trigger
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(++) Select Output Trigger
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(++) Select Master Slave Mode
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(++) ETR Configuration when used as external trigger
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(#) TIM specific interface management, this group includes all
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needed functions to use the specific TIM interface:
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(++) Encoder Interface Configuration
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(++) Select Hall Sensor
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(#) TIM specific remapping management includes the Remapping
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configuration of specific timers
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@endverbatim
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx_tim.h" |
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#include "stm32f4xx_rcc.h" |
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/** @addtogroup STM32F4xx_StdPeriph_Driver
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* @{
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*/
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/** @defgroup TIM
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* @brief TIM driver modules
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* ---------------------- TIM registers bit mask ------------------------ */
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#define SMCR_ETR_MASK ((uint16_t)0x00FF) |
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#define CCMR_OFFSET ((uint16_t)0x0018) |
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#define CCER_CCE_SET ((uint16_t)0x0001) |
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#define CCER_CCNE_SET ((uint16_t)0x0004) |
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#define CCMR_OC13M_MASK ((uint16_t)0xFF8F) |
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#define CCMR_OC24M_MASK ((uint16_t)0x8FFF) |
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, |
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uint16_t TIM_ICFilter); |
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static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, |
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uint16_t TIM_ICFilter); |
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static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, |
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uint16_t TIM_ICFilter); |
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static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection, |
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uint16_t TIM_ICFilter); |
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/* Private functions ---------------------------------------------------------*/
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/** @defgroup TIM_Private_Functions
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* @{
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*/
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/** @defgroup TIM_Group1 TimeBase management functions
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* @brief TimeBase management functions
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*
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@verbatim
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===============================================================================
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##### TimeBase management functions #####
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===============================================================================
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##### TIM Driver: how to use it in Timing(Time base) Mode #####
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===============================================================================
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[..]
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To use the Timer in Timing(Time base) mode, the following steps are mandatory:
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(#) Enable TIM clock using RCC_APBxPeriphClockCmd(RCC_APBxPeriph_TIMx, ENABLE) function
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(#) Fill the TIM_TimeBaseInitStruct with the desired parameters.
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(#) Call TIM_TimeBaseInit(TIMx, &TIM_TimeBaseInitStruct) to configure the Time Base unit
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with the corresponding configuration
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(#) Enable the NVIC if you need to generate the update interrupt.
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(#) Enable the corresponding interrupt using the function TIM_ITConfig(TIMx, TIM_IT_Update)
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(#) Call the TIM_Cmd(ENABLE) function to enable the TIM counter.
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-@- All other functions can be used separately to modify, if needed,
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a specific feature of the Timer.
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@endverbatim
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* @{
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*/
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/**
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* @brief Deinitializes the TIMx peripheral registers to their default reset values.
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* @param TIMx: where x can be 1 to 14 to select the TIM peripheral.
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* @retval None
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*/
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void TIM_DeInit(TIM_TypeDef* TIMx)
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{
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/* Check the parameters */
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assert_param(IS_TIM_ALL_PERIPH(TIMx)); |
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if (TIMx == TIM1)
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{
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, ENABLE); |
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, DISABLE); |
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} |
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else if (TIMx == TIM2) |
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{
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, ENABLE); |
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, DISABLE); |
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} |
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else if (TIMx == TIM3) |
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{
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, ENABLE); |
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, DISABLE); |
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} |
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else if (TIMx == TIM4) |
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{
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, ENABLE); |
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, DISABLE); |
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} |
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else if (TIMx == TIM5) |
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{
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, ENABLE); |
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, DISABLE); |
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} |
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else if (TIMx == TIM6) |
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{
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, ENABLE); |
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, DISABLE); |
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} |
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else if (TIMx == TIM7) |
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{
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, ENABLE); |
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, DISABLE); |
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} |
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else if (TIMx == TIM8) |
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{
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM8, ENABLE); |
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM8, DISABLE); |
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} |
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else if (TIMx == TIM9) |
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{
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM9, ENABLE); |
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM9, DISABLE); |
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} |
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else if (TIMx == TIM10) |
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{
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM10, ENABLE); |
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM10, DISABLE); |
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} |
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else if (TIMx == TIM11) |
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{
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM11, ENABLE); |
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RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM11, DISABLE); |
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} |
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else if (TIMx == TIM12) |
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{
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM12, ENABLE); |
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM12, DISABLE); |
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} |
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else if (TIMx == TIM13) |
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{
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM13, ENABLE); |
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM13, DISABLE); |
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} |
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else
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{
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if (TIMx == TIM14)
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{
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM14, ENABLE); |
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM14, DISABLE); |
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} |
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} |
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} |
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/**
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* @brief Initializes the TIMx Time Base Unit peripheral according to
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* the specified parameters in the TIM_TimeBaseInitStruct.
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* @param TIMx: where x can be 1 to 14 to select the TIM peripheral.
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* @param TIM_TimeBaseInitStruct: pointer to a TIM_TimeBaseInitTypeDef structure
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* that contains the configuration information for the specified TIM peripheral.
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* @retval None
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*/
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void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct)
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{
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uint16_t tmpcr1 = 0;
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/* Check the parameters */
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assert_param(IS_TIM_ALL_PERIPH(TIMx)); |
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assert_param(IS_TIM_COUNTER_MODE(TIM_TimeBaseInitStruct->TIM_CounterMode)); |
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assert_param(IS_TIM_CKD_DIV(TIM_TimeBaseInitStruct->TIM_ClockDivision)); |
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tmpcr1 = TIMx->CR1; |
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if((TIMx == TIM1) || (TIMx == TIM8)||
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(TIMx == TIM2) || (TIMx == TIM3)|| |
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(TIMx == TIM4) || (TIMx == TIM5)) |
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{
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/* Select the Counter Mode */
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tmpcr1 &= (uint16_t)(~(TIM_CR1_DIR | TIM_CR1_CMS)); |
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tmpcr1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_CounterMode; |
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} |
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if((TIMx != TIM6) && (TIMx != TIM7))
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{
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/* Set the clock division */
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tmpcr1 &= (uint16_t)(~TIM_CR1_CKD); |
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tmpcr1 |= (uint32_t)TIM_TimeBaseInitStruct->TIM_ClockDivision; |
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} |
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TIMx->CR1 = tmpcr1; |
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/* Set the Autoreload value */
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TIMx->ARR = TIM_TimeBaseInitStruct->TIM_Period ; |
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/* Set the Prescaler value */
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TIMx->PSC = TIM_TimeBaseInitStruct->TIM_Prescaler; |
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if ((TIMx == TIM1) || (TIMx == TIM8))
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{
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/* Set the Repetition Counter value */
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TIMx->RCR = TIM_TimeBaseInitStruct->TIM_RepetitionCounter; |
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} |
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/* Generate an update event to reload the Prescaler
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and the repetition counter(only for TIM1 and TIM8) value immediatly */
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TIMx->EGR = TIM_PSCReloadMode_Immediate; |
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} |
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/**
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* @brief Fills each TIM_TimeBaseInitStruct member with its default value.
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* @param TIM_TimeBaseInitStruct : pointer to a TIM_TimeBaseInitTypeDef
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* structure which will be initialized.
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* @retval None
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*/
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void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct)
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{
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/* Set the default configuration */
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TIM_TimeBaseInitStruct->TIM_Period = 0xFFFFFFFF;
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TIM_TimeBaseInitStruct->TIM_Prescaler = 0x0000;
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TIM_TimeBaseInitStruct->TIM_ClockDivision = TIM_CKD_DIV1; |
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TIM_TimeBaseInitStruct->TIM_CounterMode = TIM_CounterMode_Up; |
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TIM_TimeBaseInitStruct->TIM_RepetitionCounter = 0x0000;
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} |
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/**
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* @brief Configures the TIMx Prescaler.
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* @param TIMx: where x can be 1 to 14 to select the TIM peripheral.
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* @param Prescaler: specifies the Prescaler Register value
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* @param TIM_PSCReloadMode: specifies the TIM Prescaler Reload mode
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* This parameter can be one of the following values:
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* @arg TIM_PSCReloadMode_Update: Th |