amiro-blt / Target / Source / ARMCM3_STM32 / uart.c @ 9ed9243f
History | View | Annotate | Download (13.367 KB)
1 |
/************************************************************************************//** |
---|---|
2 |
* \file Source\ARMCM3_STM32\uart.c
|
3 |
* \brief Bootloader UART communication interface source file.
|
4 |
* \ingroup Target_ARMCM3_STM32
|
5 |
* \internal
|
6 |
*----------------------------------------------------------------------------------------
|
7 |
* C O P Y R I G H T
|
8 |
*----------------------------------------------------------------------------------------
|
9 |
* Copyright (c) 2011 by Feaser http://www.feaser.com All rights reserved
|
10 |
*
|
11 |
*----------------------------------------------------------------------------------------
|
12 |
* L I C E N S E
|
13 |
*----------------------------------------------------------------------------------------
|
14 |
* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
|
15 |
* modify it under the terms of the GNU General Public License as published by the Free
|
16 |
* Software Foundation, either version 3 of the License, or (at your option) any later
|
17 |
* version.
|
18 |
*
|
19 |
* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
|
20 |
* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
|
21 |
* PURPOSE. See the GNU General Public License for more details.
|
22 |
*
|
23 |
* You should have received a copy of the GNU General Public License along with OpenBLT.
|
24 |
* If not, see <http://www.gnu.org/licenses/>.
|
25 |
*
|
26 |
* A special exception to the GPL is included to allow you to distribute a combined work
|
27 |
* that includes OpenBLT without being obliged to provide the source code for any
|
28 |
* proprietary components. The exception text is included at the bottom of the license
|
29 |
* file <license.html>.
|
30 |
*
|
31 |
* \endinternal
|
32 |
****************************************************************************************/
|
33 |
|
34 |
/****************************************************************************************
|
35 |
* Include files
|
36 |
****************************************************************************************/
|
37 |
#include "boot.h" /* bootloader generic header */ |
38 |
|
39 |
|
40 |
#if (BOOT_COM_UART_ENABLE > 0 || BOOT_GATE_UART_ENABLE > 0) |
41 |
/****************************************************************************************
|
42 |
* Type definitions
|
43 |
****************************************************************************************/
|
44 |
/** \brief UART register layout. */
|
45 |
typedef struct |
46 |
{ |
47 |
volatile blt_int16u SR; /**< status register */ |
48 |
blt_int16u RESERVED0; |
49 |
volatile blt_int16u DR; /**< data register */ |
50 |
blt_int16u RESERVED1; |
51 |
volatile blt_int16u BRR; /**< baudrate register */ |
52 |
blt_int16u RESERVED2; |
53 |
volatile blt_int16u CR1; /**< control register 1 */ |
54 |
blt_int16u RESERVED3; |
55 |
volatile blt_int16u CR2; /**< control register 2 */ |
56 |
blt_int16u RESERVED4; |
57 |
volatile blt_int16u CR3; /**< control register 3 */ |
58 |
blt_int16u RESERVED5; |
59 |
volatile blt_int16u GTPR; /**< guard time and prescale reg. */ |
60 |
blt_int16u RESERVED6; |
61 |
} tUartRegs; /**< UART register layout type */
|
62 |
|
63 |
|
64 |
/****************************************************************************************
|
65 |
* Macro definitions
|
66 |
****************************************************************************************/
|
67 |
/** \brief USART enable bit. */
|
68 |
#define UART_BIT_UE ((blt_int16u)0x2000) |
69 |
/** \brief Transmitter enable bit. */
|
70 |
#define UART_BIT_TE ((blt_int16u)0x0008) |
71 |
/** \brief Receiver enable bit. */
|
72 |
#define UART_BIT_RE ((blt_int16u)0x0004) |
73 |
/** \brief Transmit data reg. empty bit. */
|
74 |
#define UART_BIT_TXE ((blt_int16u)0x0080) |
75 |
/** \brief Read data reg. not empty bit. */
|
76 |
#define UART_BIT_RXNE ((blt_int16u)0x0020) |
77 |
|
78 |
|
79 |
/****************************************************************************************
|
80 |
* Register definitions
|
81 |
****************************************************************************************/
|
82 |
#if (BOOT_COM_UART_CHANNEL_INDEX == 0) |
83 |
/** \brief Set UART base address to USART1. */
|
84 |
#define UARTx ((tUartRegs *) (blt_int32u)0x40013800) |
85 |
#elif (BOOT_COM_UART_CHANNEL_INDEX == 1) |
86 |
/** \brief Set UART base address to USART2. */
|
87 |
#define UARTx ((tUartRegs *) (blt_int32u)0x40004400) |
88 |
#else
|
89 |
/** \brief Set UART base address to USART1 by default. */
|
90 |
#define UARTx ((tUartRegs *) (blt_int32u)0x40013800) |
91 |
#endif
|
92 |
|
93 |
#if (BOOT_DEBUGGING_UART2_ENABLE > 0) |
94 |
/* activate debugging UART on UART2 */
|
95 |
#define UARTDebug ((tUartRegs *) (blt_int32u)0x40004400) |
96 |
#endif
|
97 |
|
98 |
|
99 |
/****************************************************************************************
|
100 |
* Function prototypes
|
101 |
****************************************************************************************/
|
102 |
static blt_bool UartReceiveByte(blt_int8u *data);
|
103 |
static blt_bool UartTransmitByte(blt_int8u data);
|
104 |
#if (BOOT_DEBUGGING_UART2_ENABLE > 0) |
105 |
static blt_bool UartTransmitDebuggingByte(blt_int8u data);
|
106 |
#endif
|
107 |
|
108 |
/************************************************************************************//** |
109 |
** \brief Initializes the UART communication interface.
|
110 |
** \return none.
|
111 |
**
|
112 |
****************************************************************************************/
|
113 |
void UartInit(void) |
114 |
{ |
115 |
/* the current implementation supports USART1 and USART2. throw an assertion error in
|
116 |
* case a different UART channel is configured.
|
117 |
*/
|
118 |
ASSERT_CT((BOOT_COM_UART_CHANNEL_INDEX == 0) || (BOOT_COM_UART_CHANNEL_INDEX == 1)); |
119 |
/* first reset the UART configuration. note that this already configures the UART
|
120 |
* for 1 stopbit, 8 databits and no parity.
|
121 |
*/
|
122 |
UARTx->BRR = 0;
|
123 |
UARTx->CR1 = 0;
|
124 |
UARTx->CR2 = 0;
|
125 |
UARTx->CR3 = 0;
|
126 |
UARTx->GTPR = 0;
|
127 |
/* configure the baudrate, knowing that PCLKx is configured to be half of
|
128 |
* BOOT_CPU_SYSTEM_SPEED_KHZ.
|
129 |
*/
|
130 |
UARTx->BRR = ((BOOT_CPU_SYSTEM_SPEED_KHZ/2)*(blt_int32u)1000)/BOOT_COM_UART_BAUDRATE; |
131 |
/* enable the UART including the transmitter and the receiver */
|
132 |
UARTx->CR1 |= (UART_BIT_UE | UART_BIT_TE | UART_BIT_RE); |
133 |
|
134 |
#if (BOOT_DEBUGGING_UART2_ENABLE > 0) |
135 |
UARTDebug->BRR = 0;
|
136 |
UARTDebug->CR1 = 0;
|
137 |
UARTDebug->CR2 = 0;
|
138 |
UARTDebug->CR3 = 0;
|
139 |
UARTDebug->GTPR = 0;
|
140 |
/* configure the baudrate, knowing that PCLKx is configured to be half of
|
141 |
|
142 |
* BOOT_CPU_SYSTEM_SPEED_KHZ.
|
143 |
*/
|
144 |
UARTDebug->BRR = ((BOOT_CPU_SYSTEM_SPEED_KHZ/2)*(blt_int32u)1000)/BOOT_COM_UART_BAUDRATE; |
145 |
/* enable the UART including the transmitter and the receiver */
|
146 |
UARTDebug->CR1 |= (UART_BIT_UE | UART_BIT_TE | UART_BIT_RE); |
147 |
#endif
|
148 |
} /*** end of UartInit ***/
|
149 |
|
150 |
|
151 |
/************************************************************************************//** |
152 |
** \brief Transmits a packet formatted for the communication interface.
|
153 |
** \param data Pointer to byte array with data that it to be transmitted.
|
154 |
** \param len Number of bytes that are to be transmitted.
|
155 |
** \return none.
|
156 |
**
|
157 |
****************************************************************************************/
|
158 |
void UartTransmitPacket(blt_int8u *data, blt_int8u len)
|
159 |
{ |
160 |
blt_int16u data_index; |
161 |
blt_bool result; |
162 |
|
163 |
/* verify validity of the len-paramenter */
|
164 |
ASSERT_RT(len <= BOOT_COM_UART_TX_MAX_DATA); |
165 |
|
166 |
/* first transmit the length of the packet */
|
167 |
result = UartTransmitByte(len); |
168 |
ASSERT_RT(result == BLT_TRUE); |
169 |
|
170 |
/* transmit all the packet bytes one-by-one */
|
171 |
for (data_index = 0; data_index < len; data_index++) |
172 |
{ |
173 |
/* keep the watchdog happy */
|
174 |
CopService(); |
175 |
/* write byte */
|
176 |
result = UartTransmitByte(data[data_index]); |
177 |
ASSERT_RT(result == BLT_TRUE); |
178 |
} |
179 |
} /*** end of UartTransmitPacket ***/
|
180 |
|
181 |
|
182 |
/************************************************************************************//** |
183 |
** \brief Receives a communication interface packet if one is present.
|
184 |
** \param data Pointer to byte array where the data is to be stored.
|
185 |
** \return Length of message (if the message is invalid, the length will be 0).
|
186 |
**
|
187 |
****************************************************************************************/
|
188 |
blt_int8u UartReceivePacket(blt_int8u *data) |
189 |
{ |
190 |
static blt_int8u xcpCtoReqPacket[BOOT_COM_UART_RX_MAX_DATA+1]; /* one extra for length */ |
191 |
static blt_int8u xcpCtoRxLength;
|
192 |
static blt_int8u xcpUartDataLength;
|
193 |
static blt_bool xcpCtoRxInProgress = BLT_FALSE;
|
194 |
|
195 |
/* start of cto packet received? */
|
196 |
if (xcpCtoRxInProgress == BLT_FALSE)
|
197 |
{ |
198 |
/* store the message length when received */
|
199 |
if (UartReceiveByte(&xcpCtoReqPacket[0]) == BLT_TRUE) |
200 |
{ |
201 |
/* save message length */
|
202 |
xcpUartDataLength = xcpCtoReqPacket[0];
|
203 |
if (xcpCtoReqPacket[0] > 0) |
204 |
{ |
205 |
/* indicate that a cto packet is being received */
|
206 |
xcpCtoRxInProgress = BLT_TRUE; |
207 |
/* reset packet data count */
|
208 |
xcpCtoRxLength = 0;
|
209 |
} |
210 |
} |
211 |
} |
212 |
else
|
213 |
{ |
214 |
/* store the next packet byte */
|
215 |
if (UartReceiveByte(&xcpCtoReqPacket[xcpCtoRxLength+1]) == BLT_TRUE) |
216 |
{ |
217 |
/* increment the packet data count */
|
218 |
xcpCtoRxLength++; |
219 |
|
220 |
/* check to see if the entire packet was received */
|
221 |
if (xcpCtoRxLength == xcpCtoReqPacket[0]) |
222 |
{ |
223 |
/* copy the packet data */
|
224 |
CpuMemCopy((blt_int32u)data, (blt_int32u)&xcpCtoReqPacket[1], xcpCtoRxLength);
|
225 |
/* done with cto packet reception */
|
226 |
xcpCtoRxInProgress = BLT_FALSE; |
227 |
|
228 |
/* packet reception complete */
|
229 |
// return BLT_TRUE;
|
230 |
return xcpUartDataLength;
|
231 |
} |
232 |
} |
233 |
} |
234 |
/* packet reception not yet complete */
|
235 |
// return BLT_FALSE;
|
236 |
return 0; |
237 |
} /*** end of UartReceivePacket ***/
|
238 |
|
239 |
|
240 |
/************************************************************************************//** |
241 |
** \brief Receives a communication interface byte if one is present.
|
242 |
** \param data Pointer to byte where the data is to be stored.
|
243 |
** \return BLT_TRUE if a byte was received, BLT_FALSE otherwise.
|
244 |
**
|
245 |
****************************************************************************************/
|
246 |
static blt_bool UartReceiveByte(blt_int8u *data)
|
247 |
{ |
248 |
/* check if a new byte was received by means of the RDR-bit */
|
249 |
if((UARTx->SR & UART_BIT_RXNE) != 0) |
250 |
{ |
251 |
/* store the received byte */
|
252 |
data[0] = UARTx->DR;
|
253 |
/* inform caller of the newly received byte */
|
254 |
return BLT_TRUE;
|
255 |
} |
256 |
/* inform caller that no new data was received */
|
257 |
return BLT_FALSE;
|
258 |
} /*** end of UartReceiveByte ***/
|
259 |
|
260 |
|
261 |
/************************************************************************************//** |
262 |
** \brief Transmits a communication interface byte.
|
263 |
** \param data Value of byte that is to be transmitted.
|
264 |
** \return BLT_TRUE if the byte was transmitted, BLT_FALSE otherwise.
|
265 |
**
|
266 |
****************************************************************************************/
|
267 |
static blt_bool UartTransmitByte(blt_int8u data)
|
268 |
{ |
269 |
/* check if tx holding register can accept new data */
|
270 |
if ((UARTx->SR & UART_BIT_TXE) == 0) |
271 |
{ |
272 |
/* UART not ready. should not happen */
|
273 |
return BLT_FALSE;
|
274 |
} |
275 |
/* write byte to transmit holding register */
|
276 |
UARTx->DR = data; |
277 |
/* wait for tx holding register to be empty */
|
278 |
while((UARTx->SR & UART_BIT_TXE) == 0) |
279 |
{ |
280 |
/* keep the watchdog happy */
|
281 |
CopService(); |
282 |
} |
283 |
/* byte transmitted */
|
284 |
return BLT_TRUE;
|
285 |
} /*** end of UartTransmitByte ***/
|
286 |
//#endif /* BOOT_COM_UART_ENABLE > 0 || BOOT_GATE_UART_ENABLE > 0 */
|
287 |
|
288 |
|
289 |
|
290 |
|
291 |
#if (BOOT_DEBUGGING_UART2_ENABLE > 0) |
292 |
/************************************************************************************//** |
293 |
** \brief Transmits a packet formatted for the communication interface.
|
294 |
** \param data Pointer to byte array with data that it to be transmitted.
|
295 |
** \param len Number of bytes that are to be transmitted.
|
296 |
|
297 |
** \return none.
|
298 |
**
|
299 |
****************************************************************************************/
|
300 |
void UartSendDebuggingPacket(blt_int8u *data, blt_int8u len)
|
301 |
{ |
302 |
blt_int16u data_index; |
303 |
blt_bool result; |
304 |
|
305 |
/* verify validity of the len-paramenter */
|
306 |
ASSERT_RT(len <= BOOT_COM_UART_TX_MAX_DATA); |
307 |
|
308 |
/* first transmit the length of the packet */
|
309 |
result = UartTransmitDebuggingByte(len); |
310 |
ASSERT_RT(result == BLT_TRUE); |
311 |
|
312 |
/* transmit all the packet bytes one-by-one */
|
313 |
for (data_index = 0; data_index < len; data_index++) |
314 |
{ |
315 |
/* keep the watchdog happy */
|
316 |
CopService(); |
317 |
/* write byte */
|
318 |
result = UartTransmitDebuggingByte(data[data_index]); |
319 |
ASSERT_RT(result == BLT_TRUE); |
320 |
} |
321 |
} /*** end of UartTransmitPacket ***/
|
322 |
|
323 |
static blt_bool UartTransmitDebuggingByte(blt_int8u data)
|
324 |
{ |
325 |
/* check if tx holding register can accept new data */
|
326 |
if ((UARTDebug->SR & UART_BIT_TXE) == 0) |
327 |
{ |
328 |
/* UART not ready. should not happen */
|
329 |
return BLT_FALSE;
|
330 |
} |
331 |
/* write byte to transmit holding register */
|
332 |
UARTDebug->DR = data; |
333 |
/* wait for tx holding register to be empty */
|
334 |
while((UARTDebug->SR & UART_BIT_TXE) == 0) |
335 |
{ |
336 |
/* keep the watchdog happy */
|
337 |
CopService(); |
338 |
} |
339 |
/* byte transmitted */
|
340 |
return BLT_TRUE;
|
341 |
} /*** end of UartTransmitByte ***/
|
342 |
#endif
|
343 |
|
344 |
|
345 |
#endif /* BOOT_COM_UART_ENABLE > 0 || BOOT_GATE_UART_ENABLE > 0 */ |
346 |
|
347 |
/*********************************** end of uart.c *************************************/
|