amiro-blt / Target / Modules / PowerManagement_1-2 / Boot / lib / stdperiphlib / STM32F4xx_StdPeriph_Driver / inc / stm32f4xx_spi.h @ a270d48f
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/**
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******************************************************************************
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* @file stm32f4xx_spi.h
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* @author MCD Application Team
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* @version V1.1.0
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* @date 11-January-2013
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* @brief This file contains all the functions prototypes for the SPI
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* firmware library.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2>
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*
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* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
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* You may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.st.com/software_license_agreement_liberty_v2
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F4xx_SPI_H
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#define __STM32F4xx_SPI_H
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#ifdef __cplusplus
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extern "C" { |
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx.h" |
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/** @addtogroup STM32F4xx_StdPeriph_Driver
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* @{
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*/
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/** @addtogroup SPI
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* @{
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*/
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/* Exported types ------------------------------------------------------------*/
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/**
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* @brief SPI Init structure definition
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*/
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typedef struct |
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{
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uint16_t SPI_Direction; /*!< Specifies the SPI unidirectional or bidirectional data mode.
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This parameter can be a value of @ref SPI_data_direction */
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uint16_t SPI_Mode; /*!< Specifies the SPI operating mode.
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This parameter can be a value of @ref SPI_mode */
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uint16_t SPI_DataSize; /*!< Specifies the SPI data size.
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This parameter can be a value of @ref SPI_data_size */
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uint16_t SPI_CPOL; /*!< Specifies the serial clock steady state.
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This parameter can be a value of @ref SPI_Clock_Polarity */
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uint16_t SPI_CPHA; /*!< Specifies the clock active edge for the bit capture.
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This parameter can be a value of @ref SPI_Clock_Phase */
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uint16_t SPI_NSS; /*!< Specifies whether the NSS signal is managed by
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hardware (NSS pin) or by software using the SSI bit.
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This parameter can be a value of @ref SPI_Slave_Select_management */
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uint16_t SPI_BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
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used to configure the transmit and receive SCK clock.
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This parameter can be a value of @ref SPI_BaudRate_Prescaler
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@note The communication clock is derived from the master
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clock. The slave clock does not need to be set. */
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uint16_t SPI_FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
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This parameter can be a value of @ref SPI_MSB_LSB_transmission */
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uint16_t SPI_CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation. */
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}SPI_InitTypeDef; |
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/**
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* @brief I2S Init structure definition
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*/
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typedef struct |
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{
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uint16_t I2S_Mode; /*!< Specifies the I2S operating mode.
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This parameter can be a value of @ref I2S_Mode */
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uint16_t I2S_Standard; /*!< Specifies the standard used for the I2S communication.
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This parameter can be a value of @ref I2S_Standard */
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uint16_t I2S_DataFormat; /*!< Specifies the data format for the I2S communication.
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This parameter can be a value of @ref I2S_Data_Format */
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uint16_t I2S_MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
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This parameter can be a value of @ref I2S_MCLK_Output */
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uint32_t I2S_AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
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This parameter can be a value of @ref I2S_Audio_Frequency */
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uint16_t I2S_CPOL; /*!< Specifies the idle state of the I2S clock.
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This parameter can be a value of @ref I2S_Clock_Polarity */
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}I2S_InitTypeDef; |
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/* Exported constants --------------------------------------------------------*/
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/** @defgroup SPI_Exported_Constants
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* @{
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*/
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#define IS_SPI_ALL_PERIPH(PERIPH) (((PERIPH) == SPI1) || \
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((PERIPH) == SPI2) || \ |
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((PERIPH) == SPI3) || \ |
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((PERIPH) == SPI4) || \ |
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((PERIPH) == SPI5) || \ |
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((PERIPH) == SPI6)) |
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#define IS_SPI_ALL_PERIPH_EXT(PERIPH) (((PERIPH) == SPI1) || \
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((PERIPH) == SPI2) || \ |
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((PERIPH) == SPI3) || \ |
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((PERIPH) == SPI4) || \ |
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((PERIPH) == SPI5) || \ |
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((PERIPH) == SPI6) || \ |
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((PERIPH) == I2S2ext) || \ |
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((PERIPH) == I2S3ext)) |
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#define IS_SPI_23_PERIPH(PERIPH) (((PERIPH) == SPI2) || \
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((PERIPH) == SPI3)) |
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#define IS_SPI_23_PERIPH_EXT(PERIPH) (((PERIPH) == SPI2) || \
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((PERIPH) == SPI3) || \ |
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((PERIPH) == I2S2ext) || \ |
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((PERIPH) == I2S3ext)) |
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#define IS_I2S_EXT_PERIPH(PERIPH) (((PERIPH) == I2S2ext) || \
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((PERIPH) == I2S3ext)) |
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/** @defgroup SPI_data_direction
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* @{
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*/
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#define SPI_Direction_2Lines_FullDuplex ((uint16_t)0x0000) |
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#define SPI_Direction_2Lines_RxOnly ((uint16_t)0x0400) |
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#define SPI_Direction_1Line_Rx ((uint16_t)0x8000) |
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#define SPI_Direction_1Line_Tx ((uint16_t)0xC000) |
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#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_Direction_2Lines_FullDuplex) || \
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((MODE) == SPI_Direction_2Lines_RxOnly) || \ |
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((MODE) == SPI_Direction_1Line_Rx) || \ |
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((MODE) == SPI_Direction_1Line_Tx)) |
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/**
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* @}
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*/
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/** @defgroup SPI_mode
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* @{
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*/
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#define SPI_Mode_Master ((uint16_t)0x0104) |
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#define SPI_Mode_Slave ((uint16_t)0x0000) |
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#define IS_SPI_MODE(MODE) (((MODE) == SPI_Mode_Master) || \
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((MODE) == SPI_Mode_Slave)) |
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/**
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* @}
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*/
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/** @defgroup SPI_data_size
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* @{
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*/
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#define SPI_DataSize_16b ((uint16_t)0x0800) |
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#define SPI_DataSize_8b ((uint16_t)0x0000) |
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#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DataSize_16b) || \
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((DATASIZE) == SPI_DataSize_8b)) |
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/**
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* @}
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*/
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/** @defgroup SPI_Clock_Polarity
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* @{
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*/
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#define SPI_CPOL_Low ((uint16_t)0x0000) |
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#define SPI_CPOL_High ((uint16_t)0x0002) |
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#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_CPOL_Low) || \
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((CPOL) == SPI_CPOL_High)) |
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/**
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* @}
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*/
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/** @defgroup SPI_Clock_Phase
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* @{
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*/
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#define SPI_CPHA_1Edge ((uint16_t)0x0000) |
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#define SPI_CPHA_2Edge ((uint16_t)0x0001) |
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#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_CPHA_1Edge) || \
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((CPHA) == SPI_CPHA_2Edge)) |
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/**
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* @}
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*/
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/** @defgroup SPI_Slave_Select_management
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* @{
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*/
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#define SPI_NSS_Soft ((uint16_t)0x0200) |
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#define SPI_NSS_Hard ((uint16_t)0x0000) |
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#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_Soft) || \
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((NSS) == SPI_NSS_Hard)) |
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/**
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* @}
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*/
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/** @defgroup SPI_BaudRate_Prescaler
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* @{
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*/
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#define SPI_BaudRatePrescaler_2 ((uint16_t)0x0000) |
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#define SPI_BaudRatePrescaler_4 ((uint16_t)0x0008) |
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#define SPI_BaudRatePrescaler_8 ((uint16_t)0x0010) |
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#define SPI_BaudRatePrescaler_16 ((uint16_t)0x0018) |
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#define SPI_BaudRatePrescaler_32 ((uint16_t)0x0020) |
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#define SPI_BaudRatePrescaler_64 ((uint16_t)0x0028) |
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#define SPI_BaudRatePrescaler_128 ((uint16_t)0x0030) |
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#define SPI_BaudRatePrescaler_256 ((uint16_t)0x0038) |
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#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BaudRatePrescaler_2) || \
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((PRESCALER) == SPI_BaudRatePrescaler_4) || \ |
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((PRESCALER) == SPI_BaudRatePrescaler_8) || \ |
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((PRESCALER) == SPI_BaudRatePrescaler_16) || \ |
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((PRESCALER) == SPI_BaudRatePrescaler_32) || \ |
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((PRESCALER) == SPI_BaudRatePrescaler_64) || \ |
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((PRESCALER) == SPI_BaudRatePrescaler_128) || \ |
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((PRESCALER) == SPI_BaudRatePrescaler_256)) |
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/**
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* @}
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*/
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/** @defgroup SPI_MSB_LSB_transmission
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* @{
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*/
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#define SPI_FirstBit_MSB ((uint16_t)0x0000) |
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#define SPI_FirstBit_LSB ((uint16_t)0x0080) |
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#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FirstBit_MSB) || \
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((BIT) == SPI_FirstBit_LSB)) |
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/**
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* @}
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*/
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/** @defgroup SPI_I2S_Mode
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* @{
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*/
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#define I2S_Mode_SlaveTx ((uint16_t)0x0000) |
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#define I2S_Mode_SlaveRx ((uint16_t)0x0100) |
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#define I2S_Mode_MasterTx ((uint16_t)0x0200) |
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#define I2S_Mode_MasterRx ((uint16_t)0x0300) |
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#define IS_I2S_MODE(MODE) (((MODE) == I2S_Mode_SlaveTx) || \
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((MODE) == I2S_Mode_SlaveRx) || \ |
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((MODE) == I2S_Mode_MasterTx)|| \ |
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((MODE) == I2S_Mode_MasterRx)) |
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/**
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* @}
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*/
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/** @defgroup SPI_I2S_Standard
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* @{
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*/
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#define I2S_Standard_Phillips ((uint16_t)0x0000) |
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#define I2S_Standard_MSB ((uint16_t)0x0010) |
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#define I2S_Standard_LSB ((uint16_t)0x0020) |
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#define I2S_Standard_PCMShort ((uint16_t)0x0030) |
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#define I2S_Standard_PCMLong ((uint16_t)0x00B0) |
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#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_Standard_Phillips) || \
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((STANDARD) == I2S_Standard_MSB) || \ |
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((STANDARD) == I2S_Standard_LSB) || \ |
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((STANDARD) == I2S_Standard_PCMShort) || \ |
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((STANDARD) == I2S_Standard_PCMLong)) |
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/**
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* @}
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*/
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/** @defgroup SPI_I2S_Data_Format
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* @{
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*/
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#define I2S_DataFormat_16b ((uint16_t)0x0000) |
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#define I2S_DataFormat_16bextended ((uint16_t)0x0001) |
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#define I2S_DataFormat_24b ((uint16_t)0x0003) |
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#define I2S_DataFormat_32b ((uint16_t)0x0005) |
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#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DataFormat_16b) || \
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((FORMAT) == I2S_DataFormat_16bextended) || \ |
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((FORMAT) == I2S_DataFormat_24b) || \ |
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((FORMAT) == I2S_DataFormat_32b)) |
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/**
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* @}
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*/
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/** @defgroup SPI_I2S_MCLK_Output
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* @{
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*/
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#define I2S_MCLKOutput_Enable ((uint16_t)0x0200) |
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#define I2S_MCLKOutput_Disable ((uint16_t)0x0000) |
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#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOutput_Enable) || \
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((OUTPUT) == I2S_MCLKOutput_Disable)) |
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/**
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* @}
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*/
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/** @defgroup SPI_I2S_Audio_Frequency
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* @{
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*/
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#define I2S_AudioFreq_192k ((uint32_t)192000) |
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#define I2S_AudioFreq_96k ((uint32_t)96000) |
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#define I2S_AudioFreq_48k ((uint32_t)48000) |
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#define I2S_AudioFreq_44k ((uint32_t)44100) |
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#define I2S_AudioFreq_32k ((uint32_t)32000) |
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#define I2S_AudioFreq_22k ((uint32_t)22050) |
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#define I2S_AudioFreq_16k ((uint32_t)16000) |
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#define I2S_AudioFreq_11k ((uint32_t)11025) |
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#define I2S_AudioFreq_8k ((uint32_t)8000) |
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#define I2S_AudioFreq_Default ((uint32_t)2) |
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#define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AudioFreq_8k) && \
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((FREQ) <= I2S_AudioFreq_192k)) || \ |
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((FREQ) == I2S_AudioFreq_Default)) |
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/**
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* @}
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*/
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/** @defgroup SPI_I2S_Clock_Polarity
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* @{
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*/
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#define I2S_CPOL_Low ((uint16_t)0x0000) |
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#define I2S_CPOL_High ((uint16_t)0x0008) |
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#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_Low) || \
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((CPOL) == I2S_CPOL_High)) |
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/**
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* @}
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*/
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/** @defgroup SPI_I2S_DMA_transfer_requests
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* @{
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*/
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#define SPI_I2S_DMAReq_Tx ((uint16_t)0x0002) |
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#define SPI_I2S_DMAReq_Rx ((uint16_t)0x0001) |
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#define IS_SPI_I2S_DMAREQ(DMAREQ) ((((DMAREQ) & (uint16_t)0xFFFC) == 0x00) && ((DMAREQ) != 0x00)) |
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/**
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* @}
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*/
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/** @defgroup SPI_NSS_internal_software_management
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* @{
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*/
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#define SPI_NSSInternalSoft_Set ((uint16_t)0x0100) |
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#define SPI_NSSInternalSoft_Reset ((uint16_t)0xFEFF) |
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#define IS_SPI_NSS_INTERNAL(INTERNAL) (((INTERNAL) == SPI_NSSInternalSoft_Set) || \
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((INTERNAL) == SPI_NSSInternalSoft_Reset)) |
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/**
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* @}
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*/
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/** @defgroup SPI_CRC_Transmit_Receive
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* @{
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*/
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#define SPI_CRC_Tx ((uint8_t)0x00) |
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#define SPI_CRC_Rx ((uint8_t)0x01) |
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#define IS_SPI_CRC(CRC) (((CRC) == SPI_CRC_Tx) || ((CRC) == SPI_CRC_Rx))
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/**
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* @}
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*/
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/** @defgroup SPI_direction_transmit_receive
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* @{
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*/
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#define SPI_Direction_Rx ((uint16_t)0xBFFF) |
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#define SPI_Direction_Tx ((uint16_t)0x4000) |
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#define IS_SPI_DIRECTION(DIRECTION) (((DIRECTION) == SPI_Direction_Rx) || \
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((DIRECTION) == SPI_Direction_Tx)) |
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/**
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* @}
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*/
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/** @defgroup SPI_I2S_interrupts_definition
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* @{
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*/
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#define SPI_I2S_IT_TXE ((uint8_t)0x71) |
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#define SPI_I2S_IT_RXNE ((uint8_t)0x60) |
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#define SPI_I2S_IT_ERR ((uint8_t)0x50) |
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#define I2S_IT_UDR ((uint8_t)0x53) |
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#define SPI_I2S_IT_TIFRFE ((uint8_t)0x58) |
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#define IS_SPI_I2S_CONFIG_IT(IT) (((IT) == SPI_I2S_IT_TXE) || \
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((IT) == SPI_I2S_IT_RXNE) || \ |
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((IT) == SPI_I2S_IT_ERR)) |
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#define SPI_I2S_IT_OVR ((uint8_t)0x56) |
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#define SPI_IT_MODF ((uint8_t)0x55) |
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#define SPI_IT_CRCERR ((uint8_t)0x54) |
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#define IS_SPI_I2S_CLEAR_IT(IT) (((IT) == SPI_IT_CRCERR))
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#define IS_SPI_I2S_GET_IT(IT) (((IT) == SPI_I2S_IT_RXNE)|| ((IT) == SPI_I2S_IT_TXE) || \
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((IT) == SPI_IT_CRCERR) || ((IT) == SPI_IT_MODF) || \ |
| 424 |
((IT) == SPI_I2S_IT_OVR) || ((IT) == I2S_IT_UDR) ||\ |
| 425 |
((IT) == SPI_I2S_IT_TIFRFE)) |
| 426 |
/**
|
| 427 |
* @}
|
| 428 |
*/
|
| 429 |
|
| 430 |
/** @defgroup SPI_I2S_flags_definition
|
| 431 |
* @{
|
| 432 |
*/
|
| 433 |
|
| 434 |
#define SPI_I2S_FLAG_RXNE ((uint16_t)0x0001) |
| 435 |
#define SPI_I2S_FLAG_TXE ((uint16_t)0x0002) |
| 436 |
#define I2S_FLAG_CHSIDE ((uint16_t)0x0004) |
| 437 |
#define I2S_FLAG_UDR ((uint16_t)0x0008) |
| 438 |
#define SPI_FLAG_CRCERR ((uint16_t)0x0010) |
| 439 |
#define SPI_FLAG_MODF ((uint16_t)0x0020) |
| 440 |
#define SPI_I2S_FLAG_OVR ((uint16_t)0x0040) |
| 441 |
#define SPI_I2S_FLAG_BSY ((uint16_t)0x0080) |
| 442 |
#define SPI_I2S_FLAG_TIFRFE ((uint16_t)0x0100) |
| 443 |
|
| 444 |
#define IS_SPI_I2S_CLEAR_FLAG(FLAG) (((FLAG) == SPI_FLAG_CRCERR))
|
| 445 |
#define IS_SPI_I2S_GET_FLAG(FLAG) (((FLAG) == SPI_I2S_FLAG_BSY) || ((FLAG) == SPI_I2S_FLAG_OVR) || \
|
| 446 |
((FLAG) == SPI_FLAG_MODF) || ((FLAG) == SPI_FLAG_CRCERR) || \ |
| 447 |
((FLAG) == I2S_FLAG_UDR) || ((FLAG) == I2S_FLAG_CHSIDE) || \ |
| 448 |
((FLAG) == SPI_I2S_FLAG_TXE) || ((FLAG) == SPI_I2S_FLAG_RXNE)|| \ |
| 449 |
((FLAG) == SPI_I2S_FLAG_TIFRFE)) |
| 450 |
/**
|
| 451 |
* @}
|
| 452 |
*/
|
| 453 |
|
| 454 |
/** @defgroup SPI_CRC_polynomial
|
| 455 |
* @{
|
| 456 |
*/
|
| 457 |
|
| 458 |
#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) ((POLYNOMIAL) >= 0x1) |
| 459 |
/**
|
| 460 |
* @}
|
| 461 |
*/
|
| 462 |
|
| 463 |
/** @defgroup SPI_I2S_Legacy
|
| 464 |
* @{
|
| 465 |
*/
|
| 466 |
|
| 467 |
#define SPI_DMAReq_Tx SPI_I2S_DMAReq_Tx
|
| 468 |
#define SPI_DMAReq_Rx SPI_I2S_DMAReq_Rx
|
| 469 |
#define SPI_IT_TXE SPI_I2S_IT_TXE
|
| 470 |
#define SPI_IT_RXNE SPI_I2S_IT_RXNE
|
| 471 |
#define SPI_IT_ERR SPI_I2S_IT_ERR
|
| 472 |
#define SPI_IT_OVR SPI_I2S_IT_OVR
|
| 473 |
#define SPI_FLAG_RXNE SPI_I2S_FLAG_RXNE
|
| 474 |
#define SPI_FLAG_TXE SPI_I2S_FLAG_TXE
|
| 475 |
#define SPI_FLAG_OVR SPI_I2S_FLAG_OVR
|
| 476 |
#define SPI_FLAG_BSY SPI_I2S_FLAG_BSY
|
| 477 |
#define SPI_DeInit SPI_I2S_DeInit
|
| 478 |
#define SPI_ITConfig SPI_I2S_ITConfig
|
| 479 |
#define SPI_DMACmd SPI_I2S_DMACmd
|
| 480 |
#define SPI_SendData SPI_I2S_SendData
|
| 481 |
#define SPI_ReceiveData SPI_I2S_ReceiveData
|
| 482 |
#define SPI_GetFlagStatus SPI_I2S_GetFlagStatus
|
| 483 |
#define SPI_ClearFlag SPI_I2S_ClearFlag
|
| 484 |
#define SPI_GetITStatus SPI_I2S_GetITStatus
|
| 485 |
#define SPI_ClearITPendingBit SPI_I2S_ClearITPendingBit
|
| 486 |
/**
|
| 487 |
* @}
|
| 488 |
*/
|
| 489 |
|
| 490 |
/**
|
| 491 |
* @}
|
| 492 |
*/
|
| 493 |
|
| 494 |
/* Exported macro ------------------------------------------------------------*/
|
| 495 |
/* Exported functions --------------------------------------------------------*/
|
| 496 |
|
| 497 |
/* Function used to set the SPI configuration to the default reset state *****/
|
| 498 |
void SPI_I2S_DeInit(SPI_TypeDef* SPIx);
|
| 499 |
|
| 500 |
/* Initialization and Configuration functions *********************************/
|
| 501 |
void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct);
|
| 502 |
void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct);
|
| 503 |
void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct);
|
| 504 |
void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct);
|
| 505 |
void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
| 506 |
void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
| 507 |
void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize);
|
| 508 |
void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction);
|
| 509 |
void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft);
|
| 510 |
void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
| 511 |
void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState);
|
| 512 |
|
| 513 |
void I2S_FullDuplexConfig(SPI_TypeDef* I2Sxext, I2S_InitTypeDef* I2S_InitStruct);
|
| 514 |
|
| 515 |
/* Data transfers functions ***************************************************/
|
| 516 |
void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
|
| 517 |
uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx); |
| 518 |
|
| 519 |
/* Hardware CRC Calculation functions *****************************************/
|
| 520 |
void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState);
|
| 521 |
void SPI_TransmitCRC(SPI_TypeDef* SPIx);
|
| 522 |
uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC); |
| 523 |
uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx); |
| 524 |
|
| 525 |
/* DMA transfers management functions *****************************************/
|
| 526 |
void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
|
| 527 |
|
| 528 |
/* Interrupts and flags management functions **********************************/
|
| 529 |
void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
|
| 530 |
FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG); |
| 531 |
void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
|
| 532 |
ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT); |
| 533 |
void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
|
| 534 |
|
| 535 |
#ifdef __cplusplus
|
| 536 |
} |
| 537 |
#endif
|
| 538 |
|
| 539 |
#endif /*__STM32F4xx_SPI_H */ |
| 540 |
|
| 541 |
/**
|
| 542 |
* @}
|
| 543 |
*/
|
| 544 |
|
| 545 |
/**
|
| 546 |
* @}
|
| 547 |
*/
|
| 548 |
|
| 549 |
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|