AMiRo-OS

/************************************************************************************//**

* \file         Demo\ARMCM3_STM32_Olimex_STM32P103_GCC\Boot\blt_conf.h

* \brief        Bootloader configuration header file.

* \ingroup      Boot_ARMCM3_STM32_Olimex_STM32P103_GCC

* \internal

*----------------------------------------------------------------------------------------

*                          C O P Y R I G H T

*----------------------------------------------------------------------------------------

*   Copyright (c) 2012  by Feaser    http://www.feaser.com    All rights reserved

*

*----------------------------------------------------------------------------------------

*                            L I C E N S E

*----------------------------------------------------------------------------------------

* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or

* modify it under the terms of the GNU General Public License as published by the Free

* Software Foundation, either version 3 of the License, or (at your option) any later

* version.

*

* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;

* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR

* PURPOSE. See the GNU General Public License for more details.

*

* You should have received a copy of the GNU General Public License along with OpenBLT.

* If not, see <http://www.gnu.org/licenses/>.

*

* A special exception to the GPL is included to allow you to distribute a combined work

* that includes OpenBLT without being obliged to provide the source code for any

* proprietary components. The exception text is included at the bottom of the license

* file <license.html>.

*

* \endinternal

****************************************************************************************/

#ifndef BLT_CONF_H

#define BLT_CONF_H

/****************************************************************************************

*   C P U   D R I V E R   C O N F I G U R A T I O N

****************************************************************************************/

/* To properly initialize the baudrate clocks of the communication interface, typically

 * the speed of the crystal oscillator and/or the speed at which the system runs is

 * needed. Set these through configurables BOOT_CPU_XTAL_SPEED_KHZ and

 * BOOT_CPU_SYSTEM_SPEED_KHZ, respectively. To enable data exchange with the host that is

 * not dependent on the targets architecture, the byte ordering needs to be known.

 * Setting BOOT_CPU_BYTE_ORDER_MOTOROLA to 1 selects little endian mode and 0 selects

 * big endian mode.

 *

 * Set BOOT_CPU_USER_PROGRAM_START_HOOK to 1 if you would like a hook function to be

 * called the moment the user program is about to be started. This could be used to

 * de-initialize application specific parts, for example to stop blinking an LED, etc.

 */

/** \brief Frequency of the external crystal oscillator. */

#define BOOT_CPU_XTAL_SPEED_KHZ         (8000)

/** \brief Desired system speed. */

#define BOOT_CPU_SYSTEM_SPEED_KHZ       (72000)

/** \brief Motorola or Intel style byte ordering. */

#define BOOT_CPU_BYTE_ORDER_MOTOROLA    (0)

/** \brief Enable/disable hook function call right before user program start. */

#define BOOT_CPU_USER_PROGRAM_START_HOOK (1)

/****************************************************************************************

*   B O O T L O A D E R   O F   M A I N   D E V I C E

****************************************************************************************/

/* It is important to initialize if the bootloader is part of the main device. In this

 * case some backdoor loops have to stay opened and backdoor loops of other bootloaders

 * have to be controlled by this bootloader. Additionally the bootloader should be able

 * to send program code of user programs for other devices.

 * Make sure that one of the communication interfaces is the gateway!

 */

/** \brief Bootloader of main device. */

#define BOOTLOADER_OF_MAIN_DEVICE       (1)

/****************************************************************************************

*   C O M M U N I C A T I O N   I N T E R F A C E   C O N F I G U R A T I O N

****************************************************************************************/

/* The CAN communication interface is selected by setting the BOOT_COM_CAN_ENABLE

 * configurable to 1. Configurable BOOT_COM_CAN_BAUDRATE selects the communication speed

 * in bits/second. Two CAN messages are reserved for communication with the host. The

 * message identifier for sending data from the target to the host is configured with

 * BOOT_COM_CAN_TXMSG_ID. The one for receiving data from the host is configured with

 * BOOT_COM_CAN_RXMSG_ID. The maximum amount of data bytes in a message for data

 * transmission and reception is set through BOOT_COM_CAN_TX_MAX_DATA and

 * BOOT_COM_CAN_RX_MAX_DATA, respectively. It is common for a microcontroller to have more

 * than 1 CAN controller on board. The zero-based BOOT_COM_CAN_CHANNEL_INDEX selects the

 * CAN controller channel.

 *

 */

/** \brief Enable/disable CAN transport layer. */

#define BOOT_GATE_CAN_ENABLE            (1)

/** \brief Configure the desired CAN baudrate. */

#define BOOT_COM_CAN_BAUDRATE           (1000000)

/** \brief Configure CAN message ID target->host. */

#define BOOT_COM_CAN_TX_MSG_ID          (0x700)

/** \brief Configure number of bytes in the target->host CAN message. */

#define BOOT_COM_CAN_TX_MAX_DATA        (255)

/** \brief Configure CAN message ID host->target. */

#define BOOT_COM_CAN_RX_MSG_ID          (0x600)

/** \brief Configure number of bytes in the host->target CAN message. */

#define BOOT_COM_CAN_RX_MAX_DATA        (255)

/** \brief Select the desired CAN peripheral as a zero based index. */

#define BOOT_COM_CAN_CHANNEL_INDEX      (0)

/** \brief Configure CAN message acknowledgement ID addition (ORed with original ID). */

#define BOOT_COM_CAN_MSG_ACK            (0x001)

/** \brief Configure CAN message ID addition for continuous messages (ORed with original ID). */

#define BOOT_COM_CAN_MSG_SUBSEQUENT     (0x002)

/**

 * \brief Configure device ID for communication (start with 1).

 * \details The device ID is a 32 bit integer, which can be interpreted bytewise:

 *            <AMiRo_revision>:<moduleID>:<moduleVersion_major>:<moduleVersion_minor>

 *          For this module the according values are

 *            1:0:1:2 = 0x01000102

 */

#define BOOT_COM_DEVICE_ID              (0x01000102)

/* The UART communication interface is selected by setting the BOOT_COM_UART_ENABLE

 * configurable to 1. Configurable BOOT_COM_UART_BAUDRATE selects the communication speed

 * in bits/second. The maximum amount of data bytes in a message for data transmission

 * and reception is set through BOOT_COM_UART_TX_MAX_DATA and BOOT_COM_UART_RX_MAX_DATA,

 * respectively. It is common for a microcontroller to have more than 1 UART interface

 * on board. The zero-based BOOT_COM_UART_CHANNEL_INDEX selects the UART interface.

 *

 */

/** \brief Enable/disable UART transport layer. */

#define BOOT_COM_UART_ENABLE            (1)

/** \brief Configure the desired communication speed. */

#define BOOT_COM_UART_BAUDRATE          (115200)

/** \brief Configure number of bytes in the target->host data packet. */

#define BOOT_COM_UART_TX_MAX_DATA       (255)

/** \brief Configure number of bytes in the host->target data packet. */

#define BOOT_COM_UART_RX_MAX_DATA       (255)

/** \brief Select the desired UART peripheral as a zero based index. */

#define BOOT_COM_UART_CHANNEL_INDEX     (0)

/* Activate debugging with UART2 */

#define BOOT_DEBUGGING_UART2_ENABLE     (0)

/****************************************************************************************

*   F I L E   S Y S T E M   I N T E R F A C E   C O N F I G U R A T I O N

****************************************************************************************/

/* The file system interface is selected by setting the BOOT_FILE_SYS_ENABLE configurable

 * to 1. This enables support for firmware updates from a file stored on a locally

 * attached file system such as an SD-card. Note that this interface can be enabled

 * together with one of the remote communication interfaces such as UART, CAN or USB.

 *

 * Set BOOT_FILE_LOGGING_ENABLE to 1 if you would like log messages to be created during

 * a firmware update. The hook function FileFirmwareUpdateLogHook() will be called each

 * time a new string formatted log entry is available. This could be used during testing

 * by outputting the string on UART or to create a log file on the file system itself.

 *

 * Set BOOT_FILE_ERROR_HOOK_ENABLE to 1 if you would like to be informed in case an error

 * occurs during the firmware update. This could for example be used to turn on an error

 * LED to inform the user that something went wrong. Inspecting the log messages provides

 * additional information on the error cause.

 *

 * Set BOOT_FILE_STARTED_HOOK_ENABLE to 1 if you would like to be informed when a new

 * firmware update is started by the bootloader.

 *

 * Set BOOT_FILE_COMPLETED_HOOK_ENABLE to 1 if you would like to be informed when a

 * firmware update is completed by the bootloader.

 */

/** \brief Enable/disable support for firmware updates from a locally attached storage.*/

#define BOOT_FILE_SYS_ENABLE            (0)

/** \brief Enable/disable logging messages during firmware updates. */

#define BOOT_FILE_LOGGING_ENABLE        (1)

/** \brief Enable/disable a hook function that is called upon detection of an error. */

#define BOOT_FILE_ERROR_HOOK_ENABLE     (1)

/** \brief Enable/disable a hook function that is called at the start of the update. */

#define BOOT_FILE_STARTED_HOOK_ENABLE   (1)

/** \brief Enable/disable a hook function that is called at the end of the update. */

#define BOOT_FILE_COMPLETED_HOOK_ENABLE (1)

/****************************************************************************************

*   B A C K D O O R   E N T R Y   C O N F I G U R A T I O N

****************************************************************************************/

/* It is possible to implement an application specific method to force the bootloader to

 * stay active after a reset. Such a backdoor entry into the bootloader is desired in

 * situations where the user program does not run properly and therefore cannot

 * reactivate the bootloader. By enabling these hook functions, the application can

 * implement the backdoor, which overrides the default backdoor entry that is programmed

 * into the bootloader. When desired for security purposes, these hook functions can

 * also be implemented in a way that disables the backdoor entry altogether.

 */

/** \brief Enable/disable the backdoor override hook functions. */

#define BOOT_BACKDOOR_HOOKS_ENABLE       (1)

/****************************************************************************************

*   N O N - V O L A T I L E   M E M O R Y   D R I V E R   C O N F I G U R A T I O N

****************************************************************************************/

/* The NVM driver typically supports erase and program operations of the internal memory

 * present on the microcontroller. Through these hook functions the NVM driver can be

 * extended to support additional memory types such as external flash memory and serial

 * eeproms. The size of the internal memory in kilobytes is specified with configurable

 * BOOT_NVM_SIZE_KB. If desired the internal checksum writing and verification method can

 * be overridden with a application specific method by enabling configuration switch

 * BOOT_NVM_CHECKSUM_HOOKS_ENABLE.

 */

/** \brief Enable/disable the NVM hook function for supporting additional memory devices. */

#define BOOT_NVM_HOOKS_ENABLE           (0)

/** \brief Configure the size of the default memory device (typically flash EEPROM). */

#define BOOT_NVM_SIZE_KB                (512)

/** \brief Enable/disable hooks functions to override the user program checksum handling. */

#define BOOT_NVM_CHECKSUM_HOOKS_ENABLE  (0)

/****************************************************************************************

*   W A T C H D O G   D R I V E R   C O N F I G U R A T I O N

****************************************************************************************/

/* The COP driver cannot be configured internally in the bootloader, because its use

 * and configuration is application specific. The bootloader does need to service the

 * watchdog in case it is used. When the application requires the use of a watchdog,

 * set BOOT_COP_HOOKS_ENABLE to be able to initialize and service the watchdog through

 * hook functions.

 */

/** \brief Enable/disable the hook functions for controlling the watchdog. */

#define BOOT_COP_HOOKS_ENABLE           (0)

/****************************************************************************************

*   S E E D / K E Y   S E C U R I T Y   C O N F I G U R A T I O N

****************************************************************************************/

/* A security mechanism can be enabled in the bootloader's XCP module by setting configu-

 * rable BOOT_XCP_SEED_KEY_ENABLE to 1. Before any memory erase or programming

 * operations can be performed, access to this resource need to be unlocked.

 * In the Microboot settings on tab "XCP Protection" you need to specify a DLL that

 * implements the unlocking algorithm. The demo programs are configured for the (simple)

 * algorithm in "FeaserKey.dll". The source code for this DLL is available so it can be

 * customized to your needs.

 * During the unlock sequence, Microboot requests a seed from the bootloader, which is in

 * the format of a byte array. Using this seed the unlock algorithm in the DLL computes

 * a key, which is also a byte array, and sends this back to the bootloader. The

 * bootloader then verifies this key to determine if programming and erase operations are

 * permitted.

 * After enabling this feature the hook functions XcpGetSeedHook() and XcpVerifyKeyHook()

 * are called by the bootloader to obtain the seed and to verify the key, respectively.

 */

#define BOOT_XCP_SEED_KEY_ENABLE        (0)

/****************************************************************************************

*   F L A S H I N G   M O D E   T I M E O U T

****************************************************************************************/

/* Sets the timeout for being in flashing mode. The bootloader stays in flashing mode

 * after a connection has been closed. The timer will be reset with every new connection.

 */

#define FLASHING_WITHOUT_CONNECTION_TIMEOUT_MS 30000 // 30 seconds

#endif /* BLT_CONF_H */

/*********************************** end of blt_conf.h *********************************/

/**

\defgroup   Boot_ARMCM3_STM32_Olimex_STM32P103_GCC Bootloader

\brief      Bootloader. 

\ingroup    ARMCM3_STM32_Olimex_STM32P103_GCC

*/

@echo off

cs-make --directory=../ all

@echo off

cs-make --directory=../ clean

"C:\Program Files (x86)\OpenOCD\0.4.0\bin\openocd.exe" -f debug.cfg

###

# Description: starts the OpenOCD GDB server (localhost:3333)

#              once started use arm-elf-insight <program>.elf to start the debug session

# Usage: openocd.exe" -f debug.cfg

###

source [find interface/olimex-arm-usb-tiny-h.cfg]

source [find board/olimex_stm32_h103.cfg]

jtag_khz 1000

init

reset

halt

"C:\Program Files (x86)\OpenOCD\0.4.0\bin\openocd.exe" -f flash.cfg

###

# Description: mass erases and flashes the binary with OpenOCD

# Usage: openocd.exe" -f flash.cfg

###

source [find interface/olimex-arm-usb-tiny-h.cfg]

source [find board/olimex_stm32_h103.cfg]

jtag_khz 1000

init

reset

sleep 500

halt

stm32x mass_erase 0

flash write_image ..\\bin\\openbtl_olimex_stm32p103.elf

#flash write_image erase ..\\bin\\openbtl_olimex_stm32p103.elf

reset run

shutdown

/************************************************************************************//**

* \file         Demo\ARMCM3_STM32_Olimex_STM32P103_GCC\Boot\hooks.c

* \brief        Bootloader callback source file.

* \ingroup      Boot_ARMCM3_STM32_Olimex_STM32P103_GCC

* \internal

*----------------------------------------------------------------------------------------

*                          C O P Y R I G H T

*----------------------------------------------------------------------------------------

*   Copyright (c) 2012  by Feaser    http://www.feaser.com    All rights reserved

*

*----------------------------------------------------------------------------------------

*                            L I C E N S E

*----------------------------------------------------------------------------------------

* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or

* modify it under the terms of the GNU General Public License as published by the Free

* Software Foundation, either version 3 of the License, or (at your option) any later

* version.

*

* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;

* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR

* PURPOSE. See the GNU General Public License for more details.

*

* You should have received a copy of the GNU General Public License along with OpenBLT.

* If not, see <http://www.gnu.org/licenses/>.

*

* A special exception to the GPL is included to allow you to distribute a combined work 

* that includes OpenBLT without being obliged to provide the source code for any 

* proprietary components. The exception text is included at the bottom of the license

* file <license.html>.

* 

* \endinternal

****************************************************************************************/

/****************************************************************************************

* Include files

****************************************************************************************/

#include "boot.h"                                /* bootloader generic header          */

#if (BOOT_FILE_LOGGING_ENABLE > 0)

#include "stm32f10x.h"                           /* STM32 registers                    */

#include "stm32f10x_conf.h"                      /* STM32 peripheral drivers           */

#endif

/****************************************************************************************

*   B A C K D O O R   E N T R Y   H O O K   F U N C T I O N S

****************************************************************************************/

#if (BOOT_BACKDOOR_HOOKS_ENABLE > 0)

static blt_int32u backdoorOpenTime;

#define BACKDOOR_ENTRY_TIMEOUT_MS 500

static blt_bool timeRanOut = BLT_FALSE;

enum BOOT_STATE {BOOT_FLASH_CHECK,

                 BOOT_FLASH_WAIT,

                 BOOT_OS_SYNC,

                 BOOT_OS_START

                } boot_state;

#define SYS_PD_N_PIN      GPIO_Pin_8

#define SYS_PD_N_GPIO     GPIOC

#define SYS_SYNC_N_PIN    GPIO_Pin_1

#define SYS_SYNC_N_GPIO   GPIOC

/************************************************************************************//**

** \brief     Initializes the backdoor entry option.

** \return    none.

**

****************************************************************************************/

void BackDoorInitHook(void)

{

  backdoorOpenTime = TimerGet();

  boot_state = BOOT_FLASH_CHECK;

} /*** end of BackDoorInitHook ***/

/************************************************************************************//**

** \brief     Checks if it has to stay in backdoor.

** \return    BLT_TRUE if the backdoor entry is requested, BLT_FALSE otherwise.

**

****************************************************************************************/

blt_bool BackDoorEntryCheck(void)

{

  /* evaluate the fsm state */

  switch (boot_state) {

    case BOOT_FLASH_CHECK:

    {

      /* wait for a timeout */

      if (timeRanOut == BLT_FALSE) {

        if (TimerGet() > backdoorOpenTime+BACKDOOR_ENTRY_TIMEOUT_MS) {

          timeRanOut = BLT_TRUE;

          boot_state = BOOT_FLASH_WAIT;

          GPIO_SetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);

        }

      }

      return BLT_TRUE;

      break;

    }

    case BOOT_FLASH_WAIT:

    {

      /* wait for the SYS_SYNC_N signal to go up */

      if (GPIO_ReadInputDataBit(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN) == Bit_RESET) {

        return BLT_TRUE;

      } else {

        boot_state = BOOT_OS_SYNC;

        return BLT_FALSE;

      }

    }

    default:

      return BLT_FALSE;

      break;

  }

  return BLT_FALSE;

} /*** end of BackDoorEntryHook ***/

/************************************************************************************//**

** \brief     Checks if a backdoor entry is requested.

** \return    BLT_TRUE if the backdoor entry is requested, BLT_FALSE otherwise.

**

****************************************************************************************/

blt_bool BackDoorEntryHook(void)

{

  /* default implementation always activates the bootloader after a reset */

  return BLT_TRUE;

} /*** end of BackDoorEntryHook ***/

#endif /* BOOT_BACKDOOR_HOOKS_ENABLE > 0 */

/************************************************************************************//**

** \brief     Notice that there is still an open connection over COM 

** \return    -

**

****************************************************************************************/

void BackDoorComIsConnected(void)

{

  backdoorOpenTime = TimerGet();

}

/****************************************************************************************

*   C P U   D R I V E R   H O O K   F U N C T I O N S

****************************************************************************************/

#if (BOOT_CPU_USER_PROGRAM_START_HOOK > 0)

/************************************************************************************//**

** \brief     Callback that gets called when the bootloader is about to exit and

**            hand over control to the user program. This is the last moment that

**            some final checking can be performed and if necessary prevent the

**            bootloader from activiting the user program.

** \return    BLT_TRUE if it is okay to start the user program, BLT_FALSE to keep

**            keep the bootloader active.

**

****************************************************************************************/

blt_bool CpuUserProgramStartHook(void)

{

  /* evaluate the fsm state */

  switch (boot_state) {

    case BOOT_OS_SYNC:

    {

      /* wait for the SYS_SYNC_N signal to go down */

      if (GPIO_ReadInputDataBit(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN) == Bit_RESET) {

        boot_state = BOOT_OS_START;

      }

      return BLT_FALSE;

      break;

    }

    case BOOT_OS_START:

    {

      /* pull down SYS_SYNC_N to indicate that the module is busy

       * note: This is optional at this point. The OS however MUST pull down SYS_SYNC_N until it is ready */

      GPIO_ResetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);

      return BLT_TRUE;

    }

    default:

      return BLT_FALSE;

      break;

  }

  return BLT_FALSE;

} /*** end of CpuUserProgramStartHook ***/

#endif /* BOOT_CPU_USER_PROGRAM_START_HOOK > 0 */

/****************************************************************************************

*   N O N - V O L A T I L E   M E M O R Y   D R I V E R   H O O K   F U N C T I O N S

****************************************************************************************/

#if (BOOT_NVM_HOOKS_ENABLE > 0)

/************************************************************************************//**

** \brief     Callback that gets called at the start of the internal NVM driver

**            initialization routine. 

** \return    none.

**

****************************************************************************************/

void NvmInitHook(void)

{

} /*** end of NvmInitHook ***/

/************************************************************************************//**

** \brief     Callback that gets called at the start of the NVM driver write 

**            routine. It allows additional memory to be operated on. If the address

**            is not within the range of the additional memory, then 

**            BLT_NVM_NOT_IN_RANGE must be returned to indicate that the data hasn't

**            been written yet.

** \param     addr Start address.

** \param     len  Length in bytes.

** \param     data Pointer to the data buffer.

** \return    BLT_NVM_OKAY if successful, BLT_NVM_NOT_IN_RANGE if the address is

**            not within the supported memory range, or BLT_NVM_ERROR is the write

**            operation failed.

**

****************************************************************************************/

blt_int8u NvmWriteHook(blt_addr addr, blt_int32u len, blt_int8u *data)

{

  return BLT_NVM_NOT_IN_RANGE;

} /*** end of NvmWriteHook ***/

/************************************************************************************//**

** \brief     Callback that gets called at the start of the NVM driver erase 

**            routine. It allows additional memory to be operated on. If the address

**            is not within the range of the additional memory, then

**            BLT_NVM_NOT_IN_RANGE must be returned to indicate that the memory

**            hasn't been erased yet.

** \param     addr Start address.

** \param     len  Length in bytes.

** \return    BLT_NVM_OKAY if successful, BLT_NVM_NOT_IN_RANGE if the address is

**            not within the supported memory range, or BLT_NVM_ERROR is the erase

**            operation failed.

**

****************************************************************************************/

blt_int8u NvmEraseHook(blt_addr addr, blt_int32u len)

{

  return BLT_NVM_NOT_IN_RANGE;

} /*** end of NvmEraseHook ***/

/************************************************************************************//**

** \brief     Callback that gets called at the end of the NVM programming session.

** \return    BLT_TRUE is successful, BLT_FALSE otherwise.

**

****************************************************************************************/

blt_bool NvmDoneHook(void)

{

  return BLT_TRUE;

} /*** end of NvmDoneHook ***/

#endif /* BOOT_NVM_HOOKS_ENABLE > 0 */

#if (BOOT_NVM_CHECKSUM_HOOKS_ENABLE > 0)

/************************************************************************************//**

** \brief     Verifies the checksum, which indicates that a valid user program is

**            present and can be started.

** \return    BLT_TRUE if successful, BLT_FALSE otherwise.

**

****************************************************************************************/

blt_bool NvmVerifyChecksumHook(void)

{

  return BLT_TRUE;

} /*** end of NvmVerifyChecksum ***/

/************************************************************************************//**

** \brief     Writes a checksum of the user program to non-volatile memory. This is

**            performed once the entire user program has been programmed. Through

**            the checksum, the bootloader can check if a valid user programming is

**            present and can be started.

** \return    BLT_TRUE if successful, BLT_FALSE otherwise. 

**

****************************************************************************************/

blt_bool NvmWriteChecksumHook(void)

{

  return BLT_TRUE;

}

#endif /* BOOT_NVM_CHECKSUM_HOOKS_ENABLE > 0 */

/****************************************************************************************

*   W A T C H D O G   D R I V E R   H O O K   F U N C T I O N S

****************************************************************************************/

#if (BOOT_COP_HOOKS_ENABLE > 0)

/************************************************************************************//**

** \brief     Callback that gets called at the end of the internal COP driver

**            initialization routine. It can be used to configure and enable the

**            watchdog.

** \return    none.

**

****************************************************************************************/

void CopInitHook(void)

{

} /*** end of CopInitHook ***/

/************************************************************************************//**

** \brief     Callback that gets called at the end of the internal COP driver

**            service routine. This gets called upon initialization and during

**            potential long lasting loops and routine. It can be used to service

**            the watchdog to prevent a watchdog reset.

** \return    none.

**

****************************************************************************************/

void CopServiceHook(void)

{

} /*** end of CopServiceHook ***/

#endif /* BOOT_COP_HOOKS_ENABLE > 0 */

/****************************************************************************************

*   F I L E   S Y S T E M   I N T E R F A C E   H O O K   F U N C T I O N S

****************************************************************************************/

#if (BOOT_FILE_SYS_ENABLE > 0)

/****************************************************************************************

* Constant data declarations

****************************************************************************************/

/** \brief Firmware filename. */

static const blt_char firmwareFilename[] = "/demoprog_olimex_stm32p103.srec";

/****************************************************************************************

* Local data declarations

****************************************************************************************/

#if (BOOT_FILE_LOGGING_ENABLE > 0)

/** \brief Data structure for grouping log-file related information. */

static struct 

{

  FIL      handle;                  /**< FatFS handle to the log-file.                 */

  blt_bool canUse;                  /**< Flag to indicate if the log-file can be used. */

} logfile;

#endif

/************************************************************************************//**

** \brief     Callback that gets called to check whether a firmware update from 

**            local file storage should be started. This could for example be when

**            a switch is pressed, when a certain file is found on the local file 

**            storage, etc.

** \return    BLT_TRUE if a firmware update is requested, BLT_FALSE otherwise.

**

****************************************************************************************/

blt_bool FileIsFirmwareUpdateRequestedHook(void)

{

  FILINFO fileInfoObject = { 0 }; /* needs to be zeroed according to f_stat docs */;

  /* Current example implementation looks for a predetermined firmware file on the 

   * SD-card. If the SD-card is accessible and the firmware file was found the firmware

   * update is started. When successfully completed, the firmware file is deleted.

   * During the firmware update, progress information is written to a file called

   * bootlog.txt and additionally outputted on UART @57600 bps for debugging purposes.

   */

  /* check if firmware file is present and SD-card is accessible */

  if (f_stat(firmwareFilename, &fileInfoObject) == FR_OK) 

  {

    /* check if the filesize is valid and that it is not a directory */

    if ( (fileInfoObject.fsize > 0) && (!(fileInfoObject.fattrib & AM_DIR)) )

    {

      /* all conditions are met to start a firmware update from local file storage */

      return BLT_TRUE;

    }

  }

  /* still here so no firmware update request is pending */  

  return BLT_FALSE;

} /*** end of FileIsFirmwareUpdateRequestedHook ***/

/************************************************************************************//**

** \brief     Callback to obtain the filename of the firmware file that should be

**            used during the firmware update from the local file storage. This 

**            hook function is called at the beginning of the firmware update from

**            local storage sequence. 

** \return    valid firmware filename with full path or BLT_NULL.

**

****************************************************************************************/

const blt_char *FileGetFirmwareFilenameHook(void)

{

  return firmwareFilename;

} /*** end of FileGetFirmwareFilenameHook ***/

#if (BOOT_FILE_STARTED_HOOK_ENABLE > 0)

/************************************************************************************//**

** \brief     Callback that gets called to inform the application that a firmware

**            update from local storage just started. 

** \return    none.

**

****************************************************************************************/

void FileFirmwareUpdateStartedHook(void)

{

  #if (BOOT_FILE_LOGGING_ENABLE > 0)

  /* create/overwrite the logfile */

  logfile.canUse = BLT_FALSE;

  if (f_open(&logfile.handle, "/bootlog.txt", FA_CREATE_ALWAYS | FA_WRITE) == FR_OK)

  {

    logfile.canUse = BLT_TRUE;

  }

  #endif

} /*** end of FileFirmwareUpdateStartedHook ***/

#endif /* BOOT_FILE_STARTED_HOOK_ENABLE > 0 */

#if (BOOT_FILE_COMPLETED_HOOK_ENABLE > 0)

/************************************************************************************//**

** \brief     Callback that gets called to inform the application that a firmware

**            update was successfully completed.

** \return    none.

**

****************************************************************************************/

void FileFirmwareUpdateCompletedHook(void)

{

  #if (BOOT_FILE_LOGGING_ENABLE > 0)

  /* close the log file */

  if (logfile.canUse == BLT_TRUE)

  {

    f_close(&logfile.handle);

  }

  /* wait for all logging related transmission to complete */

  while(USART_GetFlagStatus(USART2, USART_FLAG_TC) == RESET);

  #endif

  /* now delete the firmware file from the disk since the update was successful */

  f_unlink(firmwareFilename);

} /*** end of FileFirmwareUpdateCompletedHook ***/

#endif /* BOOT_FILE_COMPLETED_HOOK_ENABLE > 0 */

#if (BOOT_FILE_ERROR_HOOK_ENABLE > 0)

/************************************************************************************//**

** \brief     Callback that gets called in case an error occurred during a firmware

**            update. Refer to <file.h> for a list of available error codes.

** \return    none.

**

****************************************************************************************/

void FileFirmwareUpdateErrorHook(blt_int8u error_code)

{

  #if (BOOT_FILE_LOGGING_ENABLE > 0)

  /* error detected which stops the firmware update, so close the log file */

  if (logfile.canUse == BLT_TRUE)

  {

    f_close(&logfile.handle);

  }

  #endif

} /*** end of FileFirmwareUpdateErrorHook ***/

#endif /* BOOT_FILE_ERROR_HOOK_ENABLE > 0 */

#if (BOOT_FILE_LOGGING_ENABLE > 0)

/************************************************************************************//**

** \brief     Callback that gets called each time new log information becomes 

**            available during a firmware update.

** \param     info_string Pointer to a character array with the log entry info.

** \return    none.

**

****************************************************************************************/

void FileFirmwareUpdateLogHook(blt_char *info_string)

{

  /* write the string to the log file */

  if (logfile.canUse == BLT_TRUE)

  {

    if (f_puts(info_string, &logfile.handle) < 0)

    {

      logfile.canUse = BLT_FALSE;

      f_close(&logfile.handle);

    }

  }

  /* echo all characters in the string on UART */

  while(*info_string != '\0')

  {

    /* write character to transmit holding register */

    USART_SendData(USART2, *info_string);

    /* wait for tx holding register to be empty */

    while(USART_GetFlagStatus(USART2, USART_FLAG_TXE) == RESET);

    /* point to the next character in the string */

    info_string++;

  }

} /*** end of FileFirmwareUpdateLogHook ***/

#endif /* BOOT_FILE_LOGGING_ENABLE > 0 */

#endif /* BOOT_FILE_SYS_ENABLE > 0 */

/****************************************************************************************

*   S E E D / K E Y   S E C U R I T Y   H O O K   F U N C T I O N S

****************************************************************************************/

#if (BOOT_XCP_SEED_KEY_ENABLE > 0)

/************************************************************************************//**

** \brief     Provides a seed to the XCP master that will be used for the key 

**            generation when the master attempts to unlock the specified resource. 

**            Called by the GET_SEED command.

** \param     resource  Resource that the seed if requested for (XCP_RES_XXX).

** \param     seed      Pointer to byte buffer wher the seed will be stored.

** \return    Length of the seed in bytes.

**

****************************************************************************************/

blt_int8u XcpGetSeedHook(blt_int8u resource, blt_int8u *seed)

{

  /* request seed for unlocking ProGraMming resource */

  if ((resource & XCP_RES_PGM) != 0)

  {

    seed[0] = 0x55;

  }

  /* return seed length */

  return 1;

} /*** end of XcpGetSeedHook ***/

/************************************************************************************//**

** \brief     Called by the UNLOCK command and checks if the key to unlock the 

**            specified resource was correct. If so, then the resource protection 

**            will be removed.

** \param     resource  resource to unlock (XCP_RES_XXX).

** \param     key       pointer to the byte buffer holding the key.

** \param     len       length of the key in bytes.

** \return    1 if the key was correct, 0 otherwise.

**

****************************************************************************************/

blt_int8u XcpVerifyKeyHook(blt_int8u resource, blt_int8u *key, blt_int8u len)

{

  /* suppress compiler warning for unused parameter */

  len = len;

  /* the example key algorithm in "FeaserKey.dll" works as follows:

   *  - PGM will be unlocked if key = seed - 1

   */

  /* check key for unlocking ProGraMming resource */

  if ((resource == XCP_RES_PGM) && (key[0] == (0x55-1)))

  {

    /* correct key received for unlocking PGM resource */

    return 1;

  }

  /* still here so key incorrect */

  return 0;

} /*** end of XcpVerifyKeyHook ***/

#endif /* BOOT_XCP_SEED_KEY_ENABLE > 0 */

/*********************************** end of hooks.c ************************************/

#ifndef IODEF_H

#define IODEF_H

#include "stm32f10x.h"

#include "stm32f10x_conf.h"

#define WKUP_GPIO             GPIOA

#define WKUP_PIN              GPIO_Pin_0

#define LED_GPIO              GPIOA

#define LED_PIN               GPIO_Pin_1

#define DRIVE_PWM1A_GPIO      GPIOA

#define DRIVE_PWM1A_PIN       GPIO_Pin_2

#define DRIVE_PWM1B_GPIO      GPIOA

#define DRIVE_PWM1B_PIN       GPIO_Pin_3

#define PROG_RX_GPIO          GPIOA

#define PROG_RX_PIN           GPIO_Pin_9

#define PROG_TX_GPIO          GPIOA

#define PROG_TX_PIN           GPIO_Pin_10

#define CAN_RX_GPIO           GPIOA

#define CAN_RX_PIN            GPIO_Pin_11

#define CAN_TX_GPIO           GPIOA

#define CAN_TX_PIN            GPIO_Pin_12

#define SWDIO_GPIO            GPIOA

#define SWDIO_PIN             GPIO_Pin_13

#define SWCLK_GPIO            GPIOA

#define SWCLK_PIN             GPIO_Pin_14

#define DRIVE_PWM2B_GPIO      GPIOA

#define DRIVE_PWM2B_PIN       GPIO_Pin_15

#define DRIVE_SENSE2_GPIO     GPIOB

#define DRIVE_SENSE2_PIN      GPIO_Pin_1

#define POWER_EN_GPIO         GPIOB

#define POWER_EN_PIN          GPIO_Pin_2

#define DRIVE_PWM2A_GPIO      GPIOB

#define DRIVE_PWM2A_PIN       GPIO_Pin_3

#define DRIVE_ENC1A_GPIO      GPIOB

#define DRIVE_ENC1A_PIN       GPIO_Pin_6

#define DRIVE_ENC1B_GPIO      GPIOB

#define DRIVE_ENC1B_PIN       GPIO_Pin_7

#define IMU_SCL_GPIO          GPIOB

#define IMU_SCL_PIN           GPIO_Pin_8

#define IMU_SDA_GPIO          GPIOB

#define IMU_SDA_PIN           GPIO_Pin_9

#define IR_SCL_GPIO           GPIOB

#define IR_SCL_PIN            GPIO_Pin_10

#define IR_SDA_GPIO           GPIOB

#define IR_SDA_PIN            GPIO_Pin_11

#define IR_INT_GPIO           GPIOB

#define IR_INT_PIN            GPIO_Pin_12

#define SYS_UART_UP_GPIO      GPIOB

#define SYS_UART_UP_PIN       GPIO_Pin_14

#define IMU_INT_GPIO          GPIOB

#define IMU_INT_PIN           GPIO_Pin_15

#define DRIVE_SENSE1_GPIO     GPIOC

#define DRIVE_SENSE1_PIN      GPIO_Pin_0

#define SYS_SYNC_N_GPIO       GPIOC

#define SYS_SYNC_N_PIN        GPIO_Pin_1

#define IMU_RESET_N_GPIO      GPIOC

#define IMU_RESET_N_PIN       GPIO_Pin_2

#define PATH_DCSTAT_GPIO      GPIOC

#define PATH_DCSTAT_PIN       GPIO_Pin_3

#define PATH_DCEN_GPIO        GPIOC

#define PATH_DCEN_PIN         GPIO_Pin_5

#define DRIVE_ENC2B_GPIO      GPIOC

#define DRIVE_ENC2B_PIN       GPIO_Pin_6

#define DRIVE_ENC2A_GPIO      GPIOC

#define DRIVE_ENC2A_PIN       GPIO_Pin_7

#define SYS_PD_N_GPIO         GPIOC

#define SYS_PD_N_PIN          GPIO_Pin_8

#define SYS_REG_EN_GPIO       GPIOC

#define SYS_REG_EN_PIN        GPIO_Pin_9

#define SYS_UART_RX_GPIO      GPIOC

#define SYS_UART_RX_PIN       GPIO_Pin_10

#define SYS_UART_TX_GPIO      GPIOC

#define SYS_UART_TX_PIN       GPIO_Pin_11

#define IMU_BOOT_LOAD_N_GPIO  GPIOC

#define IMU_BOOT_LOAD_N_PIN   GPIO_Pin_12

#define IMU_BL_IND_GPIO       GPIOC

#define IMU_BL_IND_PIN        GPIO_Pin_14

#define OSC_IN_GPIO           GPIOD

#define OSC_IN_PIN            GPIO_Pin_0

#define OSC_OUT_GPIO          GPIOD

#define OSC_OUT_PIN           GPIO_Pin_1

#define SYS_WARMRST_N_GPIO    GPIOD

#define SYS_WARMRST_N_PIN     GPIO_Pin_2

#endif /* IODEF_H */

/**************************************************************************//**

 * @file     core_cm3.c

 * @brief    CMSIS Cortex-M3 Core Peripheral Access Layer Source File

 * @version  V1.30

 * @date     30. October 2009

 *

 * @note

 * Copyright (C) 2009 ARM Limited. All rights reserved.

 *

 * @par

 * ARM Limited (ARM) is supplying this software for use with Cortex-M 

 * processor based microcontrollers.  This file can be freely distributed 

 * within development tools that are supporting such ARM based processors. 

 *

 * @par

 * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED

 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF

 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.

 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR

 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

 *

 ******************************************************************************/

#include <stdint.h>

/* define compiler specific symbols */

#if defined ( __CC_ARM   )

  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */

  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */

#elif defined ( __ICCARM__ )

  #define __ASM           __asm                                       /*!< asm keyword for IAR Compiler          */

  #define __INLINE        inline                                      /*!< inline keyword for IAR Compiler. Only avaiable in High optimization mode! */

#elif defined   (  __GNUC__  )

  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */

  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */

#elif defined   (  __TASKING__  )

  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */

  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */

#endif

/* ###################  Compiler specific Intrinsics  ########################### */

#if defined ( __CC_ARM   ) /*------------------RealView Compiler -----------------*/

/* ARM armcc specific functions */

/**

 * @brief  Return the Process Stack Pointer

 *

 * @return ProcessStackPointer

 *

 * Return the actual process stack pointer

 */

__ASM uint32_t __get_PSP(void)

{

  mrs r0, psp

  bx lr

}

/**

 * @brief  Set the Process Stack Pointer

 *

 * @param  topOfProcStack  Process Stack Pointer

 *

 * Assign the value ProcessStackPointer to the MSP 

 * (process stack pointer) Cortex processor register

 */

__ASM void __set_PSP(uint32_t topOfProcStack)

{

  msr psp, r0

  bx lr

}

/**

 * @brief  Return the Main Stack Pointer

 *

 * @return Main Stack Pointer

 *

 * Return the current value of the MSP (main stack pointer)

 * Cortex processor register

 */

__ASM uint32_t __get_MSP(void)

{

  mrs r0, msp

  bx lr

}

/**

 * @brief  Set the Main Stack Pointer

 *

 * @param  topOfMainStack  Main Stack Pointer

 *

 * Assign the value mainStackPointer to the MSP 

 * (main stack pointer) Cortex processor register

 */

__ASM void __set_MSP(uint32_t mainStackPointer)

{

  msr msp, r0

  bx lr

}

/**

 * @brief  Reverse byte order in unsigned short value

 *

 * @param   value  value to reverse

 * @return         reversed value

 *

 * Reverse byte order in unsigned short value

 */

__ASM uint32_t __REV16(uint16_t value)

{

  rev16 r0, r0

  bx lr

}

/**

 * @brief  Reverse byte order in signed short value with sign extension to integer

 *

 * @param   value  value to reverse

 * @return         reversed value

 *

 * Reverse byte order in signed short value with sign extension to integer

 */

__ASM int32_t __REVSH(int16_t value)

{

  revsh r0, r0

  bx lr

}

#if (__ARMCC_VERSION < 400000)

/**

 * @brief  Remove the exclusive lock created by ldrex

 *

 * Removes the exclusive lock which is created by ldrex.

 */

__ASM void __CLREX(void)

{

  clrex

}

/**

 * @brief  Return the Base Priority value

 *

 * @return BasePriority

 *

 * Return the content of the base priority register

 */

__ASM uint32_t  __get_BASEPRI(void)

{

  mrs r0, basepri

  bx lr

}

/**

 * @brief  Set the Base Priority value

 *

 * @param  basePri  BasePriority

 *

 * Set the base priority register

 */

__ASM void __set_BASEPRI(uint32_t basePri)

{

  msr basepri, r0

  bx lr

}

/**

 * @brief  Return the Priority Mask value

 *

 * @return PriMask

 *

 * Return state of the priority mask bit from the priority mask register

 */

__ASM uint32_t __get_PRIMASK(void)

{

  mrs r0, primask

  bx lr

}

/**

 * @brief  Set the Priority Mask value

 *

 * @param  priMask  PriMask

 *

 * Set the priority mask bit in the priority mask register

 */

__ASM void __set_PRIMASK(uint32_t priMask)

{

  msr primask, r0

  bx lr

}

/**

 * @brief  Return the Fault Mask value

 *

 * @return FaultMask

 *

 * Return the content of the fault mask register

 */

__ASM uint32_t  __get_FAULTMASK(void)

{

  mrs r0, faultmask

  bx lr

}

/**

 * @brief  Set the Fault Mask value

 *

 * @param  faultMask  faultMask value

 *

 * Set the fault mask register

 */

__ASM void __set_FAULTMASK(uint32_t faultMask)

{

  msr faultmask, r0

  bx lr

}

/**

 * @brief  Return the Control Register value

 * 

 * @return Control value

 *

 * Return the content of the control register

 */

__ASM uint32_t __get_CONTROL(void)

{

  mrs r0, control

  bx lr

}

/**

 * @brief  Set the Control Register value

 *

 * @param  control  Control value

 *

 * Set the control register

 */

__ASM void __set_CONTROL(uint32_t control)

{

  msr control, r0

  bx lr

}

#endif /* __ARMCC_VERSION  */ 

#elif (defined (__ICCARM__)) /*------------------ ICC Compiler -------------------*/

/* IAR iccarm specific functions */

#pragma diag_suppress=Pe940

/**

 * @brief  Return the Process Stack Pointer

 *

 * @return ProcessStackPointer

 *

 * Return the actual process stack pointer

 */

uint32_t __get_PSP(void)

{

  __ASM("mrs r0, psp");

  __ASM("bx lr");

}

/**

 * @brief  Set the Process Stack Pointer

 *

 * @param  topOfProcStack  Process Stack Pointer

 *

 * Assign the value ProcessStackPointer to the MSP 

 * (process stack pointer) Cortex processor register

 */

void __set_PSP(uint32_t topOfProcStack)

{

  __ASM("msr psp, r0");

  __ASM("bx lr");

}

/**

 * @brief  Return the Main Stack Pointer

 *

 * @return Main Stack Pointer

 *

 * Return the current value of the MSP (main stack pointer)

 * Cortex processor register

 */

uint32_t __get_MSP(void)

{

  __ASM("mrs r0, msp");

  __ASM("bx lr");

}

/**

 * @brief  Set the Main Stack Pointer

 *

 * @param  topOfMainStack  Main Stack Pointer

 *

 * Assign the value mainStackPointer to the MSP 

 * (main stack pointer) Cortex processor register

 */

void __set_MSP(uint32_t topOfMainStack)

{

  __ASM("msr msp, r0");

  __ASM("bx lr");

}

/**

 * @brief  Reverse byte order in unsigned short value

 *

 * @param  value  value to reverse

 * @return        reversed value

 *

 * Reverse byte order in unsigned short value

 */

uint32_t __REV16(uint16_t value)

{

  __ASM("rev16 r0, r0");

  __ASM("bx lr");

}

/**

 * @brief  Reverse bit order of value

 *

 * @param  value  value to reverse

 * @return        reversed value

 *

 * Reverse bit order of value

 */

uint32_t __RBIT(uint32_t value)

{

  __ASM("rbit r0, r0");

  __ASM("bx lr");

}

/**

 * @brief  LDR Exclusive (8 bit)

 *

 * @param  *addr  address pointer

 * @return        value of (*address)

 *

 * Exclusive LDR command for 8 bit values)

 */

uint8_t __LDREXB(uint8_t *addr)

{

  __ASM("ldrexb r0, [r0]");

  __ASM("bx lr"); 

}

/**

 * @brief  LDR Exclusive (16 bit)

 *

 * @param  *addr  address pointer

 * @return        value of (*address)

 *

 * Exclusive LDR command for 16 bit values

 */

uint16_t __LDREXH(uint16_t *addr)

{

  __ASM("ldrexh r0, [r0]");

  __ASM("bx lr");

}

/**

 * @brief  LDR Exclusive (32 bit)

 *

 * @param  *addr  address pointer

 * @return        value of (*address)

 *

 * Exclusive LDR command for 32 bit values

 */

uint32_t __LDREXW(uint32_t *addr)

{

  __ASM("ldrex r0, [r0]");

  __ASM("bx lr");

}

/**

 * @brief  STR Exclusive (8 bit)

 *

 * @param  value  value to store

 * @param  *addr  address pointer

 * @return        successful / failed

 *

 * Exclusive STR command for 8 bit values

 */

uint32_t __STREXB(uint8_t value, uint8_t *addr)

{

  __ASM("strexb r0, r0, [r1]");

  __ASM("bx lr");

}

/**

 * @brief  STR Exclusive (16 bit)

 *

 * @param  value  value to store

 * @param  *addr  address pointer

 * @return        successful / failed

 *

 * Exclusive STR command for 16 bit values

 */

uint32_t __STREXH(uint16_t value, uint16_t *addr)

{

  __ASM("strexh r0, r0, [r1]");

  __ASM("bx lr");

}

/**

 * @brief  STR Exclusive (32 bit)

 *

 * @param  value  value to store

 * @param  *addr  address pointer

 * @return        successful / failed

 *

 * Exclusive STR command for 32 bit values

 */

uint32_t __STREXW(uint32_t value, uint32_t *addr)

{

  __ASM("strex r0, r0, [r1]");

  __ASM("bx lr");

}

#pragma diag_default=Pe940

#elif (defined (__GNUC__)) /*------------------ GNU Compiler ---------------------*/

/* GNU gcc specific functions */

/**

 * @brief  Return the Process Stack Pointer

 *

 * @return ProcessStackPointer

 *

 * Return the actual process stack pointer

 */

uint32_t __get_PSP(void) __attribute__( ( naked ) );

uint32_t __get_PSP(void)

{

  uint32_t result=0;

  __ASM volatile ("MRS %0, psp\n\t" 

                  "MOV r0, %0 \n\t"

                  "BX  lr     \n\t"  : "=r" (result) );

  return(result);

}

/**

 * @brief  Set the Process Stack Pointer

 *

 * @param  topOfProcStack  Process Stack Pointer

 *

 * Assign the value ProcessStackPointer to the MSP 

 * (process stack pointer) Cortex processor register

 */

void __set_PSP(uint32_t topOfProcStack) __attribute__( ( naked ) );

void __set_PSP(uint32_t topOfProcStack)

{

  __ASM volatile ("MSR psp, %0\n\t"

                  "BX  lr     \n\t" : : "r" (topOfProcStack) );

}

/**

 * @brief  Return the Main Stack Pointer

 *

 * @return Main Stack Pointer

 *

 * Return the current value of the MSP (main stack pointer)

 * Cortex processor register

 */

uint32_t __get_MSP(void) __attribute__( ( naked ) );

uint32_t __get_MSP(void)

{

  uint32_t result=0;

  __ASM volatile ("MRS %0, msp\n\t" 

                  "MOV r0, %0 \n\t"

                  "BX  lr     \n\t"  : "=r" (result) );

  return(result);

}

/**

 * @brief  Set the Main Stack Pointer

 *

 * @param  topOfMainStack  Main Stack Pointer

 *

 * Assign the value mainStackPointer to the MSP