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amiro-blt / Target / Modules / DiWheelDrive_1-1 / Boot / main.c @ f7d2c786

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/************************************************************************************//**
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* \file         Demo\ARMCM3_STM32_Olimex_STM32P103_GCC\Boot\main.c
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* \brief        Bootloader application source file.
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* \ingroup      Boot_ARMCM3_STM32_Olimex_STM32P103_GCC
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* \internal
6
*----------------------------------------------------------------------------------------
7
*                          C O P Y R I G H T
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*----------------------------------------------------------------------------------------
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*   Copyright (c) 2012  by Feaser    http://www.feaser.com    All rights reserved
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*
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*----------------------------------------------------------------------------------------
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*                            L I C E N S E
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*----------------------------------------------------------------------------------------
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* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as published by the Free
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* Software Foundation, either version 3 of the License, or (at your option) any later
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* version.
18
*
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* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
21
* PURPOSE. See the GNU General Public License for more details.
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*
23
* You should have received a copy of the GNU General Public License along with OpenBLT.
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* If not, see <http://www.gnu.org/licenses/>.
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*
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* A special exception to the GPL is included to allow you to distribute a combined work
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* that includes OpenBLT without being obliged to provide the source code for any
28
* proprietary components. The exception text is included at the bottom of the license
29
* file <license.html>.
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*
31
* \endinternal
32
****************************************************************************************/
33

    
34
/****************************************************************************************
35
* Include files
36
****************************************************************************************/
37
#include "boot.h"                                /* bootloader generic header          */
38
#include "timer.h"
39
#include "ARMCM3_STM32/types.h"
40
#include "AMiRo/amiroblt.h"
41
#include "helper.h"
42
#include "iodef.h"
43

    
44
/****************************************************************************************
45
* Defines
46
****************************************************************************************/
47
#define RESET_TIMEOUT_MS    100
48

    
49
/****************************************************************************************
50
* Function prototypes
51
****************************************************************************************/
52
static void Init(void);
53

    
54
static void initGpio();
55
static void initExti();
56
void configGpioForShutdown();
57

    
58
ErrorStatus handleColdReset();
59
ErrorStatus handleUartWakeup();
60
ErrorStatus handleAccelWakeup();
61

    
62
ErrorStatus shutdownDisambiguationProcedure(const uint8_t type);
63
void shutdownToTransportation(const blt_bool exec_disambiguation);
64
void shutdownToDeepsleep(const blt_bool exec_disambiguation);
65
void shutdownToHibernate(const blt_bool exec_disambiguation);
66
void shutdownAndRestart(const blt_bool exec_disambiguation);
67

    
68
volatile blBackupRegister_t backup_reg;
69

    
70
/****************************************************************************************
71
* Callback configuration
72
****************************************************************************************/
73
void blCallbackShutdownTransportation(void);
74
void blCallbackShutdownDeepsleep(void);
75
void blCallbackShutdownHibernate(void);
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void blCallbackShutdownRestart(void);
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void blCallbackHandleShutdownRequest(void);
78

    
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const blCallbackTable_t cbtable __attribute__ ((section ("_callback_table"))) = {
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  .magicNumber = BL_MAGIC_NUMBER,
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  .vBootloader = {BL_VERSION_ID_AMiRoBLT_Beta, BL_VERSION_MAJOR, BL_VERSION_MINOR, 0},
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  .vSSSP = {BL_VERSION_ID_SSSP, BL_SSSP_VERSION_MAJOR, BL_SSSP_VERSION_MINOR, 0},
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  .vCompiler = {BL_VERSION_ID_GCC, __GNUC__, __GNUC_MINOR__, __GNUC_PATCHLEVEL__},  // currently only GCC is supported
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  .cbShutdownHibernate = blCallbackShutdownHibernate,
85
  .cbShutdownDeepsleep = blCallbackShutdownDeepsleep,
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  .cbShutdownTransportation = blCallbackShutdownTransportation,
87
  .cbShutdownRestart = blCallbackShutdownRestart,
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  .cbHandleShutdownRequest = blCallbackHandleShutdownRequest,
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  .cb5 = (void*)0,
90
  .cb6 = (void*)0,
91
  .cb7 = (void*)0,
92
  .cb8 = (void*)0,
93
  .cb9 = (void*)0,
94
  .cb10 = (void*)0,
95
  .cb11 = (void*)0
96
};
97

    
98
/************************************************************************************//**
99
** \brief     This is the entry point for the bootloader application and is called
100
**            by the reset interrupt vector after the C-startup routines executed.
101
** \return    Program return code.
102
**
103
****************************************************************************************/
104
int main(void)
105
{
106
  /* initialize the microcontroller */
107
  Init();
108

    
109
  /* activate some required clocks */
110
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
111
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD, ENABLE);
112

    
113
  /* initialize GPIOs and EXTI lines */
114
  initGpio();
115
  setLed(BLT_TRUE);
116
  initExti();
117

    
118
  /* initialize the timer */
119
  TimerInit();
120

    
121
  /* detect the primary reason for this wakeup/restart */
122
  backup_reg.wakeup_pri_reason =
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      ((RCC_GetFlagStatus(RCC_FLAG_LPWRRST) == SET) ? BL_WAKEUP_PRI_RSN_LPWRRST : 0) |
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      ((RCC_GetFlagStatus(RCC_FLAG_WWDGRST) == SET) ? BL_WAKEUP_PRI_RSN_WWDGRST : 0) |
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      ((RCC_GetFlagStatus(RCC_FLAG_IWDGRST) == SET) ? BL_WAKEUP_PRI_RSN_IWDGRST : 0) |
126
      ((RCC_GetFlagStatus(RCC_FLAG_SFTRST) == SET) ? BL_WAKEUP_PRI_RSN_SFTRST : 0)   |
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      ((RCC_GetFlagStatus(RCC_FLAG_PORRST) == SET) ? BL_WAKEUP_PRI_RSN_PORRST : 0)   |
128
      ((RCC_GetFlagStatus(RCC_FLAG_PINRST) == SET) ? BL_WAKEUP_PRI_RSN_PINRST : 0)   |
129
      ((PWR_GetFlagStatus(PWR_FLAG_WU) == SET) ? BL_WAKEUP_PRI_RSN_WKUP : 0);
130

    
131
  /* when woken from standby mode, detect the secondary reason for thiswakeup/reset */
132
  if ( (backup_reg.wakeup_pri_reason & BL_WAKEUP_PRI_RSN_WKUP) && (PWR_GetFlagStatus(PWR_FLAG_SB) == SET) ) {
133
    if (GPIO_ReadInputDataBit(SYS_UART_UP_GPIO, SYS_UART_UP_PIN) == Bit_SET) {
134
      backup_reg.wakeup_sec_reason = BL_WAKEUP_SEC_RSN_UART;
135
    } else {
136
      backup_reg.wakeup_sec_reason = BL_WAKEUP_SEC_RSN_ACCEL;
137
    }
138
  } else {
139
    backup_reg.wakeup_sec_reason = BL_WAKEUP_SEC_RSN_UNKNOWN;
140
  }
141

    
142
  /* clear the flags */
143
  RCC_ClearFlag();
144
  PWR_ClearFlag(PWR_FLAG_WU);
145

    
146
  setLed(BLT_FALSE);
147

    
148
  /* wait 1ms for all signals to become stable */
149
  msleep(1);
150

    
151
  /* handle different wakeup/reset reasons */
152
  ErrorStatus status = ERROR;
153
  if (backup_reg.wakeup_pri_reason & BL_WAKEUP_PRI_RSN_WKUP) {
154
    /* the system was woken via WKUP pin */
155
    /* differenciate between two wakeup types */
156
    switch (backup_reg.wakeup_sec_reason) {
157
      case BL_WAKEUP_SEC_RSN_UART:
158
        status = handleUartWakeup();
159
        break;
160
      case BL_WAKEUP_SEC_RSN_ACCEL:
161
        status = handleAccelWakeup();
162
        break;
163
      default:
164
        status = ERROR;
165
        break;
166
    }
167
  } else if (backup_reg.wakeup_pri_reason & BL_WAKEUP_PRI_RSN_PINRST) {
168
    /* system was woken via NRST pin */
169
    status = handleColdReset();
170
  } else {
171
    /* system was woken/reset for an unexpected reason */
172
    blinkSOS(1);
173
    status = handleColdReset();
174
  }
175

    
176
  /* if something went wrong, signal this failure */
177
  if (status != SUCCESS) {
178
    blinkSOSinf();
179
  }
180

    
181
  return 0;
182
} /*** end of main ***/
183

    
184

    
185
/************************************************************************************//**
186
** \brief     Initializes the microcontroller.
187
** \return    none.
188
**
189
****************************************************************************************/
190
static void Init(void)
191
{
192
  volatile blt_int32u StartUpCounter = 0, HSEStatus = 0;
193
  blt_int32u pll_multiplier;
194
#if (BOOT_FILE_LOGGING_ENABLE > 0) && (BOOT_COM_UART_ENABLE == 0)
195
  GPIO_InitTypeDef  GPIO_InitStruct;
196
  USART_InitTypeDef USART_InitStruct;
197
#endif
198

    
199
  /* reset the RCC clock configuration to the default reset state (for debug purpose) */
200
  /* set HSION bit */
201
  RCC->CR |= (blt_int32u)0x00000001;
202
  /* reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
203
  RCC->CFGR &= (blt_int32u)0xF8FF0000;
204
  /* reset HSEON, CSSON and PLLON bits */
205
  RCC->CR &= (blt_int32u)0xFEF6FFFF;
206
  /* reset HSEBYP bit */
207
  RCC->CR &= (blt_int32u)0xFFFBFFFF;
208
  /* reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
209
  RCC->CFGR &= (blt_int32u)0xFF80FFFF;
210
  /* disable all interrupts and clear pending bits  */
211
  RCC->CIR = 0x009F0000;
212
  /* enable HSE */
213
  RCC->CR |= ((blt_int32u)RCC_CR_HSEON);
214
  /* wait till HSE is ready and if Time out is reached exit */
215
  do
216
  {
217
    HSEStatus = RCC->CR & RCC_CR_HSERDY;
218
    StartUpCounter++;
219
  }
220
  while((HSEStatus == 0) && (StartUpCounter != 1500));
221
  /* check if time out was reached */
222
  if ((RCC->CR & RCC_CR_HSERDY) == RESET)
223
  {
224
    /* cannot continue when HSE is not ready */
225
    ASSERT_RT(BLT_FALSE);
226
  }
227
  /* enable flash prefetch buffer */
228
  FLASH->ACR |= FLASH_ACR_PRFTBE;
229
  /* reset flash wait state configuration to default 0 wait states */
230
  FLASH->ACR &= (blt_int32u)((blt_int32u)~FLASH_ACR_LATENCY);
231
#if (BOOT_CPU_SYSTEM_SPEED_KHZ > 48000)
232
  /* configure 2 flash wait states */
233
  FLASH->ACR |= (blt_int32u)FLASH_ACR_LATENCY_2;
234
#elif (BOOT_CPU_SYSTEM_SPEED_KHZ > 24000)
235
  /* configure 1 flash wait states */
236
  FLASH->ACR |= (blt_int32u)FLASH_ACR_LATENCY_1;
237
#endif
238
  /* HCLK = SYSCLK */
239
  RCC->CFGR |= (blt_int32u)RCC_CFGR_HPRE_DIV1;
240
  /* PCLK2 = HCLK/2 */
241
  RCC->CFGR |= (blt_int32u)RCC_CFGR_PPRE2_DIV2;
242
  /* PCLK1 = HCLK/2 */
243
  RCC->CFGR |= (blt_int32u)RCC_CFGR_PPRE1_DIV2;
244
  /* reset PLL configuration */
245
  RCC->CFGR &= (blt_int32u)((blt_int32u)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | \
246
                                          RCC_CFGR_PLLMULL));
247
  /* assert that the pll_multiplier is between 2 and 16 */
248
  ASSERT_CT((BOOT_CPU_SYSTEM_SPEED_KHZ/BOOT_CPU_XTAL_SPEED_KHZ) >= 2);
249
  ASSERT_CT((BOOT_CPU_SYSTEM_SPEED_KHZ/BOOT_CPU_XTAL_SPEED_KHZ) <= 16);
250
  /* calculate multiplier value */
251
  pll_multiplier = BOOT_CPU_SYSTEM_SPEED_KHZ/BOOT_CPU_XTAL_SPEED_KHZ;
252
  /* convert to register value */
253
  pll_multiplier = (blt_int32u)((pll_multiplier - 2) << 18);
254
  /* set the PLL multiplier and clock source */
255
  RCC->CFGR |= (blt_int32u)(RCC_CFGR_PLLSRC_HSE | pll_multiplier);
256
  /* enable PLL */
257
  RCC->CR |= RCC_CR_PLLON;
258
  /* wait till PLL is ready */
259
  while((RCC->CR & RCC_CR_PLLRDY) == 0)
260
  {
261
  }
262
  /* select PLL as system clock source */
263
  RCC->CFGR &= (blt_int32u)((blt_int32u)~(RCC_CFGR_SW));
264
  RCC->CFGR |= (blt_int32u)RCC_CFGR_SW_PLL;
265
  /* wait till PLL is used as system clock source */
266
  while ((RCC->CFGR & (blt_int32u)RCC_CFGR_SWS) != (blt_int32u)0x08)
267
  {
268
  }
269

    
270
  /* remap JTAG pins */
271
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
272
  AFIO->MAPR &= ~(blt_int32u)((blt_int32u)0x7 << 24);
273
  AFIO->MAPR |=  (blt_int32u)((blt_int32u)0x2 << 24);
274
  /* all input */
275

    
276
#if (BOOT_COM_CAN_ENABLE > 0 || BOOT_GATE_CAN_ENABLE > 0)
277
  /* enable clocks for CAN transmitter and receiver pins (GPIOB and AFIO) */
278
  RCC->APB2ENR |= (blt_int32u)(0x00000004 | 0x00000001);
279
  /* configure CAN Rx (GPIOA11) as alternate function input */
280
  /* first reset the configuration */
281
  GPIOA->CRH &= ~(blt_int32u)((blt_int32u)0xf << 12);
282
  /* CNF8[1:0] = %01 and MODE8[1:0] = %00 */
283
  GPIOA->CRH |= (blt_int32u)((blt_int32u)0x4 << 12);
284
  /* configure CAN Tx (GPIOA12) as alternate function push-pull */
285
  /* first reset the configuration */
286
  GPIOA->CRH &= ~(blt_int32u)((blt_int32u)0xf << 16);
287
  /* CNF9[1:0] = %11 and MODE9[1:0] = %11 */
288
  GPIOA->CRH |= (blt_int32u)((blt_int32u)0xb << 16);
289

    
290
  /* remap CAN1 pins to PortA */
291
  AFIO->MAPR &= ~(blt_int32u)((blt_int32u)0x3 << 13);
292
  AFIO->MAPR |=  (blt_int32u)((blt_int32u)0x0 << 13);
293
#endif
294

    
295
#if (BOOT_COM_UART_ENABLE > 0 || BOOT_GATE_UART_ENABLE > 0)
296
  /* enable clocks for USART1 peripheral, transmitter and receiver pins (GPIOA and AFIO) */
297
  RCC->APB2ENR |= (blt_int32u)(0x00004000 | 0x00000004 | 0x00000001);
298
  /* configure USART1 Tx (GPIOA9) as alternate function push-pull */
299
  /* first reset the configuration */
300
  GPIOA->CRH &= ~(blt_int32u)((blt_int32u)0xf << 4);
301
  /* CNF2[1:0] = %10 and MODE2[1:0] = %11 */
302
  GPIOA->CRH |= (blt_int32u)((blt_int32u)0xb << 4);
303
  /* configure USART1 Rx (GPIOA10) as alternate function input floating */
304
  /* first reset the configuration */
305
  GPIOA->CRH &= ~(blt_int32u)((blt_int32u)0xf << 8);
306
  /* CNF2[1:0] = %01 and MODE2[1:0] = %00 */
307
  GPIOA->CRH |= (blt_int32u)((blt_int32u)0x4 << 8);
308
#endif
309

    
310
} /*** end of Init ***/
311

    
312
/*
313
 * Initializes all GPIO used by the bootloader
314
 */
315
static void initGpio() {
316
  GPIO_InitTypeDef gpio_init;
317

    
318
  /*
319
   * OUTPUTS
320
   */
321

    
322
  /* initialize LED and push it up (inactive) */
323
  GPIO_SetBits(LED_GPIO, LED_PIN);
324
  gpio_init.GPIO_Pin    = LED_PIN;
325
  gpio_init.GPIO_Mode   = GPIO_Mode_Out_PP;
326
  gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
327
  GPIO_Init(LED_GPIO, &gpio_init);
328

    
329
  /* initialize SYS_PD_N and let it go (inactive) */
330
  GPIO_SetBits(SYS_PD_N_GPIO, SYS_PD_N_PIN);
331
  gpio_init.GPIO_Pin    = SYS_PD_N_PIN;
332
  gpio_init.GPIO_Mode   = GPIO_Mode_Out_OD;
333
  gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
334
  GPIO_Init(SYS_PD_N_GPIO, &gpio_init);
335

    
336
  /* initialize SYS_SYNC_N and pull it down (active) */
337
  GPIO_ResetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
338
  gpio_init.GPIO_Pin    = SYS_SYNC_N_PIN;
339
  gpio_init.GPIO_Mode   = GPIO_Mode_Out_OD;
340
  gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
341
  GPIO_Init(SYS_SYNC_N_GPIO, &gpio_init);
342

    
343
  /* initialize SYS_WARMST_N and let it go (active) */
344
  GPIO_SetBits(SYS_WARMRST_N_GPIO, SYS_WARMRST_N_PIN);
345
  gpio_init.GPIO_Pin    = SYS_WARMRST_N_PIN;
346
  gpio_init.GPIO_Mode   = GPIO_Mode_Out_OD;
347
  gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
348
  GPIO_Init(SYS_WARMRST_N_GPIO, &gpio_init);
349

    
350
  /* initialize SYS_UART_UP and let it go (inactive) */
351
  GPIO_SetBits(SYS_UART_UP_GPIO, SYS_UART_UP_PIN);
352
  gpio_init.GPIO_Pin    = SYS_UART_UP_PIN;
353
  gpio_init.GPIO_Mode   = GPIO_Mode_Out_OD;
354
  gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
355
  GPIO_Init(SYS_UART_UP_GPIO, &gpio_init);
356

    
357
  /* initialize PATH_DCEN and pull it down (inactive) */
358
  GPIO_ResetBits(PATH_DCEN_GPIO, PATH_DCEN_PIN);
359
  gpio_init.GPIO_Pin    = PATH_DCEN_PIN;
360
  gpio_init.GPIO_Mode   = GPIO_Mode_Out_PP;
361
  gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
362
  GPIO_Init(PATH_DCEN_GPIO, &gpio_init);
363

    
364
  /*
365
   * INPUTS
366
   */
367

    
368
  /* initialize the input ACCEL_INT_N */
369
  gpio_init.GPIO_Pin    = ACCEL_INT_N_PIN;
370
  gpio_init.GPIO_Mode   = GPIO_Mode_IN_FLOATING;
371
  gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
372
  GPIO_Init(ACCEL_INT_N_GPIO, &gpio_init);
373

    
374
  return;
375
} /*** end of initGpio ***/
376

    
377
/*
378
 * Initialize all EXTI lines
379
 */
380
static void initExti() {
381
  /* configure EXTI lines */
382
  GPIO_EXTILineConfig(GPIO_PortSourceGPIOC, GPIO_PinSource1); // SYS_SYNC_N
383
  GPIO_EXTILineConfig(GPIO_PortSourceGPIOD, GPIO_PinSource2); // SYS_WARMRST_N
384
  GPIO_EXTILineConfig(GPIO_PortSourceGPIOC, GPIO_PinSource3); // PATH_DCSTAT
385
  GPIO_EXTILineConfig(GPIO_PortSourceGPIOB, GPIO_PinSource5); // COMPASS_DRDY
386
  GPIO_EXTILineConfig(GPIO_PortSourceGPIOC, GPIO_PinSource8); // SYS_PD_N
387
  GPIO_EXTILineConfig(GPIO_PortSourceGPIOC, GPIO_PinSource9); // SYS_REG_EN
388
  GPIO_EXTILineConfig(GPIO_PortSourceGPIOB, GPIO_PinSource12); // IR_INT
389
  GPIO_EXTILineConfig(GPIO_PortSourceGPIOB, GPIO_PinSource13); // GYRO_DRDY
390
  GPIO_EXTILineConfig(GPIO_PortSourceGPIOB, GPIO_PinSource14); // SYS_UART_UP
391
  GPIO_EXTILineConfig(GPIO_PortSourceGPIOB, GPIO_PinSource15); // ACCEL_INT_N
392

    
393
  return;
394
} /*** end of initExti ***/
395

    
396
/*
397
 * Signals, which type of low-power mode the system shall enter after the shutdown sequence.
398
 */
399
ErrorStatus shutdownDisambiguationProcedure(const uint8_t type) {
400
  GPIO_SetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
401
  ErrorStatus ret_val = ERROR;
402

    
403
  switch (type) {
404
    case BL_SHUTDOWN_PRI_RSN_UNKNOWN:
405
    case BL_SHUTDOWN_PRI_RSN_HIBERNATE:
406
    case BL_SHUTDOWN_PRI_RSN_DEEPSLEEP:
407
    case BL_SHUTDOWN_PRI_RSN_TRANSPORT:
408
    {
409
      // broadcast a number of pulses, depending on the argument
410
      uint8_t pulse_counter = 0;
411
      for (pulse_counter = 0; pulse_counter < type; ++pulse_counter) {
412
        msleep(1);
413
        GPIO_ResetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
414
        msleep(1);
415
        GPIO_SetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
416
      }
417
      // wait for timeout
418
      msleep(10);
419
      ret_val = SUCCESS;
420
      break;
421
    }
422
    case BL_SHUTDOWN_PRI_RSN_RESTART:
423
    {
424
      // since there is no ambiguity for restart requests, no pulses are generated
425
      msleep(10);
426
      ret_val = SUCCESS;
427
      break;
428
    }
429
    default:
430
      ret_val = ERROR;
431
      break;
432
  }
433

    
434
  return ret_val;
435
} /*** end of shutdownDisambiguationProcedure ***/
436

    
437
/*
438
 * Final shutdown of the system to enter transportation mode.
439
 */
440
void shutdownToTransportation(const blt_bool exec_disambiguation) {
441
  /* configure some criticpal GPIOs as input
442
   * This is required, because otherwise some hardware might be powered through these signals */
443
  configGpioForShutdown();
444

    
445
  /* turn off the motors */
446
  GPIO_ResetBits(POWER_EN_GPIO, POWER_EN_PIN);
447

    
448
  /* deactivate the WKUP pin */
449
  PWR_WakeUpPinCmd(DISABLE);
450

    
451
  /* deactivate any RTC related events */
452
  RTC_ITConfig(RTC_IT_ALR | RTC_IT_OW | RTC_IT_SEC, DISABLE);
453
  RTC_ClearFlag(~0);
454

    
455
  /* disable the IWDG */
456
  IWDG_ReloadCounter();
457

    
458
  /* wait for all boards to be ready for shutdown */
459
  GPIO_SetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
460
  if (GPIO_ReadInputDataBit(SYS_REG_EN_GPIO, SYS_REG_EN_PIN) == Bit_SET) {
461
    // this must skipped if the pullup voltage (VIO3.3) is not active
462
    setLed(BLT_TRUE);
463
    waitForSignal(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN, Bit_SET);
464
    setLed(BLT_FALSE);
465
  }
466

    
467
  if (exec_disambiguation == BLT_TRUE) {
468
    /* execute disambiguation procedure and signal all modules to enter transportation mode */
469
    if (shutdownDisambiguationProcedure(BL_SHUTDOWN_PRI_RSN_TRANSPORT) != SUCCESS) {
470
      blinkSOS(1);
471
      msleep(10);
472
    }
473
  }
474

    
475
  /* morse 'OK' via the LED to signal that shutdown was successful */
476
  blinkOK(1);
477

    
478
  /* enter standby mode */
479
  PWR_EnterSTANDBYMode();
480

    
481
  return;
482
} /*** end of shutdownToTransportation ***/
483

    
484
/*
485
 * Final shutdown of the system to enter deepsleep mode.
486
 */
487
void shutdownToDeepsleep(const blt_bool exec_disambiguation) {
488
  /* configure some criticpal GPIOs as input
489
   * This is required, because otherwise some hardware might be powered through these signals */
490
  configGpioForShutdown();
491

    
492
  /* turn off the motors */
493
  GPIO_ResetBits(POWER_EN_GPIO, POWER_EN_PIN);
494

    
495
  /* deactivate the WKUP pin */
496
  PWR_WakeUpPinCmd(ENABLE);
497

    
498
  /*
499
   * Configuration of RTC and IWDG belongs to the OS.
500
   */
501

    
502
  /* wait for all boards to be ready for shutdown */
503
  GPIO_SetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
504
  if (GPIO_ReadInputDataBit(SYS_REG_EN_GPIO, SYS_REG_EN_PIN) == Bit_SET) {
505
    // this must skipped if the pullup voltage (VIO3.3) is not active
506
    setLed(BLT_TRUE);
507
    waitForSignal(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN, Bit_SET);
508
    setLed(BLT_FALSE);
509
  }
510

    
511
  if (exec_disambiguation == BLT_TRUE) {
512
    /* execute disambiguation procedure and signal all modules to enter deepsleep mode */
513
    if (shutdownDisambiguationProcedure(BL_SHUTDOWN_PRI_RSN_DEEPSLEEP) != SUCCESS) {
514
      blinkSOS(1);
515
      msleep(10);
516
    }
517
  }
518

    
519
  /* morse 'OK' via the LED to signal that shutdown was successful */
520
  blinkOK(1);
521

    
522
  /* enter standby mode */
523
  PWR_EnterSTANDBYMode();
524

    
525
  return;
526
} /*** end of shutdownToDeepsleep ***/
527

    
528
/*
529
 * Final shutdown of the system to enter hibernate mode.
530
 */
531
void shutdownToHibernate(const blt_bool exec_disambiguation) {
532
  /* configure some criticpal GPIOs as input
533
   * This is required, because otherwise some hardware might be powered through these signals */
534
  configGpioForShutdown();
535

    
536
  /* turn off the motors */
537
  GPIO_ResetBits(POWER_EN_GPIO, POWER_EN_PIN);
538

    
539
  /* deactivate the WKUP pin */
540
  PWR_WakeUpPinCmd(ENABLE);
541

    
542
  /*
543
   * Configuration of RTC and IWDG belongs to the OS.
544
   */
545

    
546
  /* wait for all boards to be ready for shutdown */
547
  GPIO_SetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
548
  if (GPIO_ReadInputDataBit(SYS_REG_EN_GPIO, SYS_REG_EN_PIN) == Bit_SET) {
549
    // this must skipped if the pullup voltage (VIO3.3) is not active
550
    setLed(BLT_TRUE);
551
    waitForSignal(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN, Bit_SET);
552
    setLed(BLT_FALSE);
553
  }
554

    
555
  if (exec_disambiguation == BLT_TRUE) {
556
    /* execute disambiguation procedure and signal all modules to enter deepsleep mode */
557
    if (shutdownDisambiguationProcedure(BL_SHUTDOWN_PRI_RSN_HIBERNATE) != SUCCESS) {
558
      blinkSOS(1);
559
      msleep(10);
560
    }
561
  }
562

    
563
  /* morse 'OK' via the LED to signal that shutdown was successful */
564
  blinkOK(1);
565

    
566
  /* enter standby mode */
567
  PWR_EnterSTANDBYMode();
568

    
569
  return;
570
} /* end of shutdownToHibernate ***/
571

    
572
/*
573
 * Final shutdown of the system and restart.
574
 */
575
void shutdownAndRestart(const blt_bool exec_disambiguation) {
576
  /* configure some criticpal GPIOs as input
577
   * This is required, because otherwise some hardware might be powered through these signals */
578
  configGpioForShutdown();
579

    
580
  /* turn off the motors */
581
  GPIO_ResetBits(POWER_EN_GPIO, POWER_EN_PIN);
582

    
583
  /* prepare for low-power mode */
584
  PWR_WakeUpPinCmd(DISABLE); // disable WKUP pin
585
  RTC_ITConfig(RTC_IT_ALR | RTC_IT_OW | RTC_IT_SEC, DISABLE); // unset RTC events
586
  RTC_ClearFlag(~0); // clear pending RTC events
587
  IWDG_ReloadCounter(); // disable IWDG
588

    
589
  /* wait for all boards to be ready for shutdown */
590
  GPIO_SetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
591
  if (GPIO_ReadInputDataBit(SYS_REG_EN_GPIO, SYS_REG_EN_PIN) == Bit_SET) {
592
    // this must skipped if the pullup voltage (VIO3.3) is not active
593
    setLed(BLT_TRUE);
594
    waitForSignal(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN, Bit_SET);
595
    setLed(BLT_FALSE);
596
  }
597

    
598
  if (exec_disambiguation == BLT_TRUE) {
599
    /* execute disambiguation procedure and signal all modules to restart in default mode */
600
    if (shutdownDisambiguationProcedure(BL_SHUTDOWN_PRI_RSN_RESTART) != SUCCESS) {
601
      blinkSOS(1);
602
      msleep(10);
603
    }
604
  }
605

    
606
  /* morse 'OK' via the LED to signal that shutdown was successful */
607
  blinkOK(1);
608

    
609
  /* enter standby mode */
610
  PWR_EnterSTANDBYMode();
611

    
612
  /*
613
   * Even though this module will not restart the system by its own, the PowerManagement will reset the system.
614
   */
615

    
616
  return;
617
} /*** end of shutdownAndRestart***/
618

    
619
/*
620
 * Configures some GPIO pins as inputs for safety reasons.
621
 * Under certain circumstances, these pins might power hardware that is supposed to be shut down.
622
 */
623
void configGpioForShutdown() {
624
  /* setup the configuration */
625
  GPIO_InitTypeDef gpio_init;
626
  gpio_init.GPIO_Mode   = GPIO_Mode_IN_FLOATING;
627
  gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
628

    
629
  /* configure SYS_UART_TX */
630
  gpio_init.GPIO_Pin = SYS_UART_TX_PIN;
631
  GPIO_Init(SYS_UART_TX_GPIO, &gpio_init);
632

    
633
  /* configure CAN_TX */
634
  gpio_init.GPIO_Pin = CAN_TX_PIN;
635
  GPIO_Init(CAN_TX_GPIO, &gpio_init);
636

    
637
  /* configure all MOTION (SPI) signals */
638
  gpio_init.GPIO_Pin = MOTION_SCLK_PIN;
639
  GPIO_Init(MOTION_SCLK_GPIO, &gpio_init);
640
  gpio_init.GPIO_Pin = MOTION_MISO_PIN;
641
  GPIO_Init(MOTION_MISO_GPIO, &gpio_init);
642
  gpio_init.GPIO_Pin = MOTION_MOSI_PIN;
643
  GPIO_Init(MOTION_MOSI_GPIO, &gpio_init);
644
  gpio_init.GPIO_Pin = ACCEL_SS_N_PIN;
645
  GPIO_Init(ACCEL_SS_N_GPIO, &gpio_init);
646
  gpio_init.GPIO_Pin = GYRO_SS_N_PIN;
647
  GPIO_Init(GYRO_SS_N_GPIO, &gpio_init);
648

    
649
  return;
650
} /*** end of configGpioForShutdown ***/
651

    
652
/*
653
 * System was reset via the NRST pin or the reason could not be detected.
654
 * In this case, there are three possibilities how to act:
655
 * 1) When the SYS_WARMRST_N signal becomes inactive, flashing mode is entered and the system will try to load the OS.
656
 * 2) When the SYS_UART_UP signal becomes active (low), the system will enter hibernate mode to enable charging via the pins.
657
 * 3) If none of both happens and a timeout occurs, the system enters deepsleep mode.
658
 */
659
ErrorStatus handleColdReset() {
660
  /* wait until either the SYS_WARMRST_N signal goes up, or SYS_UART_UP goes down */
661
  enum CRST_SIG {CRST_SIG_SYS_WARMRST_N,
662
                 CRST_SIG_SYS_UART_UP,
663
                 CRST_SIG_TIMEOUT
664
                } sig;
665
  uint32_t loopStartTime = 0;
666
  saTimerUpdate(&loopStartTime);
667
  uint32_t currentTime = loopStartTime;
668
  setLed(BLT_TRUE);
669
  while (1) {
670
    /* read the input signals */
671
    if (GPIO_ReadInputDataBit(SYS_REG_EN_GPIO, SYS_REG_EN_PIN) == Bit_SET &&
672
        GPIO_ReadInputDataBit(SYS_WARMRST_N_GPIO, SYS_WARMRST_N_PIN) == Bit_SET) {
673
      sig = CRST_SIG_SYS_WARMRST_N;
674
      break;
675
    }
676
    if (GPIO_ReadInputDataBit(SYS_UART_UP_GPIO, SYS_UART_UP_PIN) == Bit_RESET) {
677
      sig = CRST_SIG_SYS_UART_UP;
678
      break;
679
    }
680

    
681
    /* check for a timeout */
682
    saTimerUpdate(&currentTime);
683
    if (currentTime > loopStartTime + RESET_TIMEOUT_MS) {
684
      sig = CRST_SIG_TIMEOUT;
685
      break;
686
    }
687
  }
688
  setLed(BLT_FALSE);
689

    
690
  /* depending on the signal, react accordingly */
691
  switch (sig) {
692
    /* activation of the slave modules signales to boot the OS */
693
    case CRST_SIG_SYS_WARMRST_N:
694
    {
695
      /* enable CAN clock */
696
      RCC_APB1PeriphClockCmd(RCC_APB1Periph_CAN1, ENABLE);
697

    
698
      /* initialize the bootloader */
699
      BootInit();
700

    
701
      /* start the infinite program loop */
702
      uint32_t loopStartTime = 0;
703
      saTimerUpdate(&loopStartTime);
704
      uint32_t currentTime = loopStartTime;
705
      while (1)
706
      {
707
//        /* make the LED "double-blink" */
708
//        saTimerUpdate(&currentTime);
709
//        if (currentTime < loopStartTime + 50) {
710
//          setLed(BLT_TRUE);
711
//        } else if (currentTime < loopStartTime + 50+100) {
712
//          setLed(BLT_FALSE);
713
//        } else if (currentTime < loopStartTime + 50+100+50) {
714
//          setLed(BLT_TRUE);
715
//        } else if ( currentTime < loopStartTime + 50+100+50+300) {
716
//          setLed(BLT_FALSE);
717
//        } else {
718
//          loopStartTime = currentTime;
719
//        }
720

    
721
        /* run the bootloader task */
722
        BootTask();
723

    
724
        /* check the SYS_PD_N signal */
725
        if (GPIO_ReadInputDataBit(SYS_PD_N_GPIO, SYS_PD_N_PIN) == Bit_RESET) {
726
          blCallbackHandleShutdownRequest();
727
          return SUCCESS;
728
        }
729
      }
730

    
731
      break;
732
    }
733
    /* activation of the UART_UP signal indicates that this module shall enter hibernate mode */
734
    case CRST_SIG_SYS_UART_UP:
735
    {
736
      /* indicate that the MCU is busy */
737
      GPIO_ResetBits(SYS_UART_UP_GPIO, SYS_UART_UP_PIN);
738

    
739
      /* enable the charging pins */
740
      GPIO_SetBits(PATH_DCEN_GPIO, PATH_DCEN_PIN);
741

    
742
      /* wait some time so the systen voltage (VSYS) is stable if it is supplied via the pins */
743
      msleep(10);
744

    
745
      /* indicate that the MCU is not busy anymore */
746
      GPIO_SetBits(SYS_UART_UP_GPIO, SYS_UART_UP_PIN);
747

    
748
      /* configure the accelerometer external interrupt as event */
749
      EXTI_InitTypeDef exti;
750
      exti.EXTI_Line = EXTI_Line15;
751
      exti.EXTI_Mode = EXTI_Mode_Event;
752
      exti.EXTI_Trigger = EXTI_Trigger_Falling;
753
      exti.EXTI_LineCmd = ENABLE;
754
      EXTI_Init(&exti);
755

    
756
      /* sleep until something happens */
757
      __WFE();
758

    
759
      /* clear all pending EXTI events */
760
      EXTI_DeInit();
761
      EXTI_ClearFlag(EXTI_Line15);
762

    
763
      /* handle accelerometer wakeup
764
       * note: In fact, the only events that will occur at this point are an interrupt event from the accelerometer, or a
765
       * system reset from the PowerManagement via the NRST pin. Thus, if the following code is reached, it must have
766
       * been the accelerometer.
767
       */
768

    
769
      /* as as after a normal wakeup from the accelerometer */
770
      return handleAccelWakeup();
771

    
772
      break;
773
    }
774
    /* if a timeout occurred, the system enters deepsleep mode */
775
    case CRST_SIG_TIMEOUT:
776
    {
777
      /* reconfigure the LED_GPIO as input so it will not light up (and thus save energy) */
778
      GPIO_InitTypeDef gpio_init;
779
      gpio_init.GPIO_Pin    = LED_PIN;
780
      gpio_init.GPIO_Mode   = GPIO_Mode_IN_FLOATING;
781
      gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
782
      GPIO_Init(LED_GPIO, &gpio_init);
783

    
784
      /* reconfigure SYS_PD_N as input so the callback will not indicate a shutdown */
785
      gpio_init.GPIO_Pin    = SYS_PD_N_PIN;
786
      gpio_init.GPIO_Mode   = GPIO_Mode_IN_FLOATING;
787
      gpio_init.GPIO_Speed  = GPIO_Speed_50MHz;
788
      GPIO_Init(SYS_PD_N_GPIO, &gpio_init);
789

    
790
      blCallbackShutdownDeepsleep();
791
      break;
792
    }
793
    default:
794
      break;
795
  }
796

    
797
  return ERROR;
798
} /*** end of handleColdReset ***/
799

    
800
/*
801
 * System was woken up via the WKUP pin and the SYS_UART_UP signal was found to be responsible.
802
 * In this case, the system starts as after a cold reset.
803
 */
804
ErrorStatus handleUartWakeup() {
805
  return handleColdReset();
806
} /*** end of handleUartWakeup ***/
807

    
808
/*
809
 * System was woken up via the WKUP pin and the ACCEL_INT_N signal was found to be responsible.
810
 * The SYS_UART_UP signal is used to wake the PowerManagement before a normal cold reset is performed.
811
 */
812
ErrorStatus handleAccelWakeup() {
813
  /* wakeup the PowerManegement (ensure that the pulse is detected) */
814
  GPIO_ResetBits(SYS_UART_UP_GPIO, SYS_UART_UP_PIN);
815
  msleep(1);
816
  GPIO_SetBits(SYS_UART_UP_GPIO, SYS_UART_UP_PIN);
817

    
818
  return handleColdReset();
819
} /*** end of handleAccelWakeu ***/
820

    
821
/*
822
 * Callback function that handles the system shutdown and enters transportation mode.
823
 * When called from a multithreaded environment, it must be ensured that no other thread will preempt this function.
824
 * In transportation low-power mode the system can only be woken up by pulling down the NRST signal.
825
 * Furthermore, the system can not be charged when in transportation mode.
826
 */
827
void blCallbackShutdownTransportation(void) {
828
  /* make sure that the required clocks are activated */
829
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
830
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD, ENABLE);
831

    
832
  /* set/keep the SYS_SYNC and SYS_PD signals active */
833
  GPIO_ResetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
834
  GPIO_ResetBits(SYS_PD_N_GPIO, SYS_PD_N_PIN);
835

    
836
  setLed(BLT_TRUE);
837
  saTimerInit();
838

    
839
  shutdownToTransportation(BLT_TRUE);
840

    
841
  return;
842
} /*** end of blCallbackShutdownTransportation ***/
843

    
844
/*
845
 * Callback function that handles the system shutdown and enters deepsleep mode.
846
 * When called from a multithreaded environment, it must be ensured that no other thread will preempt this function.
847
 * In deepsleep low-power mode the system can only be woken up via the NRST or the WKUP signal, or the RTC or IWDG, if configured.
848
 */
849
void blCallbackShutdownDeepsleep(void) {
850
  /* make sure that the required clocks are activated */
851
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
852
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD, ENABLE);
853

    
854
  /* set/keep the SYS_SYNC and SYS_PD signals active */
855
  GPIO_ResetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
856
  GPIO_ResetBits(SYS_PD_N_GPIO, SYS_PD_N_PIN);
857

    
858
  saTimerInit();
859

    
860
  shutdownToDeepsleep(BLT_TRUE);
861

    
862
  return;
863
} /*** end of blCallbackShutdownDeepsleep ***/
864

    
865
/*
866
 * Callback function that handles the system shutdown and enters hibernate mode.
867
 * When called from a multithreaded environment, it must be ensured that no other thread will preempt this function.
868
 */
869
void blCallbackShutdownHibernate(void) {
870
  /* make sure that the required clocks are activated */
871
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
872
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD, ENABLE);
873

    
874
  /* set/keep the SYS_SYNC and SYS_PD signals active */
875
  GPIO_ResetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
876
  GPIO_ResetBits(SYS_PD_N_GPIO, SYS_PD_N_PIN);
877

    
878
  saTimerInit();
879

    
880
  shutdownToHibernate(BLT_TRUE);
881

    
882
  return;
883
} /*** end of blCallbackShutdownHibernate ***/
884

    
885
/*
886
 * Callback function that handles the system shutdown and initializes a restart.
887
 * When called from a multithreaded environment, it must be ensured that no other thread will preempt this function.
888
 */
889
void blCallbackShutdownRestart(void) {
890
  /* make sure that the required clocks are activated */
891
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
892
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD, ENABLE);
893

    
894
  /* set/keep the SYS_SYNC and SYS_PD signal active */
895
  GPIO_ResetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
896
  GPIO_ResetBits(SYS_PD_N_GPIO, SYS_PD_N_PIN);
897

    
898
  /* ensure that all modules had a chance to detect the pulse on SYS_PD_N */
899
  saTimerInit();
900
  msleep(1);
901
  GPIO_SetBits(SYS_PD_N_GPIO, SYS_PD_N_PIN);
902
  msleep(1);
903

    
904
  shutdownAndRestart(BLT_TRUE);
905

    
906
  return;
907
} /*** end of blCallbackRestart ***/
908

    
909
/*
910
 * Callback function that handles a system shutdown/restart request from another module.
911
 * Depending on the result of the disambiguation procedure, the module will enter the according low-power mode or restart.
912
 * When called from a multithreaded environment, it must be ensured that no other thread will preempt this function.
913
 */
914
void blCallbackHandleShutdownRequest(void) {
915
  /* make sure that the required clocks are activated */
916
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
917
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD, ENABLE);
918

    
919
  /* set/keep the SYS_SYNC and SYS_PD signal active */
920
  GPIO_ResetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
921
  GPIO_ResetBits(SYS_PD_N_GPIO, SYS_PD_N_PIN);
922

    
923
  /* initialized the standalone timer */
924
  saTimerInit();
925

    
926
  setLed(BLT_TRUE);
927

    
928
  /* deactivate SYS_PD_N and ensure that all modules had a chance to detect the falling edge */
929
  msleep(1);
930
  GPIO_SetBits(SYS_PD_N_GPIO, SYS_PD_N_PIN);
931
  msleep(1);
932

    
933
  /* wait for all boards to be ready for shutdown */
934
  GPIO_SetBits(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN);
935
  if (GPIO_ReadOutputDataBit(SYS_REG_EN_GPIO, SYS_REG_EN_PIN) == Bit_SET) {
936
    // this must skipped if the pullup voltage (VIO3.3) is not active
937
    setLed(BLT_TRUE);
938
    waitForSignal(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN, Bit_SET);
939
    setLed(BLT_FALSE);
940
  }
941

    
942
  /* check ths SYS_PD_N signal, whether the system shall shutdown or restart */
943
  blt_bool shutdown_nrestart = (GPIO_ReadInputDataBit(SYS_PD_N_GPIO, SYS_PD_N_PIN) == Bit_RESET) ? BLT_TRUE : BLT_FALSE;
944

    
945
  /* disambiguation procedure (passive) */
946
  uint32_t pulse_counter = 0;
947
  while (waitForSignalTimeout(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN, Bit_RESET, 10)) {
948
    waitForSignal(SYS_SYNC_N_GPIO, SYS_SYNC_N_PIN, Bit_SET);
949
    ++pulse_counter;
950
  }
951

    
952
  /* evaluate and hanlde disambiguation result */
953
  if (shutdown_nrestart == BLT_TRUE) {
954
    /* shutdown request */
955

    
956
    /* handle special cases */
957
    if (pulse_counter == BL_SHUTDOWN_PRI_RSN_UNKNOWN) {
958
      /* no pulse at all was received */
959
      pulse_counter = BL_SHUTDOWN_PRI_RSN_DEFAULT;
960
    } else if (pulse_counter != BL_SHUTDOWN_PRI_RSN_HIBERNATE &&
961
               pulse_counter != BL_SHUTDOWN_PRI_RSN_DEEPSLEEP &&
962
               pulse_counter != BL_SHUTDOWN_PRI_RSN_TRANSPORT) {
963
      /* invalid number of pulses received */
964
      blinkSOS(1);
965
      pulse_counter = BL_SHUTDOWN_PRI_RSN_DEFAULT;
966
    }
967

    
968
    switch (pulse_counter) {
969
      case BL_SHUTDOWN_PRI_RSN_HIBERNATE:
970
        shutdownToHibernate(BLT_FALSE);
971
        break;
972
      case BL_SHUTDOWN_PRI_RSN_DEEPSLEEP:
973
        shutdownToDeepsleep(BLT_FALSE);
974
        break;
975
      case BL_SHUTDOWN_PRI_RSN_TRANSPORT:
976
        shutdownToTransportation(BLT_FALSE);
977
        break;
978
    }
979
  } else {
980
    /* restart request */
981

    
982
    /* there is no ambiguity for restart, so it is ignored */
983
    shutdownAndRestart(BLT_FALSE);
984
  }
985

    
986
  /* if this code is reached, the system did neither shut down, nor restart.
987
   * This must never be the case!
988
   */
989
  blinkSOSinf();
990
  return;
991
} /*** end of blCallbackHandleShutdownRequest ***/
992

    
993
/*********************************** end of main.c *************************************/