amiro-blt / Target / Source / ARMCM3_STM32 / uart.c @ fc7151bb
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1 | 69661903 | Thomas Schöpping | /************************************************************************************//** |
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2 | * \file Source\ARMCM3_STM32\uart.c
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3 | * \brief Bootloader UART communication interface source file.
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4 | * \ingroup Target_ARMCM3_STM32
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5 | * \internal
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6 | *----------------------------------------------------------------------------------------
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7 | * C O P Y R I G H T
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8 | *----------------------------------------------------------------------------------------
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9 | * Copyright (c) 2011 by Feaser http://www.feaser.com All rights reserved
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10 | *
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11 | *----------------------------------------------------------------------------------------
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12 | * L I C E N S E
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13 | *----------------------------------------------------------------------------------------
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14 | * This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
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15 | * modify it under the terms of the GNU General Public License as published by the Free
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16 | * Software Foundation, either version 3 of the License, or (at your option) any later
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17 | * version.
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18 | *
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19 | * OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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20 | * without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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21 | * PURPOSE. See the GNU General Public License for more details.
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22 | *
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23 | * You should have received a copy of the GNU General Public License along with OpenBLT.
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24 | * If not, see <http://www.gnu.org/licenses/>.
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25 | *
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26 | * A special exception to the GPL is included to allow you to distribute a combined work
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27 | * that includes OpenBLT without being obliged to provide the source code for any
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28 | * proprietary components. The exception text is included at the bottom of the license
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29 | * file <license.html>.
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30 | *
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31 | * \endinternal
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32 | ****************************************************************************************/
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33 | |||
34 | /****************************************************************************************
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35 | * Include files
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36 | ****************************************************************************************/
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37 | #include "boot.h" /* bootloader generic header */ |
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38 | |||
39 | |||
40 | #if (BOOT_COM_UART_ENABLE > 0 || BOOT_GATE_UART_ENABLE > 0) |
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41 | /****************************************************************************************
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42 | * Type definitions
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43 | ****************************************************************************************/
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44 | /** \brief UART register layout. */
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45 | typedef struct |
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46 | { |
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47 | volatile blt_int16u SR; /**< status register */ |
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48 | blt_int16u RESERVED0; |
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49 | volatile blt_int16u DR; /**< data register */ |
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50 | blt_int16u RESERVED1; |
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51 | volatile blt_int16u BRR; /**< baudrate register */ |
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52 | blt_int16u RESERVED2; |
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53 | volatile blt_int16u CR1; /**< control register 1 */ |
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54 | blt_int16u RESERVED3; |
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55 | volatile blt_int16u CR2; /**< control register 2 */ |
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56 | blt_int16u RESERVED4; |
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57 | volatile blt_int16u CR3; /**< control register 3 */ |
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58 | blt_int16u RESERVED5; |
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59 | volatile blt_int16u GTPR; /**< guard time and prescale reg. */ |
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60 | blt_int16u RESERVED6; |
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61 | } tUartRegs; /**< UART register layout type */
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62 | |||
63 | |||
64 | /****************************************************************************************
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65 | * Macro definitions
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66 | ****************************************************************************************/
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67 | /** \brief USART enable bit. */
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68 | #define UART_BIT_UE ((blt_int16u)0x2000) |
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69 | /** \brief Transmitter enable bit. */
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70 | #define UART_BIT_TE ((blt_int16u)0x0008) |
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71 | /** \brief Receiver enable bit. */
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72 | #define UART_BIT_RE ((blt_int16u)0x0004) |
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73 | /** \brief Transmit data reg. empty bit. */
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74 | #define UART_BIT_TXE ((blt_int16u)0x0080) |
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75 | /** \brief Read data reg. not empty bit. */
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76 | #define UART_BIT_RXNE ((blt_int16u)0x0020) |
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77 | |||
78 | |||
79 | /****************************************************************************************
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80 | * Register definitions
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81 | ****************************************************************************************/
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82 | #if (BOOT_COM_UART_CHANNEL_INDEX == 0) |
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83 | /** \brief Set UART base address to USART1. */
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84 | #define UARTx ((tUartRegs *) (blt_int32u)0x40013800) |
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85 | #elif (BOOT_COM_UART_CHANNEL_INDEX == 1) |
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86 | /** \brief Set UART base address to USART2. */
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87 | #define UARTx ((tUartRegs *) (blt_int32u)0x40004400) |
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88 | #else
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89 | /** \brief Set UART base address to USART1 by default. */
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90 | #define UARTx ((tUartRegs *) (blt_int32u)0x40013800) |
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91 | #endif
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92 | |||
93 | #if (BOOT_DEBUGGING_UART2_ENABLE > 0) |
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94 | /* activate debugging UART on UART2 */
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95 | #define UARTDebug ((tUartRegs *) (blt_int32u)0x40004400) |
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96 | #endif
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97 | |||
98 | |||
99 | /****************************************************************************************
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100 | * Function prototypes
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101 | ****************************************************************************************/
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102 | static blt_bool UartReceiveByte(blt_int8u *data);
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103 | static blt_bool UartTransmitByte(blt_int8u data);
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104 | #if (BOOT_DEBUGGING_UART2_ENABLE > 0) |
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105 | static blt_bool UartTransmitDebuggingByte(blt_int8u data);
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106 | #endif
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107 | |||
108 | /************************************************************************************//** |
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109 | ** \brief Initializes the UART communication interface.
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110 | ** \return none.
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111 | **
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112 | ****************************************************************************************/
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113 | void UartInit(void) |
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114 | { |
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115 | /* the current implementation supports USART1 and USART2. throw an assertion error in
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116 | * case a different UART channel is configured.
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117 | */
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118 | ASSERT_CT((BOOT_COM_UART_CHANNEL_INDEX == 0) || (BOOT_COM_UART_CHANNEL_INDEX == 1)); |
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119 | /* first reset the UART configuration. note that this already configures the UART
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120 | * for 1 stopbit, 8 databits and no parity.
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121 | */
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122 | UARTx->BRR = 0;
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123 | UARTx->CR1 = 0;
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124 | UARTx->CR2 = 0;
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125 | UARTx->CR3 = 0;
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126 | UARTx->GTPR = 0;
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127 | /* configure the baudrate, knowing that PCLKx is configured to be half of
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128 | * BOOT_CPU_SYSTEM_SPEED_KHZ.
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129 | */
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130 | UARTx->BRR = ((BOOT_CPU_SYSTEM_SPEED_KHZ/2)*(blt_int32u)1000)/BOOT_COM_UART_BAUDRATE; |
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131 | /* enable the UART including the transmitter and the receiver */
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132 | UARTx->CR1 |= (UART_BIT_UE | UART_BIT_TE | UART_BIT_RE); |
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133 | |||
134 | #if (BOOT_DEBUGGING_UART2_ENABLE > 0) |
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135 | UARTDebug->BRR = 0;
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136 | UARTDebug->CR1 = 0;
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137 | UARTDebug->CR2 = 0;
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138 | UARTDebug->CR3 = 0;
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139 | UARTDebug->GTPR = 0;
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140 | /* configure the baudrate, knowing that PCLKx is configured to be half of
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141 | |||
142 | * BOOT_CPU_SYSTEM_SPEED_KHZ.
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143 | */
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144 | UARTDebug->BRR = ((BOOT_CPU_SYSTEM_SPEED_KHZ/2)*(blt_int32u)1000)/BOOT_COM_UART_BAUDRATE; |
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145 | /* enable the UART including the transmitter and the receiver */
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146 | UARTDebug->CR1 |= (UART_BIT_UE | UART_BIT_TE | UART_BIT_RE); |
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147 | #endif
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148 | } /*** end of UartInit ***/
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149 | |||
150 | |||
151 | /************************************************************************************//** |
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152 | ** \brief Transmits a packet formatted for the communication interface.
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153 | ** \param data Pointer to byte array with data that it to be transmitted.
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154 | ** \param len Number of bytes that are to be transmitted.
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155 | ** \return none.
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156 | **
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157 | ****************************************************************************************/
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158 | void UartTransmitPacket(blt_int8u *data, blt_int8u len)
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159 | { |
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160 | blt_int16u data_index; |
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161 | blt_bool result; |
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162 | |||
163 | /* verify validity of the len-paramenter */
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164 | ASSERT_RT(len <= BOOT_COM_UART_TX_MAX_DATA); |
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165 | |||
166 | /* first transmit the length of the packet */
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167 | result = UartTransmitByte(len); |
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168 | ASSERT_RT(result == BLT_TRUE); |
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169 | |||
170 | /* transmit all the packet bytes one-by-one */
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171 | for (data_index = 0; data_index < len; data_index++) |
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172 | { |
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173 | /* keep the watchdog happy */
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174 | CopService(); |
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175 | /* write byte */
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176 | result = UartTransmitByte(data[data_index]); |
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177 | ASSERT_RT(result == BLT_TRUE); |
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178 | } |
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179 | } /*** end of UartTransmitPacket ***/
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180 | |||
181 | |||
182 | /************************************************************************************//** |
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183 | ** \brief Receives a communication interface packet if one is present.
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184 | ** \param data Pointer to byte array where the data is to be stored.
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185 | ** \return Length of message (if the message is invalid, the length will be 0).
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186 | **
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187 | ****************************************************************************************/
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188 | blt_int8u UartReceivePacket(blt_int8u *data) |
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189 | { |
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190 | static blt_int8u xcpCtoReqPacket[BOOT_COM_UART_RX_MAX_DATA+1]; /* one extra for length */ |
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191 | static blt_int8u xcpCtoRxLength;
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192 | static blt_int8u xcpUartDataLength;
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193 | static blt_bool xcpCtoRxInProgress = BLT_FALSE;
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194 | |||
195 | /* start of cto packet received? */
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196 | if (xcpCtoRxInProgress == BLT_FALSE)
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197 | { |
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198 | /* store the message length when received */
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199 | if (UartReceiveByte(&xcpCtoReqPacket[0]) == BLT_TRUE) |
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200 | { |
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201 | /* save message length */
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202 | xcpUartDataLength = xcpCtoReqPacket[0];
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203 | if (xcpCtoReqPacket[0] > 0) |
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204 | { |
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205 | /* indicate that a cto packet is being received */
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206 | xcpCtoRxInProgress = BLT_TRUE; |
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207 | /* reset packet data count */
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208 | xcpCtoRxLength = 0;
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209 | } |
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210 | } |
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211 | } |
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212 | else
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213 | { |
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214 | /* store the next packet byte */
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215 | if (UartReceiveByte(&xcpCtoReqPacket[xcpCtoRxLength+1]) == BLT_TRUE) |
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216 | { |
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217 | /* increment the packet data count */
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218 | xcpCtoRxLength++; |
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219 | |||
220 | /* check to see if the entire packet was received */
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221 | if (xcpCtoRxLength == xcpCtoReqPacket[0]) |
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222 | { |
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223 | /* copy the packet data */
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224 | CpuMemCopy((blt_int32u)data, (blt_int32u)&xcpCtoReqPacket[1], xcpCtoRxLength);
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225 | /* done with cto packet reception */
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226 | xcpCtoRxInProgress = BLT_FALSE; |
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227 | |||
228 | /* packet reception complete */
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229 | // return BLT_TRUE;
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230 | return xcpUartDataLength;
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231 | } |
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232 | } |
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233 | } |
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234 | /* packet reception not yet complete */
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235 | // return BLT_FALSE;
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236 | return 0; |
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237 | } /*** end of UartReceivePacket ***/
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238 | |||
239 | |||
240 | /************************************************************************************//** |
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241 | ** \brief Receives a communication interface byte if one is present.
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242 | ** \param data Pointer to byte where the data is to be stored.
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243 | ** \return BLT_TRUE if a byte was received, BLT_FALSE otherwise.
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244 | **
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245 | ****************************************************************************************/
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246 | static blt_bool UartReceiveByte(blt_int8u *data)
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247 | { |
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248 | /* check if a new byte was received by means of the RDR-bit */
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249 | if((UARTx->SR & UART_BIT_RXNE) != 0) |
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250 | { |
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251 | /* store the received byte */
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252 | data[0] = UARTx->DR;
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253 | /* inform caller of the newly received byte */
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254 | return BLT_TRUE;
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255 | } |
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256 | /* inform caller that no new data was received */
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257 | return BLT_FALSE;
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258 | } /*** end of UartReceiveByte ***/
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259 | |||
260 | |||
261 | /************************************************************************************//** |
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262 | ** \brief Transmits a communication interface byte.
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263 | ** \param data Value of byte that is to be transmitted.
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264 | ** \return BLT_TRUE if the byte was transmitted, BLT_FALSE otherwise.
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265 | **
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266 | ****************************************************************************************/
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267 | static blt_bool UartTransmitByte(blt_int8u data)
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268 | { |
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269 | /* check if tx holding register can accept new data */
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270 | if ((UARTx->SR & UART_BIT_TXE) == 0) |
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271 | { |
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272 | /* UART not ready. should not happen */
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273 | return BLT_FALSE;
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274 | } |
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275 | /* write byte to transmit holding register */
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276 | UARTx->DR = data; |
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277 | /* wait for tx holding register to be empty */
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278 | while((UARTx->SR & UART_BIT_TXE) == 0) |
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279 | { |
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280 | /* keep the watchdog happy */
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281 | CopService(); |
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282 | } |
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283 | /* byte transmitted */
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284 | return BLT_TRUE;
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285 | } /*** end of UartTransmitByte ***/
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286 | //#endif /* BOOT_COM_UART_ENABLE > 0 || BOOT_GATE_UART_ENABLE > 0 */
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287 | |||
288 | |||
289 | |||
290 | |||
291 | #if (BOOT_DEBUGGING_UART2_ENABLE > 0) |
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292 | /************************************************************************************//** |
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293 | ** \brief Transmits a packet formatted for the communication interface.
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294 | ** \param data Pointer to byte array with data that it to be transmitted.
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295 | ** \param len Number of bytes that are to be transmitted.
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296 | |||
297 | ** \return none.
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298 | **
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299 | ****************************************************************************************/
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300 | void UartSendDebuggingPacket(blt_int8u *data, blt_int8u len)
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301 | { |
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302 | blt_int16u data_index; |
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303 | blt_bool result; |
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304 | |||
305 | /* verify validity of the len-paramenter */
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306 | ASSERT_RT(len <= BOOT_COM_UART_TX_MAX_DATA); |
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307 | |||
308 | /* first transmit the length of the packet */
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309 | result = UartTransmitDebuggingByte(len); |
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310 | ASSERT_RT(result == BLT_TRUE); |
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311 | |||
312 | /* transmit all the packet bytes one-by-one */
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313 | for (data_index = 0; data_index < len; data_index++) |
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314 | { |
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315 | /* keep the watchdog happy */
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316 | CopService(); |
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317 | /* write byte */
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318 | result = UartTransmitDebuggingByte(data[data_index]); |
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319 | ASSERT_RT(result == BLT_TRUE); |
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320 | } |
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321 | } /*** end of UartTransmitPacket ***/
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322 | |||
323 | static blt_bool UartTransmitDebuggingByte(blt_int8u data)
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324 | { |
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325 | /* check if tx holding register can accept new data */
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326 | if ((UARTDebug->SR & UART_BIT_TXE) == 0) |
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327 | { |
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328 | /* UART not ready. should not happen */
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329 | return BLT_FALSE;
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330 | } |
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331 | /* write byte to transmit holding register */
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332 | UARTDebug->DR = data; |
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333 | /* wait for tx holding register to be empty */
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334 | while((UARTDebug->SR & UART_BIT_TXE) == 0) |
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335 | { |
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336 | /* keep the watchdog happy */
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337 | CopService(); |
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338 | } |
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339 | /* byte transmitted */
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340 | return BLT_TRUE;
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341 | } /*** end of UartTransmitByte ***/
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342 | #endif
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343 | |||
344 | |||
345 | #endif /* BOOT_COM_UART_ENABLE > 0 || BOOT_GATE_UART_ENABLE > 0 */ |
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346 | |||
347 | /*********************************** end of uart.c *************************************/
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