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amiro-blt / Target / Modules / LightRing_1-2 / Boot / lib / CMSIS / CM3 / DeviceSupport / ST / STM32F10x / startup / arm / startup_stm32f10x_hd_vl.s @ fc7151bb

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;******************** (C) COPYRIGHT 2011 STMicroelectronics ********************
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;* File Name          : startup_stm32f10x_hd_vl.s
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;* Author             : MCD Application Team
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;* Version            : V3.5.0
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;* Date               : 11-March-2011
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;* Description        : STM32F10x High Density Value Line Devices vector table  
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;*                      for MDK-ARM toolchain.  
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;*                      This module performs:
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;*                      - Set the initial SP
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;*                      - Set the initial PC == Reset_Handler
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;*                      - Set the vector table entries with the exceptions ISR address
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;*                      - Configure the clock system and also configure the external 
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;*                        SRAM mounted on STM32100E-EVAL board to be used as data 
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;*                        memory (optional, to be enabled by user)
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;*                      - Branches to __main in the C library (which eventually
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;*                        calls main()).
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;*                      After Reset the CortexM3 processor is in Thread mode,
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;*                      priority is Privileged, and the Stack is set to Main.
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;* <<< Use Configuration Wizard in Context Menu >>>   
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;*******************************************************************************
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; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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;*******************************************************************************
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; Amount of memory (in bytes) allocated for Stack
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; Tailor this value to your application needs
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; <h> Stack Configuration
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;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Stack_Size      EQU     0x00000400
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                AREA    STACK, NOINIT, READWRITE, ALIGN=3
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Stack_Mem       SPACE   Stack_Size
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__initial_sp
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; <h> Heap Configuration
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;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
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; </h>
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Heap_Size       EQU     0x00000200
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                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
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__heap_base
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Heap_Mem        SPACE   Heap_Size
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__heap_limit
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                PRESERVE8
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                THUMB
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; Vector Table Mapped to Address 0 at Reset
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                AREA    RESET, DATA, READONLY
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                EXPORT  __Vectors
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                EXPORT  __Vectors_End
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                EXPORT  __Vectors_Size
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__Vectors       DCD     __initial_sp                    ; Top of Stack
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                DCD     Reset_Handler                   ; Reset Handler
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                DCD     NMI_Handler                     ; NMI Handler
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                DCD     HardFault_Handler               ; Hard Fault Handler
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                DCD     MemManage_Handler               ; MPU Fault Handler
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                DCD     BusFault_Handler                ; Bus Fault Handler
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                DCD     UsageFault_Handler              ; Usage Fault Handler
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                DCD     0                               ; Reserved
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                DCD     0                               ; Reserved
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                DCD     0                               ; Reserved
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                DCD     0                               ; Reserved
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                DCD     SVC_Handler                     ; SVCall Handler
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                DCD     DebugMon_Handler                ; Debug Monitor Handler
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                DCD     0                               ; Reserved
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                DCD     PendSV_Handler                  ; PendSV Handler
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                DCD     SysTick_Handler                 ; SysTick Handler
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                ; External Interrupts
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                DCD     WWDG_IRQHandler                 ; Window Watchdog
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                DCD     PVD_IRQHandler                  ; PVD through EXTI Line detect
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                DCD     TAMPER_IRQHandler               ; Tamper
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                DCD     RTC_IRQHandler                  ; RTC
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                DCD     FLASH_IRQHandler                ; Flash
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                DCD     RCC_IRQHandler                  ; RCC
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                DCD     EXTI0_IRQHandler                ; EXTI Line 0
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                DCD     EXTI1_IRQHandler                ; EXTI Line 1
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                DCD     EXTI2_IRQHandler                ; EXTI Line 2
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                DCD     EXTI3_IRQHandler                ; EXTI Line 3
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                DCD     EXTI4_IRQHandler                ; EXTI Line 4
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                DCD     DMA1_Channel1_IRQHandler        ; DMA1 Channel 1
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                DCD     DMA1_Channel2_IRQHandler        ; DMA1 Channel 2
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                DCD     DMA1_Channel3_IRQHandler        ; DMA1 Channel 3
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                DCD     DMA1_Channel4_IRQHandler        ; DMA1 Channel 4
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                DCD     DMA1_Channel5_IRQHandler        ; DMA1 Channel 5
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                DCD     DMA1_Channel6_IRQHandler        ; DMA1 Channel 6
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                DCD     DMA1_Channel7_IRQHandler        ; DMA1 Channel 7
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                DCD     ADC1_IRQHandler                 ; ADC1
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                DCD     0                               ; Reserved
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                DCD     0                               ; Reserved
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                DCD     0                               ; Reserved
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                DCD     0                               ; Reserved
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                DCD     EXTI9_5_IRQHandler              ; EXTI Line 9..5
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                DCD     TIM1_BRK_TIM15_IRQHandler       ; TIM1 Break and TIM15
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                DCD     TIM1_UP_TIM16_IRQHandler        ; TIM1 Update and TIM16
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                DCD     TIM1_TRG_COM_TIM17_IRQHandler   ; TIM1 Trigger and Commutation and TIM17
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                DCD     TIM1_CC_IRQHandler              ; TIM1 Capture Compare
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                DCD     TIM2_IRQHandler                 ; TIM2
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                DCD     TIM3_IRQHandler                 ; TIM3
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                DCD     TIM4_IRQHandler                 ; TIM4
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                DCD     I2C1_EV_IRQHandler              ; I2C1 Event
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                DCD     I2C1_ER_IRQHandler              ; I2C1 Error
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                DCD     I2C2_EV_IRQHandler              ; I2C2 Event
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                DCD     I2C2_ER_IRQHandler              ; I2C2 Error
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                DCD     SPI1_IRQHandler                 ; SPI1
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                DCD     SPI2_IRQHandler                 ; SPI2
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                DCD     USART1_IRQHandler               ; USART1
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                DCD     USART2_IRQHandler               ; USART2
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                DCD     USART3_IRQHandler               ; USART3
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                DCD     EXTI15_10_IRQHandler            ; EXTI Line 15..10
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                DCD     RTCAlarm_IRQHandler             ; RTC Alarm through EXTI Line
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                DCD     CEC_IRQHandler                  ; HDMI-CEC
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                DCD     TIM12_IRQHandler                ; TIM12
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                DCD     TIM13_IRQHandler                ; TIM13 
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                DCD     TIM14_IRQHandler                ; TIM14
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                DCD     0                               ; Reserved
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                DCD     0                               ; Reserved
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                DCD     0                               ; Reserved
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                DCD     0                               ; Reserved
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                DCD     TIM5_IRQHandler                 ; TIM5
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                DCD     SPI3_IRQHandler                 ; SPI3
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                DCD     UART4_IRQHandler                ; UART4
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                DCD     UART5_IRQHandler                ; UART5
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                DCD     TIM6_DAC_IRQHandler             ; TIM6 and DAC underrun
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                DCD     TIM7_IRQHandler                 ; TIM7
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                DCD     DMA2_Channel1_IRQHandler        ; DMA2 Channel1
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                DCD     DMA2_Channel2_IRQHandler        ; DMA2 Channel2
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                DCD     DMA2_Channel3_IRQHandler        ; DMA2 Channel3
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                DCD     DMA2_Channel4_5_IRQHandler      ; DMA2 Channel4 & Channel5
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                DCD     DMA2_Channel5_IRQHandler        ; DMA2 Channel5                
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__Vectors_End
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__Vectors_Size  EQU  __Vectors_End - __Vectors
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                AREA    |.text|, CODE, READONLY
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; Reset handler
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Reset_Handler    PROC
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                 EXPORT  Reset_Handler             [WEAK]
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     IMPORT  __main
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     IMPORT  SystemInit
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                 LDR     R0, =SystemInit
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                 BLX     R0
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                 LDR     R0, =__main
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                 BX      R0
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                 ENDP
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; Dummy Exception Handlers (infinite loops which can be modified)
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NMI_Handler     PROC
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                EXPORT  NMI_Handler                      [WEAK]
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                B       .
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                ENDP
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HardFault_Handler\
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                PROC
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                EXPORT  HardFault_Handler                [WEAK]
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                B       .
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                ENDP
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MemManage_Handler\
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                PROC
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                EXPORT  MemManage_Handler                [WEAK]
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                B       .
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                ENDP
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BusFault_Handler\
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                PROC
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                EXPORT  BusFault_Handler                 [WEAK]
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                B       .
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                ENDP
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UsageFault_Handler\
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                PROC
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                EXPORT  UsageFault_Handler               [WEAK]
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                B       .
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                ENDP
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SVC_Handler     PROC
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                EXPORT  SVC_Handler                      [WEAK]
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                B       .
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                ENDP
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DebugMon_Handler\
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                PROC
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                EXPORT  DebugMon_Handler                 [WEAK]
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                B       .
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                ENDP
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PendSV_Handler  PROC
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                EXPORT  PendSV_Handler                   [WEAK]
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                B       .
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                ENDP
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SysTick_Handler PROC
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                EXPORT  SysTick_Handler                  [WEAK]
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                B       .
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                ENDP
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Default_Handler PROC
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                EXPORT  WWDG_IRQHandler                  [WEAK]
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                EXPORT  PVD_IRQHandler                   [WEAK]
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                EXPORT  TAMPER_IRQHandler                [WEAK]
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                EXPORT  RTC_IRQHandler                   [WEAK]
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                EXPORT  FLASH_IRQHandler                 [WEAK]
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                EXPORT  RCC_IRQHandler                   [WEAK]
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                EXPORT  EXTI0_IRQHandler                 [WEAK]
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                EXPORT  EXTI1_IRQHandler                 [WEAK]
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                EXPORT  EXTI2_IRQHandler                 [WEAK]
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                EXPORT  EXTI3_IRQHandler                 [WEAK]
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                EXPORT  EXTI4_IRQHandler                 [WEAK]
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                EXPORT  DMA1_Channel1_IRQHandler         [WEAK]
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                EXPORT  DMA1_Channel2_IRQHandler         [WEAK]
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                EXPORT  DMA1_Channel3_IRQHandler         [WEAK]
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                EXPORT  DMA1_Channel4_IRQHandler         [WEAK]
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                EXPORT  DMA1_Channel5_IRQHandler         [WEAK]
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                EXPORT  DMA1_Channel6_IRQHandler         [WEAK]
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                EXPORT  DMA1_Channel7_IRQHandler         [WEAK]
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                EXPORT  ADC1_IRQHandler                  [WEAK]
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                EXPORT  EXTI9_5_IRQHandler               [WEAK]
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                EXPORT  TIM1_BRK_TIM15_IRQHandler        [WEAK]
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                EXPORT  TIM1_UP_TIM16_IRQHandler         [WEAK]
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                EXPORT  TIM1_TRG_COM_TIM17_IRQHandler    [WEAK]
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                EXPORT  TIM1_CC_IRQHandler               [WEAK]
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                EXPORT  TIM2_IRQHandler                  [WEAK]
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                EXPORT  TIM3_IRQHandler                  [WEAK]
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                EXPORT  TIM4_IRQHandler                  [WEAK]
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                EXPORT  I2C1_EV_IRQHandler               [WEAK]
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                EXPORT  I2C1_ER_IRQHandler               [WEAK]
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                EXPORT  I2C2_EV_IRQHandler               [WEAK]
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                EXPORT  I2C2_ER_IRQHandler               [WEAK]
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                EXPORT  SPI1_IRQHandler                  [WEAK]
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                EXPORT  SPI2_IRQHandler                  [WEAK]
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                EXPORT  USART1_IRQHandler                [WEAK]
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                EXPORT  USART2_IRQHandler                [WEAK]
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                EXPORT  USART3_IRQHandler                [WEAK]
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                EXPORT  EXTI15_10_IRQHandler             [WEAK]
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                EXPORT  RTCAlarm_IRQHandler              [WEAK]
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                EXPORT  CEC_IRQHandler                   [WEAK]
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                EXPORT  TIM12_IRQHandler                 [WEAK]
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                EXPORT  TIM13_IRQHandler                 [WEAK]
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                EXPORT  TIM14_IRQHandler                 [WEAK]
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                EXPORT  TIM5_IRQHandler                  [WEAK]
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                EXPORT  SPI3_IRQHandler                  [WEAK]
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                EXPORT  UART4_IRQHandler                 [WEAK]
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                EXPORT  UART5_IRQHandler                 [WEAK]                
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                EXPORT  TIM6_DAC_IRQHandler              [WEAK]
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                EXPORT  TIM7_IRQHandler                  [WEAK]
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                EXPORT  DMA2_Channel1_IRQHandler         [WEAK]
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                EXPORT  DMA2_Channel2_IRQHandler         [WEAK]
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                EXPORT  DMA2_Channel3_IRQHandler         [WEAK]
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                EXPORT  DMA2_Channel4_5_IRQHandler       [WEAK]
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                EXPORT  DMA2_Channel5_IRQHandler         [WEAK]                
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WWDG_IRQHandler
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PVD_IRQHandler
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TAMPER_IRQHandler
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RTC_IRQHandler
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FLASH_IRQHandler
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RCC_IRQHandler
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EXTI0_IRQHandler
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EXTI1_IRQHandler
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EXTI2_IRQHandler
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EXTI3_IRQHandler
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EXTI4_IRQHandler
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DMA1_Channel1_IRQHandler
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DMA1_Channel2_IRQHandler
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DMA1_Channel3_IRQHandler
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DMA1_Channel4_IRQHandler
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DMA1_Channel5_IRQHandler
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DMA1_Channel6_IRQHandler
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DMA1_Channel7_IRQHandler
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ADC1_IRQHandler
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EXTI9_5_IRQHandler
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TIM1_BRK_TIM15_IRQHandler
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TIM1_UP_TIM16_IRQHandler
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TIM1_TRG_COM_TIM17_IRQHandler
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TIM1_CC_IRQHandler
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TIM2_IRQHandler
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TIM3_IRQHandler
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TIM4_IRQHandler
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I2C1_EV_IRQHandler
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I2C1_ER_IRQHandler
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I2C2_EV_IRQHandler
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I2C2_ER_IRQHandler
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SPI1_IRQHandler
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SPI2_IRQHandler
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USART1_IRQHandler
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USART2_IRQHandler
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USART3_IRQHandler
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EXTI15_10_IRQHandler
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RTCAlarm_IRQHandler
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CEC_IRQHandler
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TIM12_IRQHandler
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TIM13_IRQHandler
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TIM14_IRQHandler
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TIM5_IRQHandler
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SPI3_IRQHandler
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UART4_IRQHandler
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UART5_IRQHandler
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TIM6_DAC_IRQHandler
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TIM7_IRQHandler
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DMA2_Channel1_IRQHandler
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DMA2_Channel2_IRQHandler
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DMA2_Channel3_IRQHandler
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DMA2_Channel4_5_IRQHandler
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DMA2_Channel5_IRQHandler
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                B       .
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                ENDP
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                ALIGN
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;*******************************************************************************
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; User Stack and Heap initialization
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;*******************************************************************************
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                 IF      :DEF:__MICROLIB           
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                 EXPORT  __initial_sp
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                 EXPORT  __heap_base
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                 EXPORT  __heap_limit
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                 ELSE
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                 IMPORT  __use_two_region_memory
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                 EXPORT  __user_initial_stackheap
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__user_initial_stackheap
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                 LDR     R0, =  Heap_Mem
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                 LDR     R1, =(Stack_Mem + Stack_Size)
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                 LDR     R2, = (Heap_Mem +  Heap_Size)
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                 LDR     R3, = Stack_Mem
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                 BX      LR
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                 ALIGN
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                 ENDIF
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                 END
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;******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE*****