AMiRo-OS

#if (defined(AMIROLLD_CFG_DW1000) && (AMIROLLD_CFG_DW1000 == 1)) || defined(__DOXYGEN__)

#include <v1/alld_dw1000_regs_v1.h>

#include <assert.h>

#include <string.h>

#include <stdlib.h>

};

const uint8_t chan_idxnb[NUM_CH_SUPPORTED] = {0, 0, 1, 2, 0, 3, 0, 0}; //only channels 1,2,3 and 5 are in the narrow band tables

const uint8_t chan_idxwb[NUM_CH_SUPPORTED] = {0, 0, 0, 0, 0, 0, 0, 1}; //only channels 4 and 7 are in in the wide band tables

}; // end range25cm64PRFwb

/*! ------------------------------------------------------------------------------------------------------------------

 * Function: dwt_getrangebias()

 *

    // NB: note we may get some small negitive values e.g. up to -50 cm.

    if (rangeint25cm > 255) rangeint25cm = 255 ;    // make sure it matches largest value in table (all tables end in 255 !!!!)

    } // end else

    mOffset *= 0.01 ;                                                   // convert to metres

    return (mOffset) ;

}

// -------------------------------------------------------------------------------------------------------------------

//

// Internal functions for controlling and configuring the device

// Read non-volatile memory

uint32_t _dwt_otpread(uint32_t address);

// Program the non-volatile memory

// Upload the device configuration into always on memory

void _dwt_aonarrayupload(void);

// -------------------------------------------------------------------------------------------------------------------

    pdw1000local->cbRxTo = NULL;

    pdw1000local->cbRxErr = NULL;

    // Read and validate device ID return -1 if not recognised

    if (DWT_DEVICE_ID != dwt_readdevid()) // MP IC ONLY (i.e. DW1000) FOR THIS CODE

    pdw1000local->longFrames = config->phrMode ;

    pdw1000local->sysCFGreg &= ~SYS_CFG_PHR_MODE_11;

    dwt_write32bitreg(SYS_CFG_ID,pdw1000local->sysCFGreg) ;

    // Set the lde_replicaCoeff

        nsSfd_result = 3 ;

        useDWnsSFD = 1 ;

    }

    dwt_write32bitreg(CHAN_CTRL_ID,regval) ;

    // Set up TX Preamble Size, PRF and Data Rate

    dwt_write32bitreg(TX_FCTRL_ID, pdw1000local->txFCTRL);

    // The SFD transmit pattern is initialised by the DW1000 upon a user TX request, but (due to an IC issue) it is not done for an auto-ACK TX. The

    // Write the frame length to the TX frame control register

    // pdw1000local->txFCTRL has kept configured bit rate information

    dwt_write32bitreg(TX_FCTRL_ID, reg32);

} // end dwt_writetxfctrl()

    // Write message header selecting WRITE operation and addresses as appropriate (this is one to three bytes long)

    if (index == 0) // For index of 0, no sub-index is required

    {

    }

    else

    {

#ifdef DWT_API_ERROR_CHECK

        assert((index <= 0x7FFF) && ((index + length) <= 0x7FFF)); // Index and sub-addressable area are limited to 15-bits.

#endif

        if (index <= 127) // For non-zero index < 127, just a single sub-index byte is required

        {

    }

    // Write it to the SPI

} // end dwt_writetodevice()

/*! ------------------------------------------------------------------------------------------------------------------

    }

    // Do the read from the SPI

} // end dwt_readfromdevice()

    int     j ;

    uint8_t   buffer[4] ;

    for (j = 3 ; j >= 0 ; j --)

    {

    uint16_t  regval = 0 ;

    uint8_t   buffer[2] ;

    return regval ;

} // end dwt_read16bitoffsetreg()

{

    uint8_t regval;

    return regval ;

}

 */

void dwt_write8bitoffsetreg(int regFileID, int regOffset, uint8_t regval)

{

}

/*! ------------------------------------------------------------------------------------------------------------------

    buffer[0] = regval & 0xFF;

    buffer[1] = regval >> 8 ;

} // end dwt_write16bitoffsetreg()

/*! ------------------------------------------------------------------------------------------------------------------

        regval >>= 8 ;

    }

} // end dwt_write32bitoffsetreg()

/*! ------------------------------------------------------------------------------------------------------------------

    for(i=0; i<length; i++)

    {

    }

    _dwt_enableclocks(ENABLE_ALL_SEQ); // Restore system clock to PLL

    uint32_t ret_data;

    // Write the address

    // Perform OTP Read - Manual read mode has to be set

    dwt_write8bitoffsetreg(OTP_IF_ID, OTP_CTRL, OTP_CTRL_OTPREAD | OTP_CTRL_OTPRDEN);

 *

 * returns DWT_SUCCESS for success, or DWT_ERROR for error

 */

{

    uint8_t rd_buf[4];

    uint8_t wr_buf[4];

 *

 * returns DWT_SUCCESS for success, or DWT_ERROR for error

 */

{

    uint8_t rd_buf[1];

    uint8_t wr_buf[4];

    if (enable)

    {

        /* Configure ON/OFF times and enable PLL2 on/off sequencing by SNIFF mode. */

        dwt_write16bitoffsetreg(RX_SNIFF_ID, RX_SNIFF_OFFSET, sniff_reg);

        pmsc_reg = dwt_read32bitoffsetreg(PMSC_ID, PMSC_CTRL0_OFFSET);

        pmsc_reg |= PMSC_CTRL0_PLL2_SEQ_EN;

    wr_buf[0] = 0x00; // Clear SAR enable

    dwt_writetodevice(TX_CAL_ID, TC_SARL_SAR_C,1,wr_buf);

}

/*! ------------------------------------------------------------------------------------------------------------------

        curr_bw = curr_bw | bit_field;

        // Write bw setting to PG_DELAY register

        // Set cal direction and time

        dwt_write8bitoffsetreg(TX_CAL_ID, TC_PGCCTRL_OFFSET, TC_PGCCTRL_DIR_CONV | TC_PGCCTRL_TMEAS_MASK);

            }

        }

        new_regval |= ((uint32_t) ((new_da_attn << 5) | new_mixer_gain)) << (i * 8);

    }

    dwt_write16bitoffsetreg(PMSC_ID, PMSC_CTRL1_OFFSET, old_pmsc_ctrl1);

    dwt_write32bitreg(RF_CONF_ID, old_rf_conf_txpow_mask);

    return average_count;

}

    0xDECA0130                               // DW1000 - MP

/****************************************************************************************************************************************************

 *

 */

#pragma GCC optimize ("O3")

static int writetospi(uint16_t headerLength,

} // end writetospi()

/*! @brief sleep or idle the thread in millisecond */

void deca_sleep(unsigned int time_ms)

{

}

/*! @brief sleep or idle the thread in millisecond */

void Sleep(unsigned int time_ms)

{

}

  return chVTGetSystemTimeX();

}

/*! @brief Disable the interrupt handler */

void port_DisableEXT_IRQ(void){   

  nvicDisableVector(DW1000_EXTI_IRQn);

}

/*! @brief Enable the interrupt handler */