amiro-lld / drivers / AT42QT1050 / v1 / alld_AT42QT1050.h @ 3ed0cc4d
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1 | 9e45662e | Thomas Schöpping | /*
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2 | AMiRo-LLD is a compilation of low-level hardware drivers for the Autonomous Mini Robot (AMiRo) platform.
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3 | f69ec051 | Thomas Schöpping | Copyright (C) 2016..2020 Thomas Schöpping et al.
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4 | 9e45662e | Thomas Schöpping | |
5 | This program is free software: you can redistribute it and/or modify
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6 | it under the terms of the GNU Lesser General Public License as published by
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7 | the Free Software Foundation, either version 3 of the License, or
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8 | (at your option) any later version.
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9 | |||
10 | This program is distributed in the hope that it will be useful,
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11 | but WITHOUT ANY WARRANTY; without even the implied warranty of
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12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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13 | GNU Lesser General Public License for more details.
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14 | |||
15 | You should have received a copy of the GNU Lesser General Public License
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16 | along with this program. If not, see <http://www.gnu.org/licenses/>.
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17 | */
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18 | |||
19 | /**
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20 | 9466e34d | Thomas Schöpping | * @file alld_AT42QT1050.h
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21 | 9e45662e | Thomas Schöpping | * @brief Touch sensor macros and structures.
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22 | *
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23 | * @addtogroup lld_touch
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24 | * @{
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25 | */
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26 | |||
27 | 9466e34d | Thomas Schöpping | #ifndef AMIROLLD_AT42QT1050_H
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28 | #define AMIROLLD_AT42QT1050_H
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29 | 9e45662e | Thomas Schöpping | |
30 | #include <amiro-lld.h> |
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31 | |||
32 | ef078306 | Thomas Schöpping | /******************************************************************************/
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33 | /* CONSTANTS */
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34 | /******************************************************************************/
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35 | |||
36 | 9e45662e | Thomas Schöpping | /**
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37 | * @brief Maximum I2C frequency.
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38 | */
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39 | #define AT42QT1050_LLD_I2C_MAXFREQUENCY 400000 |
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40 | |||
41 | /**
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42 | * @brief A falling edge indicats an interrupt.
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43 | */
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44 | #define AT42QT1050_LLD_INT_EDGE APAL_GPIO_EDGE_FALLING
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45 | |||
46 | /**
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47 | * @brief Number of touch keys supported by AT42QT1050.
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48 | */
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49 | #define AT42QT1050_LLD_NUM_KEYS 5 |
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50 | |||
51 | /**
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52 | * @brief Maximum time (in microseconds) to acquire all key signals before the overflow bit of the detection status register is set.
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53 | */
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54 | #define AT42QT1050_LLD_MAX_KEY_ACQUIRATION_TIME 8000 |
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55 | |||
56 | /**
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57 | ef078306 | Thomas Schöpping | * @brief The chip ID as can be read from the according register (constant).
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58 | */
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59 | #define AT42QT1050_LLD_CHIPID 0x46 |
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60 | |||
61 | /******************************************************************************/
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62 | /* SETTINGS */
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63 | /******************************************************************************/
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64 | |||
65 | /******************************************************************************/
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66 | /* CHECKS */
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67 | /******************************************************************************/
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68 | |||
69 | /******************************************************************************/
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70 | /* DATA STRUCTURES AND TYPES */
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71 | /******************************************************************************/
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72 | |||
73 | /**
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74 | 9e45662e | Thomas Schöpping | * @brief The AT42QT1050Driver sruct.
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75 | */
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76 | typedef struct { |
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77 | apalI2CDriver_t* i2cd; |
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78 | apalI2Caddr_t addr; |
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79 | } AT42QT1050Driver; |
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80 | |||
81 | /**
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82 | * @brief Possible I2C address configurations.
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83 | */
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84 | enum {
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85 | AT42QT1050_LLD_I2C_ADDRSEL_LOW = 0x0041u, /**< ADDR_SEL pin is pulled low. */ |
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86 | AT42QT1050_LLD_I2C_ADDRSEL_HIGH = 0x0046u, /**< ADDR_SEL pin is pulled high. */ |
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87 | }; |
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88 | |||
89 | /**
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90 | 9466e34d | Thomas Schöpping | * @brief Available register addresses of the AT42QT1050.
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91 | 9e45662e | Thomas Schöpping | */
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92 | typedef enum { |
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93 | AT42QT1050_LLD_REG_CHIPID = 0x00u, /**< read only */ |
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94 | AT42QT1050_LLD_REG_FIRMWAREVERSION = 0x01u, /**< read only */ |
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95 | AT42QT1050_LLD_REG_DETECTIONSTATUS = 0x02u, /**< read only */ |
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96 | AT42QT1050_LLD_REG_KEYSTATUS = 0x03u, /**< read only */ |
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97 | AT42QT1050_LLD_REG_KEYSIGNAL_0 = 0x06u, /**< read only */ |
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98 | AT42QT1050_LLD_REG_KEYSIGNAL_1 = 0x08u, /**< read only */ |
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99 | AT42QT1050_LLD_REG_KEYSIGNAL_2 = 0x0Du, /**< read only */ |
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100 | AT42QT1050_LLD_REG_KEYSIGNAL_3 = 0x0Fu, /**< read only */ |
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101 | AT42QT1050_LLD_REG_KEYSIGNAL_4 = 0x11u, /**< read only */ |
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102 | AT42QT1050_LLD_REG_REFERENCEDATA_0 = 0x14u, /**< read only */ |
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103 | AT42QT1050_LLD_REG_REFERENCEDATA_1 = 0x16u, /**< read only */ |
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104 | AT42QT1050_LLD_REG_REFERENCEDATA_2 = 0x1Au, /**< read only */ |
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105 | AT42QT1050_LLD_REG_REFERENCEDATA_3 = 0x1Cu, /**< read only */ |
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106 | AT42QT1050_LLD_REG_REFERENCEDATA_4 = 0x1Eu, /**< read only */ |
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107 | AT42QT1050_LLD_REG_NEGATIVETHRESHOLD_0 = 0x21u, /**< read/write */ |
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108 | AT42QT1050_LLD_REG_NEGATIVETHRESHOLD_1 = 0x22u, /**< read/write */ |
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109 | AT42QT1050_LLD_REG_NEGATIVETHRESHOLD_2 = 0x24u, /**< read/write */ |
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110 | AT42QT1050_LLD_REG_NEGATIVETHRESHOLD_3 = 0x25u, /**< read/write */ |
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111 | AT42QT1050_LLD_REG_NEGATIVETHRESHOLD_4 = 0x26u, /**< read/write */ |
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112 | AT42QT1050_LLD_REG_PULSE_SCALE_0 = 0x28u, /**< read/write */ |
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113 | AT42QT1050_LLD_REG_PULSE_SCALE_1 = 0x29u, /**< read/write */ |
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114 | AT42QT1050_LLD_REG_PULSE_SCALE_2 = 0x2Bu, /**< read/write */ |
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115 | AT42QT1050_LLD_REG_PULSE_SCALE_3 = 0x2Cu, /**< read/write */ |
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116 | AT42QT1050_LLD_REG_PULSE_SCALE_4 = 0x2Du, /**< read/write */ |
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117 | AT42QT1050_LLD_REG_INTEGRATOR_AKS_0 = 0x2Fu, /**< read/write */ |
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118 | AT42QT1050_LLD_REG_INTEGRATOR_AKS_1 = 0x30u, /**< read/write */ |
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119 | AT42QT1050_LLD_REG_INTEGRATOR_AKS_2 = 0x32u, /**< read/write */ |
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120 | AT42QT1050_LLD_REG_INTEGRATOR_AKS_3 = 0x33u, /**< read/write */ |
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121 | AT42QT1050_LLD_REG_INTEGRATOR_AKS_4 = 0x34u, /**< read/write */ |
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122 | AT42QT1050_LLD_REG_CHARGESHAREDELAY_0 = 0x36u, /**< read/write */ |
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123 | AT42QT1050_LLD_REG_CHARGESHAREDELAY_1 = 0x37u, /**< read/write */ |
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124 | AT42QT1050_LLD_REG_CHARGESHAREDELAY_2 = 0x39u, /**< read/write */ |
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125 | AT42QT1050_LLD_REG_CHARGESHAREDELAY_3 = 0x3Au, /**< read/write */ |
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126 | AT42QT1050_LLD_REG_CHARGESHAREDELAY_4 = 0x3Bu, /**< read/write */ |
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127 | AT42QT1050_LLD_REG_FINFOUTMAXCALGUARD = 0x3Cu, /**< read/write */ |
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128 | AT42QT1050_LLD_REG_LOWPOWERMODE = 0x3Du, /**< read/write */ |
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129 | AT42QT1050_LLD_REG_MAXONDURATION = 0x3Eu, /**< read/write */ |
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130 | AT42QT1050_LLD_REG_RESET_CALIBRATE = 0x3Fu, /**< read/write */ |
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131 | } at42qt1050_lld_register_t; |
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132 | |||
133 | /**
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134 | * @brief Firmware version register structure.
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135 | */
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136 | typedef union { |
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137 | uint8_t raw; |
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138 | struct {
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139 | uint8_t minor : 4;
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140 | uint8_t major : 4;
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141 | }; |
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142 | } at42qt1050_lld_firmwarereg_t; |
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143 | |||
144 | |||
145 | /**
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146 | * @brief Relevant bits of the detection status register.
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147 | */
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148 | typedef enum { |
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149 | AT42QT1050_LLD_DETECTIONSTATUS_TOUCH = 0x01u, /**< Set if any keys are in detect. */ |
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150 | AT42QT1050_LLD_DETECTIONSTATUS_OVERFLOW = 0x40u, /**< Set if the time to acquire all key signals exceeds 8ms. */ |
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151 | AT42QT1050_LLD_DETECTIONSTATUS_CALIBRATE = 0x80u, /**< Set during calibration sequence. */ |
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152 | 9466e34d | Thomas Schöpping | } at42qt1050_lld_detectionstatusreg_t; |
153 | 9e45662e | Thomas Schöpping | |
154 | /**
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155 | * @brief Key status register masks.
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156 | */
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157 | typedef enum { |
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158 | AT42QT1050_LLD_KEYSTATUS_KEY0 = 0x02u,
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159 | AT42QT1050_LLD_KEYSTATUS_KEY1 = 0x04u,
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160 | AT42QT1050_LLD_KEYSTATUS_KEY2 = 0x10u,
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161 | AT42QT1050_LLD_KEYSTATUS_KEY3 = 0x20u,
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162 | AT42QT1050_LLD_KEYSTATUS_KEY4 = 0x40u,
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163 | } at42qt1050_lld_keystatusreg_t; |
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164 | |||
165 | /**
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166 | * @brief Pulse/Scale register structure.
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167 | */
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168 | typedef union { |
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169 | uint8_t raw; |
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170 | struct {
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171 | uint8_t scale : 4;
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172 | uint8_t pulse : 4;
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173 | }; |
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174 | } at42qt1050_lld_pulsescalereg_t; |
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175 | |||
176 | /**
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177 | * @brief Detection Integrator (DI) / AKS register structure.
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178 | */
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179 | typedef union { |
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180 | uint8_t raw; |
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181 | struct {
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182 | uint8_t aks : 2;
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183 | uint8_t detection_integrator : 6;
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184 | }; |
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185 | } at42qt1050_lld_detectionintegratoraksreg_t; |
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186 | |||
187 | /**
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188 | * @brief Charge share delay constant sclaing factor.
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189 | * @details Values in the charge share delay registers are multiplied by this factor.
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190 | * Unit is microseconds (µs).
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191 | */
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192 | #define AT42QT1050_LLD_CHARGESHAREDELAY_FACTOR 2.5f |
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193 | |||
194 | /**
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195 | * @brief FastIn / FastOutDI / Max Cal / Guard Channel register masks.
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196 | */
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197 | typedef enum { |
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198 | AT42QT1050_LLD_FINFOUTMAXCALGUARD_GUARD = 0x0Fu,
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199 | AT42QT1050_LLD_FINFOUTMAXCALGUARD_MAXCAL = 0x10u,
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200 | AT42QT1050_LLD_FINFOUTMAXCALGUARD_FO = 0x20u,
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201 | AT42QT1050_LLD_FINFOUTMAXCALGUARD_FI = 0x40u,
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202 | } at42qt1050_lld_finfoutmaxcalguardreg_t; |
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203 | |||
204 | /**
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205 | * @brief Low power mode constant scaling factor.
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206 | * @details The values in the low poer mode register is multiplied by this factor.
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207 | * Unit is microseconds (µs).
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208 | * @note Setting the power mode scaling register value to zero makes the AT42QT1050 enter deep-sleep mode.
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209 | */
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210 | #define AT42QT1050_LLD_LOWPOWER_FACTOR 8000 |
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211 | |||
212 | /**
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213 | * @brief Man on duration constant scaling factor.
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214 | * @details The value in the max on duration register is multiplied by this factor.
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215 | * Unit is microseconds (µs).
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216 | */
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217 | #define AT42QT1050_LLD_MAXONDURATION_FACTOR 160000 |
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218 | |||
219 | /**
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220 | * @brief RESET / Calibrate register masks.
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221 | */
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222 | typedef enum { |
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223 | AT42QT1050_LLD_RESETCALIBRATE_CALIBRATE = 0x7Fu,
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224 | AT42QT1050_LLD_RESETCALIBRATE_RESET = 0x80u,
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225 | } at42qt1050_lld_resetcalibratereg_t; |
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226 | |||
227 | ef078306 | Thomas Schöpping | /******************************************************************************/
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228 | /* MACROS */
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229 | /******************************************************************************/
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230 | |||
231 | /******************************************************************************/
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232 | /* EXTERN DECLARATIONS */
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233 | /******************************************************************************/
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234 | |||
235 | 9e45662e | Thomas Schöpping | #ifdef __cplusplus
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236 | extern "C" { |
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237 | #endif
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238 | apalExitStatus_t at42qt1050_lld_read_reg(const AT42QT1050Driver* at42qt1050d, const at42qt1050_lld_register_t reg, uint8_t* const data, const apalTime_t timeout); |
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239 | apalExitStatus_t at42qt1050_lld_write_reg(const AT42QT1050Driver* at42qt1050d, const at42qt1050_lld_register_t reg, const uint8_t data, const apalTime_t timeout); |
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240 | |||
241 | apalExitStatus_t at42qt1050_lld_read_keyssignal(const AT42QT1050Driver* at42qt1050d, const uint8_t key, uint16_t* signal, const apalTime_t timeout); |
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242 | apalExitStatus_t at42qt1050_lld_read_referencedata(const AT42QT1050Driver* at42qt1050d, const uint8_t key, uint16_t* refdata, const apalTime_t timeout); |
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243 | |||
244 | 119ec0d2 | Felix Wittenfeld | apalExitStatus_t at42qt1050_lld_reset_safe(const AT42QT1050Driver* at42qt1050d, const bool wait4wakeup, const apalTime_t timeout); |
245 | apalExitStatus_t at42qt1050_lld_reset(const AT42QT1050Driver* at42qt1050d, const apalTime_t timeout, const bool wait4wakeup); |
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246 | |||
247 | 9e45662e | Thomas Schöpping | uint16_t at42qt1050_lld_pulse2samples(const uint8_t pulse);
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248 | float at42qt1050_lld_samples2pulse(const uint16_t samples); |
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249 | uint16_t at42qt1050_lld_scale2scaling(const uint8_t scale);
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250 | float at42qt1050_lld_scaling2scale(const uint16_t factor); |
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251 | 7df78c60 | Felix Wittenfeld | |
252 | |||
253 | /**
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254 | * @brief Calculates n-th address based on address of register 0.
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255 | * @details Calculation: <scale value> = log2(<scaling factor>
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256 | * )
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257 | * @param[in] base Base address = frist register
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258 | * @param[in] inc Jump to the next register inc times
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259 | *
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260 | * @return Calculated register address
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261 | */
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262 | inline at42qt1050_lld_register_t at42qt1050_lld_addr_calc(const at42qt1050_lld_register_t base, const uint8_t inc) { |
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263 | apalDbgAssert(inc < 5);
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264 | |||
265 | uint8_t double_result = 0; //16bit access |
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266 | |||
267 | switch (base) {
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268 | case AT42QT1050_LLD_REG_KEYSIGNAL_0: //2 4 2 2 |
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269 | case AT42QT1050_LLD_REG_REFERENCEDATA_0: //2 4 2 2 |
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270 | double_result = 1;
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271 | 9466e34d | Thomas Schöpping | __attribute__((fallthrough)); |
272 | 7df78c60 | Felix Wittenfeld | case AT42QT1050_LLD_REG_NEGATIVETHRESHOLD_0: //1 2 1 1 |
273 | case AT42QT1050_LLD_REG_PULSE_SCALE_0: //1 2 1 1 |
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274 | case AT42QT1050_LLD_REG_INTEGRATOR_AKS_0: //1 2 1 1 |
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275 | case AT42QT1050_LLD_REG_CHARGESHAREDELAY_0: //1 2 1 1 |
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276 | { |
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277 | uint8_t increase = ((inc>1)?inc+1:inc); |
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278 | return (at42qt1050_lld_register_t) (((uint8_t) base)+(increase << double_result));
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279 | } |
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280 | default:
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281 | { |
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282 | apalDbgPrintf("invalid base register 0x%04X\n", base);
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283 | return (at42qt1050_lld_register_t) 0xFF; //does not exist |
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284 | } |
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285 | } |
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286 | } |
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287 | |||
288 | 9e45662e | Thomas Schöpping | #ifdef __cplusplus
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289 | } |
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290 | #endif
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291 | |||
292 | ef078306 | Thomas Schöpping | /******************************************************************************/
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293 | /* INLINE FUNCTIONS */
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294 | /******************************************************************************/
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295 | |||
296 | 9466e34d | Thomas Schöpping | #endif /* AMIROLLD_AT42QT1050_H */ |
297 | 9e45662e | Thomas Schöpping | |
298 | /** @} */
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