amiro-lld / drivers / VL53L1X / v1 / api / core / vl53l1_nvm_map.h @ 4dba9195
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/*
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* Copyright (c) 2017, STMicroelectronics - All Rights Reserved
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*
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* This file is part of VL53L1 Core and is dual licensed,
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* either 'STMicroelectronics
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* Proprietary license'
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* or 'BSD 3-clause "New" or "Revised" License' , at your option.
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*
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********************************************************************************
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*
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* 'STMicroelectronics Proprietary license'
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*
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********************************************************************************
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*
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* License terms: STMicroelectronics Proprietary in accordance with licensing
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* terms at www.st.com/sla0081
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*
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* STMicroelectronics confidential
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* Reproduction and Communication of this document is strictly prohibited unless
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* specifically authorized in writing by STMicroelectronics.
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*
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*
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********************************************************************************
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*
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* Alternatively, VL53L1 Core may be distributed under the terms of
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* 'BSD 3-clause "New" or "Revised" License', in which case the following
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* provisions apply instead of the ones mentioned above :
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*
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********************************************************************************
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*
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* License terms: BSD 3-clause "New" or "Revised" License.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*
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********************************************************************************
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*
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*/
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/**
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* @file vl53l1_nvm_map.h
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* @brief NVM Map definitions for EwokPlus25 NVM Interface Functions.
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*
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*/
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/*
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* Include platform specific and register map definitions
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*/
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#ifndef _VL53L1_NVM_MAP_H_
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#define _VL53L1_NVM_MAP_H_
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#ifdef __cplusplus
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extern "C" |
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{
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#endif
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/** @defgroup VL53L1_nvm_DefineRegisters_group Define Registers * @brief List of all the defined registers
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* @{
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*/
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#define VL53L1_NVM__IDENTIFICATION__MODEL_ID 0x0008 |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 7
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [7:0] = nvm__identification_model_id
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*/
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#define VL53L1_NVM__IDENTIFICATION__MODULE_TYPE 0x000C |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 7
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [7:0] = nvm__identification_module_type
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*/
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#define VL53L1_NVM__IDENTIFICATION__REVISION_ID 0x000D |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 3
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [3:0] = nvm__identification_revision_id
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*/
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#define VL53L1_NVM__IDENTIFICATION__MODULE_ID 0x000E |
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/*!<
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type: uint16_t \n
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default: 0x0000 \n
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info: \n
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- msb = 15
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- lsb = 0
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- i2c_size = 2
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [15:0] = nvm__identification_module_id
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*/
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#define VL53L1_NVM__I2C_VALID 0x0010 |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 7
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [7:0] = nvm__i2c_valid
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*/
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#define VL53L1_NVM__I2C_SLAVE__DEVICE_ADDRESS 0x0011 |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 7
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [7:0] = nvm__i2c_device_address_ews
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*/
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#define VL53L1_NVM__EWS__OSC_MEASURED__FAST_OSC_FREQUENCY 0x0014 |
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/*!<
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type: uint16_t \n
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default: 0x0000 \n
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info: \n
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- msb = 15
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- lsb = 0
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- i2c_size = 2
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [15:0] = nvm__ews__fast_osc_frequency (fixed point 4.12)
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*/
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#define VL53L1_NVM__EWS__FAST_OSC_TRIM_MAX 0x0016 |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 6
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [6:0] = nvm__ews__fast_osc_trim_max
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*/
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#define VL53L1_NVM__EWS__FAST_OSC_FREQ_SET 0x0017 |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 2
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [2:0] = nvm__ews__fast_osc_freq_set
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*/
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#define VL53L1_NVM__EWS__SLOW_OSC_CALIBRATION 0x0018 |
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/*!<
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type: uint16_t \n
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default: 0x0000 \n
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info: \n
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- msb = 9
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- lsb = 0
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- i2c_size = 2
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [9:0] = nvm__ews__slow_osc_calibration
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*/
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#define VL53L1_NVM__FMT__OSC_MEASURED__FAST_OSC_FREQUENCY 0x001C |
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/*!<
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type: uint16_t \n
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default: 0x0000 \n
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info: \n
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- msb = 15
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- lsb = 0
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- i2c_size = 2
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [15:0] = nvm__fmt__fast_osc_frequency (fixed point 4.12)
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*/
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#define VL53L1_NVM__FMT__FAST_OSC_TRIM_MAX 0x001E |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 6
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [6:0] = nvm__fmt__fast_osc_trim_max
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*/
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#define VL53L1_NVM__FMT__FAST_OSC_FREQ_SET 0x001F |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 2
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [2:0] = nvm__fmt__fast_osc_freq_set
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*/
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#define VL53L1_NVM__FMT__SLOW_OSC_CALIBRATION 0x0020 |
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/*!<
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type: uint16_t \n
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default: 0x0000 \n
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info: \n
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- msb = 9
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- lsb = 0
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- i2c_size = 2
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [9:0] = nvm__fmt__slow_osc_calibration
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*/
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#define VL53L1_NVM__VHV_CONFIG_UNLOCK 0x0028 |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 7
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [7:0] = nvm__vhv_config_unlock
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*/
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#define VL53L1_NVM__REF_SELVDDPIX 0x0029 |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 3
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [3:0] = nvm__ref_selvddpix
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*/
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#define VL53L1_NVM__REF_SELVQUENCH 0x002A |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 6
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- lsb = 3
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [6:3] = nvm__ref_selvquench
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*/
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#define VL53L1_NVM__REGAVDD1V2_SEL_REGDVDD1V2_SEL 0x002B |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 3
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [3:2] = nvm__regavdd1v2_sel
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- [1:0] = nvm__regdvdd1v2_sel
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*/
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#define VL53L1_NVM__VHV_CONFIG__TIMEOUT_MACROP_LOOP_BOUND 0x002C |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 7
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [1:0] = nvm__vhv_timeout__macrop
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- [7:2] = nvm__vhv_loop_bound
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*/
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#define VL53L1_NVM__VHV_CONFIG__COUNT_THRESH 0x002D |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 7
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [7:0] = nvm__vhv_count_threshold
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*/
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#define VL53L1_NVM__VHV_CONFIG__OFFSET 0x002E |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 5
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [5:0] = nvm__vhv_offset
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*/
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#define VL53L1_NVM__VHV_CONFIG__INIT 0x002F |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 7
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [7] = nvm__vhv_init_enable
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- [5:0] = nvm__vhv_init_value
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*/
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#define VL53L1_NVM__LASER_SAFETY__VCSEL_TRIM_LL 0x0030 |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 2
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [2:0] = nvm__laser_safety_vcsel_trim_ll
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*/
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#define VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_LL 0x0031 |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 5
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [5:0] = nvm__laser_safety_vcsel_selion_ll
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*/
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#define VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_MAX_LL 0x0032 |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 5
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [5:0] = nvm__laser_safety_vcsel_selion_max_ll
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*/
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#define VL53L1_NVM__LASER_SAFETY__MULT_LL 0x0034 |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 5
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- lsb = 0
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- i2c_size = 1
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groups: \n
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['decoded_nvm_data']
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fields: \n
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- [5:0] = nvm__laser_safety_mult_ll
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*/
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#define VL53L1_NVM__LASER_SAFETY__CLIP_LL 0x0035 |
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/*!<
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type: uint8_t \n
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default: 0x00 \n
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info: \n
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- msb = 5
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- lsb = 0
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- i2c_size = 1
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|
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groups: \n
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['decoded_nvm_data']
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|
| 493 |
fields: \n
|
| 494 |
- [5:0] = nvm__laser_safety_clip_ll
|
| 495 |
*/
|
| 496 |
#define VL53L1_NVM__LASER_SAFETY__VCSEL_TRIM_LD 0x0038 |
| 497 |
/*!<
|
| 498 |
type: uint8_t \n
|
| 499 |
default: 0x00 \n
|
| 500 |
info: \n
|
| 501 |
- msb = 2
|
| 502 |
- lsb = 0
|
| 503 |
- i2c_size = 1
|
| 504 |
|
| 505 |
groups: \n
|
| 506 |
['decoded_nvm_data']
|
| 507 |
|
| 508 |
fields: \n
|
| 509 |
- [2:0] = nvm__laser_safety_vcsel_trim_ld
|
| 510 |
*/
|
| 511 |
#define VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_LD 0x0039 |
| 512 |
/*!<
|
| 513 |
type: uint8_t \n
|
| 514 |
default: 0x00 \n
|
| 515 |
info: \n
|
| 516 |
- msb = 5
|
| 517 |
- lsb = 0
|
| 518 |
- i2c_size = 1
|
| 519 |
|
| 520 |
groups: \n
|
| 521 |
['decoded_nvm_data']
|
| 522 |
|
| 523 |
fields: \n
|
| 524 |
- [5:0] = nvm__laser_safety_vcsel_selion_ld
|
| 525 |
*/
|
| 526 |
#define VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_MAX_LD 0x003A |
| 527 |
/*!<
|
| 528 |
type: uint8_t \n
|
| 529 |
default: 0x00 \n
|
| 530 |
info: \n
|
| 531 |
- msb = 5
|
| 532 |
- lsb = 0
|
| 533 |
- i2c_size = 1
|
| 534 |
|
| 535 |
groups: \n
|
| 536 |
['decoded_nvm_data']
|
| 537 |
|
| 538 |
fields: \n
|
| 539 |
- [5:0] = nvm__laser_safety_vcsel_selion_max_ld
|
| 540 |
*/
|
| 541 |
#define VL53L1_NVM__LASER_SAFETY__MULT_LD 0x003C |
| 542 |
/*!<
|
| 543 |
type: uint8_t \n
|
| 544 |
default: 0x00 \n
|
| 545 |
info: \n
|
| 546 |
- msb = 5
|
| 547 |
- lsb = 0
|
| 548 |
- i2c_size = 1
|
| 549 |
|
| 550 |
groups: \n
|
| 551 |
['decoded_nvm_data']
|
| 552 |
|
| 553 |
fields: \n
|
| 554 |
- [5:0] = nvm__laser_safety_mult_ld
|
| 555 |
*/
|
| 556 |
#define VL53L1_NVM__LASER_SAFETY__CLIP_LD 0x003D |
| 557 |
/*!<
|
| 558 |
type: uint8_t \n
|
| 559 |
default: 0x00 \n
|
| 560 |
info: \n
|
| 561 |
- msb = 5
|
| 562 |
- lsb = 0
|
| 563 |
- i2c_size = 1
|
| 564 |
|
| 565 |
groups: \n
|
| 566 |
['decoded_nvm_data']
|
| 567 |
|
| 568 |
fields: \n
|
| 569 |
- [5:0] = nvm__laser_safety_clip_ld
|
| 570 |
*/
|
| 571 |
#define VL53L1_NVM__LASER_SAFETY_LOCK_BYTE 0x0040 |
| 572 |
/*!<
|
| 573 |
type: uint8_t \n
|
| 574 |
default: 0x00 \n
|
| 575 |
info: \n
|
| 576 |
- msb = 7
|
| 577 |
- lsb = 0
|
| 578 |
- i2c_size = 1
|
| 579 |
|
| 580 |
groups: \n
|
| 581 |
['decoded_nvm_data']
|
| 582 |
|
| 583 |
fields: \n
|
| 584 |
- [7:0] = nvm__laser_safety_lock_byte
|
| 585 |
*/
|
| 586 |
#define VL53L1_NVM__LASER_SAFETY_UNLOCK_BYTE 0x0044 |
| 587 |
/*!<
|
| 588 |
type: uint8_t \n
|
| 589 |
default: 0x00 \n
|
| 590 |
info: \n
|
| 591 |
- msb = 7
|
| 592 |
- lsb = 0
|
| 593 |
- i2c_size = 1
|
| 594 |
|
| 595 |
groups: \n
|
| 596 |
['decoded_nvm_data']
|
| 597 |
|
| 598 |
fields: \n
|
| 599 |
- [7:0] = nvm__laser_safety_unlock_byte
|
| 600 |
*/
|
| 601 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_0_ 0x0048 |
| 602 |
/*!<
|
| 603 |
type: uint8_t \n
|
| 604 |
default: 0x00 \n
|
| 605 |
info: \n
|
| 606 |
- msb = 7
|
| 607 |
- lsb = 0
|
| 608 |
- i2c_size = 1
|
| 609 |
|
| 610 |
groups: \n
|
| 611 |
['decoded_nvm_data']
|
| 612 |
|
| 613 |
fields: \n
|
| 614 |
- [7:0] = nvm__ews__spad_enables_rtn_0_
|
| 615 |
*/
|
| 616 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_1_ 0x0049 |
| 617 |
/*!<
|
| 618 |
type: uint8_t \n
|
| 619 |
default: 0x00 \n
|
| 620 |
info: \n
|
| 621 |
- msb = 7
|
| 622 |
- lsb = 0
|
| 623 |
- i2c_size = 1
|
| 624 |
|
| 625 |
groups: \n
|
| 626 |
['decoded_nvm_data']
|
| 627 |
|
| 628 |
fields: \n
|
| 629 |
- [7:0] = nvm__ews__spad_enables_rtn_1_
|
| 630 |
*/
|
| 631 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_2_ 0x004A |
| 632 |
/*!<
|
| 633 |
type: uint8_t \n
|
| 634 |
default: 0x00 \n
|
| 635 |
info: \n
|
| 636 |
- msb = 7
|
| 637 |
- lsb = 0
|
| 638 |
- i2c_size = 1
|
| 639 |
|
| 640 |
groups: \n
|
| 641 |
['decoded_nvm_data']
|
| 642 |
|
| 643 |
fields: \n
|
| 644 |
- [7:0] = nvm__ews__spad_enables_rtn_2_
|
| 645 |
*/
|
| 646 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_3_ 0x004B |
| 647 |
/*!<
|
| 648 |
type: uint8_t \n
|
| 649 |
default: 0x00 \n
|
| 650 |
info: \n
|
| 651 |
- msb = 7
|
| 652 |
- lsb = 0
|
| 653 |
- i2c_size = 1
|
| 654 |
|
| 655 |
groups: \n
|
| 656 |
['decoded_nvm_data']
|
| 657 |
|
| 658 |
fields: \n
|
| 659 |
- [7:0] = nvm__ews__spad_enables_rtn_3_
|
| 660 |
*/
|
| 661 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_4_ 0x004C |
| 662 |
/*!<
|
| 663 |
type: uint8_t \n
|
| 664 |
default: 0x00 \n
|
| 665 |
info: \n
|
| 666 |
- msb = 7
|
| 667 |
- lsb = 0
|
| 668 |
- i2c_size = 1
|
| 669 |
|
| 670 |
groups: \n
|
| 671 |
['decoded_nvm_data']
|
| 672 |
|
| 673 |
fields: \n
|
| 674 |
- [7:0] = nvm__ews__spad_enables_rtn_4_
|
| 675 |
*/
|
| 676 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_5_ 0x004D |
| 677 |
/*!<
|
| 678 |
type: uint8_t \n
|
| 679 |
default: 0x00 \n
|
| 680 |
info: \n
|
| 681 |
- msb = 7
|
| 682 |
- lsb = 0
|
| 683 |
- i2c_size = 1
|
| 684 |
|
| 685 |
groups: \n
|
| 686 |
['decoded_nvm_data']
|
| 687 |
|
| 688 |
fields: \n
|
| 689 |
- [7:0] = nvm__ews__spad_enables_rtn_5_
|
| 690 |
*/
|
| 691 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_6_ 0x004E |
| 692 |
/*!<
|
| 693 |
type: uint8_t \n
|
| 694 |
default: 0x00 \n
|
| 695 |
info: \n
|
| 696 |
- msb = 7
|
| 697 |
- lsb = 0
|
| 698 |
- i2c_size = 1
|
| 699 |
|
| 700 |
groups: \n
|
| 701 |
['decoded_nvm_data']
|
| 702 |
|
| 703 |
fields: \n
|
| 704 |
- [7:0] = nvm__ews__spad_enables_rtn_6_
|
| 705 |
*/
|
| 706 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_7_ 0x004F |
| 707 |
/*!<
|
| 708 |
type: uint8_t \n
|
| 709 |
default: 0x00 \n
|
| 710 |
info: \n
|
| 711 |
- msb = 7
|
| 712 |
- lsb = 0
|
| 713 |
- i2c_size = 1
|
| 714 |
|
| 715 |
groups: \n
|
| 716 |
['decoded_nvm_data']
|
| 717 |
|
| 718 |
fields: \n
|
| 719 |
- [7:0] = nvm__ews__spad_enables_rtn_7_
|
| 720 |
*/
|
| 721 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_8_ 0x0050 |
| 722 |
/*!<
|
| 723 |
type: uint8_t \n
|
| 724 |
default: 0x00 \n
|
| 725 |
info: \n
|
| 726 |
- msb = 7
|
| 727 |
- lsb = 0
|
| 728 |
- i2c_size = 1
|
| 729 |
|
| 730 |
groups: \n
|
| 731 |
['decoded_nvm_data']
|
| 732 |
|
| 733 |
fields: \n
|
| 734 |
- [7:0] = nvm__ews__spad_enables_rtn_8_
|
| 735 |
*/
|
| 736 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_9_ 0x0051 |
| 737 |
/*!<
|
| 738 |
type: uint8_t \n
|
| 739 |
default: 0x00 \n
|
| 740 |
info: \n
|
| 741 |
- msb = 7
|
| 742 |
- lsb = 0
|
| 743 |
- i2c_size = 1
|
| 744 |
|
| 745 |
groups: \n
|
| 746 |
['decoded_nvm_data']
|
| 747 |
|
| 748 |
fields: \n
|
| 749 |
- [7:0] = nvm__ews__spad_enables_rtn_9_
|
| 750 |
*/
|
| 751 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_10_ 0x0052 |
| 752 |
/*!<
|
| 753 |
type: uint8_t \n
|
| 754 |
default: 0x00 \n
|
| 755 |
info: \n
|
| 756 |
- msb = 7
|
| 757 |
- lsb = 0
|
| 758 |
- i2c_size = 1
|
| 759 |
|
| 760 |
groups: \n
|
| 761 |
['decoded_nvm_data']
|
| 762 |
|
| 763 |
fields: \n
|
| 764 |
- [7:0] = nvm__ews__spad_enables_rtn_10_
|
| 765 |
*/
|
| 766 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_11_ 0x0053 |
| 767 |
/*!<
|
| 768 |
type: uint8_t \n
|
| 769 |
default: 0x00 \n
|
| 770 |
info: \n
|
| 771 |
- msb = 7
|
| 772 |
- lsb = 0
|
| 773 |
- i2c_size = 1
|
| 774 |
|
| 775 |
groups: \n
|
| 776 |
['decoded_nvm_data']
|
| 777 |
|
| 778 |
fields: \n
|
| 779 |
- [7:0] = nvm__ews__spad_enables_rtn_11_
|
| 780 |
*/
|
| 781 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_12_ 0x0054 |
| 782 |
/*!<
|
| 783 |
type: uint8_t \n
|
| 784 |
default: 0x00 \n
|
| 785 |
info: \n
|
| 786 |
- msb = 7
|
| 787 |
- lsb = 0
|
| 788 |
- i2c_size = 1
|
| 789 |
|
| 790 |
groups: \n
|
| 791 |
['decoded_nvm_data']
|
| 792 |
|
| 793 |
fields: \n
|
| 794 |
- [7:0] = nvm__ews__spad_enables_rtn_12_
|
| 795 |
*/
|
| 796 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_13_ 0x0055 |
| 797 |
/*!<
|
| 798 |
type: uint8_t \n
|
| 799 |
default: 0x00 \n
|
| 800 |
info: \n
|
| 801 |
- msb = 7
|
| 802 |
- lsb = 0
|
| 803 |
- i2c_size = 1
|
| 804 |
|
| 805 |
groups: \n
|
| 806 |
['decoded_nvm_data']
|
| 807 |
|
| 808 |
fields: \n
|
| 809 |
- [7:0] = nvm__ews__spad_enables_rtn_13_
|
| 810 |
*/
|
| 811 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_14_ 0x0056 |
| 812 |
/*!<
|
| 813 |
type: uint8_t \n
|
| 814 |
default: 0x00 \n
|
| 815 |
info: \n
|
| 816 |
- msb = 7
|
| 817 |
- lsb = 0
|
| 818 |
- i2c_size = 1
|
| 819 |
|
| 820 |
groups: \n
|
| 821 |
['decoded_nvm_data']
|
| 822 |
|
| 823 |
fields: \n
|
| 824 |
- [7:0] = nvm__ews__spad_enables_rtn_14_
|
| 825 |
*/
|
| 826 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_15_ 0x0057 |
| 827 |
/*!<
|
| 828 |
type: uint8_t \n
|
| 829 |
default: 0x00 \n
|
| 830 |
info: \n
|
| 831 |
- msb = 7
|
| 832 |
- lsb = 0
|
| 833 |
- i2c_size = 1
|
| 834 |
|
| 835 |
groups: \n
|
| 836 |
['decoded_nvm_data']
|
| 837 |
|
| 838 |
fields: \n
|
| 839 |
- [7:0] = nvm__ews__spad_enables_rtn_15_
|
| 840 |
*/
|
| 841 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_16_ 0x0058 |
| 842 |
/*!<
|
| 843 |
type: uint8_t \n
|
| 844 |
default: 0x00 \n
|
| 845 |
info: \n
|
| 846 |
- msb = 7
|
| 847 |
- lsb = 0
|
| 848 |
- i2c_size = 1
|
| 849 |
|
| 850 |
groups: \n
|
| 851 |
['decoded_nvm_data']
|
| 852 |
|
| 853 |
fields: \n
|
| 854 |
- [7:0] = nvm__ews__spad_enables_rtn_16_
|
| 855 |
*/
|
| 856 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_17_ 0x0059 |
| 857 |
/*!<
|
| 858 |
type: uint8_t \n
|
| 859 |
default: 0x00 \n
|
| 860 |
info: \n
|
| 861 |
- msb = 7
|
| 862 |
- lsb = 0
|
| 863 |
- i2c_size = 1
|
| 864 |
|
| 865 |
groups: \n
|
| 866 |
['decoded_nvm_data']
|
| 867 |
|
| 868 |
fields: \n
|
| 869 |
- [7:0] = nvm__ews__spad_enables_rtn_17_
|
| 870 |
*/
|
| 871 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_18_ 0x005A |
| 872 |
/*!<
|
| 873 |
type: uint8_t \n
|
| 874 |
default: 0x00 \n
|
| 875 |
info: \n
|
| 876 |
- msb = 7
|
| 877 |
- lsb = 0
|
| 878 |
- i2c_size = 1
|
| 879 |
|
| 880 |
groups: \n
|
| 881 |
['decoded_nvm_data']
|
| 882 |
|
| 883 |
fields: \n
|
| 884 |
- [7:0] = nvm__ews__spad_enables_rtn_18_
|
| 885 |
*/
|
| 886 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_19_ 0x005B |
| 887 |
/*!<
|
| 888 |
type: uint8_t \n
|
| 889 |
default: 0x00 \n
|
| 890 |
info: \n
|
| 891 |
- msb = 7
|
| 892 |
- lsb = 0
|
| 893 |
- i2c_size = 1
|
| 894 |
|
| 895 |
groups: \n
|
| 896 |
['decoded_nvm_data']
|
| 897 |
|
| 898 |
fields: \n
|
| 899 |
- [7:0] = nvm__ews__spad_enables_rtn_19_
|
| 900 |
*/
|
| 901 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_20_ 0x005C |
| 902 |
/*!<
|
| 903 |
type: uint8_t \n
|
| 904 |
default: 0x00 \n
|
| 905 |
info: \n
|
| 906 |
- msb = 7
|
| 907 |
- lsb = 0
|
| 908 |
- i2c_size = 1
|
| 909 |
|
| 910 |
groups: \n
|
| 911 |
['decoded_nvm_data']
|
| 912 |
|
| 913 |
fields: \n
|
| 914 |
- [7:0] = nvm__ews__spad_enables_rtn_20_
|
| 915 |
*/
|
| 916 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_21_ 0x005D |
| 917 |
/*!<
|
| 918 |
type: uint8_t \n
|
| 919 |
default: 0x00 \n
|
| 920 |
info: \n
|
| 921 |
- msb = 7
|
| 922 |
- lsb = 0
|
| 923 |
- i2c_size = 1
|
| 924 |
|
| 925 |
groups: \n
|
| 926 |
['decoded_nvm_data']
|
| 927 |
|
| 928 |
fields: \n
|
| 929 |
- [7:0] = nvm__ews__spad_enables_rtn_21_
|
| 930 |
*/
|
| 931 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_22_ 0x005E |
| 932 |
/*!<
|
| 933 |
type: uint8_t \n
|
| 934 |
default: 0x00 \n
|
| 935 |
info: \n
|
| 936 |
- msb = 7
|
| 937 |
- lsb = 0
|
| 938 |
- i2c_size = 1
|
| 939 |
|
| 940 |
groups: \n
|
| 941 |
['decoded_nvm_data']
|
| 942 |
|
| 943 |
fields: \n
|
| 944 |
- [7:0] = nvm__ews__spad_enables_rtn_22_
|
| 945 |
*/
|
| 946 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_23_ 0x005F |
| 947 |
/*!<
|
| 948 |
type: uint8_t \n
|
| 949 |
default: 0x00 \n
|
| 950 |
info: \n
|
| 951 |
- msb = 7
|
| 952 |
- lsb = 0
|
| 953 |
- i2c_size = 1
|
| 954 |
|
| 955 |
groups: \n
|
| 956 |
['decoded_nvm_data']
|
| 957 |
|
| 958 |
fields: \n
|
| 959 |
- [7:0] = nvm__ews__spad_enables_rtn_23_
|
| 960 |
*/
|
| 961 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_24_ 0x0060 |
| 962 |
/*!<
|
| 963 |
type: uint8_t \n
|
| 964 |
default: 0x00 \n
|
| 965 |
info: \n
|
| 966 |
- msb = 7
|
| 967 |
- lsb = 0
|
| 968 |
- i2c_size = 1
|
| 969 |
|
| 970 |
groups: \n
|
| 971 |
['decoded_nvm_data']
|
| 972 |
|
| 973 |
fields: \n
|
| 974 |
- [7:0] = nvm__ews__spad_enables_rtn_24_
|
| 975 |
*/
|
| 976 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_25_ 0x0061 |
| 977 |
/*!<
|
| 978 |
type: uint8_t \n
|
| 979 |
default: 0x00 \n
|
| 980 |
info: \n
|
| 981 |
- msb = 7
|
| 982 |
- lsb = 0
|
| 983 |
- i2c_size = 1
|
| 984 |
|
| 985 |
groups: \n
|
| 986 |
['decoded_nvm_data']
|
| 987 |
|
| 988 |
fields: \n
|
| 989 |
- [7:0] = nvm__ews__spad_enables_rtn_25_
|
| 990 |
*/
|
| 991 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_26_ 0x0062 |
| 992 |
/*!<
|
| 993 |
type: uint8_t \n
|
| 994 |
default: 0x00 \n
|
| 995 |
info: \n
|
| 996 |
- msb = 7
|
| 997 |
- lsb = 0
|
| 998 |
- i2c_size = 1
|
| 999 |
|
| 1000 |
groups: \n
|
| 1001 |
['decoded_nvm_data']
|
| 1002 |
|
| 1003 |
fields: \n
|
| 1004 |
- [7:0] = nvm__ews__spad_enables_rtn_26_
|
| 1005 |
*/
|
| 1006 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_27_ 0x0063 |
| 1007 |
/*!<
|
| 1008 |
type: uint8_t \n
|
| 1009 |
default: 0x00 \n
|
| 1010 |
info: \n
|
| 1011 |
- msb = 7
|
| 1012 |
- lsb = 0
|
| 1013 |
- i2c_size = 1
|
| 1014 |
|
| 1015 |
groups: \n
|
| 1016 |
['decoded_nvm_data']
|
| 1017 |
|
| 1018 |
fields: \n
|
| 1019 |
- [7:0] = nvm__ews__spad_enables_rtn_27_
|
| 1020 |
*/
|
| 1021 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_28_ 0x0064 |
| 1022 |
/*!<
|
| 1023 |
type: uint8_t \n
|
| 1024 |
default: 0x00 \n
|
| 1025 |
info: \n
|
| 1026 |
- msb = 7
|
| 1027 |
- lsb = 0
|
| 1028 |
- i2c_size = 1
|
| 1029 |
|
| 1030 |
groups: \n
|
| 1031 |
['decoded_nvm_data']
|
| 1032 |
|
| 1033 |
fields: \n
|
| 1034 |
- [7:0] = nvm__ews__spad_enables_rtn_28_
|
| 1035 |
*/
|
| 1036 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_29_ 0x0065 |
| 1037 |
/*!<
|
| 1038 |
type: uint8_t \n
|
| 1039 |
default: 0x00 \n
|
| 1040 |
info: \n
|
| 1041 |
- msb = 7
|
| 1042 |
- lsb = 0
|
| 1043 |
- i2c_size = 1
|
| 1044 |
|
| 1045 |
groups: \n
|
| 1046 |
['decoded_nvm_data']
|
| 1047 |
|
| 1048 |
fields: \n
|
| 1049 |
- [7:0] = nvm__ews__spad_enables_rtn_29_
|
| 1050 |
*/
|
| 1051 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_30_ 0x0066 |
| 1052 |
/*!<
|
| 1053 |
type: uint8_t \n
|
| 1054 |
default: 0x00 \n
|
| 1055 |
info: \n
|
| 1056 |
- msb = 7
|
| 1057 |
- lsb = 0
|
| 1058 |
- i2c_size = 1
|
| 1059 |
|
| 1060 |
groups: \n
|
| 1061 |
['decoded_nvm_data']
|
| 1062 |
|
| 1063 |
fields: \n
|
| 1064 |
- [7:0] = nvm__ews__spad_enables_rtn_30_
|
| 1065 |
*/
|
| 1066 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_31_ 0x0067 |
| 1067 |
/*!<
|
| 1068 |
type: uint8_t \n
|
| 1069 |
default: 0x00 \n
|
| 1070 |
info: \n
|
| 1071 |
- msb = 7
|
| 1072 |
- lsb = 0
|
| 1073 |
- i2c_size = 1
|
| 1074 |
|
| 1075 |
groups: \n
|
| 1076 |
['decoded_nvm_data']
|
| 1077 |
|
| 1078 |
fields: \n
|
| 1079 |
- [7:0] = nvm__ews__spad_enables_rtn_31_
|
| 1080 |
*/
|
| 1081 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_0_ 0x0068 |
| 1082 |
/*!<
|
| 1083 |
type: uint8_t \n
|
| 1084 |
default: 0x00 \n
|
| 1085 |
info: \n
|
| 1086 |
- msb = 7
|
| 1087 |
- lsb = 0
|
| 1088 |
- i2c_size = 1
|
| 1089 |
|
| 1090 |
groups: \n
|
| 1091 |
['decoded_nvm_data']
|
| 1092 |
|
| 1093 |
fields: \n
|
| 1094 |
- [7:0] = nvm__ews__spad_enables_ref__loc1_0_
|
| 1095 |
*/
|
| 1096 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_1_ 0x0069 |
| 1097 |
/*!<
|
| 1098 |
type: uint8_t \n
|
| 1099 |
default: 0x00 \n
|
| 1100 |
info: \n
|
| 1101 |
- msb = 7
|
| 1102 |
- lsb = 0
|
| 1103 |
- i2c_size = 1
|
| 1104 |
|
| 1105 |
groups: \n
|
| 1106 |
['decoded_nvm_data']
|
| 1107 |
|
| 1108 |
fields: \n
|
| 1109 |
- [7:0] = nvm__ews__spad_enables_ref__loc1_1_
|
| 1110 |
*/
|
| 1111 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_2_ 0x006A |
| 1112 |
/*!<
|
| 1113 |
type: uint8_t \n
|
| 1114 |
default: 0x00 \n
|
| 1115 |
info: \n
|
| 1116 |
- msb = 7
|
| 1117 |
- lsb = 0
|
| 1118 |
- i2c_size = 1
|
| 1119 |
|
| 1120 |
groups: \n
|
| 1121 |
['decoded_nvm_data']
|
| 1122 |
|
| 1123 |
fields: \n
|
| 1124 |
- [7:0] = nvm__ews__spad_enables_ref__loc1_2_
|
| 1125 |
*/
|
| 1126 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_3_ 0x006B |
| 1127 |
/*!<
|
| 1128 |
type: uint8_t \n
|
| 1129 |
default: 0x00 \n
|
| 1130 |
info: \n
|
| 1131 |
- msb = 7
|
| 1132 |
- lsb = 0
|
| 1133 |
- i2c_size = 1
|
| 1134 |
|
| 1135 |
groups: \n
|
| 1136 |
['decoded_nvm_data']
|
| 1137 |
|
| 1138 |
fields: \n
|
| 1139 |
- [7:0] = nvm__ews__spad_enables_ref__loc1_3_
|
| 1140 |
*/
|
| 1141 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_4_ 0x006C |
| 1142 |
/*!<
|
| 1143 |
type: uint8_t \n
|
| 1144 |
default: 0x00 \n
|
| 1145 |
info: \n
|
| 1146 |
- msb = 7
|
| 1147 |
- lsb = 0
|
| 1148 |
- i2c_size = 1
|
| 1149 |
|
| 1150 |
groups: \n
|
| 1151 |
['decoded_nvm_data']
|
| 1152 |
|
| 1153 |
fields: \n
|
| 1154 |
- [7:0] = nvm__ews__spad_enables_ref__loc1_4_
|
| 1155 |
*/
|
| 1156 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_5_ 0x006D |
| 1157 |
/*!<
|
| 1158 |
type: uint8_t \n
|
| 1159 |
default: 0x00 \n
|
| 1160 |
info: \n
|
| 1161 |
- msb = 7
|
| 1162 |
- lsb = 0
|
| 1163 |
- i2c_size = 1
|
| 1164 |
|
| 1165 |
groups: \n
|
| 1166 |
['decoded_nvm_data']
|
| 1167 |
|
| 1168 |
fields: \n
|
| 1169 |
- [7:0] = nvm__ews__spad_enables_ref__loc1_5_
|
| 1170 |
*/
|
| 1171 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_0_ 0x0070 |
| 1172 |
/*!<
|
| 1173 |
type: uint8_t \n
|
| 1174 |
default: 0x00 \n
|
| 1175 |
info: \n
|
| 1176 |
- msb = 7
|
| 1177 |
- lsb = 0
|
| 1178 |
- i2c_size = 1
|
| 1179 |
|
| 1180 |
groups: \n
|
| 1181 |
['decoded_nvm_data']
|
| 1182 |
|
| 1183 |
fields: \n
|
| 1184 |
- [7:0] = nvm__ews__spad_enables_ref__loc2_0_
|
| 1185 |
*/
|
| 1186 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_1_ 0x0071 |
| 1187 |
/*!<
|
| 1188 |
type: uint8_t \n
|
| 1189 |
default: 0x00 \n
|
| 1190 |
info: \n
|
| 1191 |
- msb = 7
|
| 1192 |
- lsb = 0
|
| 1193 |
- i2c_size = 1
|
| 1194 |
|
| 1195 |
groups: \n
|
| 1196 |
['decoded_nvm_data']
|
| 1197 |
|
| 1198 |
fields: \n
|
| 1199 |
- [7:0] = nvm__ews__spad_enables_ref__loc2_1_
|
| 1200 |
*/
|
| 1201 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_2_ 0x0072 |
| 1202 |
/*!<
|
| 1203 |
type: uint8_t \n
|
| 1204 |
default: 0x00 \n
|
| 1205 |
info: \n
|
| 1206 |
- msb = 7
|
| 1207 |
- lsb = 0
|
| 1208 |
- i2c_size = 1
|
| 1209 |
|
| 1210 |
groups: \n
|
| 1211 |
['decoded_nvm_data']
|
| 1212 |
|
| 1213 |
fields: \n
|
| 1214 |
- [7:0] = nvm__ews__spad_enables_ref__loc2_2_
|
| 1215 |
*/
|
| 1216 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_3_ 0x0073 |
| 1217 |
/*!<
|
| 1218 |
type: uint8_t \n
|
| 1219 |
default: 0x00 \n
|
| 1220 |
info: \n
|
| 1221 |
- msb = 7
|
| 1222 |
- lsb = 0
|
| 1223 |
- i2c_size = 1
|
| 1224 |
|
| 1225 |
groups: \n
|
| 1226 |
['decoded_nvm_data']
|
| 1227 |
|
| 1228 |
fields: \n
|
| 1229 |
- [7:0] = nvm__ews__spad_enables_ref__loc2_3_
|
| 1230 |
*/
|
| 1231 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_4_ 0x0074 |
| 1232 |
/*!<
|
| 1233 |
type: uint8_t \n
|
| 1234 |
default: 0x00 \n
|
| 1235 |
info: \n
|
| 1236 |
- msb = 7
|
| 1237 |
- lsb = 0
|
| 1238 |
- i2c_size = 1
|
| 1239 |
|
| 1240 |
groups: \n
|
| 1241 |
['decoded_nvm_data']
|
| 1242 |
|
| 1243 |
fields: \n
|
| 1244 |
- [7:0] = nvm__ews__spad_enables_ref__loc2_4_
|
| 1245 |
*/
|
| 1246 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_5_ 0x0075 |
| 1247 |
/*!<
|
| 1248 |
type: uint8_t \n
|
| 1249 |
default: 0x00 \n
|
| 1250 |
info: \n
|
| 1251 |
- msb = 7
|
| 1252 |
- lsb = 0
|
| 1253 |
- i2c_size = 1
|
| 1254 |
|
| 1255 |
groups: \n
|
| 1256 |
['decoded_nvm_data']
|
| 1257 |
|
| 1258 |
fields: \n
|
| 1259 |
- [7:0] = nvm__ews__spad_enables_ref__loc2_5_
|
| 1260 |
*/
|
| 1261 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_0_ 0x0078 |
| 1262 |
/*!<
|
| 1263 |
type: uint8_t \n
|
| 1264 |
default: 0x00 \n
|
| 1265 |
info: \n
|
| 1266 |
- msb = 7
|
| 1267 |
- lsb = 0
|
| 1268 |
- i2c_size = 1
|
| 1269 |
|
| 1270 |
groups: \n
|
| 1271 |
['decoded_nvm_data']
|
| 1272 |
|
| 1273 |
fields: \n
|
| 1274 |
- [7:0] = nvm__ews__spad_enables_ref__loc3_0_
|
| 1275 |
*/
|
| 1276 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_1_ 0x0079 |
| 1277 |
/*!<
|
| 1278 |
type: uint8_t \n
|
| 1279 |
default: 0x00 \n
|
| 1280 |
info: \n
|
| 1281 |
- msb = 7
|
| 1282 |
- lsb = 0
|
| 1283 |
- i2c_size = 1
|
| 1284 |
|
| 1285 |
groups: \n
|
| 1286 |
['decoded_nvm_data']
|
| 1287 |
|
| 1288 |
fields: \n
|
| 1289 |
- [7:0] = nvm__ews__spad_enables_ref__loc3_1_
|
| 1290 |
*/
|
| 1291 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_2_ 0x007A |
| 1292 |
/*!<
|
| 1293 |
type: uint8_t \n
|
| 1294 |
default: 0x00 \n
|
| 1295 |
info: \n
|
| 1296 |
- msb = 7
|
| 1297 |
- lsb = 0
|
| 1298 |
- i2c_size = 1
|
| 1299 |
|
| 1300 |
groups: \n
|
| 1301 |
['decoded_nvm_data']
|
| 1302 |
|
| 1303 |
fields: \n
|
| 1304 |
- [7:0] = nvm__ews__spad_enables_ref__loc3_2_
|
| 1305 |
*/
|
| 1306 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_3_ 0x007B |
| 1307 |
/*!<
|
| 1308 |
type: uint8_t \n
|
| 1309 |
default: 0x00 \n
|
| 1310 |
info: \n
|
| 1311 |
- msb = 7
|
| 1312 |
- lsb = 0
|
| 1313 |
- i2c_size = 1
|
| 1314 |
|
| 1315 |
groups: \n
|
| 1316 |
['decoded_nvm_data']
|
| 1317 |
|
| 1318 |
fields: \n
|
| 1319 |
- [7:0] = nvm__ews__spad_enables_ref__loc3_3_
|
| 1320 |
*/
|
| 1321 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_4_ 0x007C |
| 1322 |
/*!<
|
| 1323 |
type: uint8_t \n
|
| 1324 |
default: 0x00 \n
|
| 1325 |
info: \n
|
| 1326 |
- msb = 7
|
| 1327 |
- lsb = 0
|
| 1328 |
- i2c_size = 1
|
| 1329 |
|
| 1330 |
groups: \n
|
| 1331 |
['decoded_nvm_data']
|
| 1332 |
|
| 1333 |
fields: \n
|
| 1334 |
- [7:0] = nvm__ews__spad_enables_ref__loc3_4_
|
| 1335 |
*/
|
| 1336 |
#define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_5_ 0x007D |
| 1337 |
/*!<
|
| 1338 |
type: uint8_t \n
|
| 1339 |
default: 0x00 \n
|
| 1340 |
info: \n
|
| 1341 |
- msb = 7
|
| 1342 |
- lsb = 0
|
| 1343 |
- i2c_size = 1
|
| 1344 |
|
| 1345 |
groups: \n
|
| 1346 |
['decoded_nvm_data']
|
| 1347 |
|
| 1348 |
fields: \n
|
| 1349 |
- [7:0] = nvm__ews__spad_enables_ref__loc3_5_
|
| 1350 |
*/
|
| 1351 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_0_ 0x0080 |
| 1352 |
/*!<
|
| 1353 |
type: uint8_t \n
|
| 1354 |
default: 0x00 \n
|
| 1355 |
info: \n
|
| 1356 |
- msb = 7
|
| 1357 |
- lsb = 0
|
| 1358 |
- i2c_size = 1
|
| 1359 |
|
| 1360 |
groups: \n
|
| 1361 |
['decoded_nvm_data']
|
| 1362 |
|
| 1363 |
fields: \n
|
| 1364 |
- [7:0] = nvm__fmt__spad_enables_rtn_0_
|
| 1365 |
*/
|
| 1366 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_1_ 0x0081 |
| 1367 |
/*!<
|
| 1368 |
type: uint8_t \n
|
| 1369 |
default: 0x00 \n
|
| 1370 |
info: \n
|
| 1371 |
- msb = 7
|
| 1372 |
- lsb = 0
|
| 1373 |
- i2c_size = 1
|
| 1374 |
|
| 1375 |
groups: \n
|
| 1376 |
['decoded_nvm_data']
|
| 1377 |
|
| 1378 |
fields: \n
|
| 1379 |
- [7:0] = nvm__fmt__spad_enables_rtn_1_
|
| 1380 |
*/
|
| 1381 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_2_ 0x0082 |
| 1382 |
/*!<
|
| 1383 |
type: uint8_t \n
|
| 1384 |
default: 0x00 \n
|
| 1385 |
info: \n
|
| 1386 |
- msb = 7
|
| 1387 |
- lsb = 0
|
| 1388 |
- i2c_size = 1
|
| 1389 |
|
| 1390 |
groups: \n
|
| 1391 |
['decoded_nvm_data']
|
| 1392 |
|
| 1393 |
fields: \n
|
| 1394 |
- [7:0] = nvm__fmt__spad_enables_rtn_2_
|
| 1395 |
*/
|
| 1396 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_3_ 0x0083 |
| 1397 |
/*!<
|
| 1398 |
type: uint8_t \n
|
| 1399 |
default: 0x00 \n
|
| 1400 |
info: \n
|
| 1401 |
- msb = 7
|
| 1402 |
- lsb = 0
|
| 1403 |
- i2c_size = 1
|
| 1404 |
|
| 1405 |
groups: \n
|
| 1406 |
['decoded_nvm_data']
|
| 1407 |
|
| 1408 |
fields: \n
|
| 1409 |
- [7:0] = nvm__fmt__spad_enables_rtn_3_
|
| 1410 |
*/
|
| 1411 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_4_ 0x0084 |
| 1412 |
/*!<
|
| 1413 |
type: uint8_t \n
|
| 1414 |
default: 0x00 \n
|
| 1415 |
info: \n
|
| 1416 |
- msb = 7
|
| 1417 |
- lsb = 0
|
| 1418 |
- i2c_size = 1
|
| 1419 |
|
| 1420 |
groups: \n
|
| 1421 |
['decoded_nvm_data']
|
| 1422 |
|
| 1423 |
fields: \n
|
| 1424 |
- [7:0] = nvm__fmt__spad_enables_rtn_4_
|
| 1425 |
*/
|
| 1426 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_5_ 0x0085 |
| 1427 |
/*!<
|
| 1428 |
type: uint8_t \n
|
| 1429 |
default: 0x00 \n
|
| 1430 |
info: \n
|
| 1431 |
- msb = 7
|
| 1432 |
- lsb = 0
|
| 1433 |
- i2c_size = 1
|
| 1434 |
|
| 1435 |
groups: \n
|
| 1436 |
['decoded_nvm_data']
|
| 1437 |
|
| 1438 |
fields: \n
|
| 1439 |
- [7:0] = nvm__fmt__spad_enables_rtn_5_
|
| 1440 |
*/
|
| 1441 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_6_ 0x0086 |
| 1442 |
/*!<
|
| 1443 |
type: uint8_t \n
|
| 1444 |
default: 0x00 \n
|
| 1445 |
info: \n
|
| 1446 |
- msb = 7
|
| 1447 |
- lsb = 0
|
| 1448 |
- i2c_size = 1
|
| 1449 |
|
| 1450 |
groups: \n
|
| 1451 |
['decoded_nvm_data']
|
| 1452 |
|
| 1453 |
fields: \n
|
| 1454 |
- [7:0] = nvm__fmt__spad_enables_rtn_6_
|
| 1455 |
*/
|
| 1456 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_7_ 0x0087 |
| 1457 |
/*!<
|
| 1458 |
type: uint8_t \n
|
| 1459 |
default: 0x00 \n
|
| 1460 |
info: \n
|
| 1461 |
- msb = 7
|
| 1462 |
- lsb = 0
|
| 1463 |
- i2c_size = 1
|
| 1464 |
|
| 1465 |
groups: \n
|
| 1466 |
['decoded_nvm_data']
|
| 1467 |
|
| 1468 |
fields: \n
|
| 1469 |
- [7:0] = nvm__fmt__spad_enables_rtn_7_
|
| 1470 |
*/
|
| 1471 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_8_ 0x0088 |
| 1472 |
/*!<
|
| 1473 |
type: uint8_t \n
|
| 1474 |
default: 0x00 \n
|
| 1475 |
info: \n
|
| 1476 |
- msb = 7
|
| 1477 |
- lsb = 0
|
| 1478 |
- i2c_size = 1
|
| 1479 |
|
| 1480 |
groups: \n
|
| 1481 |
['decoded_nvm_data']
|
| 1482 |
|
| 1483 |
fields: \n
|
| 1484 |
- [7:0] = nvm__fmt__spad_enables_rtn_8_
|
| 1485 |
*/
|
| 1486 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_9_ 0x0089 |
| 1487 |
/*!<
|
| 1488 |
type: uint8_t \n
|
| 1489 |
default: 0x00 \n
|
| 1490 |
info: \n
|
| 1491 |
- msb = 7
|
| 1492 |
- lsb = 0
|
| 1493 |
- i2c_size = 1
|
| 1494 |
|
| 1495 |
groups: \n
|
| 1496 |
['decoded_nvm_data']
|
| 1497 |
|
| 1498 |
fields: \n
|
| 1499 |
- [7:0] = nvm__fmt__spad_enables_rtn_9_
|
| 1500 |
*/
|
| 1501 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_10_ 0x008A |
| 1502 |
/*!<
|
| 1503 |
type: uint8_t \n
|
| 1504 |
default: 0x00 \n
|
| 1505 |
info: \n
|
| 1506 |
- msb = 7
|
| 1507 |
- lsb = 0
|
| 1508 |
- i2c_size = 1
|
| 1509 |
|
| 1510 |
groups: \n
|
| 1511 |
['decoded_nvm_data']
|
| 1512 |
|
| 1513 |
fields: \n
|
| 1514 |
- [7:0] = nvm__fmt__spad_enables_rtn_10_
|
| 1515 |
*/
|
| 1516 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_11_ 0x008B |
| 1517 |
/*!<
|
| 1518 |
type: uint8_t \n
|
| 1519 |
default: 0x00 \n
|
| 1520 |
info: \n
|
| 1521 |
- msb = 7
|
| 1522 |
- lsb = 0
|
| 1523 |
- i2c_size = 1
|
| 1524 |
|
| 1525 |
groups: \n
|
| 1526 |
['decoded_nvm_data']
|
| 1527 |
|
| 1528 |
fields: \n
|
| 1529 |
- [7:0] = nvm__fmt__spad_enables_rtn_11_
|
| 1530 |
*/
|
| 1531 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_12_ 0x008C |
| 1532 |
/*!<
|
| 1533 |
type: uint8_t \n
|
| 1534 |
default: 0x00 \n
|
| 1535 |
info: \n
|
| 1536 |
- msb = 7
|
| 1537 |
- lsb = 0
|
| 1538 |
- i2c_size = 1
|
| 1539 |
|
| 1540 |
groups: \n
|
| 1541 |
['decoded_nvm_data']
|
| 1542 |
|
| 1543 |
fields: \n
|
| 1544 |
- [7:0] = nvm__fmt__spad_enables_rtn_12_
|
| 1545 |
*/
|
| 1546 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_13_ 0x008D |
| 1547 |
/*!<
|
| 1548 |
type: uint8_t \n
|
| 1549 |
default: 0x00 \n
|
| 1550 |
info: \n
|
| 1551 |
- msb = 7
|
| 1552 |
- lsb = 0
|
| 1553 |
- i2c_size = 1
|
| 1554 |
|
| 1555 |
groups: \n
|
| 1556 |
['decoded_nvm_data']
|
| 1557 |
|
| 1558 |
fields: \n
|
| 1559 |
- [7:0] = nvm__fmt__spad_enables_rtn_13_
|
| 1560 |
*/
|
| 1561 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_14_ 0x008E |
| 1562 |
/*!<
|
| 1563 |
type: uint8_t \n
|
| 1564 |
default: 0x00 \n
|
| 1565 |
info: \n
|
| 1566 |
- msb = 7
|
| 1567 |
- lsb = 0
|
| 1568 |
- i2c_size = 1
|
| 1569 |
|
| 1570 |
groups: \n
|
| 1571 |
['decoded_nvm_data']
|
| 1572 |
|
| 1573 |
fields: \n
|
| 1574 |
- [7:0] = nvm__fmt__spad_enables_rtn_14_
|
| 1575 |
*/
|
| 1576 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_15_ 0x008F |
| 1577 |
/*!<
|
| 1578 |
type: uint8_t \n
|
| 1579 |
default: 0x00 \n
|
| 1580 |
info: \n
|
| 1581 |
- msb = 7
|
| 1582 |
- lsb = 0
|
| 1583 |
- i2c_size = 1
|
| 1584 |
|
| 1585 |
groups: \n
|
| 1586 |
['decoded_nvm_data']
|
| 1587 |
|
| 1588 |
fields: \n
|
| 1589 |
- [7:0] = nvm__fmt__spad_enables_rtn_15_
|
| 1590 |
*/
|
| 1591 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_16_ 0x0090 |
| 1592 |
/*!<
|
| 1593 |
type: uint8_t \n
|
| 1594 |
default: 0x00 \n
|
| 1595 |
info: \n
|
| 1596 |
- msb = 7
|
| 1597 |
- lsb = 0
|
| 1598 |
- i2c_size = 1
|
| 1599 |
|
| 1600 |
groups: \n
|
| 1601 |
['decoded_nvm_data']
|
| 1602 |
|
| 1603 |
fields: \n
|
| 1604 |
- [7:0] = nvm__fmt__spad_enables_rtn_16_
|
| 1605 |
*/
|
| 1606 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_17_ 0x0091 |
| 1607 |
/*!<
|
| 1608 |
type: uint8_t \n
|
| 1609 |
default: 0x00 \n
|
| 1610 |
info: \n
|
| 1611 |
- msb = 7
|
| 1612 |
- lsb = 0
|
| 1613 |
- i2c_size = 1
|
| 1614 |
|
| 1615 |
groups: \n
|
| 1616 |
['decoded_nvm_data']
|
| 1617 |
|
| 1618 |
fields: \n
|
| 1619 |
- [7:0] = nvm__fmt__spad_enables_rtn_17_
|
| 1620 |
*/
|
| 1621 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_18_ 0x0092 |
| 1622 |
/*!<
|
| 1623 |
type: uint8_t \n
|
| 1624 |
default: 0x00 \n
|
| 1625 |
info: \n
|
| 1626 |
- msb = 7
|
| 1627 |
- lsb = 0
|
| 1628 |
- i2c_size = 1
|
| 1629 |
|
| 1630 |
groups: \n
|
| 1631 |
['decoded_nvm_data']
|
| 1632 |
|
| 1633 |
fields: \n
|
| 1634 |
- [7:0] = nvm__fmt__spad_enables_rtn_18_
|
| 1635 |
*/
|
| 1636 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_19_ 0x0093 |
| 1637 |
/*!<
|
| 1638 |
type: uint8_t \n
|
| 1639 |
default: 0x00 \n
|
| 1640 |
info: \n
|
| 1641 |
- msb = 7
|
| 1642 |
- lsb = 0
|
| 1643 |
- i2c_size = 1
|
| 1644 |
|
| 1645 |
groups: \n
|
| 1646 |
['decoded_nvm_data']
|
| 1647 |
|
| 1648 |
fields: \n
|
| 1649 |
- [7:0] = nvm__fmt__spad_enables_rtn_19_
|
| 1650 |
*/
|
| 1651 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_20_ 0x0094 |
| 1652 |
/*!<
|
| 1653 |
type: uint8_t \n
|
| 1654 |
default: 0x00 \n
|
| 1655 |
info: \n
|
| 1656 |
- msb = 7
|
| 1657 |
- lsb = 0
|
| 1658 |
- i2c_size = 1
|
| 1659 |
|
| 1660 |
groups: \n
|
| 1661 |
['decoded_nvm_data']
|
| 1662 |
|
| 1663 |
fields: \n
|
| 1664 |
- [7:0] = nvm__fmt__spad_enables_rtn_20_
|
| 1665 |
*/
|
| 1666 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_21_ 0x0095 |
| 1667 |
/*!<
|
| 1668 |
type: uint8_t \n
|
| 1669 |
default: 0x00 \n
|
| 1670 |
info: \n
|
| 1671 |
- msb = 7
|
| 1672 |
- lsb = 0
|
| 1673 |
- i2c_size = 1
|
| 1674 |
|
| 1675 |
groups: \n
|
| 1676 |
['decoded_nvm_data']
|
| 1677 |
|
| 1678 |
fields: \n
|
| 1679 |
- [7:0] = nvm__fmt__spad_enables_rtn_21_
|
| 1680 |
*/
|
| 1681 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_22_ 0x0096 |
| 1682 |
/*!<
|
| 1683 |
type: uint8_t \n
|
| 1684 |
default: 0x00 \n
|
| 1685 |
info: \n
|
| 1686 |
- msb = 7
|
| 1687 |
- lsb = 0
|
| 1688 |
- i2c_size = 1
|
| 1689 |
|
| 1690 |
groups: \n
|
| 1691 |
['decoded_nvm_data']
|
| 1692 |
|
| 1693 |
fields: \n
|
| 1694 |
- [7:0] = nvm__fmt__spad_enables_rtn_22_
|
| 1695 |
*/
|
| 1696 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_23_ 0x0097 |
| 1697 |
/*!<
|
| 1698 |
type: uint8_t \n
|
| 1699 |
default: 0x00 \n
|
| 1700 |
info: \n
|
| 1701 |
- msb = 7
|
| 1702 |
- lsb = 0
|
| 1703 |
- i2c_size = 1
|
| 1704 |
|
| 1705 |
groups: \n
|
| 1706 |
['decoded_nvm_data']
|
| 1707 |
|
| 1708 |
fields: \n
|
| 1709 |
- [7:0] = nvm__fmt__spad_enables_rtn_23_
|
| 1710 |
*/
|
| 1711 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_24_ 0x0098 |
| 1712 |
/*!<
|
| 1713 |
type: uint8_t \n
|
| 1714 |
default: 0x00 \n
|
| 1715 |
info: \n
|
| 1716 |
- msb = 7
|
| 1717 |
- lsb = 0
|
| 1718 |
- i2c_size = 1
|
| 1719 |
|
| 1720 |
groups: \n
|
| 1721 |
['decoded_nvm_data']
|
| 1722 |
|
| 1723 |
fields: \n
|
| 1724 |
- [7:0] = nvm__fmt__spad_enables_rtn_24_
|
| 1725 |
*/
|
| 1726 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_25_ 0x0099 |
| 1727 |
/*!<
|
| 1728 |
type: uint8_t \n
|
| 1729 |
default: 0x00 \n
|
| 1730 |
info: \n
|
| 1731 |
- msb = 7
|
| 1732 |
- lsb = 0
|
| 1733 |
- i2c_size = 1
|
| 1734 |
|
| 1735 |
groups: \n
|
| 1736 |
['decoded_nvm_data']
|
| 1737 |
|
| 1738 |
fields: \n
|
| 1739 |
- [7:0] = nvm__fmt__spad_enables_rtn_25_
|
| 1740 |
*/
|
| 1741 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_26_ 0x009A |
| 1742 |
/*!<
|
| 1743 |
type: uint8_t \n
|
| 1744 |
default: 0x00 \n
|
| 1745 |
info: \n
|
| 1746 |
- msb = 7
|
| 1747 |
- lsb = 0
|
| 1748 |
- i2c_size = 1
|
| 1749 |
|
| 1750 |
groups: \n
|
| 1751 |
['decoded_nvm_data']
|
| 1752 |
|
| 1753 |
fields: \n
|
| 1754 |
- [7:0] = nvm__fmt__spad_enables_rtn_26_
|
| 1755 |
*/
|
| 1756 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_27_ 0x009B |
| 1757 |
/*!<
|
| 1758 |
type: uint8_t \n
|
| 1759 |
default: 0x00 \n
|
| 1760 |
info: \n
|
| 1761 |
- msb = 7
|
| 1762 |
- lsb = 0
|
| 1763 |
- i2c_size = 1
|
| 1764 |
|
| 1765 |
groups: \n
|
| 1766 |
['decoded_nvm_data']
|
| 1767 |
|
| 1768 |
fields: \n
|
| 1769 |
- [7:0] = nvm__fmt__spad_enables_rtn_27_
|
| 1770 |
*/
|
| 1771 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_28_ 0x009C |
| 1772 |
/*!<
|
| 1773 |
type: uint8_t \n
|
| 1774 |
default: 0x00 \n
|
| 1775 |
info: \n
|
| 1776 |
- msb = 7
|
| 1777 |
- lsb = 0
|
| 1778 |
- i2c_size = 1
|
| 1779 |
|
| 1780 |
groups: \n
|
| 1781 |
['decoded_nvm_data']
|
| 1782 |
|
| 1783 |
fields: \n
|
| 1784 |
- [7:0] = nvm__fmt__spad_enables_rtn_28_
|
| 1785 |
*/
|
| 1786 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_29_ 0x009D |
| 1787 |
/*!<
|
| 1788 |
type: uint8_t \n
|
| 1789 |
default: 0x00 \n
|
| 1790 |
info: \n
|
| 1791 |
- msb = 7
|
| 1792 |
- lsb = 0
|
| 1793 |
- i2c_size = 1
|
| 1794 |
|
| 1795 |
groups: \n
|
| 1796 |
['decoded_nvm_data']
|
| 1797 |
|
| 1798 |
fields: \n
|
| 1799 |
- [7:0] = nvm__fmt__spad_enables_rtn_29_
|
| 1800 |
*/
|
| 1801 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_30_ 0x009E |
| 1802 |
/*!<
|
| 1803 |
type: uint8_t \n
|
| 1804 |
default: 0x00 \n
|
| 1805 |
info: \n
|
| 1806 |
- msb = 7
|
| 1807 |
- lsb = 0
|
| 1808 |
- i2c_size = 1
|
| 1809 |
|
| 1810 |
groups: \n
|
| 1811 |
['decoded_nvm_data']
|
| 1812 |
|
| 1813 |
fields: \n
|
| 1814 |
- [7:0] = nvm__fmt__spad_enables_rtn_30_
|
| 1815 |
*/
|
| 1816 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_31_ 0x009F |
| 1817 |
/*!<
|
| 1818 |
type: uint8_t \n
|
| 1819 |
default: 0x00 \n
|
| 1820 |
info: \n
|
| 1821 |
- msb = 7
|
| 1822 |
- lsb = 0
|
| 1823 |
- i2c_size = 1
|
| 1824 |
|
| 1825 |
groups: \n
|
| 1826 |
['decoded_nvm_data']
|
| 1827 |
|
| 1828 |
fields: \n
|
| 1829 |
- [7:0] = nvm__fmt__spad_enables_rtn_31_
|
| 1830 |
*/
|
| 1831 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_0_ 0x00A0 |
| 1832 |
/*!<
|
| 1833 |
type: uint8_t \n
|
| 1834 |
default: 0x00 \n
|
| 1835 |
info: \n
|
| 1836 |
- msb = 7
|
| 1837 |
- lsb = 0
|
| 1838 |
- i2c_size = 1
|
| 1839 |
|
| 1840 |
groups: \n
|
| 1841 |
['decoded_nvm_data']
|
| 1842 |
|
| 1843 |
fields: \n
|
| 1844 |
- [7:0] = nvm__fmt__spad_enables_ref__loc1_0_
|
| 1845 |
*/
|
| 1846 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_1_ 0x00A1 |
| 1847 |
/*!<
|
| 1848 |
type: uint8_t \n
|
| 1849 |
default: 0x00 \n
|
| 1850 |
info: \n
|
| 1851 |
- msb = 7
|
| 1852 |
- lsb = 0
|
| 1853 |
- i2c_size = 1
|
| 1854 |
|
| 1855 |
groups: \n
|
| 1856 |
['decoded_nvm_data']
|
| 1857 |
|
| 1858 |
fields: \n
|
| 1859 |
- [7:0] = nvm__fmt__spad_enables_ref__loc1_1_
|
| 1860 |
*/
|
| 1861 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_2_ 0x00A2 |
| 1862 |
/*!<
|
| 1863 |
type: uint8_t \n
|
| 1864 |
default: 0x00 \n
|
| 1865 |
info: \n
|
| 1866 |
- msb = 7
|
| 1867 |
- lsb = 0
|
| 1868 |
- i2c_size = 1
|
| 1869 |
|
| 1870 |
groups: \n
|
| 1871 |
['decoded_nvm_data']
|
| 1872 |
|
| 1873 |
fields: \n
|
| 1874 |
- [7:0] = nvm__fmt__spad_enables_ref__loc1_2_
|
| 1875 |
*/
|
| 1876 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_3_ 0x00A3 |
| 1877 |
/*!<
|
| 1878 |
type: uint8_t \n
|
| 1879 |
default: 0x00 \n
|
| 1880 |
info: \n
|
| 1881 |
- msb = 7
|
| 1882 |
- lsb = 0
|
| 1883 |
- i2c_size = 1
|
| 1884 |
|
| 1885 |
groups: \n
|
| 1886 |
['decoded_nvm_data']
|
| 1887 |
|
| 1888 |
fields: \n
|
| 1889 |
- [7:0] = nvm__fmt__spad_enables_ref__loc1_3_
|
| 1890 |
*/
|
| 1891 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_4_ 0x00A4 |
| 1892 |
/*!<
|
| 1893 |
type: uint8_t \n
|
| 1894 |
default: 0x00 \n
|
| 1895 |
info: \n
|
| 1896 |
- msb = 7
|
| 1897 |
- lsb = 0
|
| 1898 |
- i2c_size = 1
|
| 1899 |
|
| 1900 |
groups: \n
|
| 1901 |
['decoded_nvm_data']
|
| 1902 |
|
| 1903 |
fields: \n
|
| 1904 |
- [7:0] = nvm__fmt__spad_enables_ref__loc1_4_
|
| 1905 |
*/
|
| 1906 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_5_ 0x00A5 |
| 1907 |
/*!<
|
| 1908 |
type: uint8_t \n
|
| 1909 |
default: 0x00 \n
|
| 1910 |
info: \n
|
| 1911 |
- msb = 7
|
| 1912 |
- lsb = 0
|
| 1913 |
- i2c_size = 1
|
| 1914 |
|
| 1915 |
groups: \n
|
| 1916 |
['decoded_nvm_data']
|
| 1917 |
|
| 1918 |
fields: \n
|
| 1919 |
- [7:0] = nvm__fmt__spad_enables_ref__loc1_5_
|
| 1920 |
*/
|
| 1921 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_0_ 0x00A8 |
| 1922 |
/*!<
|
| 1923 |
type: uint8_t \n
|
| 1924 |
default: 0x00 \n
|
| 1925 |
info: \n
|
| 1926 |
- msb = 7
|
| 1927 |
- lsb = 0
|
| 1928 |
- i2c_size = 1
|
| 1929 |
|
| 1930 |
groups: \n
|
| 1931 |
['decoded_nvm_data']
|
| 1932 |
|
| 1933 |
fields: \n
|
| 1934 |
- [7:0] = nvm__fmt__spad_enables_ref__loc2_0_
|
| 1935 |
*/
|
| 1936 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_1_ 0x00A9 |
| 1937 |
/*!<
|
| 1938 |
type: uint8_t \n
|
| 1939 |
default: 0x00 \n
|
| 1940 |
info: \n
|
| 1941 |
- msb = 7
|
| 1942 |
- lsb = 0
|
| 1943 |
- i2c_size = 1
|
| 1944 |
|
| 1945 |
groups: \n
|
| 1946 |
['decoded_nvm_data']
|
| 1947 |
|
| 1948 |
fields: \n
|
| 1949 |
- [7:0] = nvm__fmt__spad_enables_ref__loc2_1_
|
| 1950 |
*/
|
| 1951 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_2_ 0x00AA |
| 1952 |
/*!<
|
| 1953 |
type: uint8_t \n
|
| 1954 |
default: 0x00 \n
|
| 1955 |
info: \n
|
| 1956 |
- msb = 7
|
| 1957 |
- lsb = 0
|
| 1958 |
- i2c_size = 1
|
| 1959 |
|
| 1960 |
groups: \n
|
| 1961 |
['decoded_nvm_data']
|
| 1962 |
|
| 1963 |
fields: \n
|
| 1964 |
- [7:0] = nvm__fmt__spad_enables_ref__loc2_2_
|
| 1965 |
*/
|
| 1966 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_3_ 0x00AB |
| 1967 |
/*!<
|
| 1968 |
type: uint8_t \n
|
| 1969 |
default: 0x00 \n
|
| 1970 |
info: \n
|
| 1971 |
- msb = 7
|
| 1972 |
- lsb = 0
|
| 1973 |
- i2c_size = 1
|
| 1974 |
|
| 1975 |
groups: \n
|
| 1976 |
['decoded_nvm_data']
|
| 1977 |
|
| 1978 |
fields: \n
|
| 1979 |
- [7:0] = nvm__fmt__spad_enables_ref__loc2_3_
|
| 1980 |
*/
|
| 1981 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_4_ 0x00AC |
| 1982 |
/*!<
|
| 1983 |
type: uint8_t \n
|
| 1984 |
default: 0x00 \n
|
| 1985 |
info: \n
|
| 1986 |
- msb = 7
|
| 1987 |
- lsb = 0
|
| 1988 |
- i2c_size = 1
|
| 1989 |
|
| 1990 |
groups: \n
|
| 1991 |
['decoded_nvm_data']
|
| 1992 |
|
| 1993 |
fields: \n
|
| 1994 |
- [7:0] = nvm__fmt__spad_enables_ref__loc2_4_
|
| 1995 |
*/
|
| 1996 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_5_ 0x00AD |
| 1997 |
/*!<
|
| 1998 |
type: uint8_t \n
|
| 1999 |
default: 0x00 \n
|
| 2000 |
info: \n
|
| 2001 |
- msb = 7
|
| 2002 |
- lsb = 0
|
| 2003 |
- i2c_size = 1
|
| 2004 |
|
| 2005 |
groups: \n
|
| 2006 |
['decoded_nvm_data']
|
| 2007 |
|
| 2008 |
fields: \n
|
| 2009 |
- [7:0] = nvm__fmt__spad_enables_ref__loc2_5_
|
| 2010 |
*/
|
| 2011 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_0_ 0x00B0 |
| 2012 |
/*!<
|
| 2013 |
type: uint8_t \n
|
| 2014 |
default: 0x00 \n
|
| 2015 |
info: \n
|
| 2016 |
- msb = 7
|
| 2017 |
- lsb = 0
|
| 2018 |
- i2c_size = 1
|
| 2019 |
|
| 2020 |
groups: \n
|
| 2021 |
['decoded_nvm_data']
|
| 2022 |
|
| 2023 |
fields: \n
|
| 2024 |
- [7:0] = nvm__fmt__spad_enables_ref__loc3_0_
|
| 2025 |
*/
|
| 2026 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_1_ 0x00B1 |
| 2027 |
/*!<
|
| 2028 |
type: uint8_t \n
|
| 2029 |
default: 0x00 \n
|
| 2030 |
info: \n
|
| 2031 |
- msb = 7
|
| 2032 |
- lsb = 0
|
| 2033 |
- i2c_size = 1
|
| 2034 |
|
| 2035 |
groups: \n
|
| 2036 |
['decoded_nvm_data']
|
| 2037 |
|
| 2038 |
fields: \n
|
| 2039 |
- [7:0] = nvm__fmt__spad_enables_ref__loc3_1_
|
| 2040 |
*/
|
| 2041 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_2_ 0x00B2 |
| 2042 |
/*!<
|
| 2043 |
type: uint8_t \n
|
| 2044 |
default: 0x00 \n
|
| 2045 |
info: \n
|
| 2046 |
- msb = 7
|
| 2047 |
- lsb = 0
|
| 2048 |
- i2c_size = 1
|
| 2049 |
|
| 2050 |
groups: \n
|
| 2051 |
['decoded_nvm_data']
|
| 2052 |
|
| 2053 |
fields: \n
|
| 2054 |
- [7:0] = nvm__fmt__spad_enables_ref__loc3_2_
|
| 2055 |
*/
|
| 2056 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_3_ 0x00B3 |
| 2057 |
/*!<
|
| 2058 |
type: uint8_t \n
|
| 2059 |
default: 0x00 \n
|
| 2060 |
info: \n
|
| 2061 |
- msb = 7
|
| 2062 |
- lsb = 0
|
| 2063 |
- i2c_size = 1
|
| 2064 |
|
| 2065 |
groups: \n
|
| 2066 |
['decoded_nvm_data']
|
| 2067 |
|
| 2068 |
fields: \n
|
| 2069 |
- [7:0] = nvm__fmt__spad_enables_ref__loc3_3_
|
| 2070 |
*/
|
| 2071 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_4_ 0x00B4 |
| 2072 |
/*!<
|
| 2073 |
type: uint8_t \n
|
| 2074 |
default: 0x00 \n
|
| 2075 |
info: \n
|
| 2076 |
- msb = 7
|
| 2077 |
- lsb = 0
|
| 2078 |
- i2c_size = 1
|
| 2079 |
|
| 2080 |
groups: \n
|
| 2081 |
['decoded_nvm_data']
|
| 2082 |
|
| 2083 |
fields: \n
|
| 2084 |
- [7:0] = nvm__fmt__spad_enables_ref__loc3_4_
|
| 2085 |
*/
|
| 2086 |
#define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_5_ 0x00B5 |
| 2087 |
/*!<
|
| 2088 |
type: uint8_t \n
|
| 2089 |
default: 0x00 \n
|
| 2090 |
info: \n
|
| 2091 |
- msb = 7
|
| 2092 |
- lsb = 0
|
| 2093 |
- i2c_size = 1
|
| 2094 |
|
| 2095 |
groups: \n
|
| 2096 |
['decoded_nvm_data']
|
| 2097 |
|
| 2098 |
fields: \n
|
| 2099 |
- [7:0] = nvm__fmt__spad_enables_ref__loc3_5_
|
| 2100 |
*/
|
| 2101 |
#define VL53L1_NVM__FMT__ROI_CONFIG__MODE_ROI_CENTRE_SPAD 0x00B8 |
| 2102 |
/*!<
|
| 2103 |
type: uint8_t \n
|
| 2104 |
default: 0x00 \n
|
| 2105 |
info: \n
|
| 2106 |
- msb = 7
|
| 2107 |
- lsb = 0
|
| 2108 |
- i2c_size = 1
|
| 2109 |
|
| 2110 |
groups: \n
|
| 2111 |
['decoded_nvm_data']
|
| 2112 |
|
| 2113 |
fields: \n
|
| 2114 |
- [7:0] = nvm__fmt__roi_config__mode_roi_centre_spad
|
| 2115 |
*/
|
| 2116 |
#define VL53L1_NVM__FMT__ROI_CONFIG__MODE_ROI_XY_SIZE 0x00B9 |
| 2117 |
/*!<
|
| 2118 |
type: uint8_t \n
|
| 2119 |
default: 0x00 \n
|
| 2120 |
info: \n
|
| 2121 |
- msb = 7
|
| 2122 |
- lsb = 0
|
| 2123 |
- i2c_size = 1
|
| 2124 |
|
| 2125 |
groups: \n
|
| 2126 |
['decoded_nvm_data']
|
| 2127 |
|
| 2128 |
fields: \n
|
| 2129 |
- [7:4] = nvm__fmt__roi_config__mode_roi_x_size
|
| 2130 |
- [3:0] = nvm__fmt__roi_config__mode_roi_y_size
|
| 2131 |
*/
|
| 2132 |
#define VL53L1_NVM__FMT__REF_SPAD_APPLY__NUM_REQUESTED_REF_SPAD 0x00BC |
| 2133 |
/*!<
|
| 2134 |
type: uint8_t \n
|
| 2135 |
default: 0x00 \n
|
| 2136 |
info: \n
|
| 2137 |
- msb = 7
|
| 2138 |
- lsb = 0
|
| 2139 |
- i2c_size = 1
|
| 2140 |
|
| 2141 |
groups: \n
|
| 2142 |
['decoded_nvm_data']
|
| 2143 |
|
| 2144 |
fields: \n
|
| 2145 |
- [7:0] = nvm__fmt__ref_spad_apply__num_requested_ref_spad
|
| 2146 |
*/
|
| 2147 |
#define VL53L1_NVM__FMT__REF_SPAD_MAN__REF_LOCATION 0x00BD |
| 2148 |
/*!<
|
| 2149 |
type: uint8_t \n
|
| 2150 |
default: 0x00 \n
|
| 2151 |
info: \n
|
| 2152 |
- msb = 1
|
| 2153 |
- lsb = 0
|
| 2154 |
- i2c_size = 1
|
| 2155 |
|
| 2156 |
groups: \n
|
| 2157 |
['decoded_nvm_data']
|
| 2158 |
|
| 2159 |
fields: \n
|
| 2160 |
- [1:0] = nvm__fmt__ref_spad_man__ref_location
|
| 2161 |
*/
|
| 2162 |
#define VL53L1_NVM__FMT__MM_CONFIG__INNER_OFFSET_MM 0x00C0 |
| 2163 |
/*!<
|
| 2164 |
type: uint16_t \n
|
| 2165 |
default: 0x0000 \n
|
| 2166 |
info: \n
|
| 2167 |
- msb = 15
|
| 2168 |
- lsb = 0
|
| 2169 |
- i2c_size = 2
|
| 2170 |
|
| 2171 |
groups: \n
|
| 2172 |
['decoded_nvm_data']
|
| 2173 |
|
| 2174 |
fields: \n
|
| 2175 |
- [15:0] = nvm__fmt__mm_config__inner_offset_mm
|
| 2176 |
*/
|
| 2177 |
#define VL53L1_NVM__FMT__MM_CONFIG__OUTER_OFFSET_MM 0x00C2 |
| 2178 |
/*!<
|
| 2179 |
type: uint16_t \n
|
| 2180 |
default: 0x0000 \n
|
| 2181 |
info: \n
|
| 2182 |
- msb = 15
|
| 2183 |
- lsb = 0
|
| 2184 |
- i2c_size = 2
|
| 2185 |
|
| 2186 |
groups: \n
|
| 2187 |
['decoded_nvm_data']
|
| 2188 |
|
| 2189 |
fields: \n
|
| 2190 |
- [15:0] = nvm__fmt__mm_config__outer_offset_mm
|
| 2191 |
*/
|
| 2192 |
#define VL53L1_NVM__FMT__ALGO__PART_TO_PART_RANGE_OFFSET_MM 0x00C4 |
| 2193 |
/*!<
|
| 2194 |
type: uint16_t \n
|
| 2195 |
default: 0x0000 \n
|
| 2196 |
info: \n
|
| 2197 |
- msb = 11
|
| 2198 |
- lsb = 0
|
| 2199 |
- i2c_size = 2
|
| 2200 |
|
| 2201 |
groups: \n
|
| 2202 |
['decoded_nvm_data']
|
| 2203 |
|
| 2204 |
fields: \n
|
| 2205 |
- [11:0] = nvm__fmt__algo_part_to_part_range_offset_mm (fixed point 10.2)
|
| 2206 |
*/
|
| 2207 |
#define VL53L1_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS 0x00C8 |
| 2208 |
/*!<
|
| 2209 |
type: uint16_t \n
|
| 2210 |
default: 0x0000 \n
|
| 2211 |
info: \n
|
| 2212 |
- msb = 15
|
| 2213 |
- lsb = 0
|
| 2214 |
- i2c_size = 2
|
| 2215 |
|
| 2216 |
groups: \n
|
| 2217 |
['decoded_nvm_data']
|
| 2218 |
|
| 2219 |
fields: \n
|
| 2220 |
- [15:0] = nvm__fmt__algo__crosstalk_compensation_plane_offset_kcps (fixed point 7.9)
|
| 2221 |
*/
|
| 2222 |
#define VL53L1_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS 0x00CA |
| 2223 |
/*!<
|
| 2224 |
type: uint16_t \n
|
| 2225 |
default: 0x0000 \n
|
| 2226 |
info: \n
|
| 2227 |
- msb = 15
|
| 2228 |
- lsb = 0
|
| 2229 |
- i2c_size = 2
|
| 2230 |
|
| 2231 |
groups: \n
|
| 2232 |
['decoded_nvm_data']
|
| 2233 |
|
| 2234 |
fields: \n
|
| 2235 |
- [15:0] = nvm__fmt__algo__crosstalk_compensation_x_plane_gradient_kcps (fixed point 5.11)
|
| 2236 |
*/
|
| 2237 |
#define VL53L1_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS 0x00CC |
| 2238 |
/*!<
|
| 2239 |
type: uint16_t \n
|
| 2240 |
default: 0x0000 \n
|
| 2241 |
info: \n
|
| 2242 |
- msb = 15
|
| 2243 |
- lsb = 0
|
| 2244 |
- i2c_size = 2
|
| 2245 |
|
| 2246 |
groups: \n
|
| 2247 |
['decoded_nvm_data']
|
| 2248 |
|
| 2249 |
fields: \n
|
| 2250 |
- [15:0] = nvm__fmt__algo__crosstalk_compensation_y_plane_gradient_kcps (fixed point 5.11)
|
| 2251 |
*/
|
| 2252 |
#define VL53L1_NVM__FMT__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_0 0x00CE |
| 2253 |
/*!<
|
| 2254 |
type: uint8_t \n
|
| 2255 |
default: 0x00 \n
|
| 2256 |
info: \n
|
| 2257 |
- msb = 7
|
| 2258 |
- lsb = 0
|
| 2259 |
- i2c_size = 1
|
| 2260 |
|
| 2261 |
groups: \n
|
| 2262 |
['decoded_nvm_data']
|
| 2263 |
|
| 2264 |
fields: \n
|
| 2265 |
- [7:0] = nvm__fmt__spare__host_config__nvm_config_spare_0
|
| 2266 |
*/
|
| 2267 |
#define VL53L1_NVM__FMT__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_1 0x00CF |
| 2268 |
/*!<
|
| 2269 |
type: uint8_t \n
|
| 2270 |
default: 0x00 \n
|
| 2271 |
info: \n
|
| 2272 |
- msb = 7
|
| 2273 |
- lsb = 0
|
| 2274 |
- i2c_size = 1
|
| 2275 |
|
| 2276 |
groups: \n
|
| 2277 |
['decoded_nvm_data']
|
| 2278 |
|
| 2279 |
fields: \n
|
| 2280 |
- [7:0] = nvm__fmt__spare__host_config__nvm_config_spare_1
|
| 2281 |
*/
|
| 2282 |
#define VL53L1_NVM__CUSTOMER_NVM_SPACE_PROGRAMMED 0x00E0 |
| 2283 |
/*!<
|
| 2284 |
type: uint8_t \n
|
| 2285 |
default: 0x00 \n
|
| 2286 |
info: \n
|
| 2287 |
- msb = 7
|
| 2288 |
- lsb = 0
|
| 2289 |
- i2c_size = 1
|
| 2290 |
|
| 2291 |
groups: \n
|
| 2292 |
['decoded_nvm_data']
|
| 2293 |
|
| 2294 |
fields: \n
|
| 2295 |
- [7:0] = nvm__customer_space_programmed
|
| 2296 |
*/
|
| 2297 |
#define VL53L1_NVM__CUST__I2C_SLAVE__DEVICE_ADDRESS 0x00E4 |
| 2298 |
/*!<
|
| 2299 |
type: uint8_t \n
|
| 2300 |
default: 0x00 \n
|
| 2301 |
info: \n
|
| 2302 |
- msb = 7
|
| 2303 |
- lsb = 0
|
| 2304 |
- i2c_size = 1
|
| 2305 |
|
| 2306 |
groups: \n
|
| 2307 |
['decoded_nvm_data']
|
| 2308 |
|
| 2309 |
fields: \n
|
| 2310 |
- [7:0] = nvm__cust__i2c_device_address
|
| 2311 |
*/
|
| 2312 |
#define VL53L1_NVM__CUST__REF_SPAD_APPLY__NUM_REQUESTED_REF_SPAD 0x00E8 |
| 2313 |
/*!<
|
| 2314 |
type: uint8_t \n
|
| 2315 |
default: 0x00 \n
|
| 2316 |
info: \n
|
| 2317 |
- msb = 7
|
| 2318 |
- lsb = 0
|
| 2319 |
- i2c_size = 1
|
| 2320 |
|
| 2321 |
groups: \n
|
| 2322 |
['decoded_nvm_data']
|
| 2323 |
|
| 2324 |
fields: \n
|
| 2325 |
- [7:0] = nvm__cust__ref_spad_apply__num_requested_ref_spad
|
| 2326 |
*/
|
| 2327 |
#define VL53L1_NVM__CUST__REF_SPAD_MAN__REF_LOCATION 0x00E9 |
| 2328 |
/*!<
|
| 2329 |
type: uint8_t \n
|
| 2330 |
default: 0x00 \n
|
| 2331 |
info: \n
|
| 2332 |
- msb = 1
|
| 2333 |
- lsb = 0
|
| 2334 |
- i2c_size = 1
|
| 2335 |
|
| 2336 |
groups: \n
|
| 2337 |
['decoded_nvm_data']
|
| 2338 |
|
| 2339 |
fields: \n
|
| 2340 |
- [1:0] = nvm__cust__ref_spad_man__ref_location
|
| 2341 |
*/
|
| 2342 |
#define VL53L1_NVM__CUST__MM_CONFIG__INNER_OFFSET_MM 0x00EC |
| 2343 |
/*!<
|
| 2344 |
type: uint16_t \n
|
| 2345 |
default: 0x0000 \n
|
| 2346 |
info: \n
|
| 2347 |
- msb = 15
|
| 2348 |
- lsb = 0
|
| 2349 |
- i2c_size = 2
|
| 2350 |
|
| 2351 |
groups: \n
|
| 2352 |
['decoded_nvm_data']
|
| 2353 |
|
| 2354 |
fields: \n
|
| 2355 |
- [15:0] = nvm__cust__mm_config__inner_offset_mm
|
| 2356 |
*/
|
| 2357 |
#define VL53L1_NVM__CUST__MM_CONFIG__OUTER_OFFSET_MM 0x00EE |
| 2358 |
/*!<
|
| 2359 |
type: uint16_t \n
|
| 2360 |
default: 0x0000 \n
|
| 2361 |
info: \n
|
| 2362 |
- msb = 15
|
| 2363 |
- lsb = 0
|
| 2364 |
- i2c_size = 2
|
| 2365 |
|
| 2366 |
groups: \n
|
| 2367 |
['decoded_nvm_data']
|
| 2368 |
|
| 2369 |
fields: \n
|
| 2370 |
- [15:0] = nvm__cust__mm_config__outer_offset_mm
|
| 2371 |
*/
|
| 2372 |
#define VL53L1_NVM__CUST__ALGO__PART_TO_PART_RANGE_OFFSET_MM 0x00F0 |
| 2373 |
/*!<
|
| 2374 |
type: uint16_t \n
|
| 2375 |
default: 0x0000 \n
|
| 2376 |
info: \n
|
| 2377 |
- msb = 11
|
| 2378 |
- lsb = 0
|
| 2379 |
- i2c_size = 2
|
| 2380 |
|
| 2381 |
groups: \n
|
| 2382 |
['decoded_nvm_data']
|
| 2383 |
|
| 2384 |
fields: \n
|
| 2385 |
- [11:0] = nvm__cust__algo_part_to_part_range_offset_mm (fixed point 10.2)
|
| 2386 |
*/
|
| 2387 |
#define VL53L1_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS 0x00F4 |
| 2388 |
/*!<
|
| 2389 |
type: uint16_t \n
|
| 2390 |
default: 0x0000 \n
|
| 2391 |
info: \n
|
| 2392 |
- msb = 15
|
| 2393 |
- lsb = 0
|
| 2394 |
- i2c_size = 2
|
| 2395 |
|
| 2396 |
groups: \n
|
| 2397 |
['decoded_nvm_data']
|
| 2398 |
|
| 2399 |
fields: \n
|
| 2400 |
- [15:0] = nvm__cust__algo__crosstalk_compensation_plane_offset_kcps (fixed point 7.9)
|
| 2401 |
*/
|
| 2402 |
#define VL53L1_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS 0x00F6 |
| 2403 |
/*!<
|
| 2404 |
type: uint16_t \n
|
| 2405 |
default: 0x0000 \n
|
| 2406 |
info: \n
|
| 2407 |
- msb = 15
|
| 2408 |
- lsb = 0
|
| 2409 |
- i2c_size = 2
|
| 2410 |
|
| 2411 |
groups: \n
|
| 2412 |
['decoded_nvm_data']
|
| 2413 |
|
| 2414 |
fields: \n
|
| 2415 |
- [15:0] = nvm__cust__algo__crosstalk_compensation_x_plane_gradient_kcps (fixed point 5.11)
|
| 2416 |
*/
|
| 2417 |
#define VL53L1_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS 0x00F8 |
| 2418 |
/*!<
|
| 2419 |
type: uint16_t \n
|
| 2420 |
default: 0x0000 \n
|
| 2421 |
info: \n
|
| 2422 |
- msb = 15
|
| 2423 |
- lsb = 0
|
| 2424 |
- i2c_size = 2
|
| 2425 |
|
| 2426 |
groups: \n
|
| 2427 |
['decoded_nvm_data']
|
| 2428 |
|
| 2429 |
fields: \n
|
| 2430 |
- [15:0] = nvm__cust__algo__crosstalk_compensation_y_plane_gradient_kcps (fixed point 5.11)
|
| 2431 |
*/
|
| 2432 |
#define VL53L1_NVM__CUST__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_0 0x00FA |
| 2433 |
/*!<
|
| 2434 |
type: uint8_t \n
|
| 2435 |
default: 0x00 \n
|
| 2436 |
info: \n
|
| 2437 |
- msb = 7
|
| 2438 |
- lsb = 0
|
| 2439 |
- i2c_size = 1
|
| 2440 |
|
| 2441 |
groups: \n
|
| 2442 |
['decoded_nvm_data']
|
| 2443 |
|
| 2444 |
fields: \n
|
| 2445 |
- [7:0] = nvm__cust__spare__host_config__nvm_config_spare_0
|
| 2446 |
*/
|
| 2447 |
#define VL53L1_NVM__CUST__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_1 0x00FB |
| 2448 |
/*!<
|
| 2449 |
type: uint8_t \n
|
| 2450 |
default: 0x00 \n
|
| 2451 |
info: \n
|
| 2452 |
- msb = 7
|
| 2453 |
- lsb = 0
|
| 2454 |
- i2c_size = 1
|
| 2455 |
|
| 2456 |
groups: \n
|
| 2457 |
['decoded_nvm_data']
|
| 2458 |
|
| 2459 |
fields: \n
|
| 2460 |
- [7:0] = nvm__cust__spare__host_config__nvm_config_spare_1
|
| 2461 |
*/
|
| 2462 |
#define VL53L1_NVM__FMT__FGC__BYTE_0 0x01DC |
| 2463 |
/*!<
|
| 2464 |
type: char \n
|
| 2465 |
default: 0x00 \n
|
| 2466 |
info: \n
|
| 2467 |
- msb = 7
|
| 2468 |
- lsb = 1
|
| 2469 |
- i2c_size = 1
|
| 2470 |
|
| 2471 |
groups: \n
|
| 2472 |
['decoded_nvm_data']
|
| 2473 |
|
| 2474 |
fields: \n
|
| 2475 |
- [7:1] = nvm__fmt__fgc_0_
|
| 2476 |
*/
|
| 2477 |
#define VL53L1_NVM__FMT__FGC__BYTE_1 0x01DD |
| 2478 |
/*!<
|
| 2479 |
type: char \n
|
| 2480 |
default: 0x0000 \n
|
| 2481 |
info: \n
|
| 2482 |
- msb = 8
|
| 2483 |
- lsb = 2
|
| 2484 |
- i2c_size = 2
|
| 2485 |
|
| 2486 |
groups: \n
|
| 2487 |
['decoded_nvm_data']
|
| 2488 |
|
| 2489 |
fields: \n
|
| 2490 |
- [8:2] = nvm__fmt__fgc_1_
|
| 2491 |
*/
|
| 2492 |
#define VL53L1_NVM__FMT__FGC__BYTE_2 0x01DE |
| 2493 |
/*!<
|
| 2494 |
type: char \n
|
| 2495 |
default: 0x0000 \n
|
| 2496 |
info: \n
|
| 2497 |
- msb = 9
|
| 2498 |
- lsb = 3
|
| 2499 |
- i2c_size = 2
|
| 2500 |
|
| 2501 |
groups: \n
|
| 2502 |
['decoded_nvm_data']
|
| 2503 |
|
| 2504 |
fields: \n
|
| 2505 |
- [9:3] = nvm__fmt__fgc_2_
|
| 2506 |
*/
|
| 2507 |
#define VL53L1_NVM__FMT__FGC__BYTE_3 0x01DF |
| 2508 |
/*!<
|
| 2509 |
type: char \n
|
| 2510 |
default: 0x0000 \n
|
| 2511 |
info: \n
|
| 2512 |
- msb = 10
|
| 2513 |
- lsb = 4
|
| 2514 |
- i2c_size = 2
|
| 2515 |
|
| 2516 |
groups: \n
|
| 2517 |
['decoded_nvm_data']
|
| 2518 |
|
| 2519 |
fields: \n
|
| 2520 |
- [10:4] = nvm__fmt__fgc_3_
|
| 2521 |
*/
|
| 2522 |
#define VL53L1_NVM__FMT__FGC__BYTE_4 0x01E0 |
| 2523 |
/*!<
|
| 2524 |
type: char \n
|
| 2525 |
default: 0x0000 \n
|
| 2526 |
info: \n
|
| 2527 |
- msb = 11
|
| 2528 |
- lsb = 5
|
| 2529 |
- i2c_size = 2
|
| 2530 |
|
| 2531 |
groups: \n
|
| 2532 |
['decoded_nvm_data']
|
| 2533 |
|
| 2534 |
fields: \n
|
| 2535 |
- [11:5] = nvm__fmt__fgc_4_
|
| 2536 |
*/
|
| 2537 |
#define VL53L1_NVM__FMT__FGC__BYTE_5 0x01E1 |
| 2538 |
/*!<
|
| 2539 |
type: char \n
|
| 2540 |
default: 0x0000 \n
|
| 2541 |
info: \n
|
| 2542 |
- msb = 12
|
| 2543 |
- lsb = 6
|
| 2544 |
- i2c_size = 2
|
| 2545 |
|
| 2546 |
groups: \n
|
| 2547 |
['decoded_nvm_data']
|
| 2548 |
|
| 2549 |
fields: \n
|
| 2550 |
- [12:6] = nvm__fmt__fgc_5_
|
| 2551 |
*/
|
| 2552 |
#define VL53L1_NVM__FMT__FGC__BYTE_6 0x01E2 |
| 2553 |
/*!<
|
| 2554 |
type: char \n
|
| 2555 |
default: 0x0000 \n
|
| 2556 |
info: \n
|
| 2557 |
- msb = 13
|
| 2558 |
- lsb = 0
|
| 2559 |
- i2c_size = 2
|
| 2560 |
|
| 2561 |
groups: \n
|
| 2562 |
['decoded_nvm_data']
|
| 2563 |
|
| 2564 |
fields: \n
|
| 2565 |
- [13:7] = nvm__fmt__fgc_6_
|
| 2566 |
- [6:0] = nvm__fmt__fgc_7_
|
| 2567 |
*/
|
| 2568 |
#define VL53L1_NVM__FMT__FGC__BYTE_7 0x01E3 |
| 2569 |
/*!<
|
| 2570 |
type: char \n
|
| 2571 |
default: 0x00 \n
|
| 2572 |
info: \n
|
| 2573 |
- msb = 7
|
| 2574 |
- lsb = 1
|
| 2575 |
- i2c_size = 1
|
| 2576 |
|
| 2577 |
groups: \n
|
| 2578 |
['decoded_nvm_data']
|
| 2579 |
|
| 2580 |
fields: \n
|
| 2581 |
- [7:1] = nvm__fmt__fgc_8_
|
| 2582 |
*/
|
| 2583 |
#define VL53L1_NVM__FMT__FGC__BYTE_8 0x01E4 |
| 2584 |
/*!<
|
| 2585 |
type: char \n
|
| 2586 |
default: 0x0000 \n
|
| 2587 |
info: \n
|
| 2588 |
- msb = 8
|
| 2589 |
- lsb = 2
|
| 2590 |
- i2c_size = 2
|
| 2591 |
|
| 2592 |
groups: \n
|
| 2593 |
['decoded_nvm_data']
|
| 2594 |
|
| 2595 |
fields: \n
|
| 2596 |
- [8:2] = nvm__fmt__fgc_9_
|
| 2597 |
*/
|
| 2598 |
#define VL53L1_NVM__FMT__FGC__BYTE_9 0x01E5 |
| 2599 |
/*!<
|
| 2600 |
type: char \n
|
| 2601 |
default: 0x0000 \n
|
| 2602 |
info: \n
|
| 2603 |
- msb = 9
|
| 2604 |
- lsb = 3
|
| 2605 |
- i2c_size = 2
|
| 2606 |
|
| 2607 |
groups: \n
|
| 2608 |
['decoded_nvm_data']
|
| 2609 |
|
| 2610 |
fields: \n
|
| 2611 |
- [9:3] = nvm__fmt__fgc_10_
|
| 2612 |
*/
|
| 2613 |
#define VL53L1_NVM__FMT__FGC__BYTE_10 0x01E6 |
| 2614 |
/*!<
|
| 2615 |
type: char \n
|
| 2616 |
default: 0x0000 \n
|
| 2617 |
info: \n
|
| 2618 |
- msb = 10
|
| 2619 |
- lsb = 4
|
| 2620 |
- i2c_size = 2
|
| 2621 |
|
| 2622 |
groups: \n
|
| 2623 |
['decoded_nvm_data']
|
| 2624 |
|
| 2625 |
fields: \n
|
| 2626 |
- [10:4] = nvm__fmt__fgc_11_
|
| 2627 |
*/
|
| 2628 |
#define VL53L1_NVM__FMT__FGC__BYTE_11 0x01E7 |
| 2629 |
/*!<
|
| 2630 |
type: char \n
|
| 2631 |
default: 0x0000 \n
|
| 2632 |
info: \n
|
| 2633 |
- msb = 11
|
| 2634 |
- lsb = 5
|
| 2635 |
- i2c_size = 2
|
| 2636 |
|
| 2637 |
groups: \n
|
| 2638 |
['decoded_nvm_data']
|
| 2639 |
|
| 2640 |
fields: \n
|
| 2641 |
- [11:5] = nvm__fmt__fgc_12_
|
| 2642 |
*/
|
| 2643 |
#define VL53L1_NVM__FMT__FGC__BYTE_12 0x01E8 |
| 2644 |
/*!<
|
| 2645 |
type: char \n
|
| 2646 |
default: 0x0000 \n
|
| 2647 |
info: \n
|
| 2648 |
- msb = 12
|
| 2649 |
- lsb = 6
|
| 2650 |
- i2c_size = 2
|
| 2651 |
|
| 2652 |
groups: \n
|
| 2653 |
['decoded_nvm_data']
|
| 2654 |
|
| 2655 |
fields: \n
|
| 2656 |
- [12:6] = nvm__fmt__fgc_13_
|
| 2657 |
*/
|
| 2658 |
#define VL53L1_NVM__FMT__FGC__BYTE_13 0x01E9 |
| 2659 |
/*!<
|
| 2660 |
type: char \n
|
| 2661 |
default: 0x0000 \n
|
| 2662 |
info: \n
|
| 2663 |
- msb = 13
|
| 2664 |
- lsb = 0
|
| 2665 |
- i2c_size = 2
|
| 2666 |
|
| 2667 |
groups: \n
|
| 2668 |
['decoded_nvm_data']
|
| 2669 |
|
| 2670 |
fields: \n
|
| 2671 |
- [13:7] = nvm__fmt__fgc_14_
|
| 2672 |
- [6:0] = nvm__fmt__fgc_15_
|
| 2673 |
*/
|
| 2674 |
#define VL53L1_NVM__FMT__FGC__BYTE_14 0x01EA |
| 2675 |
/*!<
|
| 2676 |
type: char \n
|
| 2677 |
default: 0x00 \n
|
| 2678 |
info: \n
|
| 2679 |
- msb = 7
|
| 2680 |
- lsb = 1
|
| 2681 |
- i2c_size = 1
|
| 2682 |
|
| 2683 |
groups: \n
|
| 2684 |
['decoded_nvm_data']
|
| 2685 |
|
| 2686 |
fields: \n
|
| 2687 |
- [7:1] = nvm__fmt__fgc_16_
|
| 2688 |
*/
|
| 2689 |
#define VL53L1_NVM__FMT__FGC__BYTE_15 0x01EB |
| 2690 |
/*!<
|
| 2691 |
type: char \n
|
| 2692 |
default: 0x0000 \n
|
| 2693 |
info: \n
|
| 2694 |
- msb = 8
|
| 2695 |
- lsb = 2
|
| 2696 |
- i2c_size = 2
|
| 2697 |
|
| 2698 |
groups: \n
|
| 2699 |
['decoded_nvm_data']
|
| 2700 |
|
| 2701 |
fields: \n
|
| 2702 |
- [8:2] = nvm__fmt__fgc_17_
|
| 2703 |
*/
|
| 2704 |
#define VL53L1_NVM__FMT__TEST_PROGRAM_MAJOR_MINOR 0x01EC |
| 2705 |
/*!<
|
| 2706 |
type: uint8_t \n
|
| 2707 |
default: 0x00 \n
|
| 2708 |
info: \n
|
| 2709 |
- msb = 7
|
| 2710 |
- lsb = 0
|
| 2711 |
- i2c_size = 1
|
| 2712 |
|
| 2713 |
groups: \n
|
| 2714 |
['decoded_nvm_data']
|
| 2715 |
|
| 2716 |
fields: \n
|
| 2717 |
- [7:5] = nvm__fmt__test_program_major
|
| 2718 |
- [4:0] = nvm__fmt__test_program_minor
|
| 2719 |
*/
|
| 2720 |
#define VL53L1_NVM__FMT__MAP_MAJOR_MINOR 0x01ED |
| 2721 |
/*!<
|
| 2722 |
type: uint8_t \n
|
| 2723 |
default: 0x00 \n
|
| 2724 |
info: \n
|
| 2725 |
- msb = 7
|
| 2726 |
- lsb = 0
|
| 2727 |
- i2c_size = 1
|
| 2728 |
|
| 2729 |
groups: \n
|
| 2730 |
['decoded_nvm_data']
|
| 2731 |
|
| 2732 |
fields: \n
|
| 2733 |
- [7:5] = nvm__fmt__map_major
|
| 2734 |
- [4:0] = nvm__fmt__map_minor
|
| 2735 |
*/
|
| 2736 |
#define VL53L1_NVM__FMT__YEAR_MONTH 0x01EE |
| 2737 |
/*!<
|
| 2738 |
type: uint8_t \n
|
| 2739 |
default: 0x00 \n
|
| 2740 |
info: \n
|
| 2741 |
- msb = 7
|
| 2742 |
- lsb = 0
|
| 2743 |
- i2c_size = 1
|
| 2744 |
|
| 2745 |
groups: \n
|
| 2746 |
['decoded_nvm_data']
|
| 2747 |
|
| 2748 |
fields: \n
|
| 2749 |
- [7:4] = nvm__fmt__year
|
| 2750 |
- [3:0] = nvm__fmt__month
|
| 2751 |
*/
|
| 2752 |
#define VL53L1_NVM__FMT__DAY_MODULE_DATE_PHASE 0x01EF |
| 2753 |
/*!<
|
| 2754 |
type: uint8_t \n
|
| 2755 |
default: 0x00 \n
|
| 2756 |
info: \n
|
| 2757 |
- msb = 7
|
| 2758 |
- lsb = 0
|
| 2759 |
- i2c_size = 1
|
| 2760 |
|
| 2761 |
groups: \n
|
| 2762 |
['decoded_nvm_data']
|
| 2763 |
|
| 2764 |
fields: \n
|
| 2765 |
- [7:3] = nvm__fmt__day
|
| 2766 |
- [2:0] = nvm__fmt__module_date_phase
|
| 2767 |
*/
|
| 2768 |
#define VL53L1_NVM__FMT__TIME 0x01F0 |
| 2769 |
/*!<
|
| 2770 |
type: uint16_t \n
|
| 2771 |
default: 0x0000 \n
|
| 2772 |
info: \n
|
| 2773 |
- msb = 15
|
| 2774 |
- lsb = 0
|
| 2775 |
- i2c_size = 2
|
| 2776 |
|
| 2777 |
groups: \n
|
| 2778 |
['decoded_nvm_data']
|
| 2779 |
|
| 2780 |
fields: \n
|
| 2781 |
- [15:0] = nvm__fmt__time
|
| 2782 |
*/
|
| 2783 |
#define VL53L1_NVM__FMT__TESTER_ID 0x01F2 |
| 2784 |
/*!<
|
| 2785 |
type: uint8_t \n
|
| 2786 |
default: 0x00 \n
|
| 2787 |
info: \n
|
| 2788 |
- msb = 7
|
| 2789 |
- lsb = 0
|
| 2790 |
- i2c_size = 1
|
| 2791 |
|
| 2792 |
groups: \n
|
| 2793 |
['decoded_nvm_data']
|
| 2794 |
|
| 2795 |
fields: \n
|
| 2796 |
- [7:0] = nvm__fmt__tester_id
|
| 2797 |
*/
|
| 2798 |
#define VL53L1_NVM__FMT__SITE_ID 0x01F3 |
| 2799 |
/*!<
|
| 2800 |
type: uint8_t \n
|
| 2801 |
default: 0x00 \n
|
| 2802 |
info: \n
|
| 2803 |
- msb = 7
|
| 2804 |
- lsb = 0
|
| 2805 |
- i2c_size = 1
|
| 2806 |
|
| 2807 |
groups: \n
|
| 2808 |
['decoded_nvm_data']
|
| 2809 |
|
| 2810 |
fields: \n
|
| 2811 |
- [7:0] = nvm__fmt__site_id
|
| 2812 |
*/
|
| 2813 |
#define VL53L1_NVM__EWS__TEST_PROGRAM_MAJOR_MINOR 0x01F4 |
| 2814 |
/*!<
|
| 2815 |
type: uint8_t \n
|
| 2816 |
default: 0x00 \n
|
| 2817 |
info: \n
|
| 2818 |
- msb = 7
|
| 2819 |
- lsb = 0
|
| 2820 |
- i2c_size = 1
|
| 2821 |
|
| 2822 |
groups: \n
|
| 2823 |
['decoded_nvm_data']
|
| 2824 |
|
| 2825 |
fields: \n
|
| 2826 |
- [7:5] = nvm__ews__test_program_major
|
| 2827 |
- [4:0] = nvm__ews__test_program_minor
|
| 2828 |
*/
|
| 2829 |
#define VL53L1_NVM__EWS__PROBE_CARD_MAJOR_MINOR 0x01F5 |
| 2830 |
/*!<
|
| 2831 |
type: uint8_t \n
|
| 2832 |
default: 0x00 \n
|
| 2833 |
info: \n
|
| 2834 |
- msb = 7
|
| 2835 |
- lsb = 0
|
| 2836 |
- i2c_size = 1
|
| 2837 |
|
| 2838 |
groups: \n
|
| 2839 |
['decoded_nvm_data']
|
| 2840 |
|
| 2841 |
fields: \n
|
| 2842 |
- [7:4] = nvm__ews__probe_card_major
|
| 2843 |
- [3:0] = nvm__ews__probe_card_minor
|
| 2844 |
*/
|
| 2845 |
#define VL53L1_NVM__EWS__TESTER_ID 0x01F6 |
| 2846 |
/*!<
|
| 2847 |
type: uint8_t \n
|
| 2848 |
default: 0x00 \n
|
| 2849 |
info: \n
|
| 2850 |
- msb = 7
|
| 2851 |
- lsb = 0
|
| 2852 |
- i2c_size = 1
|
| 2853 |
|
| 2854 |
groups: \n
|
| 2855 |
['decoded_nvm_data']
|
| 2856 |
|
| 2857 |
fields: \n
|
| 2858 |
- [7:0] = nvm__ews__tester_id
|
| 2859 |
*/
|
| 2860 |
#define VL53L1_NVM__EWS__LOT__BYTE_0 0x01F8 |
| 2861 |
/*!<
|
| 2862 |
type: char \n
|
| 2863 |
default: 0x00 \n
|
| 2864 |
info: \n
|
| 2865 |
- msb = 7
|
| 2866 |
- lsb = 2
|
| 2867 |
- i2c_size = 1
|
| 2868 |
|
| 2869 |
groups: \n
|
| 2870 |
['decoded_nvm_data']
|
| 2871 |
|
| 2872 |
fields: \n
|
| 2873 |
- [7:2] = nvm__ews__lot_6_
|
| 2874 |
*/
|
| 2875 |
#define VL53L1_NVM__EWS__LOT__BYTE_1 0x01F9 |
| 2876 |
/*!<
|
| 2877 |
type: char \n
|
| 2878 |
default: 0x0000 \n
|
| 2879 |
info: \n
|
| 2880 |
- msb = 9
|
| 2881 |
- lsb = 4
|
| 2882 |
- i2c_size = 2
|
| 2883 |
|
| 2884 |
groups: \n
|
| 2885 |
['decoded_nvm_data']
|
| 2886 |
|
| 2887 |
fields: \n
|
| 2888 |
- [9:4] = nvm__ews__lot_5_
|
| 2889 |
*/
|
| 2890 |
#define VL53L1_NVM__EWS__LOT__BYTE_2 0x01FA |
| 2891 |
/*!<
|
| 2892 |
type: char \n
|
| 2893 |
default: 0x0000 \n
|
| 2894 |
info: \n
|
| 2895 |
- msb = 11
|
| 2896 |
- lsb = 0
|
| 2897 |
- i2c_size = 2
|
| 2898 |
|
| 2899 |
groups: \n
|
| 2900 |
['decoded_nvm_data']
|
| 2901 |
|
| 2902 |
fields: \n
|
| 2903 |
- [11:6] = nvm__ews__lot_4_
|
| 2904 |
- [5:0] = nvm__ews__lot_3_
|
| 2905 |
*/
|
| 2906 |
#define VL53L1_NVM__EWS__LOT__BYTE_3 0x01FB |
| 2907 |
/*!<
|
| 2908 |
type: char \n
|
| 2909 |
default: 0x00 \n
|
| 2910 |
info: \n
|
| 2911 |
- msb = 7
|
| 2912 |
- lsb = 2
|
| 2913 |
- i2c_size = 1
|
| 2914 |
|
| 2915 |
groups: \n
|
| 2916 |
['decoded_nvm_data']
|
| 2917 |
|
| 2918 |
fields: \n
|
| 2919 |
- [7:2] = nvm__ews__lot_2_
|
| 2920 |
*/
|
| 2921 |
#define VL53L1_NVM__EWS__LOT__BYTE_4 0x01FC |
| 2922 |
/*!<
|
| 2923 |
type: char \n
|
| 2924 |
default: 0x0000 \n
|
| 2925 |
info: \n
|
| 2926 |
- msb = 9
|
| 2927 |
- lsb = 4
|
| 2928 |
- i2c_size = 2
|
| 2929 |
|
| 2930 |
groups: \n
|
| 2931 |
['decoded_nvm_data']
|
| 2932 |
|
| 2933 |
fields: \n
|
| 2934 |
- [9:4] = nvm__ews__lot_1_
|
| 2935 |
*/
|
| 2936 |
#define VL53L1_NVM__EWS__LOT__BYTE_5 0x01FD |
| 2937 |
/*!<
|
| 2938 |
type: char \n
|
| 2939 |
default: 0x0000 \n
|
| 2940 |
info: \n
|
| 2941 |
- msb = 11
|
| 2942 |
- lsb = 6
|
| 2943 |
- i2c_size = 2
|
| 2944 |
|
| 2945 |
groups: \n
|
| 2946 |
['decoded_nvm_data']
|
| 2947 |
|
| 2948 |
fields: \n
|
| 2949 |
- [11:6] = nvm__ews__lot_0_
|
| 2950 |
*/
|
| 2951 |
#define VL53L1_NVM__EWS__WAFER 0x01FD |
| 2952 |
/*!<
|
| 2953 |
type: uint8_t \n
|
| 2954 |
default: 0x00 \n
|
| 2955 |
info: \n
|
| 2956 |
- msb = 4
|
| 2957 |
- lsb = 0
|
| 2958 |
- i2c_size = 1
|
| 2959 |
|
| 2960 |
groups: \n
|
| 2961 |
['decoded_nvm_data']
|
| 2962 |
|
| 2963 |
fields: \n
|
| 2964 |
- [4:0] = nvm__ews__wafer
|
| 2965 |
*/
|
| 2966 |
#define VL53L1_NVM__EWS__XCOORD 0x01FE |
| 2967 |
/*!<
|
| 2968 |
type: uint8_t \n
|
| 2969 |
default: 0x00 \n
|
| 2970 |
info: \n
|
| 2971 |
- msb = 7
|
| 2972 |
- lsb = 0
|
| 2973 |
- i2c_size = 1
|
| 2974 |
|
| 2975 |
groups: \n
|
| 2976 |
['decoded_nvm_data']
|
| 2977 |
|
| 2978 |
fields: \n
|
| 2979 |
- [7:0] = nvm__ews__xcoord
|
| 2980 |
*/
|
| 2981 |
#define VL53L1_NVM__EWS__YCOORD 0x01FF |
| 2982 |
/*!<
|
| 2983 |
type: uint8_t \n
|
| 2984 |
default: 0x00 \n
|
| 2985 |
info: \n
|
| 2986 |
- msb = 7
|
| 2987 |
- lsb = 0
|
| 2988 |
- i2c_size = 1
|
| 2989 |
|
| 2990 |
groups: \n
|
| 2991 |
['decoded_nvm_data']
|
| 2992 |
|
| 2993 |
fields: \n
|
| 2994 |
- [7:0] = nvm__ews__ycoord
|
| 2995 |
*/
|
| 2996 |
|
| 2997 |
#define VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_INDEX 0x00B8 |
| 2998 |
#define VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_SIZE 4 |
| 2999 |
|
| 3000 |
#define VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_INDEX 0x015C |
| 3001 |
#define VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_SIZE 56 |
| 3002 |
|
| 3003 |
#define VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_INDEX 0x0194 |
| 3004 |
#define VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_SIZE 8 |
| 3005 |
|
| 3006 |
#define VL53L1_NVM__FMT__RANGE_RESULTS__140MM_MM_PRE_RANGE 0x019C |
| 3007 |
#define VL53L1_NVM__FMT__RANGE_RESULTS__140MM_DARK 0x01AC |
| 3008 |
#define VL53L1_NVM__FMT__RANGE_RESULTS__400MM_DARK 0x01BC |
| 3009 |
#define VL53L1_NVM__FMT__RANGE_RESULTS__400MM_AMBIENT 0x01CC |
| 3010 |
#define VL53L1_NVM__FMT__RANGE_RESULTS__SIZE_BYTES 16 |
| 3011 |
|
| 3012 |
/** @} VL53L1_nvm_DefineRegisters_group */
|
| 3013 |
|
| 3014 |
|
| 3015 |
|
| 3016 |
|
| 3017 |
|
| 3018 |
#ifdef __cplusplus
|
| 3019 |
} |
| 3020 |
#endif
|
| 3021 |
|
| 3022 |
#endif
|