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amiro-lld / include / VL53L0X / v1 / alld_VL53L0X_v1.h @ 6ebebd4d

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/*
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AMiRo-LLD is a compilation of low-level hardware drivers for the Autonomous Mini Robot (AMiRo) platform.
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Copyright (C) 2016..2019  Thomas Schöpping et al.
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU Lesser General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public License
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along with this program.  If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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 * @file    alld_VL53L0X_v1.h
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 * @brief   Proximity Sensor macros and structures.
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 *
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 * @addtogroup lld_proximity
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 * @{
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 */
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#ifndef AMIROLLD_VL53L0X_V1_H
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#define AMIROLLD_VL53L0X_V1_H
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#include <stdbool.h>
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#include <string.h>
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//debugging
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//#include <aos_thread.h>
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#include <stdint.h>
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#include <stdarg.h>
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#include "chprintf.h"
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//includes api st vl53l0x
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#include <vl53l0x_api.h>
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//#include "vl53l0x_platform.h"
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#if (defined(AMIROLLD_CFG_VL53L0X) && (AMIROLLD_CFG_VL53L0X == 1)) || defined(__DOXYGEN__)
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/******************************************************************************/
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/* CONSTANTS                                                                  */
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/******************************************************************************/
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/**
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 * @brief Fixed slave address to access the VL53L0X via I2C.
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 *
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 * VCNL4020 had 0010011 = 13h == 0x13u
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 * VL53L0X  has 0101001 = 29h == 0x29u and the last bit is read(0x53)/write(0x52)
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 *
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 */
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#define VL53L0X_LLD_I2C_ADDR           0x29u
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/**
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 * @brief Maximum frequency for I2C communication.
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 *
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 * VL53L0X has 400 kHz
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 *
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 */
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#define VL53L0X_LLD_I2C_MAXFREQUENCY   200000
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/**
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 * @brief A falling edge indicates an interrupt.
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 *
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 * VL53L0X has an interrupt on a falling or rising edge, it can be set.
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 *
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 */
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#define VL53L0X_LLD_INT_EDGE           APAL_GPIO_EDGE_FALLING
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/**
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 *@brief use the 2.8V mode for the VL53L0X Sensor
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 */
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#define USE_I2C_2V8
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/**
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 * @brief Adresses of all registers of the VL53L0X.
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 */
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/******************************************************************************/
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/* SETTINGS                                                                   */
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/******************************************************************************/
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/******************************************************************************/
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/* CHECKS                                                                     */
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/******************************************************************************/
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/******************************************************************************/
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/* DATA STRUCTURES AND TYPES                                                  */
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/******************************************************************************/
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/**
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 * @brief The VL53L0X driver struct, the apalI2CDriver_t I2C Driver is inside the VL53L0X_Dev_t structur.
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 */
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typedef struct {
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  VL53L0X_Dev_t vl53l0x_dev;
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} VL53L0XDriver;
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/**
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 * @brief Adresses for the several I/O registers of the VCNL4020.
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 */
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typedef enum {
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    VL53L0X_REG_SYSRANGE_START_API = VL53L0X_REG_SYSRANGE_START,
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    VL53L0X_REG_SYSRANGE_MODE_MASK_API = VL53L0X_REG_SYSRANGE_MODE_MASK,
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    VL53L0X_REG_SYSRANGE_MODE_START_STOP_API = VL53L0X_REG_SYSRANGE_MODE_START_STOP,
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    VL53L0X_REG_SYSRANGE_MODE_SINGLESHOT_API = VL53L0X_REG_SYSRANGE_MODE_SINGLESHOT,
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    VL53L0X_REG_SYSRANGE_MODE_BACKTOBACK_API = VL53L0X_REG_SYSRANGE_MODE_BACKTOBACK,
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    VL53L0X_REG_SYSRANGE_MODE_TIMED_API = VL53L0X_REG_SYSRANGE_MODE_TIMED,                                      //0x04,
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    VL53L0X_REG_SYSRANGE_MODE_HISTOGRAM_API= VL53L0X_REG_SYSRANGE_MODE_HISTOGRAM,                               // 0x08,
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    VL53L0X_REG_SYSTEM_THRESH_HIGH_API = VL53L0X_REG_SYSTEM_THRESH_HIGH,                                        // 0x000C,
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    VL53L0X_REG_SYSTEM_THRESH_LOW_API = VL53L0X_REG_SYSTEM_THRESH_LOW,                                          // 0x000E,
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    VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG_API = VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG,                                // 0x0001,
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    VL53L0X_REG_SYSTEM_RANGE_CONFIG_API = VL53L0X_REG_SYSTEM_RANGE_CONFIG,                                      // 0x0009,
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    VL53L0X_REG_SYSTEM_INTERMEASUREMENT_PERIOD_API = VL53L0X_REG_SYSTEM_INTERMEASUREMENT_PERIOD,                // 0x0004,
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    VL53L0X_REG_SYSTEM_INTERRUPT_CONFIG_GPIO_API = VL53L0X_REG_SYSTEM_INTERRUPT_CONFIG_GPIO,                    // 0x000A,
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    VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_DISABLED_API = VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_DISABLED,                // 0x00,
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    VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_LEVEL_LOW_API = VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_LEVEL_LOW,              // 0x01,
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    VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_LEVEL_HIGH_API = VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_LEVEL_HIGH,            // 0x02,
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    VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_OUT_OF_WINDOW_API = VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_OUT_OF_WINDOW,      //0x03,
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    VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY_API = VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY,// 0x04,
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    VL53L0X_REG_GPIO_HV_MUX_ACTIVE_HIGH_API = VL53L0X_REG_GPIO_HV_MUX_ACTIVE_HIGH,                              // 0x0084,
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    VL53L0X_REG_SYSTEM_INTERRUPT_CLEAR_API = VL53L0X_REG_SYSTEM_INTERRUPT_CLEAR,                                // 0x000B,
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    VL53L0X_REG_RESULT_INTERRUPT_STATUS_API = VL53L0X_REG_RESULT_INTERRUPT_STATUS,                              // 0x0013,
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    VL53L0X_REG_RESULT_RANGE_STATUS_API = VL53L0X_REG_RESULT_RANGE_STATUS,                                      // 0x0014,
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    VL53L0X_REG_RESULT_CORE_PAGE_API = VL53L0X_REG_RESULT_CORE_PAGE,                                            // 1,
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    VL53L0X_REG_RESULT_CORE_AMBIENT_WINDOW_EVENTS_RTN_API = VL53L0X_REG_RESULT_CORE_AMBIENT_WINDOW_EVENTS_RTN,  // 0x00BC,
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    VL53L0X_REG_RESULT_CORE_RANGING_TOTAL_EVENTS_RTN_API = VL53L0X_REG_RESULT_CORE_RANGING_TOTAL_EVENTS_RTN,    // 0x00C0,
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    VL53L0X_REG_RESULT_CORE_AMBIENT_WINDOW_EVENTS_REF_API = VL53L0X_REG_RESULT_CORE_AMBIENT_WINDOW_EVENTS_REF,  // 0x00D0,
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    VL53L0X_REG_RESULT_CORE_RANGING_TOTAL_EVENTS_REF_API = VL53L0X_REG_RESULT_CORE_RANGING_TOTAL_EVENTS_REF,    // 0x00D4,
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    VL53L0X_REG_RESULT_PEAK_SIGNAL_RATE_REF_API = VL53L0X_REG_RESULT_PEAK_SIGNAL_RATE_REF,                      // 0x00B6,
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    VL53L0X_REG_ALGO_PART_TO_PART_RANGE_OFFSET_MM_API = VL53L0X_REG_ALGO_PART_TO_PART_RANGE_OFFSET_MM,          // 0x0028,
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    VL53L0X_REG_I2C_SLAVE_DEVICE_ADDRESS_API = VL53L0X_REG_I2C_SLAVE_DEVICE_ADDRESS,                            // 0x008a,
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    VL53L0X_REG_MSRC_CONFIG_CONTROL_API = VL53L0X_REG_MSRC_CONFIG_CONTROL,                                      // 0x0060,
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    VL53L0X_REG_PRE_RANGE_CONFIG_MIN_SNR_API = VL53L0X_REG_PRE_RANGE_CONFIG_MIN_SNR,                            // 0X0027,
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    VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_LOW_API = VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_LOW,            // 0x0056,
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    VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_HIGH_API = VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_HIGH,          // 0x0057,
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    VL53L0X_REG_PRE_RANGE_MIN_COUNT_RATE_RTN_LIMIT_API = VL53L0X_REG_PRE_RANGE_MIN_COUNT_RATE_RTN_LIMIT,        // 0x0064,
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    VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_SNR_API = VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_SNR,                        // 0X0067,
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    VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_LOW_API = VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_LOW,        // 0x0047,
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    VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_HIGH_API = VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_HIGH,      // 0x0048,
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    VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT_API = VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT,  // 0x0044,
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    VL53L0X_REG_PRE_RANGE_CONFIG_SIGMA_THRESH_HI_API = VL53L0X_REG_PRE_RANGE_CONFIG_SIGMA_THRESH_HI,            // 0X0061,
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    VL53L0X_REG_PRE_RANGE_CONFIG_SIGMA_THRESH_LO_API = VL53L0X_REG_PRE_RANGE_CONFIG_SIGMA_THRESH_LO,            // 0X0062,
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    VL53L0X_REG_PRE_RANGE_CONFIG_VCSEL_PERIOD_API = VL53L0X_REG_PRE_RANGE_CONFIG_VCSEL_PERIOD,                  // 0x0050,
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    VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI_API = VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI,        // 0x0051,
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    VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_LO_API = VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_LO,        // 0x0052,
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    VL53L0X_REG_SYSTEM_HISTOGRAM_BIN_API = VL53L0X_REG_SYSTEM_HISTOGRAM_BIN,                                    // 0x0081,
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    VL53L0X_REG_HISTOGRAM_CONFIG_INITIAL_PHASE_SELECT_API = VL53L0X_REG_HISTOGRAM_CONFIG_INITIAL_PHASE_SELECT,  // 0x0033,
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    VL53L0X_REG_HISTOGRAM_CONFIG_READOUT_CTRL_API = VL53L0X_REG_HISTOGRAM_CONFIG_READOUT_CTRL,                  // 0x0055,
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    VL53L0X_REG_FINAL_RANGE_CONFIG_VCSEL_PERIOD_API = VL53L0X_REG_FINAL_RANGE_CONFIG_VCSEL_PERIOD,              // 0x0070,
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    VL53L0X_REG_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_HI_API = VL53L0X_REG_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_HI,    // 0x0071,
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    VL53L0X_REG_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_LO_API = VL53L0X_REG_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_LO,    // 0x0072,
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    VL53L0X_REG_CROSSTALK_COMPENSATION_PEAK_RATE_MCPS_API = VL53L0X_REG_CROSSTALK_COMPENSATION_PEAK_RATE_MCPS,  // 0x0020,
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    VL53L0X_REG_MSRC_CONFIG_TIMEOUT_MACROP_API = VL53L0X_REG_MSRC_CONFIG_TIMEOUT_MACROP,                        // 0x0046,
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    VL53L0X_REG_SOFT_RESET_GO2_SOFT_RESET_N_API = VL53L0X_REG_SOFT_RESET_GO2_SOFT_RESET_N,                      // 0x00bf,
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    VL53L0X_REG_IDENTIFICATION_MODEL_ID_API = VL53L0X_REG_IDENTIFICATION_MODEL_ID,                              // 0x00c0,
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    VL53L0X_REG_IDENTIFICATION_REVISION_ID_API = VL53L0X_REG_IDENTIFICATION_REVISION_ID,                        // 0x00c2,
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    VL53L0X_REG_OSC_CALIBRATE_VAL_API = VL53L0X_REG_OSC_CALIBRATE_VAL,                                          // 0x00f8,
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    VL53L0X_SIGMA_ESTIMATE_MAX_VALUE_API = VL53L0X_SIGMA_ESTIMATE_MAX_VALUE,                                    // 65535,
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    VL53L0X_REG_GLOBAL_CONFIG_VCSEL_WIDTH_API = VL53L0X_REG_GLOBAL_CONFIG_VCSEL_WIDTH,                          // 0x032,
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    VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_0_API = VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_0,            // 0x0B0,
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    VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_1_API = VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_1,            // 0x0B1,
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    VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_2_API = VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_2,            // 0x0B2,
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    VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_3_API = VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_3,            // 0x0B3,
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    VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_4_API = VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_4,            // 0x0B4,
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    VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_5_API = VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_5,            // 0x0B5,
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    VL53L0X_REG_GLOBAL_CONFIG_REF_EN_START_SELECT_API = VL53L0X_REG_GLOBAL_CONFIG_REF_EN_START_SELECT,          // 0xB6,
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    VL53L0X_REG_DYNAMIC_SPAD_NUM_REQUESTED_REF_SPAD_API = VL53L0X_REG_DYNAMIC_SPAD_NUM_REQUESTED_REF_SPAD,      // 0x4E,
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    VL53L0X_REG_DYNAMIC_SPAD_REF_EN_START_OFFSET_API = VL53L0X_REG_DYNAMIC_SPAD_REF_EN_START_OFFSET,            // 0x4F,
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    VL53L0X_REG_POWER_MANAGEMENT_GO1_POWER_FORCE_API = VL53L0X_REG_POWER_MANAGEMENT_GO1_POWER_FORCE,            // 0x80,
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    VL53L0X_SPEED_OF_LIGHT_IN_AIR_API = VL53L0X_SPEED_OF_LIGHT_IN_AIR,                                          // 2997,
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    VL53L0X_REG_VHV_CONFIG_PAD_SCL_SDA__EXTSUP_HV_API = VL53L0X_REG_VHV_CONFIG_PAD_SCL_SDA__EXTSUP_HV,          // 0x0089,
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    VL53L0X_REG_ALGO_PHASECAL_LIM_API = VL53L0X_REG_ALGO_PHASECAL_LIM,                                          // 0x0030,
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    VL53L0X_REG_ALGO_PHASECAL_CONFIG_TIMEOUT_API = VL53L0X_REG_ALGO_PHASECAL_CONFIG_TIMEOUT,                    // 0x0030,
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} vl53l0x_lld_regaddr_t;
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/******************************************************************************/
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/* MACROS                                                                     */
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/******************************************************************************/
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/******************************************************************************/
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/* EXTERN DECLARATIONS                                                        */
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/******************************************************************************/
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#ifdef __cplusplus
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extern "C" {
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#endif
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    apalExitStatus_t vl53l0x_lld_init(VL53L0XDriver* vl53l0x);
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    apalExitStatus_t vl53l0x_lld_set_mode(VL53L0XDriver* vl53l0x, VL53L0X_DeviceModes mode, VL53L0X_GpioFunctionality interrupt,
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                                          FixPoint1616_t low, FixPoint1616_t high);
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    apalExitStatus_t vl53l0x_lld_start_measurement(VL53L0XDriver* vl53l0x);
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    apalExitStatus_t vl53l0x_lld_stop_measurement(VL53L0XDriver* vl53l0x);
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    apalExitStatus_t vl53l0x_lld_CheckRangingDataReady(VL53L0XDriver* vl53l0x, uint8_t *pMeasurementDataReady);
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    apalExitStatus_t vl53l0x_lld_getRangingData(VL53L0XDriver* vl53l0x, VL53L0X_RangingMeasurementData_t *pRangingMeasurementData);
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    apalExitStatus_t vl53l0x_lld_set_address(VL53L0XDriver* vl53l0x, uint8_t new_address);
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    apalExitStatus_t vl53l0x_lld_perform_mesaurement(VL53L0XDriver* vl53l0x, uint16_t* data);
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    VL53L0X_Error WaitMeasurementDataReady(VL53L0X_DEV Dev);
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#ifdef __cplusplus
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}
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#endif
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/******************************************************************************/
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/* INLINE FUNCTIONS                                                           */
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/******************************************************************************/
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#endif /* defined(AMIROLLD_CFG_VL53L0X) */
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#endif /* AMIROLLD_VL53L0X_V1_H */
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/** @} */
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