Revision 7df78c60 include/AT42QT1050/v1/alld_AT42QT1050_v1.h

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include/AT42QT1050/v1/alld_AT42QT1050_v1.h
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  float at42qt1050_lld_samples2pulse(const uint16_t samples);
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  uint16_t at42qt1050_lld_scale2scaling(const uint8_t scale);
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  float at42qt1050_lld_scaling2scale(const uint16_t factor);
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  /**
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   * @brief   Calculates n-th address based on address of register 0.
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   * @details Calculation: <scale value> = log2(<scaling factor>
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   * )
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   * @param[in]   base    Base address = frist register
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   * @param[in]   inc     Jump to the next register inc times
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   *
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   * @return    Calculated register address
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   */
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  inline at42qt1050_lld_register_t at42qt1050_lld_addr_calc(const at42qt1050_lld_register_t base, const uint8_t inc) {
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    apalDbgAssert(inc < 5);
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    uint8_t double_result = 0; //16bit access
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    switch (base) {
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      case AT42QT1050_LLD_REG_KEYSIGNAL_0:         //2 4 2 2
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      case AT42QT1050_LLD_REG_REFERENCEDATA_0:     //2 4 2 2
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        double_result = 1;
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      case AT42QT1050_LLD_REG_NEGATIVETHRESHOLD_0: //1 2 1 1
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      case AT42QT1050_LLD_REG_PULSE_SCALE_0:       //1 2 1 1
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      case AT42QT1050_LLD_REG_INTEGRATOR_AKS_0:    //1 2 1 1
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      case AT42QT1050_LLD_REG_CHARGESHAREDELAY_0:  //1 2 1 1
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      {
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        uint8_t increase = ((inc>1)?inc+1:inc);
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        return (at42qt1050_lld_register_t) (((uint8_t) base)+(increase << double_result));
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      }
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      default:
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      {
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        apalDbgPrintf("invalid base register 0x%04X\n", base);
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        return (at42qt1050_lld_register_t) 0xFF; //does not exist
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      }
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    }
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  }
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#ifdef __cplusplus
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}
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#endif

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