Revision 7df78c60 source/AT42QT1050/v1/alld_AT42QT1050_v1.c

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source/AT42QT1050/v1/alld_AT42QT1050_v1.c
109 109
  apalDbgAssert(key < AT42QT1050_LLD_NUM_KEYS);
110 110
  apalDbgAssert(signal != NULL);
111 111

  
112
  const uint8_t txbuf = AT42QT1050_LLD_REG_KEYSIGNAL_0 + (2*key) + ((key > 1) ? 2 : 0);
112
  const at42qt1050_lld_register_t txbuf = at42qt1050_lld_addr_calc(AT42QT1050_LLD_REG_KEYSIGNAL_0, key);
113 113
  uint8_t rxbuf[2];
114 114
  const apalExitStatus_t status = apalI2CMasterTransmit(at42qt1050d->i2cd, at42qt1050d->addr, &txbuf, 1, rxbuf, 2, timeout);
115 115
  *signal = (rxbuf[0] << 8) | rxbuf[1];
......
132 132
  apalDbgAssert(key < AT42QT1050_LLD_NUM_KEYS);
133 133
  apalDbgAssert(refdata != NULL);
134 134

  
135
  const uint8_t txbuf = AT42QT1050_LLD_REG_REFERENCEDATA_0 + (2*key) + ((key > 1) ? 2 : 0);
135
  const at42qt1050_lld_register_t txbuf = at42qt1050_lld_addr_calc(AT42QT1050_LLD_REG_REFERENCEDATA_0, key);
136 136
  uint8_t rxbuf[2];
137 137
  const apalExitStatus_t status = apalI2CMasterTransmit(at42qt1050d->i2cd, at42qt1050d->addr, &txbuf, 1, rxbuf, 2, timeout);
138 138
  *refdata = (rxbuf[0] << 8) | rxbuf[1];
......
168 168
  apalDbgAssert(at42qt1050d != NULL && at42qt1050d->i2cd != NULL);
169 169

  
170 170
  const apalExitStatus_t status = at42qt1050_lld_write_reg(
171
	at42qt1050d, AT42QT1050_LLD_RESETCALIBRATE_RESET, AT42QT1050_LLD_RESETCALIBRATE_RESET, timeout);
171
    at42qt1050d, AT42QT1050_LLD_REG_RESET_CALIBRATE, AT42QT1050_LLD_RESETCALIBRATE_RESET, timeout);
172 172
  if(wait4wakeup)
173
	usleep(AT42QT1050_LLD_WATCHDOGTIME_MAX+AT42QT1050_LLD_INITIALIZATION_TIME_MAX); // watchdog timer+initialization -> datasheet
173
    usleep(AT42QT1050_LLD_WATCHDOGTIME_MAX+AT42QT1050_LLD_INITIALIZATION_TIME_MAX+timeout); // watchdog timer+initialization -> datasheet
174 174
  return status;
175 175
}
176 176

  

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