amiro-lld / include / alld_dw1000.h @ 8c47f14b
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| 1 | fce9feec | Robin Ewers | /*
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| 2 | AMiRo-LLD is a compilation of low-level hardware drivers for the Autonomous Mini Robot (AMiRo) platform.
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| 3 | f125ae07 | Thomas Schöpping | Copyright (C) 2016..2019 Thomas Schöpping et al.
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| 4 | fce9feec | Robin Ewers | |
| 5 | This program is free software: you can redistribute it and/or modify
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| 6 | it under the terms of the GNU Lesser General Public License as published by
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| 7 | the Free Software Foundation, either version 3 of the License, or
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| 8 | (at your option) any later version.
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| 9 | |||
| 10 | This program is distributed in the hope that it will be useful,
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| 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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| 13 | GNU Lesser General Public License for more details.
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| 14 | |||
| 15 | You should have received a copy of the GNU Lesser General Public License
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| 16 | along with this program. If not, see <http://www.gnu.org/licenses/>.
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| 17 | */
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| 18 | |||
| 19 | /*! ----------------------------------------------------------------------------
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| 20 | * @file deca_device_api.h
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| 21 | * @brief DW1000 API Functions
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| 22 | *
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| 23 | * @attention
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| 24 | *
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| 25 | * Copyright 2013 (c) Decawave Ltd, Dublin, Ireland.
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| 26 | *
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| 27 | * All rights reserved.
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| 28 | *
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| 29 | */
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| 30 | |||
| 31 | 8c47f14b | Thomas Schöpping | #ifndef AMIROLLD_DW1000_H
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| 32 | #define AMIROLLD_DW1000_H
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| 33 | fce9feec | Robin Ewers | |
| 34 | #include <amiro-lld.h> |
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| 35 | 8c47f14b | Thomas Schöpping | |
| 36 | fce9feec | Robin Ewers | #if defined(AMIROLLD_CFG_USE_DW1000) || defined(__DOXYGEN__)
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| 37 | |||
| 38 | |||
| 39 | |||
| 40 | #include <stddef.h> |
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| 41 | #include <stdint.h> |
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| 42 | #include <stdbool.h> |
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| 43 | |||
| 44 | #define DW1000_DRIVER_VERSION 0x040005 |
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| 45 | #define DW1000_DEVICE_DRIVER_VER_STRING "DW1000 Device Driver Version 04.00.05" |
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| 46 | |||
| 47 | #ifndef DWT_NUM_DW_DEV
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| 48 | #define DWT_NUM_DW_DEV (1) |
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| 49 | #endif
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| 50 | |||
| 51 | #define DWT_SUCCESS (0) |
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| 52 | #define DWT_ERROR (-1) |
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| 53 | |||
| 54 | |||
| 55 | /**
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| 56 | * @brief The DW1000 driver struct.
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| 57 | */
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| 58 | typedef struct { |
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| 59 | apalSPIDriver_t* spid; /**< @brief The SPI Driver */
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| 60 | apalGpio_t* gpio_exti; /**< @brief The GPIO indicating external interrupt */
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| 61 | apalGpio_t* gpio_reset; /**< @brief The GPIO indicating reset sig*/
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| 62 | /* TODO: better apalControlGpio_t instead of apalGpio_t ? */
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| 63 | /* TODO: EXTI, GPIO (RESET) */
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| 64 | } DW1000Driver; |
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| 65 | |||
| 66 | |||
| 67 | #define DWT_TIME_UNITS (1.0/499.2e6/128.0) //!< = 15.65e-12 s |
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| 68 | |||
| 69 | #define DWT_DEVICE_ID (0xDECA0130) //!< DW1000 MP device ID |
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| 70 | |||
| 71 | #define BUFFLEN (4096+128) |
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| 72 | |||
| 73 | //! constants for selecting the bit rate for data TX (and RX)
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| 74 | //! These are defined for write (with just a shift) the TX_FCTRL register
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| 75 | #define DWT_BR_110K 0 //!< UWB bit rate 110 kbits/s |
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| 76 | #define DWT_BR_850K 1 //!< UWB bit rate 850 kbits/s |
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| 77 | #define DWT_BR_6M8 2 //!< UWB bit rate 6.8 Mbits/s |
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| 78 | |||
| 79 | //! constants for specifying the (Nominal) mean Pulse Repetition Frequency
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| 80 | //! These are defined for direct write (with a shift if necessary) to CHAN_CTRL and TX_FCTRL regs
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| 81 | #define DWT_PRF_16M 1 //!< UWB PRF 16 MHz |
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| 82 | #define DWT_PRF_64M 2 //!< UWB PRF 64 MHz |
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| 83 | |||
| 84 | //! constants for specifying Preamble Acquisition Chunk (PAC) Size in symbols
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| 85 | #define DWT_PAC8 0 //!< PAC 8 (recommended for RX of preamble length 128 and below |
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| 86 | #define DWT_PAC16 1 //!< PAC 16 (recommended for RX of preamble length 256 |
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| 87 | #define DWT_PAC32 2 //!< PAC 32 (recommended for RX of preamble length 512 |
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| 88 | #define DWT_PAC64 3 //!< PAC 64 (recommended for RX of preamble length 1024 and up |
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| 89 | |||
| 90 | //! constants for specifying TX Preamble length in symbols
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| 91 | //! These are defined to allow them be directly written into byte 2 of the TX_FCTRL register
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| 92 | //! (i.e. a four bit value destined for bits 20..18 but shifted left by 2 for byte alignment)
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| 93 | #define DWT_PLEN_4096 0x0C //! Standard preamble length 4096 symbols |
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| 94 | #define DWT_PLEN_2048 0x28 //! Non-standard preamble length 2048 symbols |
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| 95 | #define DWT_PLEN_1536 0x18 //! Non-standard preamble length 1536 symbols |
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| 96 | #define DWT_PLEN_1024 0x08 //! Standard preamble length 1024 symbols |
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| 97 | #define DWT_PLEN_512 0x34 //! Non-standard preamble length 512 symbols |
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| 98 | #define DWT_PLEN_256 0x24 //! Non-standard preamble length 256 symbols |
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| 99 | #define DWT_PLEN_128 0x14 //! Non-standard preamble length 128 symbols |
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| 100 | #define DWT_PLEN_64 0x04 //! Standard preamble length 64 symbols |
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| 101 | |||
| 102 | #define DWT_SFDTOC_DEF 0x1041 // default SFD timeout value |
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| 103 | |||
| 104 | #define DWT_PHRMODE_STD 0x0 // standard PHR mode |
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| 105 | #define DWT_PHRMODE_EXT 0x3 // DW proprietary extended frames PHR mode |
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| 106 | |||
| 107 | // Defined constants for "mode" bitmask parameter passed into dwt_starttx() function.
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| 108 | #define DWT_START_TX_IMMEDIATE 0 |
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| 109 | #define DWT_START_TX_DELAYED 1 |
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| 110 | #define DWT_RESPONSE_EXPECTED 2 |
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| 111 | |||
| 112 | #define DWT_START_RX_IMMEDIATE 0 |
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| 113 | #define DWT_START_RX_DELAYED 1 // Set up delayed RX, if "late" error triggers, then the RX will be enabled immediately |
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| 114 | #define DWT_IDLE_ON_DLY_ERR 2 // If delayed RX failed due to "late" error then if this |
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| 115 | // flag is set the RX will not be re-enabled immediately, and device will be in IDLE when function exits
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| 116 | #define DWT_NO_SYNC_PTRS 4 // Do not try to sync IC side and Host side buffer pointers when enabling RX. This is used to perform manual RX |
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| 117 | // re-enabling when receiving a frame in double buffer mode.
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| 118 | |||
| 119 | // Defined constants for "mode" bit field parameter passed to dwt_setleds() function.
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| 120 | #define DWT_LEDS_DISABLE 0x00 |
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| 121 | #define DWT_LEDS_ENABLE 0x01 |
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| 122 | #define DWT_LEDS_INIT_BLINK 0x02 |
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| 123 | |||
| 124 | //frame filtering configuration options
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| 125 | #define DWT_FF_NOTYPE_EN 0x000 // no frame types allowed (FF disabled) |
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| 126 | #define DWT_FF_COORD_EN 0x002 // behave as coordinator (can receive frames with no dest address (PAN ID has to match)) |
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| 127 | #define DWT_FF_BEACON_EN 0x004 // beacon frames allowed |
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| 128 | #define DWT_FF_DATA_EN 0x008 // data frames allowed |
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| 129 | #define DWT_FF_ACK_EN 0x010 // ack frames allowed |
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| 130 | #define DWT_FF_MAC_EN 0x020 // mac control frames allowed |
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| 131 | #define DWT_FF_RSVD_EN 0x040 // reserved frame types allowed |
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| 132 | |||
| 133 | //DW1000 interrupt events
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| 134 | #define DWT_INT_TFRS 0x00000080 // frame sent |
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| 135 | #define DWT_INT_LDED 0x00000400 // micro-code has finished execution |
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| 136 | #define DWT_INT_RFCG 0x00004000 // frame received with good CRC |
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| 137 | #define DWT_INT_RPHE 0x00001000 // receiver PHY header error |
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| 138 | #define DWT_INT_RFCE 0x00008000 // receiver CRC error |
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| 139 | #define DWT_INT_RFSL 0x00010000 // receiver sync loss error |
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| 140 | #define DWT_INT_RFTO 0x00020000 // frame wait timeout |
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| 141 | #define DWT_INT_RXOVRR 0x00100000 // receiver overrun |
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| 142 | #define DWT_INT_RXPTO 0x00200000 // preamble detect timeout |
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| 143 | #define DWT_INT_SFDT 0x04000000 // SFD timeout |
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| 144 | #define DWT_INT_ARFE 0x20000000 // frame rejected (due to frame filtering configuration) |
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| 145 | |||
| 146 | |||
| 147 | //DW1000 SLEEP and WAKEUP configuration parameters
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| 148 | #define DWT_PRESRV_SLEEP 0x0100 // PRES_SLEEP - on wakeup preserve sleep bit |
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| 149 | #define DWT_LOADOPSET 0x0080 // ONW_L64P - on wakeup load operating parameter set for 64 PSR |
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| 150 | #define DWT_CONFIG 0x0040 // ONW_LDC - on wakeup restore (load) the saved configurations (from AON array into HIF) |
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| 151 | #define DWT_LOADEUI 0x0008 // ONW_LEUI - on wakeup load EUI |
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| 152 | #define DWT_RX_EN 0x0002 // ONW_RX - on wakeup activate reception |
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| 153 | #define DWT_TANDV 0x0001 // ONW_RADC - on wakeup run ADC to sample temperature and voltage sensor values |
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| 154 | |||
| 155 | #define DWT_XTAL_EN 0x10 // keep XTAL running during sleep |
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| 156 | #define DWT_WAKE_SLPCNT 0x8 // wake up after sleep count |
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| 157 | #define DWT_WAKE_CS 0x4 // wake up on chip select |
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| 158 | #define DWT_WAKE_WK 0x2 // wake up on WAKEUP PIN |
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| 159 | #define DWT_SLP_EN 0x1 // enable sleep/deep sleep functionality |
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| 160 | |||
| 161 | //DW1000 INIT configuration parameters
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| 162 | #define DWT_LOADUCODE 0x1 |
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| 163 | #define DWT_LOADNONE 0x0 |
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| 164 | |||
| 165 | //DW1000 OTP operating parameter set selection
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| 166 | #define DWT_OPSET_64LEN 0x0 |
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| 167 | #define DWT_OPSET_TIGHT 0x1 |
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| 168 | #define DWT_OPSET_DEFLT 0x2 |
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| 169 | |||
| 170 | // Call-back data RX frames flags
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| 171 | #define DWT_CB_DATA_RX_FLAG_RNG 0x1 // Ranging bit |
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| 172 | |||
| 173 | |||
| 174 | // TX/RX call-back data
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| 175 | typedef struct |
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| 176 | {
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| 177 | uint32_t status; //initial value of register as ISR is entered
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| 178 | uint16_t datalength; //length of frame
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| 179 | uint8_t fctrl[2]; //frame control bytes |
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| 180 | uint8_t rx_flags; //RX frame flags, see above
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| 181 | } dwt_cb_data_t; |
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| 182 | |||
| 183 | // Call-back type for all events
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| 184 | typedef void (*dwt_cb_t)(const dwt_cb_data_t *); |
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| 185 | |||
| 186 | |||
| 187 | // -------------------------------------------------------------------------------------------------------------------
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| 188 | // Structure to hold device data
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| 189 | typedef struct |
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| 190 | {
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| 191 | uint32_t partID ; // IC Part ID - read during initialisation
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| 192 | uint32_t lotID ; // IC Lot ID - read during initialisation
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| 193 | uint8_t longFrames ; // Flag in non-standard long frame mode
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| 194 | uint8_t otprev ; // OTP revision number (read during initialisation)
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| 195 | uint32_t txFCTRL ; // Keep TX_FCTRL register config
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| 196 | uint8_t init_xtrim; // initial XTAL trim value read from OTP (or defaulted to mid-range if OTP not programmed)
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| 197 | uint8_t dblbuffon; // Double RX buffer mode flag
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| 198 | uint32_t sysCFGreg ; // Local copy of system config register
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| 199 | uint16_t sleep_mode; // Used for automatic reloading of LDO tune and microcode at wake-up
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| 200 | uint8_t wait4resp ; // wait4response was set with last TX start command
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| 201 | dwt_cb_data_t cbData; // Callback data structure
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| 202 | dwt_cb_t cbTxDone; // Callback for TX confirmation event
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| 203 | dwt_cb_t cbRxOk; // Callback for RX good frame event
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| 204 | dwt_cb_t cbRxTo; // Callback for RX timeout events
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| 205 | dwt_cb_t cbRxErr; // Callback for RX error events
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| 206 | DW1000Driver *driver; // Reference to local hardware SPI, GPIO, ...
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| 207 | } dwt_local_data_t ; |
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| 208 | |||
| 209 | /*! ------------------------------------------------------------------------------------------------------------------
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| 210 | * Structure typedef: dwt_config_t
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| 211 | *
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| 212 | * Structure for setting device configuration via dwt_configure() function
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| 213 | *
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| 214 | */
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| 215 | typedef struct |
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| 216 | {
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| 217 | uint8_t chan ; //!< channel number {1, 2, 3, 4, 5, 7 }
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| 218 | uint8_t prf ; //!< Pulse Repetition Frequency {DWT_PRF_16M or DWT_PRF_64M}
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| 219 | uint8_t txPreambLength ; //!< DWT_PLEN_64..DWT_PLEN_4096
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| 220 | uint8_t rxPAC ; //!< Acquisition Chunk Size (Relates to RX preamble length)
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| 221 | uint8_t txCode ; //!< TX preamble code
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| 222 | uint8_t rxCode ; //!< RX preamble code
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| 223 | uint8_t nsSFD ; //!< Boolean should we use non-standard SFD for better performance
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| 224 |