Revision 9466e34d
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################################################################################ |
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# AMiRo-LLD is a compilation of low-level hardware drivers for the Autonomous # |
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# Mini Robot (AMiRo) platform. # |
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# Copyright (C) 2016..2019 Thomas Schöpping et al. # |
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# # |
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# This program is free software: you can redistribute it and/or modify # |
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# it under the terms of the GNU Lesser General Public License as published by # |
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# the Free Software Foundation, either version 3 of the License, or # |
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# (at your option) any later version. # |
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# # |
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# This program is distributed in the hope that it will be useful, # |
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# but WITHOUT ANY WARRANTY; without even the implied warranty of # |
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # |
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# GNU Lesser General Public License for more details. # |
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# # |
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# You should have received a copy of the GNU Lesser General Public License # |
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# along with this program. If not, see <http://www.gnu.org/licenses/>. # |
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# # |
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# This research/work was supported by the Cluster of Excellence Cognitive # |
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# Interaction Technology 'CITEC' (EXC 277) at Bielefeld University, which is # |
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# funded by the German Research Foundation (DFG). # |
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################################################################################ |
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# absolute path to this directory |
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AMIROLLD_DIR := $(dir $(lastword $(MAKEFILE_LIST))) |
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# include paths |
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AMIROLLD_INC = $(AMIROLLD_DIR) \ |
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$(sort $(dir $(wildcard $(AMIROLLD_DIR)include/?*/))) |
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# C sources |
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AMIROLLD_CSRC = $(shell find $(AMIROLLD_DIR)source/ -type f -regex "$(AMIROLLD_DIR)source/.+\.[Cc]") |
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| drivers/A3906/v1/alld_A3906.c | ||
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/* |
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AMiRo-LLD is a compilation of low-level hardware drivers for the Autonomous Mini Robot (AMiRo) platform. |
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Copyright (C) 2016..2019 Thomas Schöpping et al. |
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|
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This program is free software: you can redistribute it and/or modify |
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it under the terms of the GNU Lesser General Public License as published by |
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| 7 |
the Free Software Foundation, either version 3 of the License, or |
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(at your option) any later version. |
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| 9 |
|
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This program is distributed in the hope that it will be useful, |
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| 11 |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 12 |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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GNU Lesser General Public License for more details. |
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| 14 |
|
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You should have received a copy of the GNU Lesser General Public License |
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along with this program. If not, see <http://www.gnu.org/licenses/>. |
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*/ |
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/** |
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* @file alld_A3906.c |
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* @brief Motor driver functions. |
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* |
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* @addtogroup lld_motor |
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* @{
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*/ |
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#include <alld_A3906.h> |
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/******************************************************************************/ |
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/* LOCAL DEFINITIONS */ |
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/******************************************************************************/ |
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/******************************************************************************/ |
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/* EXPORTED VARIABLES */ |
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/******************************************************************************/ |
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/******************************************************************************/ |
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/* LOCAL TYPES */ |
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/******************************************************************************/ |
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/******************************************************************************/ |
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/* LOCAL VARIABLES */ |
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/******************************************************************************/ |
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/******************************************************************************/ |
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/* LOCAL FUNCTIONS */ |
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/******************************************************************************/ |
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/******************************************************************************/ |
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/* EXPORTED FUNCTIONS */ |
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/******************************************************************************/ |
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/** |
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* @brief Sets the power state of the A3906. |
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* @param[in] a3906d The A3906 driver. |
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* @param[in] power_state The new power state to set. |
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* |
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* @return The return status indicates whether the function call was successfull. |
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*/ |
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apalExitStatus_t a3906_lld_set_power(const A3906Driver* const a3906, const a3906_lld_power_t power_state) |
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{
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apalDbgAssert(a3906 != NULL); |
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// set the output of the pin depending on the activation property |
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return apalControlGpioSet(a3906->power_pin, (power_state == A3906_LLD_POWER_ON) ? APAL_GPIO_ON : APAL_GPIO_OFF); |
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} |
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/** |
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* @brief Gets the current power state of the A3906. |
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* |
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* @param[in] a3906d The A3906 driver, |
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* @param[out] power_state The currently set power state. |
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* |
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* @return The return status indicates whether the function call was successfull. |
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*/ |
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apalExitStatus_t a3906_lld_get_power(const A3906Driver* const a3906, a3906_lld_power_t* const power_state) |
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{
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apalDbgAssert(a3906 != NULL); |
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apalDbgAssert(power_state != NULL); |
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// get current activation state of power gpio |
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apalControlGpioState_t gpio_state; |
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apalExitStatus_t status = apalControlGpioGet(a3906->power_pin, &gpio_state); |
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*power_state = gpio_state == APAL_GPIO_ON ? A3906_LLD_POWER_ON : A3906_LLD_POWER_OFF; |
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return status; |
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} |
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/** |
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* @brief Set the PWM width for one channel. |
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* |
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* @param[in] pwmd The PWM driver to use. |
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* @param[in] channel The channel of the given PWM driver to set. |
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* @param[in] width The new width to set the PWM to. |
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* |
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* @return The return status indicates whether the function call was successfull. |
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*/ |
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apalExitStatus_t a3906_lld_set_pwm(apalPWMDriver_t* pwm, const apalPWMchannel_t channel, const apalPWMwidth_t width) |
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{
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apalDbgAssert(pwm != NULL); |
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return apalPWMSet(pwm, channel, width); |
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} |
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/** @} */ |
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| drivers/A3906/v1/alld_A3906.h | ||
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/* |
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AMiRo-LLD is a compilation of low-level hardware drivers for the Autonomous Mini Robot (AMiRo) platform. |
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Copyright (C) 2016..2019 Thomas Schöpping et al. |
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|
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This program is free software: you can redistribute it and/or modify |
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| 6 |
it under the terms of the GNU Lesser General Public License as published by |
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the Free Software Foundation, either version 3 of the License, or |
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(at your option) any later version. |
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| 9 |
|
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This program is distributed in the hope that it will be useful, |
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but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 13 |
GNU Lesser General Public License for more details. |
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| 14 |
|
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You should have received a copy of the GNU Lesser General Public License |
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along with this program. If not, see <http://www.gnu.org/licenses/>. |
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*/ |
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/** |
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* @file alld_A3906.h |
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* @brief Motor driver macros and structures. |
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* |
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* @addtogroup lld_motor |
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* @{
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*/ |
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#ifndef AMIROLLD_A3906_H |
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#define AMIROLLD_A3906_H |
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#include <amiro-lld.h> |
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/******************************************************************************/ |
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/* CONSTANTS */ |
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/******************************************************************************/ |
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/** |
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* @brief Active state of power pin. |
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*/ |
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#define A3906_LLD_POWER_PIN_ACTIVE_STATE APAL_GPIO_ACTIVE_HIGH |
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/******************************************************************************/ |
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/* SETTINGS */ |
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/******************************************************************************/ |
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/******************************************************************************/ |
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/* CHECKS */ |
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/******************************************************************************/ |
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/******************************************************************************/ |
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/* DATA STRUCTURES AND TYPES */ |
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/******************************************************************************/ |
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/** |
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* @brief A3906 driver struct. |
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*/ |
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typedef struct {
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const apalControlGpio_t* power_pin; /**< @brief GPIO to enable/disable power of the A3906. */ |
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} A3906Driver; |
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/** |
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* @brief Power state of the A3906. |
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*/ |
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typedef enum {
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A3906_LLD_POWER_OFF = 0x00, /**< 'power off' state */ |
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A3906_LLD_POWER_ON = 0x01, /**< 'power on' state */ |
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} a3906_lld_power_t; |
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/******************************************************************************/ |
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/* MACROS */ |
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/******************************************************************************/ |
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/******************************************************************************/ |
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/* EXTERN DECLARATIONS */ |
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/******************************************************************************/ |
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#ifdef __cplusplus |
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extern "C" {
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#endif |
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apalExitStatus_t a3906_lld_set_power(const A3906Driver* const a3906, const a3906_lld_power_t power_state); |
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apalExitStatus_t a3906_lld_get_power(const A3906Driver* const a3906, a3906_lld_power_t* const power_state); |
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apalExitStatus_t a3906_lld_set_pwm(apalPWMDriver_t* pwm, const apalPWMchannel_t channel, const apalPWMwidth_t width); |
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#ifdef __cplusplus |
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} |
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#endif |
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/******************************************************************************/ |
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/* INLINE FUNCTIONS */ |
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/******************************************************************************/ |
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#endif /* AMIROLLD_A3906_H */ |
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/** @} */ |
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| drivers/AT24C01B/v1/alld_AT24C01B.c | ||
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/* |
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AMiRo-LLD is a compilation of low-level hardware drivers for the Autonomous Mini Robot (AMiRo) platform. |
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Copyright (C) 2016..2019 Thomas Schöpping et al. |
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|
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This program is free software: you can redistribute it and/or modify |
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| 6 |
it under the terms of the GNU Lesser General Public License as published by |
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| 7 |
the Free Software Foundation, either version 3 of the License, or |
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| 8 |
(at your option) any later version. |
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| 9 |
|
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This program is distributed in the hope that it will be useful, |
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| 11 |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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GNU Lesser General Public License for more details. |
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|
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You should have received a copy of the GNU Lesser General Public License |
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along with this program. If not, see <http://www.gnu.org/licenses/>. |
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*/ |
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/** |
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* @file alld_AT24C01B.c |
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* @brief EEPROM function implementations. |
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* |
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* @addtogroup lld_eeprom |
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* @{
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*/ |
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#include <alld_AT24C01B.h> |
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#include <string.h> |
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/******************************************************************************/ |
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/* LOCAL DEFINITIONS */ |
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/******************************************************************************/ |
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/******************************************************************************/ |
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/* EXPORTED VARIABLES */ |
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/******************************************************************************/ |
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/******************************************************************************/ |
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/* LOCAL TYPES */ |
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/******************************************************************************/ |
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/******************************************************************************/ |
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/* LOCAL VARIABLES */ |
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/******************************************************************************/ |
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/******************************************************************************/ |
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/* LOCAL FUNCTIONS */ |
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/******************************************************************************/ |
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/******************************************************************************/ |
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/* EXPORTED FUNCTIONS */ |
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/******************************************************************************/ |
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/** |
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* @brief Acknowledgement polling to check if a write operation finished. |
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* @param[in] at24c01b The eeprom driver to use. |
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* @param[in] timeout Timeout for the function to return (in microseconds) |
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* |
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* @return The return status indicates whether the function call was succesfull or a timeout occurred. |
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*/ |
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apalExitStatus_t at24c01b_lld_poll_ack(const AT24C01BDriver* const at24c01b, const apalTime_t timeout) |
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{
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apalDbgAssert(at24c01b != NULL); |
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uint8_t tmp = 0; |
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return apalI2CMasterReceive(at24c01b->i2cd, (AT24C01B_LLD_I2C_ADDR_FIXED | at24c01b->addr), &tmp, 1, timeout); |
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} |
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/** |
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* @brief Read the data from the eeprom starting at the current address. |
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* @param[in] at24c01b The eeprom driver to use. |
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* @param[out] data The data read from the AT24C01B. |
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* @param[in] num The amount of bytes to read. |
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* @param[in] timeout Timeout for the function to return (in microseconds) |
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* |
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* @return The return status indicates whether the function call was succesfull or a timeout occurred. |
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*/ |
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apalExitStatus_t at24c01b_lld_read_current_address(const AT24C01BDriver* const at24c01b, uint8_t* const data, const uint8_t num, const apalTime_t timeout) |
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{
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apalDbgAssert(at24c01b != NULL); |
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apalDbgAssert(data != NULL); |
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return apalI2CMasterReceive(at24c01b->i2cd, (AT24C01B_LLD_I2C_ADDR_FIXED | at24c01b->addr), data, num, timeout); |
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} |
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/** |
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* @brief Read the data from the eeprom starting at a given address. |
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* @param[in] at24c01b The eeprom driver to use. |
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* @param[in] addr The address to read. |
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* @param[out] data The data read from the AT24C01B. |
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* @param[in] num The amount of bytes to read. |
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* @param[in] timeout Timeout for the function to return (in microseconds) |
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* |
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* @return The return status indicates whether the function call was succesfull or a timeout occurred. |
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*/ |
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apalExitStatus_t at24c01b_lld_read(const AT24C01BDriver* const at24c01b, const uint8_t addr, uint8_t* const data, const uint8_t num, const apalTime_t timeout) |
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{
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apalDbgAssert(at24c01b != NULL); |
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apalDbgAssert(data != NULL); |
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apalDbgAssert(addr + num <= AT24C01B_LLD_SIZE_BYTES); |
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apalExitStatus_t status = apalI2CMasterTransmit(at24c01b->i2cd, (AT24C01B_LLD_I2C_ADDR_FIXED | at24c01b->addr), &addr, 1, NULL, 0, timeout); |
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if (status == APAL_STATUS_OK || status == APAL_STATUS_WARNING) {
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return apalI2CMasterReceive(at24c01b->i2cd, (AT24C01B_LLD_I2C_ADDR_FIXED | at24c01b->addr), data, num, timeout); |
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} else {
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return status; |
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} |
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} |
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/** |
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* @brief Write a byte to the eeprom. |
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* @param[in] at24c01b The eeprom driver to use. |
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* @param[in] addr The address to start writing. |
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* @param[out] data The data to be written to the AT24C01BN. |
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* @param[in] timeout Timeout for the function to return (in microseconds) |
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* |
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* @return The return status indicates whether the function call was succesfull or a timeout occurred. |
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*/ |
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apalExitStatus_t at24c01b_lld_write_byte(const AT24C01BDriver* const at24c01b, const uint8_t addr, const uint8_t data, const apalTime_t timeout) |
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{
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apalDbgAssert(at24c01b != NULL); |
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const uint8_t writedata[2] = {addr, data};
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return apalI2CMasterTransmit(at24c01b->i2cd, (AT24C01B_LLD_I2C_ADDR_FIXED | at24c01b->addr), writedata, 2, NULL, 0, timeout); |
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} |
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/** |
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* @brief Write a page to the eeprom. |
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* @param[in] at24c01b The eeprom driver to use. |
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* @param[in] addr The address to start writing. |
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* @param[in] data The data to be written to the AT24C01BN. |
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* @param[in] num The amount of bytes to write. |
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* @param[in] timeout Timeout for the function to return (in microseconds) |
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* |
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* @return The return status indicates whether the function call was succesfull or a timeout occurred. |
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*/ |
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apalExitStatus_t at24c01b_lld_write_page(const AT24C01BDriver* const at24c01b, const uint8_t addr, const uint8_t* const data, const uint8_t num, const apalTime_t timeout) |
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{
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apalDbgAssert(at24c01b != NULL); |
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apalDbgAssert(data != NULL); |
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uint8_t writedata[num+1]; |
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writedata[0] = addr; |
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memcpy(&writedata[1], data, num); |
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return apalI2CMasterTransmit(at24c01b->i2cd, (AT24C01B_LLD_I2C_ADDR_FIXED | at24c01b->addr), writedata, num+1, NULL, 0, timeout); |
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} |
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|
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/** @} */ |
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|
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| drivers/AT24C01B/v1/alld_AT24C01B.h | ||
|---|---|---|
| 1 |
/* |
|
| 2 |
AMiRo-LLD is a compilation of low-level hardware drivers for the Autonomous Mini Robot (AMiRo) platform. |
|
| 3 |
Copyright (C) 2016..2019 Thomas Schöpping et al. |
|
| 4 |
|
|
| 5 |
This program is free software: you can redistribute it and/or modify |
|
| 6 |
it under the terms of the GNU Lesser General Public License as published by |
|
| 7 |
the Free Software Foundation, either version 3 of the License, or |
|
| 8 |
(at your option) any later version. |
|
| 9 |
|
|
| 10 |
This program is distributed in the hope that it will be useful, |
|
| 11 |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
| 12 |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
| 13 |
GNU Lesser General Public License for more details. |
|
| 14 |
|
|
| 15 |
You should have received a copy of the GNU Lesser General Public License |
|
| 16 |
along with this program. If not, see <http://www.gnu.org/licenses/>. |
|
| 17 |
*/ |
|
| 18 |
|
|
| 19 |
/** |
|
| 20 |
* @file alld_AT24C01B.h |
|
| 21 |
* @brief EEPROM macros and structures. |
|
| 22 |
* |
|
| 23 |
* @addtogroup lld_eeprom |
|
| 24 |
* @{
|
|
| 25 |
*/ |
|
| 26 |
|
|
| 27 |
#ifndef AMIROLLD_AT24C01B_H |
|
| 28 |
#define AMIROLLD_AT24C01B_H |
|
| 29 |
|
|
| 30 |
#include <amiro-lld.h> |
|
| 31 |
|
|
| 32 |
/******************************************************************************/ |
|
| 33 |
/* CONSTANTS */ |
|
| 34 |
/******************************************************************************/ |
|
| 35 |
|
|
| 36 |
/** |
|
| 37 |
* @brief Memory size of the EEPROM in bits. |
|
| 38 |
*/ |
|
| 39 |
#define AT24C01B_LLD_SIZE_BITS 1024 |
|
| 40 |
|
|
| 41 |
/** |
|
| 42 |
* @brief Memory size of the EEPROM in bytes |
|
| 43 |
*/ |
|
| 44 |
#define AT24C01B_LLD_SIZE_BYTES 128 |
|
| 45 |
|
|
| 46 |
|
|
| 47 |
/** |
|
| 48 |
* @brief Size of a page in bytes |
|
| 49 |
*/ |
|
| 50 |
#define AT24C01B_LLD_PAGE_SIZE_BYTES 8 |
|
| 51 |
|
|
| 52 |
/** |
|
| 53 |
* @brief Time in microseconds a write operation takes to complete (I2C will not respond). |
|
| 54 |
* @note The system should wait slightly longer. |
|
| 55 |
*/ |
|
| 56 |
#define AT24C01B_LLD_WRITECYCLETIME_US 5000 |
|
| 57 |
|
|
| 58 |
/** |
|
| 59 |
* @brief Maximum I2C frequency. |
|
| 60 |
*/ |
|
| 61 |
#define AT24C01B_LLD_I2C_MAXFREQUENCY 400000 |
|
| 62 |
|
|
| 63 |
/** |
|
| 64 |
* @brief Maximum I2C frequency at 5V. |
|
| 65 |
*/ |
|
| 66 |
#define AT24C01B_LLD_I2C_MAXFREQUENCY_5V 1000000 |
|
| 67 |
|
|
| 68 |
|
|
| 69 |
/******************************************************************************/ |
|
| 70 |
/* SETTINGS */ |
|
| 71 |
/******************************************************************************/ |
|
| 72 |
|
|
| 73 |
/******************************************************************************/ |
|
| 74 |
/* CHECKS */ |
|
| 75 |
/******************************************************************************/ |
|
| 76 |
|
|
| 77 |
/******************************************************************************/ |
|
| 78 |
/* DATA STRUCTURES AND TYPES */ |
|
| 79 |
/******************************************************************************/ |
|
| 80 |
|
|
| 81 |
/** |
|
| 82 |
* @brief The AT24C01B driver struct |
|
| 83 |
*/ |
|
| 84 |
typedef struct {
|
|
| 85 |
apalI2CDriver_t* i2cd; /**< @brief The I2C Driver */ |
|
| 86 |
apalI2Caddr_t addr; /**< @brief The address of the AT24C01B for I2C communication, which is defined by the wiring of the A0, A1, A2 pins */ |
|
| 87 |
} AT24C01BDriver; |
|
| 88 |
|
|
| 89 |
/** |
|
| 90 |
* @brief Bitmasks for the I2C address, including the wiring of the A0, A1, A2 pins. |
|
| 91 |
*/ |
|
| 92 |
enum {
|
|
| 93 |
AT24C01B_LLD_I2C_ADDR_FIXED = 0x0050u, |
|
| 94 |
AT24C01B_LLD_I2C_ADDR_A0 = 0x0001u, |
|
| 95 |
AT24C01B_LLD_I2C_ADDR_A1 = 0x0002u, |
|
| 96 |
AT24C01B_LLD_I2C_ADDR_A2 = 0x0004u, |
|
| 97 |
}; |
|
| 98 |
|
|
| 99 |
/******************************************************************************/ |
|
| 100 |
/* MACROS */ |
|
| 101 |
/******************************************************************************/ |
|
| 102 |
|
|
| 103 |
/******************************************************************************/ |
|
| 104 |
/* EXTERN DECLARATIONS */ |
|
| 105 |
/******************************************************************************/ |
|
| 106 |
|
|
| 107 |
#ifdef __cplusplus |
|
| 108 |
extern "C" {
|
|
| 109 |
#endif |
|
| 110 |
apalExitStatus_t at24c01b_lld_poll_ack(const AT24C01BDriver* const at24c01b, const apalTime_t timeout); |
|
| 111 |
apalExitStatus_t at24c01b_lld_read_current_address(const AT24C01BDriver* const at24c01b, uint8_t* const data, const uint8_t num, const apalTime_t timeout); |
|
| 112 |
apalExitStatus_t at24c01b_lld_read(const AT24C01BDriver* const at24c01b, const uint8_t addr, uint8_t* const data, const uint8_t num, const apalTime_t timeout); |
|
| 113 |
apalExitStatus_t at24c01b_lld_write_byte(const AT24C01BDriver* const at24c01b, const uint8_t addr, const uint8_t data, const apalTime_t timeout); |
|
| 114 |
apalExitStatus_t at24c01b_lld_write_page(const AT24C01BDriver* const at24c01b, const uint8_t addr, const uint8_t* const data, const uint8_t num, const apalTime_t timeout); |
|
| 115 |
#ifdef __cplusplus |
|
| 116 |
} |
|
| 117 |
#endif |
|
| 118 |
|
|
| 119 |
/******************************************************************************/ |
|
| 120 |
/* INLINE FUNCTIONS */ |
|
| 121 |
/******************************************************************************/ |
|
| 122 |
|
|
| 123 |
#endif /* AMIROLLD_AT24C01BN_H */ |
|
| 124 |
|
|
| 125 |
/** @} */ |
|
| drivers/AT42QT1050/v1/alld_AT42QT1050.c | ||
|---|---|---|
| 1 |
/* |
|
| 2 |
AMiRo-LLD is a compilation of low-level hardware drivers for the Autonomous Mini Robot (AMiRo) platform. |
|
| 3 |
Copyright (C) 2016..2019 Thomas Schöpping et al. |
|
| 4 |
|
|
| 5 |
This program is free software: you can redistribute it and/or modify |
|
| 6 |
it under the terms of the GNU Lesser General Public License as published by |
|
| 7 |
the Free Software Foundation, either version 3 of the License, or |
|
| 8 |
(at your option) any later version. |
|
| 9 |
|
|
| 10 |
This program is distributed in the hope that it will be useful, |
|
| 11 |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
| 12 |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
| 13 |
GNU Lesser General Public License for more details. |
|
| 14 |
|
|
| 15 |
You should have received a copy of the GNU Lesser General Public License |
|
| 16 |
along with this program. If not, see <http://www.gnu.org/licenses/>. |
|
| 17 |
*/ |
|
| 18 |
|
|
| 19 |
/** |
|
| 20 |
* @file alld_AT42QT1050.c |
|
| 21 |
* @brief Touch sensor function implementations. |
|
| 22 |
* |
|
| 23 |
* @addtogroup lld_touch |
|
| 24 |
* @{
|
|
| 25 |
*/ |
|
| 26 |
|
|
| 27 |
#include <alld_AT42QT1050.h> |
|
| 28 |
#include <math.h> |
|
| 29 |
|
|
| 30 |
/******************************************************************************/ |
|
| 31 |
/* LOCAL DEFINITIONS */ |
|
| 32 |
/******************************************************************************/ |
|
| 33 |
#define AT42QT1050_LLD_WATCHDOGTIME_MAX 125000 |
|
| 34 |
#define AT42QT1050_LLD_INITIALIZATION_TIME_MAX 30000 |
|
| 35 |
|
|
| 36 |
/******************************************************************************/ |
|
| 37 |
/* EXPORTED VARIABLES */ |
|
| 38 |
/******************************************************************************/ |
|
| 39 |
|
|
| 40 |
/******************************************************************************/ |
|
| 41 |
/* LOCAL TYPES */ |
|
| 42 |
/******************************************************************************/ |
|
| 43 |
|
|
| 44 |
/******************************************************************************/ |
|
| 45 |
/* LOCAL VARIABLES */ |
|
| 46 |
/******************************************************************************/ |
|
| 47 |
|
|
| 48 |
/******************************************************************************/ |
|
| 49 |
/* LOCAL FUNCTIONS */ |
|
| 50 |
/******************************************************************************/ |
|
| 51 |
|
|
| 52 |
/******************************************************************************/ |
|
| 53 |
/* EXPORTED FUNCTIONS */ |
|
| 54 |
/******************************************************************************/ |
|
| 55 |
|
|
| 56 |
/** |
|
| 57 |
* @brief Read 8bit data from any register. |
|
| 58 |
* |
|
| 59 |
* @param[in] at42qt1050d The AT42QT1050 driver to use. |
|
| 60 |
* @param[in] reg Register address to read from. |
|
| 61 |
* @param[out] data Pointer to store the register data to. |
|
| 62 |
* @param[in] timeout Timeout for the function to return (in microseconds). |
|
| 63 |
* |
|
| 64 |
* @return Indicator whether the function call was successful or a timeout occurred. |
|
| 65 |
*/ |
|
| 66 |
apalExitStatus_t at42qt1050_lld_read_reg(const AT42QT1050Driver* at42qt1050d, const at42qt1050_lld_register_t reg, uint8_t* const data, const apalTime_t timeout) |
|
| 67 |
{
|
|
| 68 |
apalDbgAssert(at42qt1050d != NULL && at42qt1050d->i2cd != NULL); |
|
| 69 |
apalDbgAssert(data != NULL); |
|
| 70 |
|
|
| 71 |
const uint8_t txbuf = (uint8_t)reg; |
|
| 72 |
return apalI2CMasterTransmit(at42qt1050d->i2cd, at42qt1050d->addr, &txbuf, 1, data, 1, timeout); |
|
| 73 |
} |
|
| 74 |
|
|
| 75 |
/** |
|
| 76 |
* @brief Write 8bit data to any (writable) register. |
|
| 77 |
* |
|
| 78 |
* @param[in] at42qt1050d The AT42QT1050 driver to use. |
|
| 79 |
* @param[in] reg Register address to write to. |
|
| 80 |
* @param[in] data Data to transmit. |
|
| 81 |
* @param[in] timeout Timeout for the function to return (in microseconds). |
|
| 82 |
* |
|
| 83 |
* @return Indicator whether the function call was successful or a timeout occurred. |
|
| 84 |
*/ |
|
| 85 |
apalExitStatus_t at42qt1050_lld_write_reg(const AT42QT1050Driver* at42qt1050d, const at42qt1050_lld_register_t reg, const uint8_t data, const apalTime_t timeout) |
|
| 86 |
{
|
|
| 87 |
apalDbgAssert(at42qt1050d != NULL && at42qt1050d->i2cd != NULL); |
|
| 88 |
|
|
| 89 |
const uint8_t txbuf[2] = { (uint8_t)reg, data };
|
|
| 90 |
return apalI2CMasterTransmit(at42qt1050d->i2cd, at42qt1050d->addr, txbuf, 2, NULL, 0, timeout); |
|
| 91 |
} |
|
| 92 |
|
|
| 93 |
/** |
|
| 94 |
* @brief Read signal information of a key. |
|
| 95 |
* |
|
| 96 |
* @param[in] at42qt1050d The AT42QT1050 driver to use. |
|
| 97 |
* @param[in] key Key to read the signal information of. |
|
| 98 |
* @param[out] signal Pointer to store the data to. |
|
| 99 |
* @param[in] timeout Timeout for the function to return (in microseconds). |
|
| 100 |
* |
|
| 101 |
* @return Indicator whether the function call was successful or a timeout occurred. |
|
| 102 |
*/ |
|
| 103 |
apalExitStatus_t at42qt1050_lld_read_keyssignal(const AT42QT1050Driver* at42qt1050d, const uint8_t key, uint16_t* signal, const apalTime_t timeout) |
|
| 104 |
{
|
|
| 105 |
apalDbgAssert(at42qt1050d != NULL && at42qt1050d->i2cd != NULL); |
|
| 106 |
apalDbgAssert(key < AT42QT1050_LLD_NUM_KEYS); |
|
| 107 |
apalDbgAssert(signal != NULL); |
|
| 108 |
|
|
| 109 |
const at42qt1050_lld_register_t txbuf = at42qt1050_lld_addr_calc(AT42QT1050_LLD_REG_KEYSIGNAL_0, key); |
|
| 110 |
uint8_t rxbuf[2]; |
|
| 111 |
const apalExitStatus_t status = apalI2CMasterTransmit(at42qt1050d->i2cd, at42qt1050d->addr, &txbuf, 1, rxbuf, 2, timeout); |
|
| 112 |
*signal = (rxbuf[0] << 8) | rxbuf[1]; |
|
| 113 |
return status; |
|
| 114 |
} |
|
| 115 |
|
|
| 116 |
/** |
|
| 117 |
* @brief Read reference data of a key. |
|
| 118 |
* |
|
| 119 |
* @param[in] at42qt1050d The AT42QT1050 driver to use. |
|
| 120 |
* @param[in] key Key to read the signal information of. |
|
| 121 |
* @param[out] refdata Pointer to store the data to. |
|
| 122 |
* @param[in] timeout Timeout for the function to return (in microseconds). |
|
| 123 |
* |
|
| 124 |
* @return Indicator whether the function call was successful or a timeout occurred. |
|
| 125 |
*/ |
|
| 126 |
apalExitStatus_t at42qt1050_lld_read_referencedata(const AT42QT1050Driver* at42qt1050d, const uint8_t key, uint16_t* refdata, const apalTime_t timeout) |
|
| 127 |
{
|
|
| 128 |
apalDbgAssert(at42qt1050d != NULL && at42qt1050d->i2cd != NULL); |
|
| 129 |
apalDbgAssert(key < AT42QT1050_LLD_NUM_KEYS); |
|
| 130 |
apalDbgAssert(refdata != NULL); |
|
| 131 |
|
|
| 132 |
const at42qt1050_lld_register_t txbuf = at42qt1050_lld_addr_calc(AT42QT1050_LLD_REG_REFERENCEDATA_0, key); |
|
| 133 |
uint8_t rxbuf[2]; |
|
| 134 |
const apalExitStatus_t status = apalI2CMasterTransmit(at42qt1050d->i2cd, at42qt1050d->addr, &txbuf, 1, rxbuf, 2, timeout); |
|
| 135 |
*refdata = (rxbuf[0] << 8) | rxbuf[1]; |
|
| 136 |
return status; |
|
| 137 |
} |
|
| 138 |
|
|
| 139 |
/** |
|
| 140 |
* @brief Soft Reset of the device |
|
| 141 |
* |
|
| 142 |
* @param[in] at42qt1050d The AT42QT1050 driver to use. |
|
| 143 |
* @param[in] timeout Timeout for the function to return (in microseconds). |
|
| 144 |
* @param[in] wait4wakeup Wait for device wakeup (timeout must be > 155 ms) |
|
| 145 |
* |
|
| 146 |
* @return Indicator whether the function call was successful or a timeout occurred. |
|
| 147 |
*/ |
|
| 148 |
inline apalExitStatus_t at42qt1050_lld_reset_safe(const AT42QT1050Driver* at42qt1050d, const bool wait4wakeup, const apalTime_t timeout) {
|
|
| 149 |
if(wait4wakeup) |
|
| 150 |
apalDbgAssert(timeout >= AT42QT1050_LLD_WATCHDOGTIME_MAX+AT42QT1050_LLD_INITIALIZATION_TIME_MAX); |
|
| 151 |
|
|
| 152 |
return at42qt1050_lld_reset(at42qt1050d, timeout-(AT42QT1050_LLD_WATCHDOGTIME_MAX+AT42QT1050_LLD_INITIALIZATION_TIME_MAX), wait4wakeup); |
|
| 153 |
} |
|
| 154 |
|
|
| 155 |
/** |
|
| 156 |
* @brief Soft Reset of the device |
|
| 157 |
* |
|
| 158 |
* @param[in] at42qt1050d The AT42QT1050 driver to use. |
|
| 159 |
* @param[in] timeout Timeout for the i2c call (in microseconds). |
|
| 160 |
* @param[in] wait4wakeup Wait for device wakeup (155 ms) |
|
| 161 |
* |
|
| 162 |
* @return Indicator whether the function call was successful or a timeout occurred. |
|
| 163 |
*/ |
|
| 164 |
inline apalExitStatus_t at42qt1050_lld_reset(const AT42QT1050Driver* at42qt1050d, const apalTime_t timeout, const bool wait4wakeup) {
|
|
| 165 |
apalDbgAssert(at42qt1050d != NULL && at42qt1050d->i2cd != NULL); |
|
| 166 |
|
|
| 167 |
const apalExitStatus_t status = at42qt1050_lld_write_reg( |
|
| 168 |
at42qt1050d, AT42QT1050_LLD_REG_RESET_CALIBRATE, AT42QT1050_LLD_RESETCALIBRATE_RESET, timeout); |
|
| 169 |
if(wait4wakeup) |
|
| 170 |
usleep(AT42QT1050_LLD_WATCHDOGTIME_MAX+AT42QT1050_LLD_INITIALIZATION_TIME_MAX+timeout); // watchdog timer+initialization -> datasheet |
|
| 171 |
return status; |
|
| 172 |
} |
|
| 173 |
|
|
| 174 |
/** |
|
| 175 |
* @brief Convert a 4 bit pulse value to the representing number of samples. |
|
| 176 |
* @details Calculation: <#samples> = 2^(<pulse value>) |
|
| 177 |
* |
|
| 178 |
* @param[in] pulse Pulse value. |
|
| 179 |
* |
|
| 180 |
* @return Resulting sample count. |
|
| 181 |
*/ |
|
| 182 |
uint16_t at42qt1050_lld_pulse2samples(const uint8_t pulse) |
|
| 183 |
{
|
|
| 184 |
apalDbgAssert(pulse <= 0x0Fu); |
|
| 185 |
|
|
| 186 |
return (1 << pulse); |
|
| 187 |
} |
|
| 188 |
|
|
| 189 |
/** |
|
| 190 |
* @brief Convert a desired number of samples to the according (theoretical) pulse value. |
|
| 191 |
* @details Calculation: <pulse value> = log2(<#samples>) |
|
| 192 |
* |
|
| 193 |
* @param[in] samples Desired number of samples. |
|
| 194 |
* |
|
| 195 |
* @return The (theoretical) value to set to the pulse register. |
|
| 196 |
*/ |
|
| 197 |
float at42qt1050_lld_samples2pulse(const uint16_t samples) |
|
| 198 |
{
|
|
| 199 |
return log2f(samples); |
|
| 200 |
} |
|
| 201 |
|
|
| 202 |
/** |
|
| 203 |
* @brief Convert a 4 bit scale value to the accoring scaling factor. |
|
| 204 |
* @details Calculation: <scaling factor> = 2^(<scale value>) |
|
| 205 |
* |
|
| 206 |
* @param[in] scale Scale value. |
|
| 207 |
* |
|
| 208 |
* @return Resulting scaling factor. |
|
| 209 |
*/ |
|
| 210 |
uint16_t at42qt1050_lld_scale2scaling(const uint8_t scale) |
|
| 211 |
{
|
|
| 212 |
apalDbgAssert(scale <= 0x0Fu); |
|
| 213 |
|
|
| 214 |
return (1 << scale); |
|
| 215 |
} |
|
| 216 |
|
|
| 217 |
/** |
|
| 218 |
* @brief Convert a desired scaling factor to the according (theoretical) scale value. |
|
| 219 |
* @details Calculation: <scale value> = log2(<scaling factor> |
|
| 220 |
* ) |
|
| 221 |
* @param[in] factor Desired scaling factor. |
|
| 222 |
* |
|
| 223 |
* @return The (theoretcial) value to set to the scale register. |
|
| 224 |
*/ |
|
| 225 |
float at42qt1050_lld_scaling2scale(const uint16_t factor) |
|
| 226 |
{
|
|
| 227 |
return log2f(factor); |
|
| 228 |
} |
|
| 229 |
|
|
| 230 |
/** @} */ |
|
| 231 |
|
|
| drivers/AT42QT1050/v1/alld_AT42QT1050.h | ||
|---|---|---|
| 1 |
/* |
|
| 2 |
AMiRo-LLD is a compilation of low-level hardware drivers for the Autonomous Mini Robot (AMiRo) platform. |
|
| 3 |
Copyright (C) 2016..2019 Thomas Schöpping et al. |
|
| 4 |
|
|
| 5 |
This program is free software: you can redistribute it and/or modify |
|
| 6 |
it under the terms of the GNU Lesser General Public License as published by |
|
| 7 |
the Free Software Foundation, either version 3 of the License, or |
|
| 8 |
(at your option) any later version. |
|
| 9 |
|
|
| 10 |
This program is distributed in the hope that it will be useful, |
|
| 11 |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
| 12 |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
| 13 |
GNU Lesser General Public License for more details. |
|
| 14 |
|
|
| 15 |
You should have received a copy of the GNU Lesser General Public License |
|
| 16 |
along with this program. If not, see <http://www.gnu.org/licenses/>. |
|
| 17 |
*/ |
|
| 18 |
|
|
| 19 |
/** |
|
| 20 |
* @file alld_AT42QT1050.h |
|
| 21 |
* @brief Touch sensor macros and structures. |
|
| 22 |
* |
|
| 23 |
* @addtogroup lld_touch |
|
| 24 |
* @{
|
|
| 25 |
*/ |
|
| 26 |
|
|
| 27 |
#ifndef AMIROLLD_AT42QT1050_H |
|
| 28 |
#define AMIROLLD_AT42QT1050_H |
|
| 29 |
|
|
| 30 |
#include <amiro-lld.h> |
|
| 31 |
|
|
| 32 |
/******************************************************************************/ |
|
| 33 |
/* CONSTANTS */ |
|
| 34 |
/******************************************************************************/ |
|
| 35 |
|
|
| 36 |
/** |
|
| 37 |
* @brief Maximum I2C frequency. |
|
| 38 |
*/ |
|
| 39 |
#define AT42QT1050_LLD_I2C_MAXFREQUENCY 400000 |
|
| 40 |
|
|
| 41 |
/** |
|
| 42 |
* @brief A falling edge indicats an interrupt. |
|
| 43 |
*/ |
|
| 44 |
#define AT42QT1050_LLD_INT_EDGE APAL_GPIO_EDGE_FALLING |
|
| 45 |
|
|
| 46 |
/** |
|
| 47 |
* @brief Number of touch keys supported by AT42QT1050. |
|
| 48 |
*/ |
|
| 49 |
#define AT42QT1050_LLD_NUM_KEYS 5 |
|
| 50 |
|
|
| 51 |
/** |
|
| 52 |
* @brief Maximum time (in microseconds) to acquire all key signals before the overflow bit of the detection status register is set. |
|
| 53 |
*/ |
|
| 54 |
#define AT42QT1050_LLD_MAX_KEY_ACQUIRATION_TIME 8000 |
|
| 55 |
|
|
| 56 |
/** |
|
| 57 |
* @brief The chip ID as can be read from the according register (constant). |
|
| 58 |
*/ |
|
| 59 |
#define AT42QT1050_LLD_CHIPID 0x46 |
|
| 60 |
|
|
| 61 |
/******************************************************************************/ |
|
| 62 |
/* SETTINGS */ |
|
| 63 |
/******************************************************************************/ |
|
| 64 |
|
|
| 65 |
/******************************************************************************/ |
|
| 66 |
/* CHECKS */ |
|
| 67 |
/******************************************************************************/ |
|
| 68 |
|
|
| 69 |
/******************************************************************************/ |
|
| 70 |
/* DATA STRUCTURES AND TYPES */ |
|
| 71 |
/******************************************************************************/ |
|
| 72 |
|
|
| 73 |
/** |
|
| 74 |
* @brief The AT42QT1050Driver sruct. |
|
| 75 |
*/ |
|
| 76 |
typedef struct {
|
|
| 77 |
apalI2CDriver_t* i2cd; |
|
| 78 |
apalI2Caddr_t addr; |
|
| 79 |
} AT42QT1050Driver; |
|
| 80 |
|
|
| 81 |
/** |
|
| 82 |
* @brief Possible I2C address configurations. |
|
| 83 |
*/ |
|
| 84 |
enum {
|
|
| 85 |
AT42QT1050_LLD_I2C_ADDRSEL_LOW = 0x0041u, /**< ADDR_SEL pin is pulled low. */ |
|
| 86 |
AT42QT1050_LLD_I2C_ADDRSEL_HIGH = 0x0046u, /**< ADDR_SEL pin is pulled high. */ |
|
| 87 |
}; |
|
| 88 |
|
|
| 89 |
/** |
|
| 90 |
* @brief Available register addresses of the AT42QT1050. |
|
| 91 |
*/ |
|
| 92 |
typedef enum {
|
|
| 93 |
AT42QT1050_LLD_REG_CHIPID = 0x00u, /**< read only */ |
|
| 94 |
AT42QT1050_LLD_REG_FIRMWAREVERSION = 0x01u, /**< read only */ |
|
| 95 |
AT42QT1050_LLD_REG_DETECTIONSTATUS = 0x02u, /**< read only */ |
|
| 96 |
AT42QT1050_LLD_REG_KEYSTATUS = 0x03u, /**< read only */ |
|
| 97 |
AT42QT1050_LLD_REG_KEYSIGNAL_0 = 0x06u, /**< read only */ |
|
| 98 |
AT42QT1050_LLD_REG_KEYSIGNAL_1 = 0x08u, /**< read only */ |
|
| 99 |
AT42QT1050_LLD_REG_KEYSIGNAL_2 = 0x0Du, /**< read only */ |
|
| 100 |
AT42QT1050_LLD_REG_KEYSIGNAL_3 = 0x0Fu, /**< read only */ |
|
| 101 |
AT42QT1050_LLD_REG_KEYSIGNAL_4 = 0x11u, /**< read only */ |
|
| 102 |
AT42QT1050_LLD_REG_REFERENCEDATA_0 = 0x14u, /**< read only */ |
|
| 103 |
AT42QT1050_LLD_REG_REFERENCEDATA_1 = 0x16u, /**< read only */ |
|
| 104 |
AT42QT1050_LLD_REG_REFERENCEDATA_2 = 0x1Au, /**< read only */ |
|
| 105 |
AT42QT1050_LLD_REG_REFERENCEDATA_3 = 0x1Cu, /**< read only */ |
|
| 106 |
AT42QT1050_LLD_REG_REFERENCEDATA_4 = 0x1Eu, /**< read only */ |
|
| 107 |
AT42QT1050_LLD_REG_NEGATIVETHRESHOLD_0 = 0x21u, /**< read/write */ |
|
| 108 |
AT42QT1050_LLD_REG_NEGATIVETHRESHOLD_1 = 0x22u, /**< read/write */ |
|
| 109 |
AT42QT1050_LLD_REG_NEGATIVETHRESHOLD_2 = 0x24u, /**< read/write */ |
|
| 110 |
AT42QT1050_LLD_REG_NEGATIVETHRESHOLD_3 = 0x25u, /**< read/write */ |
|
| 111 |
AT42QT1050_LLD_REG_NEGATIVETHRESHOLD_4 = 0x26u, /**< read/write */ |
|
| 112 |
AT42QT1050_LLD_REG_PULSE_SCALE_0 = 0x28u, /**< read/write */ |
|
| 113 |
AT42QT1050_LLD_REG_PULSE_SCALE_1 = 0x29u, /**< read/write */ |
|
| 114 |
AT42QT1050_LLD_REG_PULSE_SCALE_2 = 0x2Bu, /**< read/write */ |
|
| 115 |
AT42QT1050_LLD_REG_PULSE_SCALE_3 = 0x2Cu, /**< read/write */ |
|
| 116 |
AT42QT1050_LLD_REG_PULSE_SCALE_4 = 0x2Du, /**< read/write */ |
|
| 117 |
AT42QT1050_LLD_REG_INTEGRATOR_AKS_0 = 0x2Fu, /**< read/write */ |
|
| 118 |
AT42QT1050_LLD_REG_INTEGRATOR_AKS_1 = 0x30u, /**< read/write */ |
|
| 119 |
AT42QT1050_LLD_REG_INTEGRATOR_AKS_2 = 0x32u, /**< read/write */ |
|
| 120 |
AT42QT1050_LLD_REG_INTEGRATOR_AKS_3 = 0x33u, /**< read/write */ |
|
| 121 |
AT42QT1050_LLD_REG_INTEGRATOR_AKS_4 = 0x34u, /**< read/write */ |
|
| 122 |
AT42QT1050_LLD_REG_CHARGESHAREDELAY_0 = 0x36u, /**< read/write */ |
|
| 123 |
AT42QT1050_LLD_REG_CHARGESHAREDELAY_1 = 0x37u, /**< read/write */ |
|
| 124 |
AT42QT1050_LLD_REG_CHARGESHAREDELAY_2 = 0x39u, /**< read/write */ |
|
| 125 |
AT42QT1050_LLD_REG_CHARGESHAREDELAY_3 = 0x3Au, /**< read/write */ |
|
| 126 |
AT42QT1050_LLD_REG_CHARGESHAREDELAY_4 = 0x3Bu, /**< read/write */ |
|
| 127 |
AT42QT1050_LLD_REG_FINFOUTMAXCALGUARD = 0x3Cu, /**< read/write */ |
|
| 128 |
AT42QT1050_LLD_REG_LOWPOWERMODE = 0x3Du, /**< read/write */ |
|
| 129 |
AT42QT1050_LLD_REG_MAXONDURATION = 0x3Eu, /**< read/write */ |
|
| 130 |
AT42QT1050_LLD_REG_RESET_CALIBRATE = 0x3Fu, /**< read/write */ |
|
| 131 |
} at42qt1050_lld_register_t; |
|
| 132 |
|
|
| 133 |
/** |
|
| 134 |
* @brief Firmware version register structure. |
|
| 135 |
*/ |
|
| 136 |
typedef union {
|
|
| 137 |
uint8_t raw; |
|
| 138 |
struct {
|
|
| 139 |
uint8_t minor : 4; |
|
| 140 |
uint8_t major : 4; |
|
| 141 |
}; |
|
| 142 |
} at42qt1050_lld_firmwarereg_t; |
|
| 143 |
|
|
| 144 |
|
|
| 145 |
/** |
|
| 146 |
* @brief Relevant bits of the detection status register. |
|
| 147 |
*/ |
|
| 148 |
typedef enum {
|
|
| 149 |
AT42QT1050_LLD_DETECTIONSTATUS_TOUCH = 0x01u, /**< Set if any keys are in detect. */ |
|
| 150 |
AT42QT1050_LLD_DETECTIONSTATUS_OVERFLOW = 0x40u, /**< Set if the time to acquire all key signals exceeds 8ms. */ |
|
| 151 |
AT42QT1050_LLD_DETECTIONSTATUS_CALIBRATE = 0x80u, /**< Set during calibration sequence. */ |
|
| 152 |
} at42qt1050_lld_detectionstatusreg_t; |
|
| 153 |
|
|
| 154 |
/** |
|
| 155 |
* @brief Key status register masks. |
|
| 156 |
*/ |
|
| 157 |
typedef enum {
|
|
| 158 |
AT42QT1050_LLD_KEYSTATUS_KEY0 = 0x02u, |
|
| 159 |
AT42QT1050_LLD_KEYSTATUS_KEY1 = 0x04u, |
|
| 160 |
AT42QT1050_LLD_KEYSTATUS_KEY2 = 0x10u, |
|
| 161 |
AT42QT1050_LLD_KEYSTATUS_KEY3 = 0x20u, |
|
| 162 |
AT42QT1050_LLD_KEYSTATUS_KEY4 = 0x40u, |
|
| 163 |
} at42qt1050_lld_keystatusreg_t; |
|
| 164 |
|
|
| 165 |
/** |
|
| 166 |
* @brief Pulse/Scale register structure. |
|
| 167 |
*/ |
|
| 168 |
typedef union {
|
|
| 169 |
uint8_t raw; |
|
| 170 |
struct {
|
|
| 171 |
uint8_t scale : 4; |
|
| 172 |
uint8_t pulse : 4; |
|
| 173 |
}; |
|
| 174 |
} at42qt1050_lld_pulsescalereg_t; |
|
| 175 |
|
|
| 176 |
/** |
|
| 177 |
* @brief Detection Integrator (DI) / AKS register structure. |
|
| 178 |
*/ |
|
| 179 |
typedef union {
|
|
| 180 |
uint8_t raw; |
|
| 181 |
struct {
|
|
| 182 |
uint8_t aks : 2; |
|
| 183 |
uint8_t detection_integrator : 6; |
|
| 184 |
}; |
|
| 185 |
} at42qt1050_lld_detectionintegratoraksreg_t; |
|
| 186 |
|
|
| 187 |
/** |
|
| 188 |
* @brief Charge share delay constant sclaing factor. |
|
| 189 |
* @details Values in the charge share delay registers are multiplied by this factor. |
|
| 190 |
* Unit is microseconds (µs). |
|
| 191 |
*/ |
|
| 192 |
#define AT42QT1050_LLD_CHARGESHAREDELAY_FACTOR 2.5f |
|
| 193 |
|
|
| 194 |
/** |
|
| 195 |
* @brief FastIn / FastOutDI / Max Cal / Guard Channel register masks. |
|
| 196 |
*/ |
|
| 197 |
typedef enum {
|
|
| 198 |
AT42QT1050_LLD_FINFOUTMAXCALGUARD_GUARD = 0x0Fu, |
|
| 199 |
AT42QT1050_LLD_FINFOUTMAXCALGUARD_MAXCAL = 0x10u, |
|
| 200 |
AT42QT1050_LLD_FINFOUTMAXCALGUARD_FO = 0x20u, |
|
| 201 |
AT42QT1050_LLD_FINFOUTMAXCALGUARD_FI = 0x40u, |
|
| 202 |
} at42qt1050_lld_finfoutmaxcalguardreg_t; |
|
| 203 |
|
|
| 204 |
/** |
|
| 205 |
* @brief Low power mode constant scaling factor. |
|
| 206 |
* @details The values in the low poer mode register is multiplied by this factor. |
|
| 207 |
* Unit is microseconds (µs). |
|
| 208 |
* @note Setting the power mode scaling register value to zero makes the AT42QT1050 enter deep-sleep mode. |
|
| 209 |
*/ |
|
| 210 |
#define AT42QT1050_LLD_LOWPOWER_FACTOR 8000 |
|
| 211 |
|
|
| 212 |
/** |
|
| 213 |
* @brief Man on duration constant scaling factor. |
|
| 214 |
* @details The value in the max on duration register is multiplied by this factor. |
|
| 215 |
* Unit is microseconds (µs). |
|
| 216 |
*/ |
|
| 217 |
#define AT42QT1050_LLD_MAXONDURATION_FACTOR 160000 |
|
| 218 |
|
|
| 219 |
/** |
|
| 220 |
* @brief RESET / Calibrate register masks. |
|
| 221 |
*/ |
|
| 222 |
typedef enum {
|
|
| 223 |
AT42QT1050_LLD_RESETCALIBRATE_CALIBRATE = 0x7Fu, |
|
| 224 |
AT42QT1050_LLD_RESETCALIBRATE_RESET = 0x80u, |
|
| 225 |
} at42qt1050_lld_resetcalibratereg_t; |
|
| 226 |
|
|
| 227 |
/******************************************************************************/ |
|
| 228 |
/* MACROS */ |
|
| 229 |
/******************************************************************************/ |
|
| 230 |
|
|
| 231 |
/******************************************************************************/ |
|
| 232 |
/* EXTERN DECLARATIONS */ |
|
| 233 |
/******************************************************************************/ |
|
| 234 |
|
|
| 235 |
#ifdef __cplusplus |
|
| 236 |
extern "C" {
|
|
| 237 |
#endif |
|
| 238 |
apalExitStatus_t at42qt1050_lld_read_reg(const AT42QT1050Driver* at42qt1050d, const at42qt1050_lld_register_t reg, uint8_t* const data, const apalTime_t timeout); |
|
| 239 |
apalExitStatus_t at42qt1050_lld_write_reg(const AT42QT1050Driver* at42qt1050d, const at42qt1050_lld_register_t reg, const uint8_t data, const apalTime_t timeout); |
|
| 240 |
|
|
| 241 |
apalExitStatus_t at42qt1050_lld_read_keyssignal(const AT42QT1050Driver* at42qt1050d, const uint8_t key, uint16_t* signal, const apalTime_t timeout); |
|
| 242 |
apalExitStatus_t at42qt1050_lld_read_referencedata(const AT42QT1050Driver* at42qt1050d, const uint8_t key, uint16_t* refdata, const apalTime_t timeout); |
|
| 243 |
|
|
| 244 |
apalExitStatus_t at42qt1050_lld_reset_safe(const AT42QT1050Driver* at42qt1050d, const bool wait4wakeup, const apalTime_t timeout); |
|
| 245 |
apalExitStatus_t at42qt1050_lld_reset(const AT42QT1050Driver* at42qt1050d, const apalTime_t timeout, const bool wait4wakeup); |
|
| 246 |
|
|
| 247 |
uint16_t at42qt1050_lld_pulse2samples(const uint8_t pulse); |
|
| 248 |
float at42qt1050_lld_samples2pulse(const uint16_t samples); |
|
| 249 |
uint16_t at42qt1050_lld_scale2scaling(const uint8_t scale); |
|
| 250 |
float at42qt1050_lld_scaling2scale(const uint16_t factor); |
|
| 251 |
|
|
| 252 |
|
|
| 253 |
/** |
|
| 254 |
* @brief Calculates n-th address based on address of register 0. |
|
| 255 |
* @details Calculation: <scale value> = log2(<scaling factor> |
|
| 256 |
* ) |
|
| 257 |
* @param[in] base Base address = frist register |
|
| 258 |
* @param[in] inc Jump to the next register inc times |
|
| 259 |
* |
|
| 260 |
* @return Calculated register address |
|
| 261 |
*/ |
|
| 262 |
inline at42qt1050_lld_register_t at42qt1050_lld_addr_calc(const at42qt1050_lld_register_t base, const uint8_t inc) {
|
|
| 263 |
apalDbgAssert(inc < 5); |
|
| 264 |
|
|
| 265 |
uint8_t double_result = 0; //16bit access |
|
| 266 |
|
|
| 267 |
switch (base) {
|
|
| 268 |
case AT42QT1050_LLD_REG_KEYSIGNAL_0: //2 4 2 2 |
|
| 269 |
case AT42QT1050_LLD_REG_REFERENCEDATA_0: //2 4 2 2 |
|
| 270 |
double_result = 1; |
|
| 271 |
__attribute__((fallthrough)); |
|
| 272 |
case AT42QT1050_LLD_REG_NEGATIVETHRESHOLD_0: //1 2 1 1 |
|
| 273 |
case AT42QT1050_LLD_REG_PULSE_SCALE_0: //1 2 1 1 |
|
| 274 |
case AT42QT1050_LLD_REG_INTEGRATOR_AKS_0: //1 2 1 1 |
|
| 275 |
case AT42QT1050_LLD_REG_CHARGESHAREDELAY_0: //1 2 1 1 |
|
| 276 |
{
|
|
| 277 |
uint8_t increase = ((inc>1)?inc+1:inc); |
|
| 278 |
return (at42qt1050_lld_register_t) (((uint8_t) base)+(increase << double_result)); |
|
| 279 |
} |
|
| 280 |
default: |
|
| 281 |
{
|
|
| 282 |
apalDbgPrintf("invalid base register 0x%04X\n", base);
|
|
| 283 |
return (at42qt1050_lld_register_t) 0xFF; //does not exist |
|
| 284 |
} |
|
| 285 |
} |
|
| 286 |
} |
|
| 287 |
|
|
| 288 |
#ifdef __cplusplus |
|
| 289 |
} |
|
| 290 |
#endif |
|
| 291 |
|
|
| 292 |
/******************************************************************************/ |
|
| 293 |
/* INLINE FUNCTIONS */ |
|
| 294 |
/******************************************************************************/ |
|
| 295 |
|
|
| 296 |
#endif /* AMIROLLD_AT42QT1050_H */ |
|
| 297 |
|
|
| 298 |
/** @} */ |
|
| 299 |
|
|
| drivers/DW1000/v1/alld_DW1000.c | ||
|---|---|---|
| 1 |
/* |
|
| 2 |
AMiRo-LLD is a compilation of low-level hardware drivers for the Autonomous Mini Robot (AMiRo) platform. |
|
| 3 |
Copyright (C) 2016..2019 Thomas Schöpping et al. |
|
| 4 |
|
|
| 5 |
This program is free software: you can redistribute it and/or modify |
|
| 6 |
it under the terms of the GNU Lesser General Public License as published by |
|
| 7 |
the Free Software Foundation, either version 3 of the License, or |
|
| 8 |
(at your option) any later version. |
|
| 9 |
|
|
| 10 |
This program is distributed in the hope that it will be useful, |
|
| 11 |
but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
| 12 |
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
| 13 |
GNU Lesser General Public License for more details. |
|
| 14 |
|
|
| 15 |
You should have received a copy of the GNU Lesser General Public License |
|
| 16 |
along with this program. If not, see <http://www.gnu.org/licenses/>. |
|
| 17 |
*/ |
|
| 18 |
|
|
| 19 |
/*! ------------------------------------------------------------------------------------------------------------------ |
|
| 20 |
* @file deca_device.c |
|
| 21 |
* @brief Decawave device configuration and control functions |
|
| 22 |
* |
|
| 23 |
* @attention |
|
| 24 |
* |
|
| 25 |
* Copyright 2013 (c) Decawave Ltd, Dublin, Ireland. |
|
| 26 |
* |
|
| 27 |
* All rights reserved. |
|
| 28 |
* |
|
| 29 |
*/ |
|
| 30 |
|
|
| 31 |
#include <alld_DW1000.h> |
|
| 32 |
#include <alld_DW1000_regs.h> |
|
| 33 |
#include <assert.h> |
|
| 34 |
#include <string.h> |
|
| 35 |
#include <stdlib.h> |
|
| 36 |
#include <math.h> |
|
| 37 |
|
|
| 38 |
|
|
| 39 |
// HW dependent implementation (see bottom of file) |
|
| 40 |
static int writetospi(uint16_t headerLength, |
|
| 41 |
const uint8_t *headerBuffer, |
|
| 42 |
uint32_t bodyLength, |
|
| 43 |
const uint8_t *bodyBuffer); |
|
| 44 |
|
|
| 45 |
static int readfromspi(uint16_t headerLength, |
|
| 46 |
const uint8_t *headerBuffer, |
|
| 47 |
uint32_t readlength, |
|
| 48 |
uint8_t *readBuffer); |
|
| 49 |
|
|
| 50 |
|
|
| 51 |
// Defines for enable_clocks function |
|
| 52 |
#define FORCE_SYS_XTI 0 |
|
| 53 |
#define ENABLE_ALL_SEQ 1 |
|
| 54 |
#define FORCE_SYS_PLL 2 |
|
| 55 |
#define READ_ACC_ON 7 |
|
| 56 |
#define READ_ACC_OFF 8 |
|
| 57 |
#define FORCE_OTP_ON 11 |
|
| 58 |
#define FORCE_OTP_OFF 12 |
|
| 59 |
#define FORCE_TX_PLL 13 |
|
| 60 |
#define FORCE_LDE 14 |
|
| 61 |
|
|
| 62 |
// Defines for ACK request bitmask in DATA and MAC COMMAND frame control (first byte) - Used to detect AAT bit wrongly set. |
|
| 63 |
#define FCTRL_ACK_REQ_MASK 0x20 |
|
| 64 |
// Frame control maximum length in bytes. |
|
| 65 |
#define FCTRL_LEN_MAX 2 |
|
| 66 |
|
|
| 67 |
|
|
| 68 |
typedef struct {
|
|
| 69 |
uint32_t lo32; |
|
| 70 |
uint16_t target[NUM_PRF]; |
|
| 71 |
} agc_cfg_struct ; |
|
| 72 |
|
|
| 73 |
extern const agc_cfg_struct agc_config ; |
|
| 74 |
|
|
| 75 |
//SFD threshold settings for 110k, 850k, 6.8Mb standard and non-standard |
|
| 76 |
extern const uint16_t sftsh[NUM_BR][NUM_SFD]; |
|
| 77 |
|
|
| 78 |
extern const uint16_t dtune1[NUM_PRF]; |
|
| 79 |
|
|
| 80 |
#define XMLPARAMS_VERSION (1.17f) |
|
| 81 |
|
|
| 82 |
extern const uint32_t fs_pll_cfg[NUM_CH]; |
|
| 83 |
extern const uint8_t fs_pll_tune[NUM_CH]; |
|
| 84 |
extern const uint8_t rx_config[NUM_BW]; |
|
| 85 |
extern const uint32_t tx_config[NUM_CH]; |
|
| 86 |
extern const uint8_t dwnsSFDlen[NUM_BR]; //length of SFD for each of the bitrates |
|
| 87 |
extern const uint32_t digital_bb_config[NUM_PRF][NUM_PACS]; |
|
| 88 |
//extern const uint8_t chan_idx[NUM_CH_SUPPORTED]; // move to header file |
|
| 89 |
extern const double txpwr_compensation[NUM_CH]; |
|
| 90 |
|
|
| 91 |
#define PEAK_MULTPLIER (0x60) //3 -> (0x3 * 32) & 0x00E0 |
|
| 92 |
#define N_STD_FACTOR (13) |
|
| 93 |
#define LDE_PARAM1 (PEAK_MULTPLIER | N_STD_FACTOR) |
|
| 94 |
|
|
| 95 |
#define LDE_PARAM3_16 (0x1607) |
|
| 96 |
#define LDE_PARAM3_64 (0x0607) |
|
| 97 |
|
|
| 98 |
#define MIXER_GAIN_STEP (0.5) |
|
| 99 |
#define DA_ATTN_STEP (2.5) |
|
| 100 |
|
|
| 101 |
// #define DWT_API_ERROR_CHECK // define so API checks config input parameters |
|
| 102 |
|
|
| 103 |
//----------------------------------------- |
|
| 104 |
// map the channel number to the index in the configuration arrays below |
|
| 105 |
// 0th element is chan 1, 1st is chan 2, 2nd is chan 3, 3rd is chan 4, 4th is chan 5, 5th is chan 7 |
|
| 106 |
const uint8_t chan_idx[NUM_CH_SUPPORTED] = {0, 0, 1, 2, 3, 4, 0, 5};
|
|
| 107 |
|
|
| 108 |
//----------------------------------------- |
|
| 109 |
const uint32_t tx_config[NUM_CH] = |
|
| 110 |
{
|
|
| 111 |
RF_TXCTRL_CH1, |
|
| 112 |
RF_TXCTRL_CH2, |
|
| 113 |
RF_TXCTRL_CH3, |
|
| 114 |
RF_TXCTRL_CH4, |
|
| 115 |
RF_TXCTRL_CH5, |
|
| 116 |
RF_TXCTRL_CH7, |
|
| 117 |
}; |
|
| 118 |
|
|
| 119 |
//Frequency Synthesiser - PLL configuration |
|
| 120 |
const uint32_t fs_pll_cfg[NUM_CH] = |
|
| 121 |
{
|
|
| 122 |
FS_PLLCFG_CH1, |
|
| 123 |
FS_PLLCFG_CH2, |
|
| 124 |
FS_PLLCFG_CH3, |
|
| 125 |
FS_PLLCFG_CH4, |
|
| 126 |
FS_PLLCFG_CH5, |
|
| 127 |
FS_PLLCFG_CH7 |
|
| 128 |
}; |
|
| 129 |
|
|
| 130 |
//Frequency Synthesiser - PLL tuning |
|
| 131 |
const uint8_t fs_pll_tune[NUM_CH] = |
|
| 132 |
{
|
|
| 133 |
FS_PLLTUNE_CH1, |
|
| 134 |
FS_PLLTUNE_CH2, |
|
| 135 |
FS_PLLTUNE_CH3, |
|
| 136 |
FS_PLLTUNE_CH4, |
|
| 137 |
FS_PLLTUNE_CH5, |
|
| 138 |
FS_PLLTUNE_CH7 |
|
| 139 |
}; |
|
| 140 |
|
|
| 141 |
//bandwidth configuration |
|
| 142 |
const uint8_t rx_config[NUM_BW] = |
|
| 143 |
{
|
|
| 144 |
RF_RXCTRLH_NBW, |
|
| 145 |
RF_RXCTRLH_WBW |
|
| 146 |
}; |
|
| 147 |
|
|
| 148 |
|
|
| 149 |
const agc_cfg_struct agc_config = |
|
| 150 |
{
|
|
| 151 |
AGC_TUNE2_VAL, |
|
| 152 |
{ AGC_TUNE1_16M , AGC_TUNE1_64M } //adc target
|
|
| 153 |
}; |
|
| 154 |
|
|
| 155 |
//DW non-standard SFD length for 110k, 850k and 6.81M |
|
| 156 |
const uint8_t dwnsSFDlen[NUM_BR] = |
|
| 157 |
{
|
|
| 158 |
DW_NS_SFD_LEN_110K, |
|
| 159 |
DW_NS_SFD_LEN_850K, |
|
| 160 |
DW_NS_SFD_LEN_6M8 |
|
| 161 |
}; |
|
| 162 |
|
|
| 163 |
// SFD Threshold |
|
| 164 |
const uint16_t sftsh[NUM_BR][NUM_SFD] = |
|
| 165 |
{
|
|
| 166 |
{
|
|
| 167 |
DRX_TUNE0b_110K_STD, |
|
| 168 |
DRX_TUNE0b_110K_NSTD |
|
| 169 |
}, |
|
| 170 |
{
|
|
| 171 |
DRX_TUNE0b_850K_STD, |
|
| 172 |
DRX_TUNE0b_850K_NSTD |
|
| 173 |
}, |
|
| 174 |
{
|
|
| 175 |
DRX_TUNE0b_6M8_STD, |
|
| 176 |
DRX_TUNE0b_6M8_NSTD |
|
| 177 |
} |
|
| 178 |
}; |
|
| 179 |
|
|
| 180 |
const uint16_t dtune1[NUM_PRF] = |
|
| 181 |
{
|
|
| 182 |
DRX_TUNE1a_PRF16, |
|
| 183 |
DRX_TUNE1a_PRF64 |
|
| 184 |
}; |
|
| 185 |
|
|
| 186 |
const uint32_t digital_bb_config[NUM_PRF][NUM_PACS] = |
|
| 187 |
{
|
|
| 188 |
{
|
|
| 189 |
DRX_TUNE2_PRF16_PAC8, |
|
| 190 |
DRX_TUNE2_PRF16_PAC16, |
|
| 191 |
DRX_TUNE2_PRF16_PAC32, |
|
| 192 |
DRX_TUNE2_PRF16_PAC64 |
|
| 193 |
}, |
|
| 194 |
{
|
|
| 195 |
DRX_TUNE2_PRF64_PAC8, |
|
| 196 |
DRX_TUNE2_PRF64_PAC16, |
|
| 197 |
DRX_TUNE2_PRF64_PAC32, |
|
| 198 |
DRX_TUNE2_PRF64_PAC64 |
|
| 199 |
} |
|
| 200 |
}; |
|
| 201 |
|
|
| 202 |
const uint16_t lde_replicaCoeff[PCODES] = |
|
| 203 |
{
|
|
| 204 |
0, // No preamble code 0 |
|
| 205 |
LDE_REPC_PCODE_1, |
|
| 206 |
LDE_REPC_PCODE_2, |
|
| 207 |
LDE_REPC_PCODE_3, |
|
| 208 |
LDE_REPC_PCODE_4, |
|
| 209 |
LDE_REPC_PCODE_5, |
|
| 210 |
LDE_REPC_PCODE_6, |
|
| 211 |
LDE_REPC_PCODE_7, |
|
| 212 |
LDE_REPC_PCODE_8, |
|
| 213 |
LDE_REPC_PCODE_9, |
|
| 214 |
LDE_REPC_PCODE_10, |
|
| 215 |
LDE_REPC_PCODE_11, |
|
| 216 |
LDE_REPC_PCODE_12, |
|
| 217 |
LDE_REPC_PCODE_13, |
|
| 218 |
LDE_REPC_PCODE_14, |
|
| 219 |
LDE_REPC_PCODE_15, |
|
| 220 |
LDE_REPC_PCODE_16, |
|
| 221 |
LDE_REPC_PCODE_17, |
|
| 222 |
LDE_REPC_PCODE_18, |
|
| 223 |
LDE_REPC_PCODE_19, |
|
| 224 |
LDE_REPC_PCODE_20, |
|
| 225 |
LDE_REPC_PCODE_21, |
|
| 226 |
LDE_REPC_PCODE_22, |
|
| 227 |
LDE_REPC_PCODE_23, |
|
| 228 |
LDE_REPC_PCODE_24 |
|
| 229 |
}; |
|
| 230 |
|
|
| 231 |
const double txpwr_compensation[NUM_CH] = {
|
|
| 232 |
0.0, |
|
| 233 |
0.035, |
|
| 234 |
0.0, |
|
| 235 |
0.0, |
|
| 236 |
0.065, |
|
| 237 |
0.0 |
|
| 238 |
}; |
|
| 239 |
|
|
| 240 |
|
|
| 241 |
const uint8_t chan_idxnb[NUM_CH_SUPPORTED] = {0, 0, 1, 2, 0, 3, 0, 0}; //only channels 1,2,3 and 5 are in the narrow band tables
|
|
| 242 |
const uint8_t chan_idxwb[NUM_CH_SUPPORTED] = {0, 0, 0, 0, 0, 0, 0, 1}; //only channels 4 and 7 are in in the wide band tables
|
|
| 243 |
|
|
| 244 |
//--------------------------------------------------------------------------------------------------------------------------- |
|
| 245 |
// Range Bias Correction TABLES of range values in integer units of 25 CM, for 8-bit unsigned storage, MUST END IN 255 !!!!!! |
|
| 246 |
//--------------------------------------------------------------------------------------------------------------------------- |
|
| 247 |
|
|
| 248 |
// offsets to nearest centimeter for index 0, all rest are +1 cm per value |
|
| 249 |
|
|
| 250 |
#define CM_OFFSET_16M_NB (-23) // for normal band channels at 16 MHz PRF |
|
| 251 |
#define CM_OFFSET_16M_WB (-28) // for wider band channels at 16 MHz PRF |
|
| 252 |
#define CM_OFFSET_64M_NB (-17) // for normal band channels at 64 MHz PRF |
|
| 253 |
#define CM_OFFSET_64M_WB (-30) // for wider band channels at 64 MHz PRF |
|
| 254 |
|
|
| 255 |
|
|
| 256 |
//--------------------------------------------------------------------------------------------------------------------------- |
|
| 257 |
// range25cm16PRFnb: Range Bias Correction table for narrow band channels at 16 MHz PRF, NB: !!!! each MUST END IN 255 !!!! |
|
| 258 |
//--------------------------------------------------------------------------------------------------------------------------- |
|
| 259 |
|
|
| 260 |
const uint8_t range25cm16PRFnb[4][NUM_16M_OFFSET] = |
|
| 261 |
{
|
|
| 262 |
// ch 1 - range25cm16PRFnb |
|
| 263 |
{
|
|
| 264 |
1, |
|
| 265 |
3, |
|
| 266 |
4, |
|
| 267 |
5, |
|
| 268 |
7, |
|
| 269 |
9, |
|
| 270 |
11, |
|
| 271 |
12, |
|
| 272 |
13, |
|
| 273 |
15, |
|
| 274 |
18, |
|
| 275 |
20, |
|
| 276 |
23, |
|
| 277 |
25, |
|
| 278 |
28, |
|
| 279 |
30, |
|
| 280 |
33, |
|
| 281 |
36, |
|
| 282 |
40, |
|
| 283 |
43, |
|
| 284 |
47, |
|
| 285 |
50, |
|
| 286 |
54, |
|
| 287 |
58, |
|
| 288 |
63, |
|
| 289 |
66, |
|
| 290 |
71, |
|
| 291 |
76, |
|
| 292 |
82, |
|
| 293 |
89, |
|
| 294 |
98, |
|
| 295 |
109, |
|
| 296 |
127, |
|
| 297 |
155, |
|
| 298 |
222, |
|
| 299 |
255, |
|
| 300 |
255 |
|
| 301 |
}, |
|
| 302 |
|
|
| 303 |
// ch 2 - range25cm16PRFnb |
|
| 304 |
{
|
|
| 305 |
1, |
|
| 306 |
2, |
|
| 307 |
4, |
|
| 308 |
5, |
|
| 309 |
6, |
|
| 310 |
8, |
|
| 311 |
9, |
|
| 312 |
10, |
|
| 313 |
12, |
|
| 314 |
13, |
|
| 315 |
15, |
|
| 316 |
18, |
|
| 317 |
20, |
|
| 318 |
22, |
|
| 319 |
24, |
|
| 320 |
27, |
|
| 321 |
29, |
|
| 322 |
32, |
|
| 323 |
35, |
|
| 324 |
38, |
|
| 325 |
41, |
|
| 326 |
44, |
|
| 327 |
47, |
|
| 328 |
51, |
|
| 329 |
55, |
|
| 330 |
58, |
|
| 331 |
62, |
|
| 332 |
66, |
|
| 333 |
71, |
|
| 334 |
78, |
|
| 335 |
85, |
|
| 336 |
96, |
|
| 337 |
111, |
|
| 338 |
135, |
|
| 339 |
194, |
|
| 340 |
240, |
|
| 341 |
255 |
|
| 342 |
}, |
|
| 343 |
|
|
| 344 |
// ch 3 - range25cm16PRFnb |
|
| 345 |
{
|
|
| 346 |
1, |
|
| 347 |
2, |
|
| 348 |
3, |
|
| 349 |
4, |
|
| 350 |
5, |
|
| 351 |
7, |
|
| 352 |
8, |
|
| 353 |
9, |
|
| 354 |
10, |
|
| 355 |
12, |
|
| 356 |
14, |
|
| 357 |
16, |
|
| 358 |
18, |
|
| 359 |
20, |
|
| 360 |
22, |
|
| 361 |
24, |
|
| 362 |
26, |
|
| 363 |
28, |
|
| 364 |
31, |
|
| 365 |
33, |
|
| 366 |
36, |
|
| 367 |
39, |
|
| 368 |
42, |
|
| 369 |
45, |
|
| 370 |
49, |
|
| 371 |
52, |
|
| 372 |
55, |
|
| 373 |
59, |
|
| 374 |
63, |
|
| 375 |
69, |
|
| 376 |
76, |
|
| 377 |
85, |
|
| 378 |
98, |
|
| 379 |
120, |
|
| 380 |
173, |
|
| 381 |
213, |
|
| 382 |
255 |
|
| 383 |
}, |
|
| 384 |
|
|
| 385 |
// ch 5 - range25cm16PRFnb |
|
| 386 |
{
|
|
| 387 |
1, |
|
| 388 |
1, |
|
| 389 |
2, |
|
| 390 |
3, |
|
| 391 |
4, |
|
| 392 |
5, |
|
| 393 |
6, |
|
| 394 |
6, |
|
| 395 |
7, |
|
| 396 |
8, |
|
| 397 |
9, |
|
| 398 |
11, |
|
| 399 |
12, |
|
| 400 |
14, |
|
| 401 |
15, |
|
| 402 |
16, |
|
| 403 |
18, |
|
| 404 |
20, |
|
| 405 |
21, |
|
| 406 |
23, |
|
| 407 |
25, |
|
| 408 |
27, |
|
Also available in: Unified diff