amiro-lld / include / AT42QT1050 / v1 / alld_AT42QT1050_v1.h @ 9797f02a
History | View | Annotate | Download (11.711 KB)
| 1 | 9e45662e | Thomas Schöpping | /*
|
|---|---|---|---|
| 2 | AMiRo-LLD is a compilation of low-level hardware drivers for the Autonomous Mini Robot (AMiRo) platform.
|
||
| 3 | Copyright (C) 2016..2019 Thomas Schöpping et al.
|
||
| 4 | |||
| 5 | This program is free software: you can redistribute it and/or modify
|
||
| 6 | it under the terms of the GNU Lesser General Public License as published by
|
||
| 7 | the Free Software Foundation, either version 3 of the License, or
|
||
| 8 | (at your option) any later version.
|
||
| 9 | |||
| 10 | This program is distributed in the hope that it will be useful,
|
||
| 11 | but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||
| 12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||
| 13 | GNU Lesser General Public License for more details.
|
||
| 14 | |||
| 15 | You should have received a copy of the GNU Lesser General Public License
|
||
| 16 | along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||
| 17 | */
|
||
| 18 | |||
| 19 | /**
|
||
| 20 | 1d5bcc82 | Thomas Schöpping | * @file alld_AT42QT1050_v1.h
|
| 21 | 9e45662e | Thomas Schöpping | * @brief Touch sensor macros and structures.
|
| 22 | *
|
||
| 23 | * @addtogroup lld_touch
|
||
| 24 | * @{
|
||
| 25 | */
|
||
| 26 | |||
| 27 | 1d5bcc82 | Thomas Schöpping | #ifndef AMIROLLD_AT42QT1050_V1_H
|
| 28 | #define AMIROLLD_AT42QT1050_V1_H
|
||
| 29 | 9e45662e | Thomas Schöpping | |
| 30 | #include <amiro-lld.h> |
||
| 31 | |||
| 32 | 1d5bcc82 | Thomas Schöpping | #if (defined(AMIROLLD_CFG_AT42QT1050) && (AMIROLLD_CFG_AT42QT1050 == 1)) || defined(__DOXYGEN__) |
| 33 | 9e45662e | Thomas Schöpping | |
| 34 | ef078306 | Thomas Schöpping | /******************************************************************************/
|
| 35 | /* CONSTANTS */
|
||
| 36 | /******************************************************************************/
|
||
| 37 | |||
| 38 | 9e45662e | Thomas Schöpping | /**
|
| 39 | * @brief Maximum I2C frequency.
|
||
| 40 | */
|
||
| 41 | #define AT42QT1050_LLD_I2C_MAXFREQUENCY 400000 |
||
| 42 | |||
| 43 | /**
|
||
| 44 | * @brief A falling edge indicats an interrupt.
|
||
| 45 | */
|
||
| 46 | #define AT42QT1050_LLD_INT_EDGE APAL_GPIO_EDGE_FALLING
|
||
| 47 | |||
| 48 | /**
|
||
| 49 | * @brief Number of touch keys supported by AT42QT1050.
|
||
| 50 | */
|
||
| 51 | #define AT42QT1050_LLD_NUM_KEYS 5 |
||
| 52 | |||
| 53 | /**
|
||
| 54 | * @brief Maximum time (in microseconds) to acquire all key signals before the overflow bit of the detection status register is set.
|
||
| 55 | */
|
||
| 56 | #define AT42QT1050_LLD_MAX_KEY_ACQUIRATION_TIME 8000 |
||
| 57 | |||
| 58 | /**
|
||
| 59 | ef078306 | Thomas Schöpping | * @brief The chip ID as can be read from the according register (constant).
|
| 60 | */
|
||
| 61 | #define AT42QT1050_LLD_CHIPID 0x46 |
||
| 62 | |||
| 63 | /******************************************************************************/
|
||
| 64 | /* SETTINGS */
|
||
| 65 | /******************************************************************************/
|
||
| 66 | |||
| 67 | /******************************************************************************/
|
||
| 68 | /* CHECKS */
|
||
| 69 | /******************************************************************************/
|
||
| 70 | |||
| 71 | /******************************************************************************/
|
||
| 72 | /* DATA STRUCTURES AND TYPES */
|
||
| 73 | /******************************************************************************/
|
||
| 74 | |||
| 75 | /**
|
||
| 76 | 9e45662e | Thomas Schöpping | * @brief The AT42QT1050Driver sruct.
|
| 77 | */
|
||
| 78 | typedef struct { |
||
| 79 | apalI2CDriver_t* i2cd; |
||
| 80 | apalI2Caddr_t addr; |
||
| 81 | } AT42QT1050Driver; |
||
| 82 | |||
| 83 | /**
|
||
| 84 | * @brief Possible I2C address configurations.
|
||
| 85 | */
|
||
| 86 | enum {
|
||
| 87 | AT42QT1050_LLD_I2C_ADDRSEL_LOW = 0x0041u, /**< ADDR_SEL pin is pulled low. */ |
||
| 88 | AT42QT1050_LLD_I2C_ADDRSEL_HIGH = 0x0046u, /**< ADDR_SEL pin is pulled high. */ |
||
| 89 | }; |
||
| 90 | |||
| 91 | /**
|
||
| 92 | * @brief Available register addresses of the AT42Q1050.
|
||
| 93 | */
|
||
| 94 | typedef enum { |
||
| 95 | AT42QT1050_LLD_REG_CHIPID = 0x00u, /**< read only */ |
||
| 96 | AT42QT1050_LLD_REG_FIRMWAREVERSION = 0x01u, /**< read only */ |
||
| 97 | AT42QT1050_LLD_REG_DETECTIONSTATUS = 0x02u, /**< read only */ |
||
| 98 | AT42QT1050_LLD_REG_KEYSTATUS = 0x03u, /**< read only */ |
||
| 99 | AT42QT1050_LLD_REG_KEYSIGNAL_0 = 0x06u, /**< read only */ |
||
| 100 | AT42QT1050_LLD_REG_KEYSIGNAL_1 = 0x08u, /**< read only */ |
||
| 101 | AT42QT1050_LLD_REG_KEYSIGNAL_2 = 0x0Du, /**< read only */ |
||
| 102 | AT42QT1050_LLD_REG_KEYSIGNAL_3 = 0x0Fu, /**< read only */ |
||
| 103 | AT42QT1050_LLD_REG_KEYSIGNAL_4 = 0x11u, /**< read only */ |
||
| 104 | AT42QT1050_LLD_REG_REFERENCEDATA_0 = 0x14u, /**< read only */ |
||
| 105 | AT42QT1050_LLD_REG_REFERENCEDATA_1 = 0x16u, /**< read only */ |
||
| 106 | AT42QT1050_LLD_REG_REFERENCEDATA_2 = 0x1Au, /**< read only */ |
||
| 107 | AT42QT1050_LLD_REG_REFERENCEDATA_3 = 0x1Cu, /**< read only */ |
||
| 108 | AT42QT1050_LLD_REG_REFERENCEDATA_4 = 0x1Eu, /**< read only */ |
||
| 109 | AT42QT1050_LLD_REG_NEGATIVETHRESHOLD_0 = 0x21u, /**< read/write */ |
||
| 110 | AT42QT1050_LLD_REG_NEGATIVETHRESHOLD_1 = 0x22u, /**< read/write */ |
||
| 111 | AT42QT1050_LLD_REG_NEGATIVETHRESHOLD_2 = 0x24u, /**< read/write */ |
||
| 112 | AT42QT1050_LLD_REG_NEGATIVETHRESHOLD_3 = 0x25u, /**< read/write */ |
||
| 113 | AT42QT1050_LLD_REG_NEGATIVETHRESHOLD_4 = 0x26u, /**< read/write */ |
||
| 114 | AT42QT1050_LLD_REG_PULSE_SCALE_0 = 0x28u, /**< read/write */ |
||
| 115 | AT42QT1050_LLD_REG_PULSE_SCALE_1 = 0x29u, /**< read/write */ |
||
| 116 | AT42QT1050_LLD_REG_PULSE_SCALE_2 = 0x2Bu, /**< read/write */ |
||
| 117 | AT42QT1050_LLD_REG_PULSE_SCALE_3 = 0x2Cu, /**< read/write */ |
||
| 118 | AT42QT1050_LLD_REG_PULSE_SCALE_4 = 0x2Du, /**< read/write */ |
||
| 119 | AT42QT1050_LLD_REG_INTEGRATOR_AKS_0 = 0x2Fu, /**< read/write */ |
||
| 120 | AT42QT1050_LLD_REG_INTEGRATOR_AKS_1 = 0x30u, /**< read/write */ |
||
| 121 | AT42QT1050_LLD_REG_INTEGRATOR_AKS_2 = 0x32u, /**< read/write */ |
||
| 122 | AT42QT1050_LLD_REG_INTEGRATOR_AKS_3 = 0x33u, /**< read/write */ |
||
| 123 | AT42QT1050_LLD_REG_INTEGRATOR_AKS_4 = 0x34u, /**< read/write */ |
||
| 124 | AT42QT1050_LLD_REG_CHARGESHAREDELAY_0 = 0x36u, /**< read/write */ |
||
| 125 | AT42QT1050_LLD_REG_CHARGESHAREDELAY_1 = 0x37u, /**< read/write */ |
||
| 126 | AT42QT1050_LLD_REG_CHARGESHAREDELAY_2 = 0x39u, /**< read/write */ |
||
| 127 | AT42QT1050_LLD_REG_CHARGESHAREDELAY_3 = 0x3Au, /**< read/write */ |
||
| 128 | AT42QT1050_LLD_REG_CHARGESHAREDELAY_4 = 0x3Bu, /**< read/write */ |
||
| 129 | AT42QT1050_LLD_REG_FINFOUTMAXCALGUARD = 0x3Cu, /**< read/write */ |
||
| 130 | AT42QT1050_LLD_REG_LOWPOWERMODE = 0x3Du, /**< read/write */ |
||
| 131 | AT42QT1050_LLD_REG_MAXONDURATION = 0x3Eu, /**< read/write */ |
||
| 132 | AT42QT1050_LLD_REG_RESET_CALIBRATE = 0x3Fu, /**< read/write */ |
||
| 133 | } at42qt1050_lld_register_t; |
||
| 134 | |||
| 135 | /**
|
||
| 136 | * @brief Firmware version register structure.
|
||
| 137 | */
|
||
| 138 | typedef union { |
||
| 139 | uint8_t raw; |
||
| 140 | struct {
|
||
| 141 | uint8_t minor : 4;
|
||
| 142 | uint8_t major : 4;
|
||
| 143 | }; |
||
| 144 | } at42qt1050_lld_firmwarereg_t; |
||
| 145 | |||
| 146 | |||
| 147 | /**
|
||
| 148 | * @brief Relevant bits of the detection status register.
|
||
| 149 | */
|
||
| 150 | typedef enum { |
||
| 151 | AT42QT1050_LLD_DETECTIONSTATUS_TOUCH = 0x01u, /**< Set if any keys are in detect. */ |
||
| 152 | AT42QT1050_LLD_DETECTIONSTATUS_OVERFLOW = 0x40u, /**< Set if the time to acquire all key signals exceeds 8ms. */ |
||
| 153 | AT42QT1050_LLD_DETECTIONSTATUS_CALIBRATE = 0x80u, /**< Set during calibration sequence. */ |
||
| 154 | } at42q1050_lld_detectionstatusreg_t; |
||
| 155 | |||
| 156 | /**
|
||
| 157 | * @brief Key status register masks.
|
||
| 158 | */
|
||
| 159 | typedef enum { |
||
| 160 | AT42QT1050_LLD_KEYSTATUS_KEY0 = 0x02u,
|
||
| 161 | AT42QT1050_LLD_KEYSTATUS_KEY1 = 0x04u,
|
||
| 162 | AT42QT1050_LLD_KEYSTATUS_KEY2 = 0x10u,
|
||
| 163 | AT42QT1050_LLD_KEYSTATUS_KEY3 = 0x20u,
|
||
| 164 | AT42QT1050_LLD_KEYSTATUS_KEY4 = 0x40u,
|
||
| 165 | } at42qt1050_lld_keystatusreg_t; |
||
| 166 | |||
| 167 | /**
|
||
| 168 | * @brief Pulse/Scale register structure.
|
||
| 169 | */
|
||
| 170 | typedef union { |
||
| 171 | uint8_t raw; |
||
| 172 | struct {
|
||
| 173 | uint8_t scale : 4;
|
||
| 174 | uint8_t pulse : 4;
|
||
| 175 | }; |
||
| 176 | } at42qt1050_lld_pulsescalereg_t; |
||
| 177 | |||
| 178 | /**
|
||
| 179 | * @brief Detection Integrator (DI) / AKS register structure.
|
||
| 180 | */
|
||
| 181 | typedef union { |
||
| 182 | uint8_t raw; |
||
| 183 | struct {
|
||
| 184 | uint8_t aks : 2;
|
||
| 185 | uint8_t detection_integrator : 6;
|
||
| 186 | }; |
||
| 187 | } at42qt1050_lld_detectionintegratoraksreg_t; |
||
| 188 | |||
| 189 | /**
|
||
| 190 | * @brief Charge share delay constant sclaing factor.
|
||
| 191 | * @details Values in the charge share delay registers are multiplied by this factor.
|
||
| 192 | * Unit is microseconds (µs).
|
||
| 193 | */
|
||
| 194 | #define AT42QT1050_LLD_CHARGESHAREDELAY_FACTOR 2.5f |
||
| 195 | |||
| 196 | /**
|
||
| 197 | * @brief FastIn / FastOutDI / Max Cal / Guard Channel register masks.
|
||
| 198 | */
|
||
| 199 | typedef enum { |
||
| 200 | AT42QT1050_LLD_FINFOUTMAXCALGUARD_GUARD = 0x0Fu,
|
||
| 201 | AT42QT1050_LLD_FINFOUTMAXCALGUARD_MAXCAL = 0x10u,
|
||
| 202 | AT42QT1050_LLD_FINFOUTMAXCALGUARD_FO = 0x20u,
|
||
| 203 | AT42QT1050_LLD_FINFOUTMAXCALGUARD_FI = 0x40u,
|
||
| 204 | } at42qt1050_lld_finfoutmaxcalguardreg_t; |
||
| 205 | |||
| 206 | /**
|
||
| 207 | * @brief Low power mode constant scaling factor.
|
||
| 208 | * @details The values in the low poer mode register is multiplied by this factor.
|
||
| 209 | * Unit is microseconds (µs).
|
||
| 210 | * @note Setting the power mode scaling register value to zero makes the AT42QT1050 enter deep-sleep mode.
|
||
| 211 | */
|
||
| 212 | #define AT42QT1050_LLD_LOWPOWER_FACTOR 8000 |
||
| 213 | |||
| 214 | /**
|
||
| 215 | * @brief Man on duration constant scaling factor.
|
||
| 216 | * @details The value in the max on duration register is multiplied by this factor.
|
||
| 217 | * Unit is microseconds (µs).
|
||
| 218 | */
|
||
| 219 | #define AT42QT1050_LLD_MAXONDURATION_FACTOR 160000 |
||
| 220 | |||
| 221 | /**
|
||
| 222 | * @brief RESET / Calibrate register masks.
|
||
| 223 | */
|
||
| 224 | typedef enum { |
||
| 225 | AT42QT1050_LLD_RESETCALIBRATE_CALIBRATE = 0x7Fu,
|
||
| 226 | AT42QT1050_LLD_RESETCALIBRATE_RESET = 0x80u,
|
||
| 227 | } at42qt1050_lld_resetcalibratereg_t; |
||
| 228 | |||
| 229 | ef078306 | Thomas Schöpping | /******************************************************************************/
|
| 230 | /* MACROS */
|
||
| 231 | /******************************************************************************/
|
||
| 232 | |||
| 233 | /******************************************************************************/
|
||
| 234 | /* EXTERN DECLARATIONS */
|
||
| 235 | /******************************************************************************/
|
||
| 236 | |||
| 237 | 9e45662e | Thomas Schöpping | #ifdef __cplusplus
|
| 238 | extern "C" { |
||
| 239 | #endif
|
||
| 240 | apalExitStatus_t at42qt1050_lld_read_reg(const AT42QT1050Driver* at42qt1050d, const at42qt1050_lld_register_t reg, uint8_t* const data, const apalTime_t timeout); |
||
| 241 | apalExitStatus_t at42qt1050_lld_write_reg(const AT42QT1050Driver* at42qt1050d, const at42qt1050_lld_register_t reg, const uint8_t data, const apalTime_t timeout); |
||
| 242 | |||
| 243 | apalExitStatus_t at42qt1050_lld_read_keyssignal(const AT42QT1050Driver* at42qt1050d, const uint8_t key, uint16_t* signal, const apalTime_t timeout); |
||
| 244 | apalExitStatus_t at42qt1050_lld_read_referencedata(const AT42QT1050Driver* at42qt1050d, const uint8_t key, uint16_t* refdata, const apalTime_t timeout); |
||
| 245 | |||
| 246 | 119ec0d2 | Felix Wittenfeld | apalExitStatus_t at42qt1050_lld_reset_safe(const AT42QT1050Driver* at42qt1050d, const bool wait4wakeup, const apalTime_t timeout); |
| 247 | apalExitStatus_t at42qt1050_lld_reset(const AT42QT1050Driver* at42qt1050d, const apalTime_t timeout, const bool wait4wakeup); |
||
| 248 | |||
| 249 | 9e45662e | Thomas Schöpping | uint16_t at42qt1050_lld_pulse2samples(const uint8_t pulse);
|
| 250 | float at42qt1050_lld_samples2pulse(const uint16_t samples); |
||
| 251 | uint16_t at42qt1050_lld_scale2scaling(const uint8_t scale);
|
||
| 252 | float at42qt1050_lld_scaling2scale(const uint16_t factor); |
||
| 253 | 7df78c60 | Felix Wittenfeld | |
| 254 | |||
| 255 | /**
|
||
| 256 | * @brief Calculates n-th address based on address of register 0.
|
||
| 257 | * @details Calculation: <scale value> = log2(<scaling factor>
|
||
| 258 | * )
|
||
| 259 | * @param[in] base Base address = frist register
|
||
| 260 | * @param[in] inc Jump to the next register inc times
|
||
| 261 | *
|
||
| 262 | * @return Calculated register address
|
||
| 263 | */
|
||
| 264 | inline at42qt1050_lld_register_t at42qt1050_lld_addr_calc(const at42qt1050_lld_register_t base, const uint8_t inc) { |
||
| 265 | apalDbgAssert(inc < 5);
|
||
| 266 | |||
| 267 | uint8_t double_result = 0; //16bit access |
||
| 268 | |||
| 269 | switch (base) {
|
||
| 270 | case AT42QT1050_LLD_REG_KEYSIGNAL_0: //2 4 2 2 |
||
| 271 | case AT42QT1050_LLD_REG_REFERENCEDATA_0: //2 4 2 2 |
||
| 272 | double_result = 1;
|
||
| 273 | case AT42QT1050_LLD_REG_NEGATIVETHRESHOLD_0: //1 2 1 1 |
||
| 274 | case AT42QT1050_LLD_REG_PULSE_SCALE_0: //1 2 1 1 |
||
| 275 | case AT42QT1050_LLD_REG_INTEGRATOR_AKS_0: //1 2 1 1 |
||
| 276 | case AT42QT1050_LLD_REG_CHARGESHAREDELAY_0: //1 2 1 1 |
||
| 277 | {
|
||
| 278 | uint8_t increase = ((inc>1)?inc+1:inc); |
||
| 279 | return (at42qt1050_lld_register_t) (((uint8_t) base)+(increase << double_result));
|
||
| 280 | } |
||
| 281 | default:
|
||
| 282 | {
|
||
| 283 | apalDbgPrintf("invalid base register 0x%04X\n", base);
|
||
| 284 | return (at42qt1050_lld_register_t) 0xFF; //does not exist |
||
| 285 | } |
||
| 286 | } |
||
| 287 | } |
||
| 288 | |||
| 289 | 9e45662e | Thomas Schöpping | #ifdef __cplusplus
|
| 290 | } |
||
| 291 | #endif
|
||
| 292 | |||
| 293 | ef078306 | Thomas Schöpping | /******************************************************************************/
|
| 294 | /* INLINE FUNCTIONS */
|
||
| 295 | /******************************************************************************/
|
||
| 296 | |||
| 297 | 1d5bcc82 | Thomas Schöpping | #endif /* defined(AMIROLLD_CFG_AT42QT1050) && (AMIROLLD_CFG_AT42QT1050 == 1) */ |
| 298 | 9e45662e | Thomas Schöpping | |
| 299 | 1d5bcc82 | Thomas Schöpping | #endif /* AMIROLLD_AT42QT1050_V1_H */ |
| 300 | 9e45662e | Thomas Schöpping | |
| 301 | /** @} */ |