AMiRo-OS

/*! ------------------------------------------------------------------------------------------------------------------

 * @file    deca_device.c

 * @brief   Decawave device configuration and control functions

 *

 * @attention

 *

 * Copyright 2013 (c) Decawave Ltd, Dublin, Ireland.

 *

 * All rights reserved.

 *

 */

#include <assert.h>

#include <stdlib.h>

#include "deca_types.h"

#include "deca_param_types.h"

#include "deca_regs.h"

#include "deca_device_api.h"

// Defines for enable_clocks function

#define FORCE_SYS_XTI  0

#define ENABLE_ALL_SEQ 1

#define FORCE_SYS_PLL  2

#define READ_ACC_ON    7

#define READ_ACC_OFF   8

#define FORCE_OTP_ON   11

#define FORCE_OTP_OFF  12

#define FORCE_TX_PLL   13

#define FORCE_LDE      14

// Defines for ACK request bitmask in DATA and MAC COMMAND frame control (first byte) - Used to detect AAT bit wrongly set.

#define FCTRL_ACK_REQ_MASK 0x20

// Frame control maximum length in bytes.

#define FCTRL_LEN_MAX 2

// #define DWT_API_ERROR_CHECK     // define so API checks config input parameters

// -------------------------------------------------------------------------------------------------------------------

//

// Internal functions for controlling and configuring the device

//

// -------------------------------------------------------------------------------------------------------------------

// Enable and Configure specified clocks

void _dwt_enableclocks(int clocks) ;

// Configure the ucode (FP algorithm) parameters

void _dwt_configlde(int prf);

// Load ucode from OTP/ROM

void _dwt_loaducodefromrom(void);

// Read non-volatile memory

uint32 _dwt_otpread(uint16 address);

// Program the non-volatile memory

uint32 _dwt_otpprogword32(uint32 data, uint16 address);

// Upload the device configuration into always on memory

void _dwt_aonarrayupload(void);

// -------------------------------------------------------------------------------------------------------------------

/*!

 * Static data for DW1000 DecaWave Transceiver control

 */

// -------------------------------------------------------------------------------------------------------------------

// Structure to hold device data

typedef struct

{

    uint32      partID ;            // IC Part ID - read during initialisation

    uint32      lotID ;             // IC Lot ID - read during initialisation

    uint8       vBatP ;             // IC V bat read during production and stored in OTP (Vmeas @ 3V3)

    uint8       tempP ;             // IC V temp read during production and stored in OTP (Tmeas @ 23C)

    uint8       longFrames ;        // Flag in non-standard long frame mode

    uint8       otprev ;            // OTP revision number (read during initialisation)

    uint32      txFCTRL ;           // Keep TX_FCTRL register config

    uint32      sysCFGreg ;         // Local copy of system config register

    uint8       dblbuffon;          // Double RX buffer mode flag

    uint8       wait4resp ;         // wait4response was set with last TX start command

    uint16      sleep_mode;         // Used for automatic reloading of LDO tune and microcode at wake-up

    uint16      otp_mask ;          // Local copy of the OTP mask used in dwt_initialise call

    dwt_cb_data_t cbData;           // Callback data structure

    dwt_cb_t    cbTxDone;           // Callback for TX confirmation event

    dwt_cb_t    cbRxOk;             // Callback for RX good frame event

    dwt_cb_t    cbRxTo;             // Callback for RX timeout events

    dwt_cb_t    cbRxErr;            // Callback for RX error events

} dwt_local_data_t ;

static dwt_local_data_t dw1000local[DWT_NUM_DW_DEV] ; // Static local device data, can be an array to support multiple DW1000 testing applications/platforms

static dwt_local_data_t *pdw1000local = dw1000local ; // Static local data structure pointer

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_apiversion()

 *

 * @brief This function returns the version of the API as defined by DW1000_DRIVER_VERSION

 *

 * input parameters

 *

 * output parameters

 *

 * returns version (DW1000_DRIVER_VERSION)

 */

int32 dwt_apiversion(void)

{

    return DW1000_DRIVER_VERSION ;

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_setlocaldataptr()

 *

 * @brief This function sets the local data structure pointer to point to the element in the local array as given by the index.

 *

 * input parameters

 * @param index    - selects the array element to point to. Must be within the array bounds, i.e. < DWT_NUM_DW_DEV

 *

 * output parameters

 *

 * returns DWT_SUCCESS for success, or DWT_ERROR for error

 */

int dwt_setlocaldataptr(unsigned int index)

{

    // Check the index is within the array bounds

    if (DWT_NUM_DW_DEV <= index) // return error if index outside the array bounds

    {

        return DWT_ERROR ;

    }

    pdw1000local = &dw1000local[index];

    return DWT_SUCCESS ;

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_initialise()

 *

 * @brief This function initiates communications with the DW1000 transceiver

 * and reads its DEV_ID register (address 0x00) to verify the IC is one supported

 * by this software (e.g. DW1000 32-bit device ID value is 0xDECA0130).  Then it

 * does any initial once only device configurations needed for its use and initialises

 * as necessary any static data items belonging to this low-level driver.

 *

 * This function does not need to be called after DW1000 device is woken up from DEEPSLEEP,

 * the device will preserve register values e.g. LDO, UCODE, XTAL. However if needed this

 * function can be called to initialise internal structure  dw1000local[] if it has not been preserved

 * (e.g. if micro was in sleep and its RAM data (containing dw1000local structure was not preserved during sleep)

 *

 * NOTES:

 * 1. When DW1000 is powered on this function needs to be run before dwt_configuresleep,

 *    also the SPI frequency has to be < 3MHz

 * 2. It reads and applies LDO tune and crystal trim values from OTP memory

 * 3. If accurate RX timestamping is needed microcode/LDE must be loaded

 *

 * input parameters

 * @param config    -   specifies what configuration to load

 *                  DWT_LOADNONE         0x00 - do not load any values from OTP memory

 *                  DWT_LOADUCODE        0x01 - load the LDE microcode from ROM - enable accurate RX timestamp

 *                  DWT_DW_WAKE_UP       0x02 - just initialise dw1000local[] values (e.g. DW1000 has woken up)

 *                  DWT_DW_WUP_NO_UCODE  0x04 - if microcode/LDE algorithm has not already been loaded (on power up) e.g. when LDE is not used

 *                  DWT_READ_OTP_PID     0x10 - read part ID from OTP

 *                  DWT_READ_OTP_LID     0x20 - read lot ID from OTP

 *                  DWT_READ_OTP_BAT     0x40 - read ref voltage from OTP

 *                  DWT_READ_OTP_TMP     0x80 - read ref temperature from OTP

 * output parameters

 *

 * returns DWT_SUCCESS for success, or DWT_ERROR for error

 */

// OTP addresses definitions

#define LDOTUNE_ADDRESS (0x04)

#define PARTID_ADDRESS (0x06)

#define LOTID_ADDRESS  (0x07)

#define VBAT_ADDRESS   (0x08)

#define VTEMP_ADDRESS  (0x09)

#define XTRIM_ADDRESS  (0x1E)

int dwt_initialise(int config)

{

    uint16 otp_xtaltrim_and_rev = 0;

    uint32 ldo_tune = 0;

    pdw1000local->dblbuffon = 0; // - set to 0 - meaning double buffer mode is off by default

    pdw1000local->wait4resp = 0; // - set to 0 - meaning wait for response not active

    pdw1000local->sleep_mode = 0; // - set to 0 - meaning sleep mode has not been configured

    pdw1000local->cbTxDone = NULL;

    pdw1000local->cbRxOk = NULL;

    pdw1000local->cbRxTo = NULL;

    pdw1000local->cbRxErr = NULL;

#if DWT_API_ERROR_CHECK

    pdw1000local->otp_mask = config ; // Save the READ_OTP config mask

#endif

    // Read and validate device ID, return -1 if not recognised

    if (DWT_DEVICE_ID != dwt_readdevid()) // MP IC ONLY (i.e. DW1000) FOR THIS CODE

    {

        return DWT_ERROR ;

    }

    if(!(DWT_DW_WAKE_UP & config)) // Don't reset the device if DWT_DW_WAKE_UP bit is set, e.g. when calling this API after wake up

    {

        dwt_softreset(); // Make sure the device is completely reset before starting initialisation

    }

    if(!((DWT_DW_WAKE_UP & config) && ((DWT_READ_OTP_TMP | DWT_READ_OTP_BAT | DWT_READ_OTP_LID | DWT_READ_OTP_PID | DWT_DW_WUP_RD_OTPREV)& config)))

    {

        _dwt_enableclocks(FORCE_SYS_XTI); // NOTE: set system clock to XTI - this is necessary to make sure the values read by _dwt_otpread are reliable

    }                                  // when not reading from OTP, clocks don't need to change.

    // Configure the CPLL lock detect

    dwt_write8bitoffsetreg(EXT_SYNC_ID, EC_CTRL_OFFSET, EC_CTRL_PLLLCK);

    // When DW1000 IC is initialised from power up, then the LDO value should be kicked from OTP, otherwise if this API is called after

    // DW1000 IC has been woken up (DWT_DW_WAKE_UP bit is set) this can be skipped as LDO would have already been automatically

    // kicked/loaded on wake up

    if(!(DWT_DW_WAKE_UP & config))

    {

        // Load LDO tune from OTP and kick it if there is a value actually programmed.

        ldo_tune = _dwt_otpread(LDOTUNE_ADDRESS);

        if((ldo_tune & 0xFF) != 0)

        {

            // Kick LDO tune

            dwt_write8bitoffsetreg(OTP_IF_ID, OTP_SF, OTP_SF_LDO_KICK); // Set load LDO kick bit

            pdw1000local->sleep_mode |= AON_WCFG_ONW_LLDO; // LDO tune must be kicked at wake-up

        }

    }

    else

    {   //if LDOTUNE reg contains value different from default it means it was kicked from OTP and thus set AON_WCFG_ONW_LLDO.

        if(dwt_read32bitoffsetreg(RF_CONF_ID, LDOTUNE) != LDOTUNE_DEFAULT)

            pdw1000local->sleep_mode |= AON_WCFG_ONW_LLDO;

    }

    if((!(DWT_DW_WAKE_UP & config)) || ((DWT_DW_WAKE_UP & config) && (DWT_DW_WUP_RD_OTPREV & config)))

    {

        // Read OTP revision number

        otp_xtaltrim_and_rev = _dwt_otpread(XTRIM_ADDRESS) & 0xffff;        // Read 32 bit value, XTAL trim val is in low octet-0 (5 bits)

        pdw1000local->otprev = (otp_xtaltrim_and_rev >> 8) & 0xff;          // OTP revision is the next byte

    }

    else

        pdw1000local->otprev = 0; // If OTP valuse are not used, if this API is called after DW1000 IC has been woken up

                                  // (DWT_DW_WAKE_UP bit is set), set otprev to 0

    if(!(DWT_DW_WAKE_UP & config))

    {

        // XTAL trim value is set in OTP for DW1000 module and EVK/TREK boards but that might not be the case in a custom design

        if ((otp_xtaltrim_and_rev & 0x1F) == 0) // A value of 0 means that the crystal has not been trimmed

        {

            otp_xtaltrim_and_rev = FS_XTALT_MIDRANGE ; // Set to mid-range if no calibration value inside

        }

        // Configure XTAL trim

        dwt_setxtaltrim((uint8)otp_xtaltrim_and_rev);

    }

    if(DWT_READ_OTP_PID & config)

    {

        // Load Part from OTP

        pdw1000local->partID = _dwt_otpread(PARTID_ADDRESS);

    }

    else

    {

        pdw1000local->partID = 0;

    }

    if(DWT_READ_OTP_LID & config)

    {

        // Load Lot ID from OTP

        pdw1000local->lotID = _dwt_otpread(LOTID_ADDRESS);

    }

    else

    {

        pdw1000local->lotID = 0;

    }

    if(DWT_READ_OTP_BAT & config)

    {

        // Load VBAT from OTP

        pdw1000local->vBatP = _dwt_otpread(VBAT_ADDRESS) & 0xff;

    }

    else

    {

        pdw1000local->vBatP = 0;

    }

    if(DWT_READ_OTP_TMP & config)

    {

        // Load TEMP from OTP

        pdw1000local->tempP = _dwt_otpread(VTEMP_ADDRESS) & 0xff;

    }

    else

    {

        pdw1000local->tempP = 0;

    }

    // Load leading edge detect code (LDE/microcode)

    if(!(DWT_DW_WAKE_UP & config))

    {

        if(DWT_LOADUCODE & config)

        {

            _dwt_loaducodefromrom();

            pdw1000local->sleep_mode |= AON_WCFG_ONW_LLDE; // microcode must be loaded at wake-up if loaded on initialisation

        }

        else // Should disable the LDERUN bit enable if LDE has not been loaded

        {

            uint16 rega = dwt_read16bitoffsetreg(PMSC_ID, PMSC_CTRL1_OFFSET+1) ;

            rega &= 0xFDFF ; // Clear LDERUN bit

            dwt_write16bitoffsetreg(PMSC_ID, PMSC_CTRL1_OFFSET+1, rega) ;

        }

    }

    else //if DWT_DW_WUP_NO_UCODE is set then assume that the UCODE was loaded from ROM (i.e. DWT_LOADUCODE was set on power up),

    {     //thus set AON_WCFG_ONW_LLDE, otherwise don't set the AON_WCFG_ONW_LLDE bit in the sleep_mode configuration

        if((DWT_DW_WUP_NO_UCODE & config) == 0)

        {

            pdw1000local->sleep_mode |= AON_WCFG_ONW_LLDE;

        }

    }

    _dwt_enableclocks(ENABLE_ALL_SEQ); // Enable clocks for sequencing

    // The 3 bits in AON CFG1 register must be cleared to ensure proper operation of the DW1000 in DEEPSLEEP mode.

    dwt_write8bitoffsetreg(AON_ID, AON_CFG1_OFFSET, 0x00);

    // Read system register / store local copy

    pdw1000local->sysCFGreg = dwt_read32bitreg(SYS_CFG_ID) ; // Read sysconfig register

    pdw1000local->longFrames = (pdw1000local->sysCFGreg & SYS_CFG_PHR_MODE_11) >> SYS_CFG_PHR_MODE_SHFT ; //configure longFrames

    pdw1000local->txFCTRL = dwt_read32bitreg(TX_FCTRL_ID) ;

    return DWT_SUCCESS ;

} // end dwt_initialise()

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_otprevision()

 *

 * @brief This is used to return the read OTP revision

 *

 * NOTE: dwt_initialise() must be called prior to this function so that it can return a relevant value.

 *

 * input parameters

 *

 * output parameters

 *

 * returns the read OTP revision value

 */

uint8 dwt_otprevision(void)

{

    return pdw1000local->otprev ;

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_setfinegraintxseq()

 *

 * @brief This function enables/disables the fine grain TX sequencing (enabled by default).

 *

 * input parameters

 * @param enable - 1 to enable fine grain TX sequencing, 0 to disable it.

 *

 * output parameters none

 *

 * no return value

 */

void dwt_setfinegraintxseq(int enable)

{

    if (enable)

    {

        dwt_write16bitoffsetreg(PMSC_ID, PMSC_TXFINESEQ_OFFSET, PMSC_TXFINESEQ_ENABLE);

    }

    else

    {

        dwt_write16bitoffsetreg(PMSC_ID, PMSC_TXFINESEQ_OFFSET, PMSC_TXFINESEQ_DISABLE);

    }

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_setlnapamode()

 *

 * @brief This is used to enable GPIO for external LNA or PA functionality - HW dependent, consult the DW1000 User Manual.

 *        This can also be used for debug as enabling TX and RX GPIOs is quite handy to monitor DW1000's activity.

 *

 * NOTE: Enabling PA functionality requires that fine grain TX sequencing is deactivated. This can be done using

 *       dwt_setfinegraintxseq().

 *

 * input parameters

 * @param lna_pa - bit field: bit 0 if set will enable LNA functionality,

 *                          : bit 1 if set will enable PA functionality,

 *                          : to disable LNA/PA set the bits to 0

 *

 * no return value

 */

void dwt_setlnapamode(int lna_pa)

{

    uint32 gpio_mode = dwt_read32bitoffsetreg(GPIO_CTRL_ID, GPIO_MODE_OFFSET);

    gpio_mode &= ~(GPIO_MSGP4_MASK | GPIO_MSGP5_MASK | GPIO_MSGP6_MASK);

    if (lna_pa & DWT_LNA_ENABLE)

    {

        gpio_mode |= GPIO_PIN6_EXTRXE;

    }

    if (lna_pa & DWT_PA_ENABLE)

    {

        gpio_mode |= (GPIO_PIN5_EXTTXE | GPIO_PIN4_EXTPA);

    }

    dwt_write32bitoffsetreg(GPIO_CTRL_ID, GPIO_MODE_OFFSET, gpio_mode);

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_enablegpioclocks()

 *

 * @brief This is used to enable GPIO clocks. The clocks are needed to ensure correct GPIO operation

 *

 * input parameters

 *

 * output parameters

 *

 * no return value

 */

void dwt_enablegpioclocks(void)

{

    uint32 pmsc_clock_ctrl = dwt_read32bitreg(PMSC_ID);

    dwt_write32bitreg(PMSC_ID, pmsc_clock_ctrl | PMSC_CTRL0_GPCE | PMSC_CTRL0_GPRN) ;

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_setgpiodirection()

 *

 * @brief This is used to set GPIO direction as an input (1) or output (0)

 *

 * input parameters

 * @param gpioNum    -   this is the GPIO to configure - see GxM0... GxM8 in the deca_regs.h file

 * @param direction  -   this sets the GPIO direction - see GxP0... GxP8 in the deca_regs.h file

 *

 * output parameters

 *

 * no return value

 */

void dwt_setgpiodirection(uint32 gpioNum, uint32 direction)

{

    uint8 buf[GPIO_DIR_LEN];

    uint32 command = direction | gpioNum;

    buf[0] = command & 0xff;

    buf[1] = (command >> 8) & 0xff;

    buf[2] = (command >> 16) & 0xff;

    dwt_writetodevice(GPIO_CTRL_ID, GPIO_DIR_OFFSET, GPIO_DIR_LEN, buf);

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_setgpiovalue()

 *

 * @brief This is used to set GPIO value as (1) or (0) only applies if the GPIO is configured as output

 *

 * input parameters

 * @param gpioNum    -   this is the GPIO to configure - see DWT_GxP0... DWT_GxP8

 * @param value  -   this sets the GPIO value - see DWT_GxP0... DWT_GxP8

 *

 * output parameters

 *

 * no return value

 */

void dwt_setgpiovalue(uint32 gpioNum, uint32 value)

{

    uint8 buf[GPIO_DOUT_LEN];

    uint32 command = value | gpioNum;

    buf[0] = command & 0xff;

    buf[1] = (command >> 8) & 0xff;

    buf[2] = (command >> 16) & 0xff;

    dwt_writetodevice(GPIO_CTRL_ID, GPIO_DOUT_OFFSET, GPIO_DOUT_LEN, buf);

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_getgpiovalue()

 *

 * @brief This is used to return 1 or 0 depending if the depending if the GPIO is high or low, only one GPIO should

 *        be tested at a time

 *

 * input parameters

 * @param gpioNum    -   this is the GPIO to configure - see DWT_GxP0... DWT_GxP8

 *

 * output parameters

 *

 * return int (1 or 0)

 */

int dwt_getgpiovalue(uint32 gpioNum)

{

    return ((dwt_read32bitoffsetreg(GPIO_CTRL_ID, GPIO_RAW_OFFSET) & gpioNum)? 1 : 0);

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_geticrefvolt()

 *

 * @brief This is used to return the read V measured @ 3.3 V value recorded in OTP address 0x8 (VBAT_ADDRESS)

 *

 * NOTE: dwt_initialise() must be called prior to this function so that it can return a relevant value.

 *

 * input parameters

 *

 * output parameters

 *

 * returns the 8 bit V bat value as programmed in the factory

 */

uint8 dwt_geticrefvolt(void)

{

#ifdef DWT_API_ERROR_CHECK

    assert(pdw1000local->otp_mask & DWT_READ_OTP_BAT);

#endif

    return pdw1000local->vBatP;

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_geticreftemp()

 *

 * @brief This is used to return the read T measured @ 23 C value recorded in OTP address 0x9 (VTEMP_ADDRESS)

 *

 * NOTE: dwt_initialise() must be called prior to this function so that it can return a relevant value.

 *

 * input parameters

 *

 * output parameters

 *

 * returns the 8 bit V temp value as programmed in the factory

 */

uint8 dwt_geticreftemp(void)

{

#ifdef DWT_API_ERROR_CHECK

    assert(pdw1000local->otp_mask & DWT_READ_OTP_TMP);

#endif

    return pdw1000local->tempP;

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_getpartid()

 *

 * @brief This is used to return the read part ID (or chip ID) of the device

 *

 * NOTE: dwt_initialise() must be called prior to this function so that it can return a relevant value (stored in OTP).

 *

 * input parameters

 *

 * output parameters

 *

 * returns the 32 bit part ID (or chip ID) value as programmed in the factory

 */

uint32 dwt_getpartid(void)

{

#ifdef DWT_API_ERROR_CHECK

    assert(pdw1000local->otp_mask & DWT_READ_OTP_PID);

#endif

    return pdw1000local->partID;

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_getlotid()

 *

 * @brief This is used to return the read lot ID of the device

 *

 * NOTE: dwt_initialise() must be called prior to this function so that it can return a relevant value.

 *

 * input parameters

 *

 * output parameters

 *

 * returns the 32 bit lot ID value as programmed in the factory

 */

uint32 dwt_getlotid(void)

{

#ifdef DWT_API_ERROR_CHECK

    assert(pdw1000local->otp_mask & DWT_READ_OTP_LID);

#endif

    return pdw1000local->lotID;

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_readdevid()

 *

 * @brief This is used to return the read device type and revision information of the DW1000 device (MP part is 0xDECA0130)

 *

 * input parameters

 *

 * output parameters

 *

 * returns the read value which for DW1000 is 0xDECA0130

 */

uint32 dwt_readdevid(void)

{

    return dwt_read32bitoffsetreg(DEV_ID_ID,0);

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_configuretxrf()

 *

 * @brief This function provides the API for the configuration of the TX spectrum

 * including the power and pulse generator delay. The input is a pointer to the data structure

 * of type dwt_txconfig_t that holds all the configurable items.

 *

 * input parameters

 * @param config    -   pointer to the txrf configuration structure, which contains the tx rf config data

 *

 * output parameters

 *

 * no return value

 */

void dwt_configuretxrf(dwt_txconfig_t *config)

{

    // Configure RF TX PG_DELAY

    dwt_write8bitoffsetreg(TX_CAL_ID, TC_PGDELAY_OFFSET, config->PGdly);

    // Configure TX power

    dwt_write32bitreg(TX_POWER_ID, config->power);

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_configurefor64plen()

 *  - Use default OPS table should be used with following register modifications:

 *    These modifications optimise the default OPS configuration further for 64 length preamble use case

 *

 * NOTE: These register settings are not preserved during SLEEP/DEEPSLEEP, thus they should be programmed again after wake up

 *

 * input parameters

 * @param prf

 *

 * output parameters

 *

 * no return value

 */

void dwt_configurefor64plen(int prf)

{

    dwt_write8bitoffsetreg(CRTR_ID, CRTR_GEAR_OFFSET, DEMOD_GEAR_64L);

    if(prf == DWT_PRF_16M)

    {

        dwt_write8bitoffsetreg(DRX_CONF_ID, DRX_TUNE2_OFFSET+2, DRX_TUNE2_UNCONF_SFD_TH_PRF16);

    }

    else

    {

        dwt_write8bitoffsetreg(DRX_CONF_ID, DRX_TUNE2_OFFSET+2, DRX_TUNE2_UNCONF_SFD_TH_PRF64);

    }

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_configure()

 *

 * @brief This function provides the main API for the configuration of the

 * DW1000 and this low-level driver.  The input is a pointer to the data structure

 * of type dwt_config_t that holds all the configurable items.

 * The dwt_config_t structure shows which ones are supported

 *

 * input parameters

 * @param config    -   pointer to the configuration structure, which contains the device configuration data.

 *

 * output parameters

 *

 * no return value

 */

void dwt_configure(dwt_config_t *config)

{

    uint8 nsSfd_result  = 0;

    uint8 useDWnsSFD = 0;

    uint8 chan = config->chan ;

    uint32 regval ;

    uint16 reg16 = lde_replicaCoeff[config->rxCode];

    uint8 prfIndex = config->prf - DWT_PRF_16M;

    uint8 bw = ((chan == 4) || (chan == 7)) ? 1 : 0 ; // Select wide or narrow band

#ifdef DWT_API_ERROR_CHECK

    assert(config->dataRate <= DWT_BR_6M8);

    assert(config->rxPAC <= DWT_PAC64);

    assert((chan >= 1) && (chan <= 7) && (chan != 6));

    assert(((config->prf == DWT_PRF_64M) && (config->txCode >= 9) && (config->txCode <= 24))

           || ((config->prf == DWT_PRF_16M) && (config->txCode >= 1) && (config->txCode <= 8)));

    assert(((config->prf == DWT_PRF_64M) && (config->rxCode >= 9) && (config->rxCode <= 24))

           || ((config->prf == DWT_PRF_16M) && (config->rxCode >= 1) && (config->rxCode <= 8)));

    assert((config->txPreambLength == DWT_PLEN_64) || (config->txPreambLength == DWT_PLEN_128) || (config->txPreambLength == DWT_PLEN_256)

           || (config->txPreambLength == DWT_PLEN_512) || (config->txPreambLength == DWT_PLEN_1024) || (config->txPreambLength == DWT_PLEN_1536)

           || (config->txPreambLength == DWT_PLEN_2048) || (config->txPreambLength == DWT_PLEN_4096));

    assert((config->phrMode == DWT_PHRMODE_STD) || (config->phrMode == DWT_PHRMODE_EXT));

#endif

    // For 110 kbps we need a special setup

    if(DWT_BR_110K == config->dataRate)

    {

        pdw1000local->sysCFGreg |= SYS_CFG_RXM110K ;

        reg16 >>= 3; // lde_replicaCoeff must be divided by 8

    }

    else

    {

        pdw1000local->sysCFGreg &= (~SYS_CFG_RXM110K) ;

    }

    pdw1000local->longFrames = config->phrMode ;

    pdw1000local->sysCFGreg &= ~SYS_CFG_PHR_MODE_11;

    pdw1000local->sysCFGreg |= (SYS_CFG_PHR_MODE_11 & ((uint32)config->phrMode << SYS_CFG_PHR_MODE_SHFT));

    dwt_write32bitreg(SYS_CFG_ID,pdw1000local->sysCFGreg) ;

    // Set the lde_replicaCoeff

    dwt_write16bitoffsetreg(LDE_IF_ID, LDE_REPC_OFFSET, reg16) ;

    _dwt_configlde(prfIndex);

    // Configure PLL2/RF PLL block CFG/TUNE (for a given channel)

    dwt_write32bitoffsetreg(FS_CTRL_ID, FS_PLLCFG_OFFSET, fs_pll_cfg[chan_idx[chan]]);

    dwt_write8bitoffsetreg(FS_CTRL_ID, FS_PLLTUNE_OFFSET, fs_pll_tune[chan_idx[chan]]);

    // Configure RF RX blocks (for specified channel/bandwidth)

    dwt_write8bitoffsetreg(RF_CONF_ID, RF_RXCTRLH_OFFSET, rx_config[bw]);

    // Configure RF TX blocks (for specified channel and PRF)

    // Configure RF TX control

    dwt_write32bitoffsetreg(RF_CONF_ID, RF_TXCTRL_OFFSET, tx_config[chan_idx[chan]]);

    // Configure the baseband parameters (for specified PRF, bit rate, PAC, and SFD settings)

    // DTUNE0

    dwt_write16bitoffsetreg(DRX_CONF_ID, DRX_TUNE0b_OFFSET, sftsh[config->dataRate][config->nsSFD]);

    // DTUNE1

    dwt_write16bitoffsetreg(DRX_CONF_ID, DRX_TUNE1a_OFFSET, dtune1[prfIndex]);

    if(config->dataRate == DWT_BR_110K)

    {

        dwt_write16bitoffsetreg(DRX_CONF_ID, DRX_TUNE1b_OFFSET, DRX_TUNE1b_110K);

    }

    else

    {

        if(config->txPreambLength == DWT_PLEN_64)

        {

            dwt_write16bitoffsetreg(DRX_CONF_ID, DRX_TUNE1b_OFFSET, DRX_TUNE1b_6M8_PRE64);

            dwt_write8bitoffsetreg(DRX_CONF_ID, DRX_TUNE4H_OFFSET, DRX_TUNE4H_PRE64);

        }

        else

        {

            dwt_write16bitoffsetreg(DRX_CONF_ID, DRX_TUNE1b_OFFSET, DRX_TUNE1b_850K_6M8);

            dwt_write8bitoffsetreg(DRX_CONF_ID, DRX_TUNE4H_OFFSET, DRX_TUNE4H_PRE128PLUS);

        }

    }

    // DTUNE2

    dwt_write32bitoffsetreg(DRX_CONF_ID, DRX_TUNE2_OFFSET, digital_bb_config[prfIndex][config->rxPAC]);

    // DTUNE3 (SFD timeout)

    // Don't allow 0 - SFD timeout will always be enabled

    if(config->sfdTO == 0)

    {

        config->sfdTO = DWT_SFDTOC_DEF;

    }

    dwt_write16bitoffsetreg(DRX_CONF_ID, DRX_SFDTOC_OFFSET, config->sfdTO);

    // Configure AGC parameters

    dwt_write32bitoffsetreg( AGC_CFG_STS_ID, 0xC, agc_config.lo32);

    dwt_write16bitoffsetreg( AGC_CFG_STS_ID, 0x4, agc_config.target[prfIndex]);

    // Set (non-standard) user SFD for improved performance,

    if(config->nsSFD)

    {

        // Write non standard (DW) SFD length

        dwt_write8bitoffsetreg(USR_SFD_ID, 0x00, dwnsSFDlen[config->dataRate]);

        nsSfd_result = 3 ;

        useDWnsSFD = 1 ;

    }

    regval =  (CHAN_CTRL_TX_CHAN_MASK & (chan << CHAN_CTRL_TX_CHAN_SHIFT)) | // Transmit Channel

              (CHAN_CTRL_RX_CHAN_MASK & (chan << CHAN_CTRL_RX_CHAN_SHIFT)) | // Receive Channel

              (CHAN_CTRL_RXFPRF_MASK & ((uint32)config->prf << CHAN_CTRL_RXFPRF_SHIFT)) | // RX PRF

              ((CHAN_CTRL_TNSSFD|CHAN_CTRL_RNSSFD) & ((uint32)nsSfd_result << CHAN_CTRL_TNSSFD_SHIFT)) | // nsSFD enable RX&TX

              (CHAN_CTRL_DWSFD & ((uint32)useDWnsSFD << CHAN_CTRL_DWSFD_SHIFT)) | // Use DW nsSFD

              (CHAN_CTRL_TX_PCOD_MASK & ((uint32)config->txCode << CHAN_CTRL_TX_PCOD_SHIFT)) | // TX Preamble Code

              (CHAN_CTRL_RX_PCOD_MASK & ((uint32)config->rxCode << CHAN_CTRL_RX_PCOD_SHIFT)) ; // RX Preamble Code

    dwt_write32bitreg(CHAN_CTRL_ID,regval) ;

    // Set up TX Preamble Size, PRF and Data Rate

    pdw1000local->txFCTRL = ((uint32)(config->txPreambLength | config->prf) << TX_FCTRL_TXPRF_SHFT) | ((uint32)config->dataRate << TX_FCTRL_TXBR_SHFT);

    dwt_write32bitreg(TX_FCTRL_ID, pdw1000local->txFCTRL);

    // The SFD transmit pattern is initialised by the DW1000 upon a user TX request, but (due to an IC issue) it is not done for an auto-ACK TX. The

    // SYS_CTRL write below works around this issue, by simultaneously initiating and aborting a transmission, which correctly initialises the SFD

    // after its configuration or reconfiguration.

    // This issue is not documented at the time of writing this code. It should be in next release of DW1000 User Manual (v2.09, from July 2016).

    dwt_write8bitoffsetreg(SYS_CTRL_ID, SYS_CTRL_OFFSET, SYS_CTRL_TXSTRT | SYS_CTRL_TRXOFF); // Request TX start and TRX off at the same time

} // end dwt_configure()

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_setrxantennadelay()

 *

 * @brief This API function writes the antenna delay (in time units) to RX registers

 *

 * input parameters:

 * @param rxDelay - this is the total (RX) antenna delay value, which

 *                          will be programmed into the RX register

 *

 * output parameters

 *

 * no return value

 */

void dwt_setrxantennadelay(uint16 rxDelay)

{

    // Set the RX antenna delay for auto TX timestamp adjustment

    dwt_write16bitoffsetreg(LDE_IF_ID, LDE_RXANTD_OFFSET, rxDelay);

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_settxantennadelay()

 *

 * @brief This API function writes the antenna delay (in time units) to TX registers

 *

 * input parameters:

 * @param txDelay - this is the total (TX) antenna delay value, which

 *                          will be programmed into the TX delay register

 *

 * output parameters

 *

 * no return value

 */

void dwt_settxantennadelay(uint16 txDelay)

{

    // Set the TX antenna delay for auto TX timestamp adjustment

    dwt_write16bitoffsetreg(TX_ANTD_ID, TX_ANTD_OFFSET, txDelay);

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_writetxdata()

 *

 * @brief This API function writes the supplied TX data into the DW1000's

 * TX buffer.  The input parameters are the data length in bytes and a pointer

 * to those data bytes.

 *

 * input parameters

 * @param txFrameLength  - This is the total frame length, including the two byte CRC.

 *                         Note: this is the length of TX message (including the 2 byte CRC) - max is 1023

 *                         standard PHR mode allows up to 127 bytes

 *                         if > 127 is programmed, DWT_PHRMODE_EXT needs to be set in the phrMode configuration

 *                         see dwt_configure function

 * @param txFrameBytes   - Pointer to the user?s buffer containing the data to send.

 * @param txBufferOffset - This specifies an offset in the DW1000?s TX Buffer at which to start writing data.

 *

 * output parameters

 *

 * returns DWT_SUCCESS for success, or DWT_ERROR for error

 */

int dwt_writetxdata(uint16 txFrameLength, uint8 *txFrameBytes, uint16 txBufferOffset)

{

#ifdef DWT_API_ERROR_CHECK

    assert(txFrameLength >= 2);

    assert((pdw1000local->longFrames && (txFrameLength <= 1023)) || (txFrameLength <= 127));

    assert((txBufferOffset + txFrameLength) <= 1024);

#endif

    if ((txBufferOffset + txFrameLength) <= 1024)

    {

        // Write the data to the IC TX buffer, (-2 bytes for auto generated CRC)

        dwt_writetodevice( TX_BUFFER_ID, txBufferOffset, txFrameLength-2, txFrameBytes);

        return DWT_SUCCESS;

    }

    else

    {

        return DWT_ERROR;

    }

} // end dwt_writetxdata()

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_writetxfctrl()

 *

 * @brief This API function configures the TX frame control register before the transmission of a frame

 *

 * input parameters:

 * @param txFrameLength - this is the length of TX message (including the 2 byte CRC) - max is 1023

 *                              NOTE: standard PHR mode allows up to 127 bytes

 *                              if > 127 is programmed, DWT_PHRMODE_EXT needs to be set in the phrMode configuration

 *                              see dwt_configure function

 * @param txBufferOffset - the offset in the tx buffer to start writing the data

 * @param ranging - 1 if this is a ranging frame, else 0

 *

 * output parameters

 *

 * no return value

 */

void dwt_writetxfctrl(uint16 txFrameLength, uint16 txBufferOffset, int ranging)

{

#ifdef DWT_API_ERROR_CHECK

    assert((pdw1000local->longFrames && (txFrameLength <= 1023)) || (txFrameLength <= 127));

    assert((txBufferOffset + txFrameLength) <= 1024);

    assert((ranging == 0) || (ranging == 1))

#endif

    // Write the frame length to the TX frame control register

    // pdw1000local->txFCTRL has kept configured bit rate information

    uint32 reg32 = pdw1000local->txFCTRL | txFrameLength | ((uint32)txBufferOffset << TX_FCTRL_TXBOFFS_SHFT) | ((uint32)ranging << TX_FCTRL_TR_SHFT);

    dwt_write32bitreg(TX_FCTRL_ID, reg32);

} // end dwt_writetxfctrl()

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_readrxdata()

 *

 * @brief This is used to read the data from the RX buffer, from an offset location give by offset parameter

 *

 * input parameters

 * @param buffer - the buffer into which the data will be read

 * @param length - the length of data to read (in bytes)

 * @param rxBufferOffset - the offset in the rx buffer from which to read the data

 *

 * output parameters

 *

 * no return value

 */

void dwt_readrxdata(uint8 *buffer, uint16 length, uint16 rxBufferOffset)

{

    dwt_readfromdevice(RX_BUFFER_ID,rxBufferOffset,length,buffer) ;

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_readaccdata()

 *

 * @brief This is used to read the data from the Accumulator buffer, from an offset location give by offset parameter

 *

 * NOTE: Because of an internal memory access delay when reading the accumulator the first octet output is a dummy octet

 *       that should be discarded. This is true no matter what sub-index the read begins at.

 *

 * input parameters

 * @param buffer - the buffer into which the data will be read

 * @param length - the length of data to read (in bytes)

 * @param accOffset - the offset in the acc buffer from which to read the data

 *

 * output parameters

 *

 * no return value

 */

void dwt_readaccdata(uint8 *buffer, uint16 len, uint16 accOffset)

{

    // Force on the ACC clocks if we are sequenced

    _dwt_enableclocks(READ_ACC_ON);

    dwt_readfromdevice(ACC_MEM_ID,accOffset,len,buffer) ;

    _dwt_enableclocks(READ_ACC_OFF); // Revert clocks back

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_readcarrierintegrator()

 *

 * @brief This is used to read the RX carrier integrator value (relating to the frequency offset of the TX node)

 *

 * NOTE: This is a 21-bit signed quantity, the function sign extends the most significant bit, which is bit #20

 *       (numbering from bit zero) to return a 32-bit signed integer value.

 *

 * input parameters - NONE

 *

 * return value - the (int32) signed carrier integrator value.

 *                A positive value means the local RX clock is running faster than the remote TX device.

 */

#define B20_SIGN_EXTEND_TEST (0x00100000UL)

#define B20_SIGN_EXTEND_MASK (0xFFF00000UL)

int32 dwt_readcarrierintegrator(void)

{

    uint32  regval = 0 ;

    int     j ;

    uint8   buffer[DRX_CARRIER_INT_LEN] ;

    /* Read 3 bytes into buffer (21-bit quantity) */

    dwt_readfromdevice(DRX_CONF_ID,DRX_CARRIER_INT_OFFSET,DRX_CARRIER_INT_LEN, buffer) ;

    for (j = 2 ; j >= 0 ; j --)  // arrange the three bytes into an unsigned integer value

    {

        regval = (regval << 8) + buffer[j] ;

    }

    if (regval & B20_SIGN_EXTEND_TEST) regval |= B20_SIGN_EXTEND_MASK ; // sign extend bit #20 to whole word

    else regval &= DRX_CARRIER_INT_MASK ;                               // make sure upper bits are clear if not sign extending

    return (int32) regval ; // cast unsigned value to signed quantity.

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_readdiagnostics()

 *

 * @brief this function reads the RX signal quality diagnostic data

 *

 * input parameters

 * @param diagnostics - diagnostic structure pointer, this will contain the diagnostic data read from the DW1000

 *

 * output parameters

 *

 * no return value

 */

void dwt_readdiagnostics(dwt_rxdiag_t *diagnostics)

{

    // Read the HW FP index

    diagnostics->firstPath = dwt_read16bitoffsetreg(RX_TIME_ID, RX_TIME_FP_INDEX_OFFSET);

    // LDE diagnostic data

    diagnostics->maxNoise = dwt_read16bitoffsetreg(LDE_IF_ID, LDE_THRESH_OFFSET);

    // Read all 8 bytes in one SPI transaction

    dwt_readfromdevice(RX_FQUAL_ID, 0x0, 8, (uint8*)&diagnostics->stdNoise);

    diagnostics->firstPathAmp1 = dwt_read16bitoffsetreg(RX_TIME_ID, RX_TIME_FP_AMPL1_OFFSET);

    diagnostics->rxPreamCount = (dwt_read32bitreg(RX_FINFO_ID) & RX_FINFO_RXPACC_MASK) >> RX_FINFO_RXPACC_SHIFT  ;

}

/*! ------------------------------------------------------------------------------------------------------------------

 * @fn dwt_readtxtimestamp()

 *

 * @brief This is used to read the TX timestamp (adjusted with the programmed antenna delay)

 *

 * input parameters

 * @param timestamp - a pointer to a 5-byte buffer which will store the read TX timestamp time

 *

 * output parameters - the timestamp buffer will contain the value after the function call

 *